Integrated IGBT (Insulated Gate Bipolar Translator) driving protection circuit

Abstract

The invention discloses an IGBT (Insulated Gate Bipolar Translator) driving protection circuit in an integral form, which comprises a driving IC (Integrated Circuit), an integral protection unit and a power module unit, the power module unit comprises an IGBT (Insulated Gate Bipolar Translator) and an FRD (Fast Recovery Diode), and the integral protection unit comprises an enabler, an integrator, a zero-crossing comparator and a differentiator. The enable device receives a signal output by the driving IC and controls signal transmission to transmit a grid voltage signal to the integrator, the integrator performs real-time integration on grid voltage, and the zero-crossing comparator detects whether an integral value output by the integrator crosses a zero point or not. Under the short circuit or abnormal working condition, the grid voltage rises slowly due to the increase of the load impedance, and the integral value has the characteristic of negative first and positive second. The zero-crossing comparator is used for detecting a step signal with an integral value crossing a zero point, protection can be triggered before the IGBT enters a desaturation region, response is rapid, the high damage state that the IGBT bears high voltage or large current for a long time is effectively avoided, and the failure risk of a device is remarkably reduced.

Description

Technical Field

[0001] This invention relates to the field of power module protection circuit technology, and in particular to an integral form IGBT drive protection circuit. Background Technology

[0002] IGBTs (Insulated Gate Bipolar Transistors) are core power devices in power electronic systems, widely used in frequency converters, inverters, new energy vehicles, and new energy power generation. Their performance directly affects the reliability and efficiency of the system. The safe operation of IGBTs relies on the precise control of their gate signals by the drive circuit and rapid protection against abnormal operating conditions. When an IGBT experiences an abnormally large current increase due to a load short circuit, overcurrent, or other faults, if the drive protection circuit fails to respond in time, the device will suffer irreversible damage such as overheating and breakdown due to prolonged exposure to high voltage and high current, potentially even leading to system-level failures.

[0003] Currently, there are various protection methods for IGBT power module drives. Miller clamp protection is used for parasitic turn-on, active clamp protection is used for voltage spikes, and short-circuit desaturation detection protection requires the device to enter the desaturation region before corresponding protection operations are initiated. During normal conduction, the IGBT voltage is low, but when a short circuit or abnormality occurs, the IGBT enters a desaturation state due to a surge in current. The current rises rapidly, often reaching 5-8 times the rated current, resulting in a very high IGBT voltage and extremely high instantaneous power, which can cause irreversible damage to the IGBT. Most existing technologies monitor voltage changes, and when the voltage exceeds a set threshold after the device enters desaturation, a protection signal is triggered to shut down the gate drive, preventing further damage. However, this method has a certain response lag. Desaturation is a result of IGBT failure, not an early signal. The protection circuit only activates when the IGBT enters the desaturation region, and by then, the IGBT has already generated extremely high instantaneous power and has endured high stress impacts, resulting in a slow response and irreversible damage. Summary of the Invention

[0004] In view of this, the present invention provides an integral form of IGBT drive protection circuit to solve the above-mentioned technical problems.

[0005] An integral-type IGBT drive protection circuit includes a driver IC, an integral protection unit connected to the driver IC, and a power module unit connected to the integral protection unit. The power module unit includes an IGBT and an FRD. The integral protection unit includes an enabler connected to the driver IC and the power module unit, an integrator connected to the enabler, a zero-crossing comparator connected to the integrator, and a differentiator connected to the zero-crossing comparator and the driver IC. The enabler receives a signal output by the driver IC and controls signal transmission to transmit a gate voltage signal to the integrator. The integrator integrates the gate voltage in real time. The zero-crossing comparator detects whether the integral value output by the integrator crosses zero. When the integral value changes from negative to positive, the zero-crossing comparator outputs a step signal. The differentiator converts the step signal into a pulse signal, triggering the driver IC to perform a protection operation.

[0006] Furthermore, the enabler includes a resistor R01 and an NMOS transistor Q1. One end of the resistor R01 is connected to the driver IC, and the other end is connected to the gate of the NMOS transistor Q1. The drain of the NMOS transistor Q1 is connected to the gate of the IGBT, and the source of the NMOS transistor Q1 is connected to the input terminal of the integrator.

[0007] Furthermore, the integrator includes a resistor R11, a capacitor C11, a resistor R12, a first operational amplifier, and a resistor R13. One end of the resistor R11 is connected to the source of the NMOS transistor Q1, and the other end is connected to the input terminal of the first operational amplifier. One end of the capacitor C11 is connected to the input terminal of the first operational amplifier, and the other end of the capacitor C11 is connected to the output terminal of the first operational amplifier. One end of the resistor R12 is connected to the reference terminal of the first operational amplifier, and the other end of the resistor is grounded. The output terminal of the first operational amplifier is connected to the zero-crossing comparator.

[0008] Furthermore, the integrator also includes a resistor R13, which is connected in parallel across the capacitor C11 and serves to provide a discharge path.

[0009] Furthermore, the input terminal of the zero-crossing comparator is connected to the output terminal of the first operational amplifier and is used to receive the integral value signal. The reference terminal of the zero-crossing comparator is connected to 0V ground, and the output terminal of the zero-crossing comparator is connected to the differentiator.

[0010] Furthermore, the differentiator includes a resistor R31, a capacitor C31, and a second operational amplifier. One end of the capacitor C31 is connected to the output of the zero-crossing comparator, and the other end of the capacitor C31 is connected to the input of the second operational amplifier. One end of the resistor R31 is connected to the input of the second operational amplifier, and the other end is connected to the output of the second operational amplifier. The reference terminal of the second operational amplifier is connected to 0V ground, and the output of the second operational amplifier is connected to the driver IC.

[0011] Furthermore, the integral form IGBT drive protection circuit also includes a protection unit connected to the drive IC10, which is used to provide circuit protection for critical nodes of the power module unit.

[0012] Compared with existing technologies, the IGBT drive protection circuit provided by this invention utilizes real-time integration of the IGBT gate voltage to directly capture the dynamic change trend of the gate voltage during turn-on. The integral protection unit employs three stages—integration, zero-crossing comparison, and differentiation—for fault judgment. The integrator quantifies the voltage trend, the zero-crossing comparator converts the integral value change into a clear step signal, and the differentiator further converts the step signal into a pulse trigger signal recognizable by the driver IC10. Under normal operating conditions, the gate voltage rapidly jumps from negative to positive and remains there, with the integral value always positive. However, under short-circuit or abnormal operating conditions, the gate voltage rises slowly due to increased load impedance, and the integral value exhibits a characteristic of first being negative and then positive. By detecting the step signal of the integral value crossing zero using the zero-crossing comparator, protection can be triggered before the IGBT enters the desaturation region. Traditional protection schemes typically rely on detecting the voltage signal in the IGBT desaturation region to trigger protection, requiring waiting for the device to enter the desaturation state before action can be taken, resulting in a delayed response. This solution effectively avoids the IGBT being subjected to high voltage or high current for extended periods, significantly reducing the risk of device failure. Moreover, the circuit has a short transition time and low signal distortion, ensuring high efficiency and reliability throughout the entire process from the occurrence of an abnormality to the execution of the shutdown action by the driver IC, thus meeting the stringent timeliness requirements of IGBT drive protection. Attached Figure Description

[0013] Figure 1 The circuit diagram of an integral form IGBT drive protection circuit provided by the present invention.

[0014] Figure 2 This is a schematic diagram showing the desaturation time of an integral form IGBT drive protection circuit provided by the present invention under short-circuit conditions.

[0015] Figure 3This is a schematic diagram showing the voltage integral switching time under short-circuit conditions of an IGBT drive protection circuit provided by the present invention.

[0016] Figure number descriptions: Driver IC10, Protection Unit 20, Integrating Protection Unit 30, Power Module Unit 40, Enabler 31, Integrator 32, Zero-crossing Comparator 33, Differentiator 34, Resistor R01, NMOS Transistor Q1, Resistor R11, Capacitor C11, Resistor R12, First Operational Amplifier 321, Resistor R13, Resistor R31, Capacitor C31, Second Operational Amplifier 341. Detailed Implementation

[0017] The following provides a more detailed description of specific embodiments of the present invention. It should be understood that the description of the embodiments of the present invention herein is not intended to limit the scope of protection of the present invention.

[0018] like Figure 1 The diagram shown is a circuit diagram of the integral-type IGBT drive protection circuit provided by the present invention. The integral-type IGBT drive protection circuit includes a driver IC 10, a protection unit 20 connected to the driver IC 10, an integral protection unit 30 connected to the driver IC 10, and a power module unit 40 connected to the integral protection unit 30. It is conceivable that the integral-type IGBT drive protection circuit also includes other functional modules, which are techniques well known to those skilled in the art and will not be described in detail here.

[0019] The driver IC 10 is an integrated circuit primarily used to generate and control the drive signal (PWM) of the IGBT power module and to receive fault pulse signals (FSL). It outputs a PWM pulse width modulation signal, directly controlling the gate voltage of the IGBT, thereby affecting the turn-on process and fault detection mechanism. When the integral protection unit 30 detects an abnormality, its output pulse signal is directly connected to the fault detection pin of the driver IC to trigger corresponding protection operations such as shutdown. The driver IC 10 also has other functional pins for controlling the IGBT power module and the protection unit 20; these are existing technologies and will not be described further here.

[0020] The protection unit 20 is another protection unit for the IGBT, such as electronic devices connected to the clamp pin (CLAMP) of the driver IC 10 for voltage clamping protection to limit voltage stress at critical nodes. The electronic devices connected to the clamp pin (CLAMP) of the driver IC 10 for voltage clamping protection to limit voltage stress at critical nodes are existing technology and will not be described further here.

[0021] The power module unit 40 includes an IGBT and an FRD. The power module unit 40 is the device to be protected, which should be prior art and will not be described in detail here.

[0022] The integral protection unit 30 includes an enabler 31 connected to the driver IC 10 and the power module unit 40, an integrator 32 connected to the enabler 31, a zero-crossing comparator 33 connected to the integrator 32, and a differentiator 34 connected to the zero-crossing comparator 33 and the driver IC 10.

[0023] The enabler 31 includes a resistor R01 and an NMOS transistor Q1.

[0024] One end of the resistor R01 is connected to the driver IC10, and the other end is connected to the gate of the NMOS transistor Q1. The drain of the NMOS transistor Q1 is connected to the gate of the IGBT, and the source of the NMOS transistor Q1 is connected to the input terminal of the integrator 32.

[0025] The resistor R01 is connected in series between the PWM signal and the gate of the NMOS transistor Q1 to control the turn-on speed. The NMOS transistor Q1 acts as a switching device. When the PWM signal is high, current flows through resistor R01 into the gate of the NMOS transistor Q1, turning it on. At this time, the IGBT gate voltage rises rapidly from negative to positive, ensuring that the gate signal is transmitted quickly and stably to the IGBT and integrator 32. When the PWM signal is low, the NMOS transistor Q1 is turned off, cutting off the signal transmission path, and the IGBT gate voltage is pulled back to negative, entering the off state.

[0026] The integrator 32 includes a resistor R11, a capacitor C11, a resistor R12, a first operational amplifier 321, and a resistor R13.

[0027] The resistor R11 serves as an input resistor, connecting the input signal source to the input terminal of the operational amplifier. Specifically, one end of resistor R11 is connected to the source of the NMOS transistor Q1, and the other end is connected to the input terminal of the first operational amplifier 321. One end of capacitor C11 is connected to the input terminal of the first operational amplifier 321, and the other end is connected to the output terminal of the first operational amplifier 321. One end of resistor R12 is connected to the reference terminal of the first operational amplifier 321, and the other end is grounded. Resistor R13 is connected in parallel across capacitor C11, providing a discharge path for DC current and preventing output voltage drift caused by continuous capacitor charging. The output terminal of the first operational amplifier 321 is connected to the zero-crossing comparator 33. The integrator 32 is an integrating circuit that quantifies the voltage change trend by integrating the gate voltage of the IGBT in real time.

[0028] During normal turn-on, the IGBT gate voltage jumps instantaneously from negative to positive, then passes through the IGBT threshold voltage and Miller plateau to complete turn-on. The voltage remains positive throughout this process, so the integral value of the IGBT gate voltage signal is always positive. However, when a short circuit or abnormality occurs, the gate voltage rises slowly from negative to positive, and the integral value of the voltage signal will initially be negative and then positive. Therefore, the integrator 32 integrates the IGBT gate voltage in real time to quantify the voltage change trend, converting the gate voltage into a detectable integral value, such as... Figure 2 and Figure 3 As shown, taking the normal and short-circuit test waveforms of a certain 1200V 80A device as an example, the GE voltage, CE voltage, and IC current under short-circuit and normal operating conditions are significantly different. The GE voltage integration begins at the moment the turn-on signal is issued. Under normal operating conditions, it takes approximately 9ns for the gate voltage to rise above 0, and the GE voltage integral remains positive. Under short-circuit conditions, it takes approximately 218ns for the gate voltage to rise above 0, and the GE voltage integral is initially negative and then positive. Simultaneously, under short-circuit conditions, the desaturation start time is approximately 593ns. The GE voltage integration flip time is approximately 411ns. The integration flip time is approximately 30% earlier than the desaturation time (182ns). Therefore, traditional solutions require waiting for the device to enter the desaturation region before operating, resulting in a slow response. The integrator 32, by integrating the GE voltage, captures the early abnormal signal of the slow GE voltage rise, reaching the threshold earlier than traditional solutions. This allows for earlier intervention and protection triggering, preventing the IGBT from entering the high-damage desaturation region.

[0029] The input terminal of the zero-crossing comparator 33 is connected to the output terminal of the first operational amplifier 321 and is used to receive the integral value signal. The reference terminal of the zero-crossing comparator 33 is connected to 0V ground, and the output terminal of the zero-crossing comparator 33 is connected to the differentiator 34. The integral value output by the integrator 32 is input to the input terminal of the zero-crossing comparator 33. The zero-crossing comparator 33 compares in real time. When the integral value changes from negative to positive by crossing zero, the output jumps from low level to high level, generating a step signal. Under normal operating conditions, the integral value is always positive, and the output of the zero-crossing comparator 33 remains high, without a step signal. The zero-crossing comparator 33 converts the change in integral value into a clear fault indication signal, which can be triggered only when the integral value crosses zero, without waiting for desaturation.

[0030] The differentiator 34 includes a resistor R31, a capacitor C31, and a second operational amplifier 341. One end of the capacitor C31 is connected to the output of the zero-crossing comparator 33, and the other end of the capacitor C31 is connected to the input of the second operational amplifier 341. One end of the resistor R31 is connected to the input of the second operational amplifier 341, and the other end is connected to the output of the second operational amplifier 341. The reference terminal of the second operational amplifier 341 is connected to 0V ground, and the output of the second operational amplifier 341 is connected to the driver IC 10 to transmit a pulse signal. The differentiator 34 converts the step signal output by the zero-crossing comparator 33 into a pulse voltage and sends it to the driver IC 10 to trigger the protection action of the driver IC.

[0031] Compared with existing technologies, the IGBT drive protection circuit provided by this invention utilizes real-time integration of the IGBT gate voltage to directly capture the dynamic change trend of the gate voltage during turn-on. The integral protection unit 30 employs three stages—integration, zero-crossing comparison, and differentiation—for fault judgment. The integrator 32 quantifies the voltage trend, the zero-crossing comparator 33 converts the integral value change into a clear step signal, and the differentiator 34 further converts the step signal into a pulse trigger signal recognizable by the drive IC 10. Under normal operating conditions, the gate voltage rapidly jumps from negative to positive and remains there, with the integral value always positive. However, under short-circuit or abnormal operating conditions, the gate voltage rises slowly due to increased load impedance, and the integral value exhibits a characteristic of first being negative and then positive. By detecting the step signal of the integral value crossing zero using the zero-crossing comparator 33, protection can be triggered before the IGBT enters the desaturation region. Traditional protection schemes typically rely on detecting the voltage signal in the IGBT desaturation region to trigger protection, requiring waiting for the device to enter the desaturation state before action can be taken, resulting in a delayed response. This solution effectively avoids the high-damage state of IGBTs subjected to high voltage or high current for extended periods, significantly reducing the risk of device failure. Furthermore, the circuit's short transition time and low signal distortion ensure efficient and reliable operation throughout the entire process from the occurrence of an anomaly to the driver IC executing a shutdown action, meeting the stringent timeliness requirements of IGBT drive protection.

[0032] The above are merely preferred embodiments of the present invention and are not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions or improvements within the spirit of the present invention are covered within the scope of the claims of the present invention.

Claims

1. An integral form IGBT drive protection circuit, characterized in that: The integral IGBT drive protection circuit includes a driver IC, an integral protection unit connected to the driver IC, and a power module unit connected to the integral protection unit. The power module unit includes an IGBT and an FRD. The integral protection unit includes an enabler connected to the driver IC and the power module unit, an integrator connected to the enabler, a zero-crossing comparator connected to the integrator, and a differentiator connected to the zero-crossing comparator and the driver IC. The enabler receives the signal output by the driver IC and controls the signal transmission to transmit the gate voltage signal to the integrator. The integrator integrates the gate voltage in real time. The zero-crossing comparator detects whether the integral value output by the integrator crosses zero. When the integral value changes from negative to positive after crossing zero, the zero-crossing comparator outputs a step signal. The differentiator converts the step signal into a pulse signal, triggering the driver IC to perform a protection operation.

2. The IGBT drive protection circuit in integral form as described in claim 1, characterized in that: The enabler includes a resistor R01 and an NMOS transistor Q1. One end of the resistor R01 is connected to the driver IC, and the other end is connected to the gate of the NMOS transistor Q1. The drain of the NMOS transistor Q1 is connected to the gate of the IGBT, and the source of the NMOS transistor Q1 is connected to the input terminal of the integrator.

3. The IGBT drive protection circuit in integral form as described in claim 2, characterized in that: The integrator includes a resistor R11, a capacitor C11, a resistor R12, a first operational amplifier, and a resistor R13. One end of the resistor R11 is connected to the source of the NMOS transistor Q1, and the other end is connected to the input of the first operational amplifier. One end of the capacitor C11 is connected to the input of the first operational amplifier, and the other end is connected to the output of the first operational amplifier. One end of the resistor R12 is connected to the reference terminal of the first operational amplifier, and the other end is grounded. The output of the first operational amplifier is connected to the zero-crossing comparator.

4. The IGBT drive protection circuit in integral form as described in claim 3, characterized in that: The integrator also includes a resistor R13, which is connected in parallel across the capacitor C11 and is used to provide a discharge path.

5. The integral form IGBT drive protection circuit as described in claim 3, characterized in that: The input terminal of the zero-crossing comparator is connected to the output terminal of the first operational amplifier and is used to receive the integral value signal. The reference terminal of the zero-crossing comparator is connected to 0V ground, and the output terminal of the zero-crossing comparator is connected to the differentiator.

6. The IGBT drive protection circuit in integral form as described in claim 1, characterized in that: The differentiator includes a resistor R31, a capacitor C31, and a second operational amplifier. One end of the capacitor C31 is connected to the output of the zero-crossing comparator, and the other end of the capacitor C31 is connected to the input of the second operational amplifier. One end of the resistor R31 is connected to the input of the second operational amplifier, and the other end is connected to the output of the second operational amplifier. The reference terminal of the second operational amplifier is connected to 0V ground, and the output of the second operational amplifier is connected to the driver IC.

7. The IGBT drive protection circuit in integral form as described in claim 1, characterized in that: The integral form IGBT drive protection circuit also includes a protection unit connected to the drive IC, which is used to protect the critical nodes of the power module unit.

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