Semiconductor inspection system with deep neural network

By employing a combination of a backbone network and multiple head networks in the semiconductor inspection system, the problem of time-consuming loading and unloading of deep neural network models is solved, achieving efficient multi-task inspection processing and improving the system's processing capabilities.

CN121986356APending Publication Date: 2026-05-05ORBOTECH LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
ORBOTECH LTD
Filing Date
2024-11-15
Publication Date
2026-05-05

AI Technical Summary

Technical Problem

In existing semiconductor manufacturing processes, the loading and unloading of deep neural network models is time-consuming, affecting the inspection throughput and making it difficult to efficiently handle multiple inspection tasks.

Method used

By employing a deep neural network system and combining a backbone network with multiple head networks, multiple head networks for different AI tasks are packaged into a single model to achieve rapid switching and parallel processing, thereby reducing model loading and unloading time.

Benefits of technology

It improves the processing efficiency of semiconductor inspection systems, enabling more image-based inference tasks to be executed per second, supporting the simultaneous processing of multiple inspection tasks, and reducing model switching time.

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Abstract

In a system, such as an optical inspection system, a light source generates a light beam; a stage holding a workpiece in a path of the light beam; a detector receives the light beam reflected from the workpiece; and a processor in electronic communication with the detector. The processor is configured to operate a deep neural network including a backbone network and a plurality of header networks connected to a top layer. Each of the head networks is configured to be used during inspection of an image of the workpiece generated using data from the detector.
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Description

[0001] Cross-reference of related applications

[0002] This application claims priority to provisional patent application No. 63 / 607,106, filed and assigned on December 7, 2023, the contents of which are hereby incorporated herein by reference. Technical Field

[0003] This disclosure relates to semiconductor testing. Background Technology

[0004] The evolution of the semiconductor manufacturing industry places higher demands on yield management, and specifically on measurement and inspection systems. Critical dimensions continue to shrink, but the industry needs to reduce the time required to achieve high-yield, high-value production. Minimizing the total time from detecting yield problems to resolving them determines the return on investment for semiconductor manufacturers.

[0005] Manufacturing semiconductor devices (such as logic and memory devices) typically involves processing a workpiece (such as a semiconductor wafer) using numerous manufacturing processes to form the various features and multiple layers of the semiconductor device. For example, photolithography is a semiconductor manufacturing process involving transferring a pattern from a photomask to a photoresist disposed on a semiconductor wafer. Additional examples of semiconductor manufacturing processes include, but are not limited to, chemical mechanical polishing (CMP), etching, deposition, and ion implantation. The arrangement of multiple semiconductor devices manufactured on a single semiconductor wafer can be separated into individual semiconductor devices.

[0006] Inspection processes are used at various steps during semiconductor manufacturing to detect defects on wafers, thereby promoting higher yields and thus higher profits in the manufacturing process. Inspection has always been a crucial part of manufacturing semiconductor devices, such as integrated circuits (ICs). However, as the size of semiconductor devices shrinks, inspection becomes even more critical for successfully manufacturing acceptable semiconductor devices, as even small defects can cause device failure. For example, as the size of semiconductor devices decreases, the detection of defects of decreasing size becomes necessary because even relatively small defects can introduce unwanted aberrations in the semiconductor device.

[0007] However, as design rules shrink, semiconductor manufacturing processes can operate closer to the performance limits of the process. Furthermore, with shrinking design rules, even smaller defects can impact the electrical parameters of the device, driving more sensitive inspection. As design rules shrink, the population of potential yield-related defects detected by inspection increases dramatically, as does the population of interfering defects detected by inspection. Therefore, more defects can be detected on the wafer, and corrective processes to eliminate all defects can be difficult and expensive. Determining which defects actually affect the device's electrical parameters and yield allows process control methods to focus on those defects while largely ignoring others. Moreover, under smaller design rules, in some cases, process-induced failures tend to be systematic. That is, process-induced failures tend to fail with predetermined design patterns that typically repeat multiple times within the design. Eliminating spatially systematic, electrically related defects can impact yield.

[0008] Deep neural networks (DNNs) can be used to identify and classify defects in images, but DNNs have limitations. Previously, image-based DNNs operated by saving models to binary files prepared for inference, such as TensorFlow or Torch. During inference time, the binary model was loaded into CPU or GPU memory using a dedicated C++ library or Python. If the model did not fit into available GPU memory, it was not loaded into memory. For example, a 20 GB model could not fit into a 12 GB GPU device. Loading the model into memory could take several seconds because the GPU device needed to allocate hundreds of Unified Computing Architecture (CUDA) buffers and load a large number of network weights into memory. After loading, the model could be used. However, if different inspection tasks required different models, the model needed to be unloaded and a new model loaded in its place. This unloading and loading process was time-consuming, slowing down inspection processing. New systems and technologies are needed. Summary of the Invention

[0009] In a first embodiment, a system is provided. The system includes: a light source that generates a light beam; a stage configured to hold a workpiece (e.g., a semiconductor wafer) in the path of the light beam; a detector that receives the light beam reflected from the workpiece; a processor (e.g., a CPU or GPU) in electronic communication with the detector; and an electronic data storage unit in electronic communication with the processor. The processor is configured to operate a deep neural network comprising a backbone network and a plurality of head networks connected to a top layer. Each of the head networks is configured to be used during the inspection of an image of the workpiece generated using data from the detector. The deep neural network is stored on the electronic data storage unit.

[0010] Each of the head networks can be configured to perform image classification, image regression, object detection, dense segmentation, instance segmentation, or depth estimation.

[0011] One or more of the head networks can be configured to operate simultaneously.

[0012] The deep neural network can be configured to change among the plurality of head networks during the inspection of the image.

[0013] In a second embodiment, a method is provided. The method includes receiving an image of a workpiece (e.g., a semiconductor wafer) at a processor (e.g., a CPU or GPU). The image is then examined using the processor. The examination utilizes a deep neural network comprising a backbone network and multiple head networks connected to a top layer. Each of the head networks is configured for use during the examination of the image.

[0014] The method may include directing a light beam to the workpiece, receiving the light beam reflected from the workpiece at a detector, and transmitting data from the detector to the processor to generate the image.

[0015] Each of the head networks can be configured to perform image classification, image regression, object detection, dense segmentation, instance segmentation, or depth estimation.

[0016] One or more of the head networks can be configured to operate simultaneously.

[0017] The deep neural network can be configured to change among the plurality of head networks during the inspection of the image.

[0018] In a third embodiment, a non-transitory computer-readable storage medium is provided. The non-transitory computer-readable storage medium includes one or more processes for performing the following steps on one or more computing devices. The steps include receiving an image of a workpiece (e.g., a semiconductor wafer) and examining the image using a deep neural network comprising a backbone network and multiple head networks connected to a top layer. Each of the head networks is configured for use during the examination of the image.

[0019] Each of the head networks can be configured to perform image classification, image regression, object detection, dense segmentation, instance segmentation, or depth estimation.

[0020] One or more of the head networks can be configured to operate simultaneously.

[0021] The deep neural network can be configured to change among the plurality of head networks during the inspection of the image. Attached Figure Description

[0022] For a more complete understanding of the nature and purpose of this disclosure, reference should be made to the following detailed description taken in conjunction with the accompanying drawings, wherein:

[0023] Figure 1 and 2 This is a flowchart illustrating an embodiment of the DNN according to the present disclosure; and

[0024] Figure 3 This is a block diagram demonstrating a demonstrative testing system. Detailed Implementation

[0025] Although the claimed subject matter will be described according to certain embodiments, other embodiments (including those that do not provide all the advantages and features set forth herein) are also within the scope of this disclosure. Various structural, logical, procedural, and electronic changes may be made without departing from the scope of this disclosure. Therefore, the scope of this disclosure is defined only by reference to the appended claims.

[0026] The embodiments disclosed herein describe a method for loading several DNNs based on the same backbone network. Most image processing and computer vision algorithms use self-supervised networks as a backbone to extract features from a given image. A backbone means that a DNN consists of at least two consecutive subnetworks: a backbone network and a head network. For example, a frozen DNN may contain a binary pre-trained DNN saved as a single binary file with all network weights. The head network is a specific network that can be used for AI tasks such as image classification, image regression, object detection, dense segmentation, instance segmentation, depth estimation, or other verification techniques.

[0027] Figure 1 and 2 This document illustrates embodiments of a DNN according to the present disclosure. The embodiments disclosed herein may use a processor, such as a GPU, TPU, or CPU. In one embodiment, an image of a workpiece (e.g., a semiconductor wafer or a device on a portion of a semiconductor wafer) is received. This image may be generated using data from a detector in an inspection system. For example, a light beam may be directed to the workpiece. Light reflected from the workpiece may be received at a detector. Data from the detector may be transmitted to a processor to generate an image.

[0028] Next, a DNN is used to examine the image. The DNN consists of a backbone network and multiple head networks connected to the top layer. Each of the head networks is configured to be used during image examination. For example, each head network is configured to perform image classification, image regression, object detection, dense segmentation, instance segmentation, depth estimation, or other functions. Each head network can be configured to connect to the output shape of the backbone network. Figure 1The head network comprises a first-class classification head network, a second-class classification head network, a logistic regression head network, a dense segmentation head network, and a depth estimation head network. Other combinations of head networks are possible and Figure 1 This is just one example. For instance, an anomaly detection head network could be used.

[0029] A program client (e.g., a C++ program client) can train a set of DNN models for different AI tasks, all based on the same bone intervention training network. The network is packaged as a multi-head network, meaning a single model with a single backbone body and multiple head networks connected to the top layer of the backbone network. This means enabling multiple different AI tasks, each with its own head network connected to the backbone network. A larger model is loaded into memory at once, and this model can serve multiple different AI tasks simultaneously after being loaded. This avoids loading multiple models into memory or previous load / unload processes. One or more of the head networks can process different images simultaneously during operation. For example, each of the head networks can process different images simultaneously. In the example, a batch of 32 images is processed simultaneously by all the head networks. The output will have the shape of all the connected head networks.

[0030] Figure 2 The loading of the backbone and changes between head networks during testing are shown using the numbered timeline at the bottom. Head networks can be toggled to attach (#2) after the backbone network is loaded (#1). Various head networks can be attached and detached as needed during testing. Head networks can be operated simultaneously or sequentially, at least partially. For example, in... Figure 2 In the model, the first classification head network is detached at time #3 across the bottom of the timeline, and the logistic regression head network is attached at time #4. The head networks can be switched as needed. During the switching process, the model may be unavailable for serving requests. One head network is detached, and another head network can replace it. After the new head network replaces the previous one, inference can continue as usual.

[0031] The embodiments disclosed herein enable several switchable head approaches, such as wrapping four different AI image classification networks into a single model. For example, two, three, five, or more different AI classification networks can be used. The embodiments disclosed herein can also wrap two classification models together with a dense segmentation model and a single depth estimation model into a single model. The number of head networks can depend on the processing memory. For example, if each head network is approximately 100 MB, then a GPU with 1 GB of memory can load ten head networks.

[0032] The embodiments disclosed herein can also replace the head network or several head networks from the loaded model in real time, so that the model can remain in memory when one of its head networks is replaced. Therefore, for a single image, the DNN can replace the head network of the same image several times. For example, in the prior art, unloading and reloading a model can take several seconds, while detaching and attaching a new head network can take hundreds of milliseconds.

[0033] In this example, the backbone model can occupy 10 GB of memory. Using the embodiments disclosed herein, when the head network is replaced, only the memory consumed by that head network is released. Normally, the entire model is released from main memory and must be reallocated and loaded each time.

[0034] In another example, there are three head networks: a classification head network that predicts yes / no if the image has a suspected defect; a head network that generates a defect detection map per pixel; and an image regression head network that predicts the defect size in pixels. These three head networks can be connected to the same backbone network. Images can be processed sequentially by these three head networks. The head networks can re-examine the same batch of input images.

[0035] The backbone network can use pre-trained networks, such as DINOv2 or other backbone networks. DINOv2 is a method for training computer vision models using self-supervised learning. Similar to other self-supervised systems, models using the DINOv2 method can be trained on assemblies of unlabeled images. DINOv2 provides features that can be directly used as input to simple linear classifiers, meaning that DINOv2 can be used to build versatile backbones for many different computer vision tasks. DINOv2 can also be used for depth estimation, image segmentation, classification, and example retrieval. Additional details about DINOv2 are described in Oquab et al.'s "DINOv2: Learning Robust Visual Features without Supervision" (April 2023), the relevant sections of which are incorporated herein by reference.

[0036] The embodiments disclosed herein can perform more image-based inferences per second on a single CPU or GPU device. Therefore, on the same hardware, the verification system can execute more pixels per second because a multi-head system based on a single backbone can be packaged into a single AI model. A set of desired AI models can be packaged (e.g., based on memory capacity) into a single loadable model and loaded into the processor, and a single loaded DNN model can be used to serve multiple different clients. Executing a set of DNNs all attached to a single backbone network means that the single model will have the output of several algorithms for a given input image.

[0037] DNNs (such as Convolutional Neural Networks (CNNs), Visual Transformer Networks (VITs), Residual Networks (ResNets), or Autoencoders (UNETs)) can be executed by a processor. DNNs can have one of the configurations further described herein. Rooted in neural network technology, deep learning is a probabilistic graphical model with multiple layers of neurons, often referred to as a deep architecture. Deep learning techniques process information, such as images, text, and speech, in a hierarchical manner. When using deep learning as described in this disclosure, feature extraction is automatically performed using data learned from it.

[0038] Generally speaking, deep learning (also known as deep structured learning, hierarchical learning, or deep machine learning) is a branch of machine learning based on a set of algorithms that attempt to model higher-order abstractions in data. In a simple case, there may be two sets of neurons: one set receives input signals and the other set sends output signals. When an input layer receives input, it passes a modified version of the input to the next layer. In deep networks, there are many layers between input and output to allow the algorithm to use multiple processing layers consisting of multiple linear and nonlinear transformations.

[0039] Deep learning is part of a broader family of machine learning methods that learn representations based on data. Observations (e.g., features to be extracted for reference) can be represented in many ways, such as a vector of intensity values ​​per pixel, or in a more abstract way as a set of edges, regions of a specific shape, etc. Some representations are better than others at simplifying learning tasks (e.g., face recognition or facial expression recognition). Deep learning provides efficient algorithms for unsupervised or semi-supervised feature learning and hierarchical feature extraction.

[0040] Research in this field seeks to produce better representations and build models that learn these representations from large-scale data. Some representations are inspired by advances in neuroscience and are largely based on the interpretation of information processing and communication patterns in the nervous system, such as neural codes that attempt to define the relationships between various stimuli in the brain and their associated neuronal responses.

[0041] Depending on the probability specification and network architecture, there are many variants of neural networks with deep architectures, including, but not limited to, deep belief networks (DBNs), restricted Boltzmann machines (RBMs), and autoencoders. Another type of deep neural network (CNN) can be used for feature analysis. Practical implementations can vary depending on the size of the input image, the number of features to be analyzed, and the nature of the problem. In addition to the neural networks disclosed herein, other layers can be included in the deep learning module.

[0042] In a further embodiment, the DNN may have a set of weights for modeling the world based on data that has been fed into the DNN to train it. Neural networks are generally defined as a computational approach based on a relatively large set of neural units used to roughly model how the biological brain solves problems using relatively large clusters of biological neurons connected by axons. Each neural unit is connected to many other units, and the links can enforce or inhibit the activation state of the connected neural units. These systems are self-learning and trainable rather than explicitly programmed and perform well in areas where solutions or feature detection are difficult to express in traditional computer programs.

[0043] Neural networks typically consist of multiple layers, with signal paths traversing from front to back. The goal of neural networks is to solve problems in a manner similar to the human brain, although some neural networks are far more abstract. Modern neural network projects typically operate using thousands to millions of neurons and millions of connections. Neural networks can have any suitable architecture and / or configuration known in their field.

[0044] Generally, the DNN described in this paper is a trained DNN. For example, the DNN may have been previously trained by one or more other systems and / or methods. The DNN has been generated and trained, and the functionality of the module has been determined as described herein, which can then be used to perform one or more additional functions of the deep learning module.

[0045] As stated above, although CNNs are used herein to illustrate the architecture of DNNs, this disclosure is not limited to CNNs. Other variations of deep learning architectures may be used in the embodiments disclosed herein.

[0046] Figure 3 An embodiment of system 200 is shown. System 200 includes an optically based subsystem 201. Generally, the optically based subsystem 201 is configured to generate an optically based output of workpiece 202 by directing light to workpiece 202 (or scanning light across workpiece 202) and detecting the light from workpiece 202. In one embodiment, workpiece 202 includes a wafer. The wafer may include any wafer known in the art. In another embodiment, workpiece 202 includes a photomask. The photomask may include any photomask known in the art.

[0047] exist Figure 3 In the embodiment of system 200 shown, the optical-based subsystem 201 includes an illumination subsystem configured to direct light to workpiece 202. The illumination subsystem includes at least one light source. For example, such as... Figure 3 As shown, the lighting subsystem includes a light source 203. In one embodiment, the lighting subsystem is configured to direct light to the workpiece 202 at one or more incident angles, said incident angles may include one or more oblique angles and / or one or more normal angles. For example, as... Figure 3 As shown, light from light source 203 is guided through optical element 204 and then through lens 205 to workpiece 202 at an angle of incidence. The angle of incidence can include any suitable angle of incidence, which can vary depending on, for example, the characteristics of workpiece 202.

[0048] The optical-based subsystem 201 can be configured to guide light to the workpiece 202 at different times and at different incident angles. For example, the optical-based subsystem 201 can be configured to change one or more characteristics of one or more elements of the illumination subsystem so that the light can be different. Figure 3 The incident angle shown is directed to the workpiece 202. In one example, the optical subsystem 201 can be configured to move the light source 203, optical element 204 and lens 205 so that light is directed to the workpiece 202 at different angles of incidence or normal (or near normal) angles of incidence.

[0049] In some examples, the optical subsystem 201 can be configured to simultaneously guide light to the workpiece 202 at more than one incident angle. For example, the illumination subsystem may include more than one illumination channel, one of which may include a light source 203, an optical element 204, and a lens 205, such as... Figure 3 As shown in the figure, another light in the illumination channel (not shown) may contain similar elements, which may be configured differently or the same, or may contain at least one light source and one or more other components, such as those further described herein. If this light is directed to the workpiece simultaneously with other light, then one or more characteristics (e.g., wavelength, polarization, etc.) of the light directed to the workpiece 202 at different incident angles may be different such that the light originating from the workpiece 202 illuminating it at different incident angles can be distinguished from each other at the detector.

[0050] In another example, the lighting subsystem may contain only one light source (e.g., Figure 3The light source 203 shown in the figure can be separated into different optical paths (e.g., based on wavelength, polarization, etc.) by one or more optical elements (not shown) of the illumination subsystem. The light from each of the different optical paths can then be directed to the workpiece 202. Multiple illumination channels can be configured to direct light to the workpiece 202 at the same time or at different times (e.g., when different illumination channels are used to sequentially illuminate the workpiece). In another example, the same illumination channel can be configured to direct light with different characteristics to the workpiece 202 at different times. For example, in some examples, optical element 204 can be configured as a spectral filter, and the properties of the spectral filter can be changed in a variety of different ways (e.g., by changing the spectral filter) so that light of different wavelengths can be directed to the workpiece 202 at different times. The illumination subsystem can have any other suitable configuration known in the art for directing light with different or the same characteristics sequentially or simultaneously to the workpiece 202 at different or the same incident angles.

[0051] In one embodiment, light source 203 may comprise a broadband plasma (BBP) source. In this way, the light generated by light source 203 and directed to workpiece 202 may comprise broadband light. However, the light source may comprise any other suitable light source, such as a laser. The laser may comprise any suitable laser known in the art and may be configured to produce light of any suitable wavelength known in the art. Additionally, the laser may be configured to produce monochromatic or nearly monochromatic light. In this way, the laser may be a narrowband laser. Light source 203 may also comprise a multicolor light source that produces light at multiple discrete wavelengths or bands.

[0052] Light from optical element 204 can be focused onto workpiece 202 by lens 205. Although lens 205... Figure 3 While shown as a single refractive optical element, it should be understood that in practice, lens 205 may comprise a combination of several refractive and / or reflective optical elements that focus light from the optical element onto the workpiece. Figure 3 The illumination subsystem shown and described herein may include any other suitable optical elements (not shown in the figures). Examples of such optical elements include, but are not limited to, polarization components, spectral filters, spatial filters, reflective optics, apodizers, beam splitters (e.g., beam splitter 213), apertures, and the like, which may include any such suitable optical elements known in the art. Furthermore, the optical-based subsystem 201 may be configured to change one or more of the elements of the illumination subsystem based on the type of illumination to be used to generate the optical-based output.

[0053] The optical-based subsystem 201 may also include a scanning subsystem configured to cause light to scan across the workpiece 202. For example, the optical-based subsystem 201 may include a stage 206 on which the workpiece 202 is positioned during optical-based output generation. The scanning subsystem may include any suitable mechanical and / or robotic assembly (including the stage 206) that can be configured to move the workpiece 202 such that light can scan across the workpiece 202. Alternatively, the optical-based subsystem 201 may be configured such that one or more optical elements of the optical-based subsystem 201 perform some scanning of light across the workpiece 202. Light can scan across the workpiece 202 in any suitable manner (e.g., in a serpentine or helical path).

[0054] The optical-based subsystem 201 further includes one or more detection channels. At least one of the detection channels includes a detector 212 configured to detect light from the workpiece 202 due to illumination of the workpiece 202 by the subsystem and to generate an output in response to the detected light. For example, Figure 3 The optical-based subsystem 201 shown includes two detection channels, one formed by a light collector 207, element 208, and detector 209, and the other formed by a light collector 210, element 211, and detector 212. Figure 3 As shown, two detection channels are configured to collect and detect light at different collection angles. In some examples, the two detection channels are configured to detect scattered light, and the detection channels are configured to detect light scattered from the workpiece 202 at different angles. However, one or more of the detection channels may be configured to detect another type of light (e.g., reflected light) from the workpiece 202.

[0055] like Figure 3 The diagram further illustrates that the two detection channels are positioned within the plane of the paper, and the illumination subsystem is also positioned within the plane of the paper. Therefore, in this embodiment, the two detection channels are positioned within the incident plane (e.g., centered). However, one or more of the detection channels may be positioned outside the incident plane. For example, the detection channel formed by the light collector 210, element 211, and detector 212 may be configured to collect and detect light scattered outside the incident plane. Therefore, this detection channel may generally be referred to as a "side" channel, and this side channel may be centered in a plane substantially perpendicular to the incident plane.

[0056] although Figure 3An embodiment of an optically based subsystem 201 comprising two detection channels is shown, but the optically based subsystem 201 may comprise a different number of detection channels (e.g., only one detection channel or two or more detection channels). In one example, the detection channel formed by the light collector 210, element 211, and detector 212 may form a side channel as described above, and the optically based subsystem 201 may include an additional detection channel (not shown) formed as another side channel positioned on the opposite side of the incident plane. Thus, the optically based subsystem 201 may include a detection channel comprising a light collector 207, element 208, and detector 209 centered in the incident plane and configured to collect and detect light at or near a scattering angle perpendicular to the surface of the workpiece 202. Therefore, this detection channel may generally be referred to as the "top" channel, and the optically based subsystem 201 may also include two or more side channels configured as described above. Therefore, the optical-based subsystem 201 may include at least three channels (i.e., one top channel and two side channels), and each of the at least three channels has its own light collector, each of the light collectors being configured to collect light at a different scattering angle than each of the other light collectors.

[0057] As further described above, each of the detection channels included in the optical-based subsystem 201 can be configured to detect scattered light. Therefore, Figure 3 The optical-based subsystem 201 shown herein can be configured for generating a dark field (DF) output from a workpiece 202. However, the optical-based subsystem 201 may also, or alternatively, include a detection channel configured for generating a bright field (BF) output from a workpiece 202. In other words, the optical-based subsystem 201 may include at least one detection channel configured to detect light reflected from the specular surface of the workpiece 202. Therefore, the optical-based subsystem 201 described herein can be configured for DF only, BF only, or both DF and BF imaging. Although each of the light collectors is... Figure 3 The image is shown as a single refractive optical element, but it should be understood that each of the light collectors may contain one or more refractive optical blanks and / or one or more reflective optical elements.

[0058] One or more detection channels may contain any suitable detector known in the art. For example, the detector may include a photomultiplier tube (PMT), a charge-coupled device (CCD), a time-delay integration (TDI) camera, and any other suitable detector known in the art. The detector may also include non-imaging detectors or imaging detectors. In this way, if the detector is a non-imaging detector, each of the detectors may be configured to detect certain characteristics (e.g., intensity) of the scattered light but may not be configured to detect such characteristics based on position within the imaging plane. Therefore, the output generated by each of the detectors in each of the detection channels of the optical-based subsystem may be a signal or data, but not an image signal or image data. In such examples, a processor (e.g., processor 214) may be configured to generate an image of the workpiece 202 from the non-imaging output of the detector. However, in other examples, the detector may be configured as an imaging detector configured to generate an imaging signal or image data. Therefore, the optical-based subsystem may be configured to generate optical images or other optical-based outputs as described herein in several ways.

[0059] It should be noted that this article provides Figure 3 The configuration of the optical-based subsystem 201 described herein is generally illustrated. This subsystem may be included in the system embodiments described herein, or it may produce optical-based output used by the system embodiments described herein. As is commonly done when designing a commercial output acquisition system, the configuration of the optical-based subsystem 201 described herein may be modified to optimize its performance. Additionally, the system described herein may be implemented using existing systems (e.g., by adding the functionality described herein to an existing system). For some such systems, the methods described herein may be provided as optional functionality of the system (e.g., in addition to other system functionalities). Alternatively, the system described herein may be designed as a completely new system.

[0060] Processor 214 may be coupled to components of system 200 in any suitable manner (e.g., via one or more transmission media, which may include wired and / or wireless transmission media) so that processor 214 can receive output. Processor 214 may be configured to perform certain functions using the output. System 200 may receive instructions or other information from processor 214. Processor 214 and / or electronic data storage unit 215 may, as appropriate, communicate electronically with wafer inspection tools, wafer measurement tools, or wafer re-inspection tools (not shown) to receive additional information or send instructions. For example, processor 214 and / or electronic data storage unit 215 may communicate electronically with a scanning electron microscope.

[0061] The processor 214, other systems, or other subsystems described herein may be part of a variety of systems, including personal computer systems, graphics computers, mainframe computer systems, workstations, network devices, Internet devices, or other devices. A subsystem or system may also include any suitable processor known in the art, such as a parallel processor. Additionally, a subsystem or system may include a platform with high-speed processing and software, as a standalone tool or a network tool.

[0062] The processor 214 and electronic data storage unit 215 may be housed in or be part of system 200 or another device. In an example, the processor 214 and electronic data storage unit 215 may be part of a separate control unit or in a centralized quality control unit. Multiple processors 214 or electronic data storage units 215 may be used.

[0063] In practice, processor 214 can be implemented by any combination of hardware, software, and firmware. Furthermore, its functions as described herein can be performed by a single unit or divided among different components, each of which can be implemented by any combination of hardware, software, and firmware. Program code or instructions for processor 214 to implement various methods and functions can be stored in a readable storage medium, such as the memory in electronic data storage unit 215 or other memory.

[0064] If system 200 includes more than one processor 214, then different subsystems can be coupled to each other so that images, data, information, instructions, etc., can be transmitted between the subsystems. For example, a subsystem can be coupled to an additional subsystem by any suitable transmission medium, which can include any suitable wired and / or wireless transmission medium known in the art. Two or more of such subsystems can also be effectively coupled by a shared computer-readable storage medium (not shown in the figure).

[0065] Processor 214 may be configured to perform certain functions using the output of system 200 or other outputs. For example, processor 214 may be configured to send output to electronic data storage unit 215 or another storage medium. Processor 214 may be configured according to any of the embodiments described herein. Processor 214 may also be configured to perform other functions or additional steps using the output of system 200 or using images or data from other sources.

[0066] Program instructions for implementing methods such as those described herein may be transmitted via or stored on a carrier medium. The carrier medium may include storage media, such as read-only memory, random access memory, magnetic disk or optical disk, non-volatile memory, solid-state memory, magnetic tape, and the like. The carrier medium may include transmission media, such as wired, cable, or wireless transmission links. For example, the various steps described throughout this disclosure may be performed by a single processor 214 or alternatively by multiple processors 214. Furthermore, different subsystems of system 200 may include one or more computing or logic systems. Therefore, the above description should not be construed as limiting the scope of this disclosure but is merely illustrative.

[0067] In this example, processor 214 communicates with system 200. Processor 214 is configured to operate a DNN comprising a backbone network and multiple head networks connected to the top layer, as disclosed herein.

[0068] Additional embodiments relate to a non-transitory computer-readable medium storing program instructions executable on a controller for performing a computer-implemented method to perform verification using a deep neural network comprising a backbone network and multiple head networks connected to a top layer, as disclosed herein. Specifically, as... Figure 3 As shown herein, electronic data storage unit 215 or other storage media may contain a non-transitory computer-readable medium containing program instructions executable on processor 214. Computer-implemented methods may include any steps of any of the methods described herein, including... Figures 1 to 2 The methods shown in the document.

[0069] Program instructions can be implemented in any of a variety of ways, including procedural, component-based, and / or object-oriented technologies. For example, program instructions may be implemented using ActiveX controls, C++ objects, JavaBeans, Microsoft Foundation Classes (MFC), Streaming SIMD Extensions (SSE), or other technologies or methods as needed.

[0070] While the inspection system and semiconductor wafers are disclosed herein, other systems and workpieces may benefit from the embodiments disclosed herein. For example, re-inspection or measurement tools may use the embodiments disclosed herein. Other overlay measurement tools may also use the embodiments disclosed herein. The system may use an electron beam or ion beam instead of a light beam. The workpiece may be a flat panel, PCB, or other substrate rather than a semiconductor wafer.

[0071] Each of the steps in the method may be performed as described herein. The method may also include any other steps that may be performed by the processor and / or computer subsystem or system described herein. The steps may be performed by one or more computer systems that may be configured according to any of the embodiments described herein. In addition, the above method may be performed by any of the system embodiments described herein.

[0072] Although this disclosure has been described with respect to one or more specific embodiments, it should be understood that other embodiments of this disclosure may be made without departing from the scope of this disclosure. Therefore, this disclosure is to be considered limited only by the appended claims and their reasonable interpretation.

Claims

1. A system comprising: A light source that produces a beam of light; A stage configured to hold the workpiece in the path of the beam; A detector that receives the light beam reflected from the workpiece; A processor, which communicates electronically with the detector, wherein the processor is configured to operate a deep neural network comprising a backbone network and a plurality of head networks connected to a top layer, wherein each of the head networks is configured to be used during inspection of an image of the workpiece generated using data from the detector; and An electronic data storage unit that communicates electronically with the processor, wherein the deep neural network is stored on the electronic data storage unit.

2. The system of claim 1, wherein each of the head networks is configured to perform image classification, image regression, object detection, dense segmentation, instance segmentation, or depth estimation.

3. The system of claim 1, wherein the processor is a GPU.

4. The system of claim 1, wherein the processor is a CPU.

5. The system of claim 1, wherein one or more of the head networks are configured to operate simultaneously.

6. The system of claim 1, wherein the deep neural network is configured to change among the plurality of head networks during the inspection of the image.

7. The system of claim 1, wherein the workpiece is a semiconductor wafer.

8. A method comprising: Receive the image of the workpiece at the processor; and The processor is used to examine the image, wherein the examination uses a deep neural network comprising a backbone network and a plurality of head networks connected to a top layer, and wherein each of the head networks is configured to be used during the examination of the image.

9. The method of claim 8, further comprising: Guide the light beam to the workpiece; The light beam reflected from the workpiece is received at the detector; and Data is transmitted from the detector to the processor to generate the image.

10. The method of claim 8, wherein each of the head networks is configured to perform image classification, image regression, object detection, dense segmentation, instance segmentation, or depth estimation.

11. The method of claim 8, wherein the processor is a GPU.

12. The method of claim 8, wherein the processor is a CPU.

13. The method of claim 8, wherein one or more of the head networks operate simultaneously.

14. The method of claim 8, wherein the deep neural network is configured to change between the plurality of head networks during the test.

15. The method of claim 8, wherein the workpiece is a semiconductor wafer.

16. A non-transitory computer-readable storage medium comprising one or more programs for performing the following steps on one or more computing devices: Receive images of the workpiece; and The image is examined using a deep neural network comprising a backbone network and multiple head networks connected to a top layer, wherein each of the head networks is configured to be used during the examination of the image.

17. The non-transitory computer-readable storage medium of claim 16, wherein each of the head networks is configured to perform image classification, image regression, object detection, dense segmentation, instance segmentation, or depth estimation.

18. The non-transitory computer-readable storage medium of claim 16, wherein one or more of the header networks are configured to operate simultaneously.

19. The non-transitory computer-readable storage medium of claim 16, wherein the deep neural network is configured to change between the plurality of head networks during the test.

20. The non-transitory computer-readable storage medium of claim 16, wherein the workpiece is a semiconductor wafer.