Software-defined radar full-link integrated signal processing method
By adopting highly integrated agile transceiver chips and heterogeneous computing architecture, combined with GPS synchronization and dynamic CFAR detection algorithms, the hardware fixation and bandwidth limitation problems of traditional radar are solved, realizing the end-to-end integration of software-defined radar, improving radar performance and scalability, and adapting to complex clutter environments.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- 何祥宇
- Filing Date
- 2026-04-08
- Publication Date
- 2026-05-08
AI Technical Summary
Traditional radar hardware's tightly coupled architecture results in rigid functions, limited bandwidth, high signal processing latency, low synchronization accuracy, and poor system scalability. Existing software-defined radars have not formed a complete integrated solution, and CFAR detection algorithms cannot adapt to complex clutter environments.
It adopts a highly integrated agile transceiver chip AD9361, an FPGA+GPU+CPU heterogeneous computing architecture, a GPS disciplined clock, and a multiphase filter bank. It realizes waveform generation, signal processing, and synchronization control through software algorithms, supports multi-node coherent detection, and uses a CFAR detection algorithm with dynamic window and multi-algorithm switching.
Significantly improves radar bandwidth, processing speed, and synchronization accuracy, reduces hardware costs, enables adaptability to complex clutter environments, shortens the R&D cycle, and enhances system scalability and anti-interference capabilities.
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Abstract
Description
Technical Field
[0001] This invention relates to the field of radar signal processing technology, and in particular to a software-defined radar end-to-end integrated signal processing method. Background Technology
[0002] Traditional radar employs a tightly coupled hardware architecture of "analog front-end + dedicated digital back-end," with its core functions entirely dependent on dedicated hardware circuitry. This architecture suffers from the following insurmountable technical drawbacks: Functional rigidity: The core signal processing functions are determined by hardware parameters. Any function modification requires redesigning the hardware layout and purchasing dedicated chips, resulting in a development cycle of 18-24 months and extremely slow iteration speed of new technologies.
[0003] Bandwidth limitations: The superheterodyne multi-stage mixer architecture requires independent filters, mixers and amplifiers for each stage, which introduces significant signal loss and noise. The typical instantaneous bandwidth is only 5MHz, which can only achieve a distance resolution of 0.75 meters.
[0004] High signal processing latency: The processing latency of dedicated DSP chips is typically 6.8μs, which cannot meet the real-time detection requirements of high-speed targets.
[0005] Low synchronization accuracy: Relying on an internal crystal oscillator for synchronization, the frequency accuracy is only ±10ppm, and the cumulative time error can reach 36ms in 1 hour, resulting in a ranging error as high as 5.4×10 6 rice.
[0006] Poor system scalability: Synchronization of multiple radar nodes requires the laying of dedicated synchronization cables, which is costly, inflexible, and cannot achieve multi-station MIMO coherent detection.
[0007] The emergence of software-defined radar (SDR) has offered a solution to the above problems, but existing SDR radar technology still has the following shortcomings: Most of these solutions only involve a single aspect of software-defined radar, failing to form a complete end-to-end integrated solution. The signal processing algorithms are not optimized enough, especially the CFAR detection algorithm, which can only achieve single algorithm or fixed window adaptation and cannot adapt to complex clutter environments. The synchronization accuracy is not high, making it impossible to achieve coherent synchronization among multiple nodes. The multi-node collaboration capability is weak, and fully software-based beamforming and node collaboration have not been achieved. Summary of the Invention
[0008] The technical problem to be solved by this invention is: how to provide a software-defined radar end-to-end integrated signal processing method that can break through the constraints of the tight coupling of traditional radar hardware, realize the software definition of the entire link functions such as waveform generation, signal processing, and synchronization control, and significantly improve the radar's bandwidth, processing speed, synchronization accuracy and system scalability. In particular, it solves the problem that the existing CFAR detection algorithm cannot adapt to complex clutter environments.
[0009] To address the aforementioned technical problems, this invention provides a software-defined radar end-to-end integrated signal processing method, comprising the following steps:
[0010] It adopts the highly integrated agile transceiver chip AD9361 as a general-purpose RF front-end, covering the continuous frequency band of 70MHz-6GHz, with an instantaneous bandwidth of up to 56MHz, and supports 2T2R or 4T4R configurations. Data transmission between the RF front-end and the general computing platform is achieved using a high-speed USB 3.0 or PCIe Gen5 interface, with a single-channel data transmission rate of up to 1Gbps; The heterogeneous computing architecture of FPGA+GPU+CPU is adopted as the general computing backend, in which FPGA is responsible for low-latency basic signal processing, GPU is responsible for accelerating complex algorithms, and CPU is responsible for system control and task scheduling.
[0011] Based on direct digital frequency synthesis (DDS) technology, baseband I / Q waveform data is directly generated through software algorithms; It supports the generation of arbitrarily complex waveforms such as LFM, phase coding (BPSK / QPSK), and OFDM, and the waveform parameters (pulse width, bandwidth, repetition frequency, modulation mode) can be adjusted in real time; Waveform switching only requires modifying software parameters, and the switching time is ≤10ms.
[0012] Pulse compression: A software-based implementation of convolution accelerated by frequency domain FFT is used, and the sidelobe level is suppressed to below -40dB by adding Hanning or Chebyshev windows; Moving Target Detection (MTD): It adopts a multiphase filter bank + software parameterized configuration method, which can dynamically adjust the number of filter bank points and bandwidth according to the target velocity distribution; Constant False Alarm Rate Detection (CFAR): Employs a dual adaptive approach combining a distance dynamic window and multiple clutter algorithms. The window size is dynamically adjusted according to the target distance: a 3×3 small window is used to suppress strong reflections at close range (<1.5m), and a 7×7 large window is used to improve the sensitivity of weak targets at long range (>8m); The CFAR algorithm is switched in real time according to the clutter type: CA-CFAR is used in uniform clutter environment, OS-CFAR is used in strong clutter edge environment, and Min-CFAR is used in multi-target environment.
[0013] The frequency of the built-in oven-controlled crystal oscillator (OCXO) is calibrated in real time using a GPS disciplined clock (GPSDO) as the time reference and a GPS pulse-per-second (1PPS) signal. Connect the 10MHz reference clock and 1PPS signal output from GPSDO to the external clock input interface and time synchronization interface of SDR. It achieves coherent synchronization of multiple radar nodes with a synchronization error of ≤1° phase difference and a UTC synchronization accuracy of ±50ns. When GPS is lost, the OCXO can maintain a frequency offset of <±20μs for up to 3 hours.
[0014] It adopts a 2×2 or 4×4 coherent MIMO architecture, transmits orthogonal waveforms through multiple transmit antennas, and receives target echoes through multiple receive antennas; By adjusting the weighting coefficients of the receiving beam through software algorithms, electronic scanning and adaptive beamforming of the beam can be achieved, with a scanning range of ±60°. A distributed MIMO radar system is constructed by achieving coherent synchronization of multiple SDR nodes through GPSDO. The master node is responsible for system control and data fusion, while the slave nodes are responsible for signal transmission and reception. All nodes communicate with each other via Ethernet.
[0015] The beneficial effects of this invention are as follows: Significantly improved bandwidth: The instantaneous bandwidth has been increased from 5MHz of traditional radar to 56MHz, and the range resolution has been increased from 0.75 meters to 15 centimeters, enabling precise differentiation between two adjacent targets within a 1-meter range.
[0016] Significantly improved processing speed: Signal processing latency has been reduced from 6.8μs in traditional radar to 1.2μs, and processing efficiency has been improved by 5.7 times, which can meet the real-time detection requirements of high-speed targets.
[0017] Synchronization accuracy has been significantly improved: the synchronization error has been reduced from 36ms in traditional radar to ±50ns, the frequency accuracy has been improved from ±10ppm to ±1e-10, and the ranging error has been reduced to 7.5cm.
[0018] Enhanced anti-interference capability: It can cope with various interferences through waveform agility and algorithm reconstruction, reducing the false alarm rate from 10⁻³ of traditional radar to 10⁻. 6 Its anti-interference capability has been improved by 1000 times.
[0019] Strong adaptability to complex clutter: The dual adaptive CFAR detection algorithm with "range dynamic window + clutter multi-algorithm switching" can adapt to all clutter environments. In non-uniform clutter environments such as sea clutter and urban clutter, the false alarm rate is reduced by 100 times compared with the traditional CA-CFAR.
[0020] Shorter R&D cycle: Functional upgrades only require modification of software algorithms, without the need to redesign hardware circuits, shortening the R&D cycle from 18-24 months to 6-12 months.
[0021] Significantly reduced costs: Hardware costs are reduced to 1 / 5 to 1 / 10 of traditional solutions, and multi-node synchronization costs are reduced to 1 / 10 of traditional solutions. Detailed Implementation
[0022] The present invention will be further described in detail below with reference to specific embodiments.
[0023] The following hardware devices are used in this embodiment: RF front end: USRP B210 (built-in AD9361 agile transceiver chip, supports 2T2R, instantaneous bandwidth 56MHz, maximum sampling rate 61.44MSPS); General-purpose computing platform: an industrial computer equipped with a Xilinx Spartan-6 FPGA, NVIDIA RTX 3060 GPU and Intel Core i7-12700K CPU; Synchronization device: GPSDO module (built-in OCXO, UTC synchronization accuracy ±50ns, frequency stability ±1e-10). Antenna: 2×2 microstrip patch antenna array, operating frequency band 2.4GHz, gain 12dBi; Communication equipment: Gigabit Ethernet switch.
[0024] Hardware connection method: Connect the USRP B210 to the industrial computer via the USB 3.0 interface; Connect the 10MHz reference clock output of the GPSDO module to the CLK IN interface of the USRP B210; Connect the 1PPS signal output of the GPSDO module to the TRIG IN interface of the USRP B210; Connect the 2×2 microstrip patch antenna array to the TX1, TX2, RX1 and RX2 interfaces of the USRP B210 respectively; Connect multiple USRP B210 nodes to the master node via a gigabit Ethernet switch.
[0025] This embodiment uses GNU Radio as the software development environment, and the specific software process is as follows:
[0026] Initialize the USRP B210 device by calling the UHD API, setting the sampling rate to 61.44 MSPS, the center frequency to 2.4 GHz, and the transmit power to 10 dBm; Configure the GPSDO module to lock onto the GPS signal and output a 10MHz reference clock and a 1PPS signal; Initialize the computing resources of the FPGA, GPU, and CPU, and allocate signal processing tasks: FPGA: Digital up / down conversion, decimation filtering, and data packaging; GPU: FFT / IFFT, pulse compression, Doppler filtering; CPU: CFAR detection, target tracking, system control, human-computer interaction.
[0027] LFM waveforms were generated using the GNU Radio signal processing library, with the following parameters set: start frequency 2.372 GHz, stop frequency 2.428 GHz, pulse width 10 μs, and repetition frequency 1 kHz. The generated baseband I / Q waveform data is sent to the USRP B210's DAC for digital-to-analog conversion.
[0028] The USRP B210's ADC samples the received RF signal to obtain baseband I / Q data; Baseband I / Q data is transmitted to an industrial computer via a USB 3.0 interface; In the FPGA, the baseband I / Q data is digitally up-converted and down-converted and decimated and filtered. The decimation factor is 8 and the output sampling rate is 7.68 MSPS.
[0029] Pulse compression: The preprocessed signal is subjected to a 1024-point FFT transformation in the GPU, multiplied with the complex conjugate of the transmitted signal, and then subjected to an IFFT transformation to obtain a compressed narrow pulse signal. Moving target detection: Coherent accumulation of 16 frames of echo signals from the same range cell is performed, and Doppler filtering is achieved through a 128-point multiphase filter bank, with a velocity resolution of 0.1 km / h; Constant false alarm rate (CFAR) detection: Employs a dual adaptive CFAR algorithm combining "dynamic distance window + clutter multi-algorithm switching". When the distance is less than 1.5m, the OS-CFAR algorithm with a 3×3 window is used; When the distance is between 1.5m and 8m, the CA-CFAR algorithm with a 5×5 window is used; When the distance is greater than 8m, the Min-CFAR algorithm with a 7×7 window is used; Keep the false alarm rate stable at 10⁻ 6 the following.
[0030] Kalman filter is used to track the detected target and estimate its position, velocity, and acceleration. The target information is displayed in real time on the human-computer interaction interface, including the target's distance, orientation, speed, and trajectory.
[0031] This embodiment uses three USRP B210 nodes to construct a distributed MIMO radar system: Each node is equipped with a GPSDO module to achieve nanosecond-level time synchronization; The master node is responsible for system control, task allocation, and data fusion, while the slave nodes are responsible for signal transmission and reception. The master node sends synchronization commands and waveform parameters to each slave node via Ethernet; Each slave node simultaneously transmits orthogonal waveforms according to the synchronization command and receives the target echo; Each slave node sends the preprocessed echo data to the master node via Ethernet; The master node integrates the echo data from all nodes to achieve multi-angle detection of the target, with an angle measurement accuracy of less than 1°. Attached Figure Description
[0032] The following figures are provided to further illustrate the present invention and constitute a part of this application: Figure 1 Overall architecture diagram of the software-defined radar end-to-end integrated signal processing method Figure 2 Schematic diagram of the structure of a layered and decoupled general-purpose hardware platform Figure 3 Flowchart of software-based pulse compression Figure 4 Flowchart of CFAR detection with "Distance Dynamic Window + Clutter Multi-Algorithm Switching" Figure 5 Architecture diagram of a multi-station MIMO radar system Figure 6 : Timing diagram of multi-station MIMO cooperative detection.
Claims
1. A software-defined radar end-to-end integrated signal processing method, characterized in that, Includes the following steps: a. Construct a layered and decoupled general-purpose hardware platform consisting of an AD9361 general-purpose RF front-end, a high-speed data transmission interface, and an FPGA+GPU+CPU heterogeneous computing back-end; b. Baseband I / Q waveform data is generated directly through software algorithms, enabling fully configurable software-based waveform definition and waveform agility of ≤10ms; c. Implement fully software-based adaptive signal processing for pulse compression, moving target detection, and constant false alarm rate (CFAR) detection on a general-purpose computing platform. The CFAR detection adopts a dual adaptive approach that combines a range dynamic window with clutter multi-algorithm switching. d. A GPS-disciplined clock is used to achieve nanosecond-level coherent synchronization of multiple radar nodes, with a UTC synchronization accuracy of ±50ns; e. Multi-station MIMO collaborative detection is achieved through software-based beamforming.
2. The method according to claim 1, characterized in that, The AD9361 general-purpose RF front-end covers a continuous frequency band of 70MHz-6GHz, with a maximum instantaneous bandwidth of 56MHz, and supports 2T2R or 4T4R configurations.
3. The method according to claim 1, characterized in that, The task division of the FPGA+GPU+CPU heterogeneous computing architecture is as follows: FPGA is responsible for low-latency basic signal processing, GPU is responsible for complex algorithm acceleration, and CPU is responsible for system control and task scheduling.
4. The method according to claim 1, characterized in that, The software-based waveform generation supports the generation of any complex waveforms such as LFM, phase coding (BPSK / QPSK), and OFDM. The waveform parameters include pulse width, bandwidth, repetition frequency, and modulation scheme.
5. The method according to claim 1, characterized in that, The pulse compression is implemented using frequency domain FFT to accelerate convolution, and the sidelobe level is suppressed to below -40dB by adding a Hanning window or a Chebyshev window.
6. The method according to claim 1, characterized in that, The moving target detection adopts a multiphase filter bank + software parameterized configuration method, which can dynamically adjust the number of filter bank points and bandwidth according to the target velocity distribution.
7. The method according to claim 1, characterized in that, The distance dynamic window adjustment method for constant false alarm detection is as follows: a 3×3 small window is used for close distance (<1.5m), a 5×5 window is used for medium distance (1.5m-8m), and a 7×7 large window is used for long distance (>8m).
8. The method according to claim 1, characterized in that, The clutter multi-algorithm switching method for constant false alarm rate (CFAR) detection is as follows: CA-CFAR is used in uniform clutter environments, OS-CFAR is used in strong clutter edge environments, and Min-CFAR is used in multi-target environments.
9. The method according to claim 1, characterized in that, The GPS discipline clock has a built-in oven-controlled crystal oscillator (OCXO) that can maintain a frequency offset of <±20μs for up to 3 hours when GPS is lost.
10. The method according to claim 1, characterized in that, The multi-station MIMO cooperative detection adopts a 2×2 or 4×4 coherent MIMO architecture. The weighting coefficient of the receiving beam is adjusted by software algorithm to achieve electronic scanning and adaptive beamforming, with a scanning range of ±60°.