Voltage-stabilized power supply circuit, radio frequency energy receiving device and radio frequency signal communication equipment
By employing a regulated power supply circuit with static and dynamic bias current sources in the radio frequency energy receiving device, the problem of power fluctuation caused by changes in radio frequency signals is solved, and voltage stability is quickly restored under low power consumption conditions, meeting the power consumption requirements of functional circuits.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SHENZHEN MSU-BIT UNIVERSITY
- Filing Date
- 2024-11-04
- Publication Date
- 2026-05-08
AI Technical Summary
In applications requiring radio frequency (RF) signals for data communication, the stability of the electrical energy received by the RF energy receiving device is affected by changes in the RF signal strength, resulting in inevitable fluctuations in electrical energy. Existing technologies struggle to quickly restore voltage stability while maintaining low power consumption.
The voltage regulator circuit employs dynamic bandwidth technology, combining static and dynamic bias current sources. The static bias current source provides basic current at low energy levels, while the dynamic bias current source increases current at high energy levels, ensuring rapid voltage recovery and stability.
This improves the voltage stability and response speed of the radio frequency energy receiving device when energy changes, reduces power consumption, and meets the power consumption requirements of the functional circuit.
Smart Images

Figure CN121996007A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of radio frequency energy receiving technology, specifically to a regulated power supply circuit, a radio frequency energy receiving device, and a radio frequency signal communication device. Background Technology
[0002] Radio frequency (RF) signal communication devices, including RF energy receivers, capture energy from RF signals to obtain operating power. RF energy receivers are widely used in low-power wireless sensor network (LPWS) devices and IoT devices, reducing battery usage and thus lowering material and maintenance costs. The main factor affecting the stability of energy acquisition by an RF energy receiver is the variation in RF signal strength. However, in applications requiring data communication via RF signals, even if the RF signal strength remains stable, the energy acquired by the RF energy receiver inevitably fluctuates during carrier communication (modulating the information signal onto a fixed-frequency RF carrier wave for signal transmission), thus reducing the stability of energy acquisition. Summary of the Invention
[0003] This application provides a voltage regulator circuit for improving the stability of the voltage of electrical energy obtained by a radio frequency energy receiving device through the conversion of radio frequency signals.
[0004] According to a first aspect, one embodiment provides a regulated power supply circuit, including an input connection terminal, an output connection terminal, a reference connection terminal, a first MOSFET P1, a second MOSFET P2, a third MOSFET P3, a fourth MOSFET M1, a fifth MOSFET M2, a static bias current source I1, and a dynamic bias current source I2. The input connection terminal is used for limiting the voltage signal V. LIM The input, the voltage limiting electrical signal V LIM By the DC signal V REC The DC signal V obtained after voltage limiting REC By analyzing the radio frequency signal V RF Energy conversion and acquisition are performed; the regulated power supply circuit is used to control the voltage limiting signal V. LIM Voltage stabilization; The output connection terminal is used to output the piezoelectric signal V. LIM The working electrical signal V after voltage regulation DD ; The reference connection terminal is used to input a reference voltage signal V with a preset voltage value. REF ; The gate of the first MOSFET P1 is electrically connected to the gate of the second MOSFET P2, the source of the first MOSFET P1 is connected to the input connection terminal, and the drain of the first MOSFET P1 is electrically connected to the drain of the fourth MOSFET M1. The source of the second MOS transistor P2 is connected to the input connection terminal, and the drain of the second MOS transistor P2 is electrically connected to the gate of the first MOS transistor P1. The gate of the third MOSFET P3 is electrically connected to the gate of the first MOSFET P1, the source of the third MOSFET P3 is connected to the input terminal, and the drain of the third MOSFET P3 is connected to the output terminal. The gate of the fourth MOSFET M1 is connected to the reference connection terminal, and the source of the fourth MOSFET M1 is electrically connected to the static bias current source I1 and the dynamic bias current source I2; the gate of the fifth MOSFET M2 is connected to the output connection terminal, the drain of the fifth MOSFET M2 is connected to the gate of the first MOSFET P1, and the source of the fifth MOSFET M2 is electrically connected to the static bias current source I1 and the dynamic bias current source I2. The static bias current source I1 is connected between the gate of the fourth MOSFET M1 and the gate of the fifth MOSFET M2 and ground, and is used to provide a static first operating current I to the output connection terminal. b1 The first operating current I b1 A preset first value is defined, and the preset first value is related to the reference voltage signal V. REF Related; The dynamic bias current source I2 is connected between the source of the fourth MOSFET M1 and the source of the fifth MOSFET M2 and ground, and is used to provide a dynamic second operating current I to the output connection terminal when the DC signal input to the input connection terminal is greater than a preset second value. b2 The dynamic second operating current I b2 Related to the preset second value; The output terminal outputs the working electrical signal V. DD The voltage value and the first operating current I b1 and the second operating current I b2 The two are positively correlated.
[0005] According to a second aspect, one embodiment provides a radio frequency energy receiving device, including the regulated power supply circuit described in the first aspect.
[0006] According to a third aspect, one embodiment provides a radio frequency signal communication device, including a radio frequency energy receiving device as described in the second aspect.
[0007] According to the voltage regulator circuit of the above embodiment, when the DC signal input energy is large, the static bias current source and the dynamic bias current source supply power to the voltage regulator circuit at the same time, and the dynamic bias current source increases with the increase of input energy, thereby increasing the response speed of the voltage regulator circuit when the input energy is large, so that the output voltage can recover to stability in a faster time. Attached Figure Description
[0008] Figure 1 This is a schematic diagram illustrating the working principle of a passive ultra-high frequency RFID tag. Figure 2 This is a timing comparison diagram of signal waveforms in one embodiment; Figure 3 This is a schematic diagram of the circuit connection of a regulated power supply circuit in one embodiment; Figure 4 This is a schematic diagram of the circuit connection between the voltage limiting circuit and the dynamic bias current source in one embodiment; Figure 5 This is a schematic diagram of the circuit connection of a static bias current source in one embodiment; Figure 6 This is a schematic diagram comparing the output voltage waveforms before and after adding a dynamic bias current source in one embodiment. Detailed Implementation
[0009] The present invention will now be described in further detail with reference to specific embodiments and accompanying drawings. Similar elements in different embodiments are referred to by associated similar element reference numerals. In the following embodiments, many details are described to facilitate a better understanding of this application. However, those skilled in the art will readily recognize that some features may be omitted in different situations, or may be replaced by other elements, materials, or methods. In some cases, certain operations related to this application are not shown or described in the specification. This is to avoid obscuring the core parts of this application with excessive description. For those skilled in the art, detailed description of these related operations is not necessary; they can fully understand the related operations based on the description in the specification and general technical knowledge in the art.
[0010] Furthermore, the features, operations, or characteristics described in the specification can be combined in any suitable manner to form various embodiments. At the same time, the steps or actions in the method description can be rearranged or adjusted in a manner obvious to those skilled in the art. Therefore, the various orders in the specification and drawings are only for the clear description of a particular embodiment and do not imply a necessary order, unless otherwise stated that a particular order must be followed.
[0011] The serial numbers assigned to components in this document, such as "first" and "second," are used only to distinguish the described objects and have no sequential or technical meaning. The terms "connection" and "linkage" used in this application, unless otherwise specified, include both direct and indirect connections (linkages).
[0012] In this embodiment, to facilitate understanding of the working principle and process of the radio frequency energy receiving device, a passive UHF RFID tag is used as an example. A passive UHF RFID tag is a tag that does not require a built-in power supply and operates by receiving radio frequency energy emitted by a reader. It has advantages such as low cost, long-distance operation, high data rate, and small antenna size, and has broad application prospects, including intelligent transportation transmission systems, asset tracking, supply chain management, and logistics. It does not require battery power; instead, it collects power from the RF electromagnetic waves emitted by the RFID reader to power the entire tag chip.
[0013] Please refer to Figure 1 This is a schematic diagram illustrating the working principle of a passive UHF RFID tag, including antenna 1, rectifier 2, voltage limiting circuit 3, voltage regulator circuit 4, and tag function circuit 5. Antenna 1 is used to receive the radio frequency signal V emitted by the RFID reader. RF Rectifier 2 converts the radio frequency signal V RF Converted into DC signal V REC Due to the influence of the distance between the passive UHF RFID tag and the reader, the DC signal V output by rectifier 2... REC The voltage can vary widely, potentially reaching tens of volts, exceeding the capacity of subsequent circuits. Therefore, the output voltage of rectifier 2 cannot be directly used for power supply. Voltage limiting circuit 3, acting as a voltage limiting circuit, is used to limit the DC signal V output from rectifier 2. REC Limits are applied to protect downstream circuitry from damage. In the radio frequency signal V... RF When the energy is low, voltage limiting circuit 3 does not work, but when the RF signal V... RF When the energy is high, the voltage limiting circuit 3 starts to discharge the current source to limit the rectifier's output voltage and output a voltage limiting signal V. LIM The voltage regulator circuit 4 is used to regulate the voltage limiting signal V. LIM Perform voltage regulation and rectification to output the power supply signal V. DD The functional circuit 5 serves as the power source for the passive UHF RFID tag. The functional circuit 5 is connected to the demodulator 6 and modulator 7 connected to the antenna 1, and is used for information exchange with the reader.
[0014] Please refer to Figure 2 This is a signal waveform timing comparison diagram in one embodiment, used to represent the radio frequency signal V. RF DC signal V REC Voltage limiting signal VLIM and power supply signal V DD A waveform comparison diagram on the time axis. Although voltage limiting circuit 3 can limit the output voltage of rectifier 2, the DC signal V... REC It is unstable and will change with the radio frequency signal V. RF The energy changes accordingly, but it cannot be directly used to power the entire functional circuit 5. Therefore, a voltage regulator circuit 4 is needed to generate a stable power supply voltage to power the entire functional circuit 5. When the radio frequency signal V... RF When energy changes from zero to something, the output of voltage limiting circuit 3 (which is also the input of voltage regulator circuit 4) rises very rapidly, causing the output power supply signal V of voltage regulator circuit 4 to increase. DD Voltage fluctuations. Especially in radio frequency signals V RF At higher energy levels, this fluctuation is more pronounced, potentially causing instability in other circuits and even more serious problems. To reduce output voltage fluctuations in the regulated power supply circuit 4, it needs sufficient bandwidth to allow the output voltage to quickly recover from fluctuations caused by changes in input energy. Furthermore, for low-power design considerations (to ensure that functional circuit 5 can still operate normally even at lower input energy levels, i.e., at greater distances), the current source of the regulated power supply circuit is typically only a few hundred nA, resulting in a very small bandwidth that cannot meet the power consumption requirements of functional circuit 5. In existing technologies, a static bias current source is generally used as the regulated power supply circuit, which clearly cannot solve the above problems.
[0015] In this embodiment, a regulated power supply circuit with dynamic bandwidth technology is applied, and two bias current sources are set: one static bias current source and one dynamic bias current source. In the radio frequency signal V... RF When the energy is low, the static bias current source provides current to the regulated power supply circuit, while the current from the dynamic bias current source is almost zero, ensuring low power consumption; however, when the RF signal V... RF When the energy is large, both the static bias current source and the dynamic bias current source supply power to the regulated power supply circuit. The dynamic bias current source increases with the increase of input energy, thereby increasing the response speed of the regulated power supply circuit under large input energy, and making the supply signal V... DD The voltage can recover to stability in a faster time.
[0016] Example 1: Please refer to Figure 3 This is a circuit connection diagram of a regulated power supply circuit in one embodiment. The regulated power supply circuit is used to regulate the voltage limiting signal V. LIM Voltage regulation and voltage limiting electrical signal V LIM By using DC signal V REC The signal was obtained after voltage limiting, including the DC signal V.REC By analyzing the radio frequency signal V RF Energy conversion and acquisition are performed. The regulated power supply circuit includes an input connection terminal, an output connection terminal, a reference connection terminal, a first MOSFET P1, a second MOSFET P2, a third MOSFET P3, a fourth MOSFET M1, a fifth MOSFET M2, a static bias current source I1, and a dynamic bias current source I2. The input connection terminal is used to limit the voltage signal V. LIM Input (such as) Figure 1 As shown, the voltage limiting signal V LIM The voltage limiting circuit 3 pairs DC signals V REC (Voltage limiting acquisition). The output connection terminal is used to output the DC signal V. REC The working electrical signal V after voltage regulation DD The reference connection terminal is used to input a reference voltage signal V with a preset voltage value. REF The gate of the first MOSFET P1 is electrically connected to the gate of the second MOSFET P2. The source of the first MOSFET P1 is connected to the input terminal, and the drain of the first MOSFET P1 is electrically connected to the drain of the fourth MOSFET M1. The source of the second MOSFET P2 is connected to the input terminal, and the drain of the second MOSFET P2 is electrically connected to the gate of the first MOSFET P1. The gate of the third MOSFET P3 is electrically connected to the gate of the first MOSFET P1. The source of the third MOSFET P3 is connected to the input terminal, and the drain of the third MOSFET P3 is connected to the output terminal. The gate of the fourth MOSFET M1 is connected to the reference terminal, and the source of the fourth MOSFET M1 is electrically connected to the static bias current source I1 and the dynamic bias current source I2. The gate of the fifth MOSFET M2 is connected to the output terminal, the drain of the fifth MOSFET M2 is connected to the gate of the first MOSFET P1, and the source of the fifth MOSFET M2 is electrically connected to the static bias current source I1 and the dynamic bias current source I2.
[0017] The static bias current source I1 is connected between the source of the fourth MOSFET M1 and the source of the fifth MOSFET M2 and ground, to provide a static first operating current I. b1 First operating current I b1 A preset first set value is defined, and the preset first set value is related to the reference voltage signal V. REF Related. The dynamic bias current source I2 is connected between the gate of the fourth MOSFET M1 and the gate of the fifth MOSFET M2 and ground. It provides a dynamic second operating current I when the DC signal input to the input terminal exceeds a preset second value. b2 Dynamic second operating current I b2 This is related to a preset second set value. In one embodiment, the second operating current I... b2 The magnitude of the signal is positively correlated with the difference between the DC signal and the preset second value.
[0018] In one embodiment, the regulated power supply circuit further includes a unity-gain buffer U1 connected between the gate of the third MOSFET P3 and the gate of the first MOSFET P1. The unity-gain buffer U1 is a special type of amplifier whose output voltage is the same as the input voltage, neither amplifying nor attenuating the signal. The unity-gain buffer U1 can reduce the current drawn from the signal source, reducing its impact on the signal source. The unity-gain buffer U1 has low output impedance, enabling it to drive larger loads while maintaining a stable output voltage.
[0019] In one embodiment, the regulated power supply circuit further includes a first capacitor C1 and a second capacitor C2. The first capacitor C1 is connected between the drain of the third MOSFET P3 and the gate of the first MOSFET P1, and the second capacitor C2 is connected between the output terminal and ground. In one embodiment, the first MOSFET P1, the second MOSFET P2, and the third MOSFET P3 are P-type MOSFETs. In another embodiment, the fourth MOSFET M1 and the fifth MOSFET M2 are N-type MOSFETs.
[0020] like Figure 1 As shown, the voltage limiting signal V LIM It consists of three DC signals V from the voltage limiting circuit 3. REC After voltage limiting, the voltage limiting circuit 3 is used to prevent the DC signal V from being obtained. REC Too large. Please refer to the following: Figure 4 This is a schematic diagram of the circuit connection between the voltage limiting circuit and the dynamic bias current source in one embodiment. The voltage limiting circuit 3 includes a first voltage limiting connection terminal Q1, a second voltage limiting connection terminal Q2, and a first voltage limiting MOSFET M. P1 Voltage-limiting second MOSFET M P2 Voltage-limiting third MOSFET M P3 , voltage-limiting fourth MOSFET M P4 5th MOSFET M P5 The first resistor R1 and the second resistor R2. The voltage limiting first connection terminal Q1 is used for the DC signal V. REC The input, the second voltage limiting terminal Q2, is used to output the voltage limiting electrical signal V. LIM The first voltage-limiting terminal Q1 and the second voltage-limiting terminal Q2 are electrically connected. The first voltage-limiting MOSFET M... P1 The gate and drain of the MOSFET are connected to the first voltage-limiting terminal Q1. The second voltage-limiting MOSFET M... P2 The gate and drain of the first MOSFET M with voltage limiting P1 The source connection. The third MOSFET M is voltage-limited. P3 The gate and drain of the voltage-limiting second MOSFET M P2 The source connection, limiting the voltage of the third MOSFET M P3 The source is grounded. The fourth MOSFET M is voltage-limited. P4The gate and voltage-limiting third MOSFET M P3 The gate connection limits the voltage of the fourth MOSFET M. P4 The source is grounded. The fifth MOSFET M is voltage-limited. P5 The gate and voltage-limiting third MOSFET M P3 The gate connection limits the voltage of the fifth MOSFET M. P5 The source is grounded. One end of the first resistor R1 is connected to the voltage-limiting fourth MOSFET M. P4 The drain of one resistor is connected to the other end, and the other end is connected to the voltage-limiting second connection terminal Q2. One end of the second resistor R2 is connected to the voltage-limiting fifth MOSFET M. P5 One end is connected to the drain, and the other end is connected to the second voltage-limiting connection terminal Q2.
[0021] In one embodiment, the voltage-limiting first MOS transistor M P1 Voltage-limiting second MOSFET M P2 Voltage-limiting third MOSFET M P3 , voltage-limiting fourth MOSFET M P4 5th MOSFET M P5 and dynamic first MOSFET M P6 It is an N-type MOSFET.
[0022] like Figure 4 As shown, the dynamic bias current source I2 includes a first dynamic connection terminal Q3, a second dynamic connection terminal Q4, and a dynamic first MOSFET M. P6 The first dynamic connection terminal Q3 is connected to the source of the fifth MOSFET M2. The second dynamic connection terminal Q4 is connected to the voltage-limiting third MOSFET M... P3 The gate connection. Dynamic first MOSFET M P6 The gate of the first dynamic MOSFET is connected to the second dynamic connection terminal Q4. P61 The drain of the first dynamic connection terminal Q3 is connected to the first dynamic connection terminal M. P61 The source of the MOSFET is grounded. In one embodiment, the dynamic first MOSFET M... P6 It is an N-type MOSFET.
[0023] Please refer to Figure 5 This is a circuit connection diagram of a static bias current source in one embodiment. The static bias current source I1 includes a first static connection terminal O1, a second static connection terminal O2, and a static first MOSFET M. N1 and static second MOSFET M N2 The first static connection terminal O1 is used as a reference voltage signal V. REF The input, the second static connection terminal O2, is used to connect to the source of the fifth MOSFET M2. The static first MOSFET M... N1 The gate and drain of the first MOS transistor are connected to the first static connection terminal O1. N1The source of the second MOSFET is grounded. N2 The gate of the second MOS transistor is connected to the first static connection terminal O1. N2 The drain of the second MOSFET is connected to the second static connection terminal O2. N2 The source of the transistor is grounded. In one embodiment, the static first MOS transistor M... N1 and static second MOSFET M N2 It is an N-type MOSFET.
[0024] like Figure 5 As shown, the static first MOS transistor M N1 and static second MOSFET M N2 This forms a current mirror. ref It is the reference current, setting the static first MOSFET M N1 and static second MOSFET M N2 The channel lengths L1 and L2 of the two MOSFETs are the same, i.e., L1 = L2. b1 and I ref The relationship is as follows: I b1 = I ref *(W2 / W1); Among them, W2 is the static second MOS transistor M. N2 The channel width, W1 is the static first MOSFET M N1 The width of the trench.
[0025] like Figure 4 As shown, the dynamic first MOSFET M P6 The MOSFET acts as a dynamic current source. The first dynamic MOSFET, M... P6 The current discharge path connected to voltage limiting circuit 3 is connected to the voltage limiting third MOSFET M. P3 If a current mirror is formed, then: I b2 =I d * (W6 / L6 ÷ W3 / L3); Among them, W6 and L6 are the dynamic first MOSFETs M P6 The channel width and channel length, W3 and L3 are the voltage-limiting third MOSFET M P3 The width and length of the channel.
[0026] Taking passive UHF RFID tags as an example, when the tag is far from the reader, the radio frequency energy received by the tag chip (functional circuit) is low, V REC When the voltage is low, the voltage limiting circuit does not work. d It is extremely small, only equal to the leakage current of the MOSFET, and can be almost ignored. Therefore, the dynamic current source I... b2It doesn't work either, only the static current source I... b1 This provides operating current for the voltage regulator circuit. When the tag is close to the reader, the tag chip receives higher radio frequency energy, V REC When the voltage is high, the voltage limiting circuit starts working, generating I. d Current, dynamic current source I b2 It begins operation, providing operating current to the regulated power supply circuit. Furthermore, the closer the tag is to the reader, the faster I... d The larger, I b2 It is also larger. From the above analysis, we can see that I... b2 It dynamically changes with the distance of the tag reader, which solves the contradiction between power consumption and bandwidth. It can reduce power consumption when the tag chip receives less energy, and dynamically increase the operating current of the voltage regulator circuit when the tag chip receives more energy, so that the output of the voltage regulator circuit can fluctuate less and recover stability more quickly.
[0027] Please refer to Figure 6 The diagram below illustrates a comparison of the output voltage waveforms before and after adding a dynamic bias current source in one embodiment. The upper graph shows the radio frequency (RF) signal waveform from the initial signal to its stabilization. The lower graph shows the output DC power supply waveform; when the RF signal begins carrier communication, the output current source fluctuates during carrier signal reception. The solid line represents the waveform with the dynamic bias current source, and the dashed line represents the waveform without it. Clearly, adding the dynamic bias current source results in smaller output voltage fluctuations and faster stabilization of the regulated power supply circuit.
[0028] In one embodiment of this application, a radio frequency energy receiving device is also disclosed, including the voltage regulator circuit described above.
[0029] like Figure 1 As shown, in one embodiment of this application, a radio frequency signal communication device is also disclosed, including the radio frequency energy receiving device as described above.
[0030] The voltage regulator circuit disclosed in this application includes a first MOSFET, a second MOSFET, a third MOSFET, a fourth MOSFET, a fifth MOSFET, a static bias current source, and a dynamic bias current source. The static bias current source provides a static first operating current to the output of the voltage regulator circuit, while the dynamic bias current source provides a dynamic second operating current to the output of the voltage regulator circuit when the DC signal obtained from the converted RF signal exceeds a preset value. Since both the static and dynamic bias current sources supply power to the voltage regulator circuit simultaneously when the DC signal input energy is large, and the dynamic bias current source increases with the increase in input energy, the response speed of the voltage regulator circuit under large input energy is increased, allowing the output voltage to stabilize more quickly.
[0031] The above examples illustrate the present invention only to aid in understanding it and are not intended to limit the scope of the invention. Those skilled in the art can make various simple deductions, modifications, or substitutions based on the principles of this invention.
Claims
1. A regulated power supply circuit, characterized in that, It includes an input connection terminal, an output connection terminal, a reference connection terminal, a first MOSFET P1, a second MOSFET P2, a third MOSFET P3, a fourth MOSFET M1, a fifth MOSFET M2, a static bias current source I1, and a dynamic bias current source I2; The input connection terminal is used for limiting the voltage signal V. LIM The input, the voltage limiting electrical signal V LIM By using DC signal V REC The DC signal V obtained after voltage limiting REC By analyzing the radio frequency signal V RF Energy conversion and acquisition are performed; the regulated power supply circuit is used to control the voltage limiting signal V. LIM Voltage stabilization; The output connection terminal is used to output the voltage limiting electrical signal V. LIM The working electrical signal V after voltage regulation DD ; The reference connection terminal is used to input a reference voltage signal V with a preset voltage value. REF ; The gate of the first MOSFET P1 is electrically connected to the gate of the second MOSFET P2, the source of the first MOSFET P1 is connected to the input connection terminal, and the drain of the first MOSFET P1 is electrically connected to the drain of the fourth MOSFET M1. The source of the second MOS transistor P2 is connected to the input connection terminal, and the drain of the second MOS transistor P2 is electrically connected to the gate of the first MOS transistor P1. The gate of the third MOSFET P3 is electrically connected to the gate of the first MOSFET P1, the source of the third MOSFET P3 is connected to the input terminal, and the drain of the third MOSFET P3 is connected to the output terminal. The gate of the fourth MOSFET M1 is connected to the reference connection terminal, and the source of the fourth MOSFET M1 is electrically connected to the static bias current source I1 and the dynamic bias current source I2; the gate of the fifth MOSFET M2 is connected to the output connection terminal, the drain of the fifth MOSFET M2 is connected to the gate of the first MOSFET P1, and the source of the fifth MOSFET M2 is electrically connected to the static bias current source I1 and the dynamic bias current source I2. The static bias current source I1 is connected between the source of the fourth MOSFET M1 and the source of the fifth MOSFET M2 and ground, and is used to provide a static first operating current I. b1 The first operating current I b1 A preset first value is defined, and the preset first value is related to the reference voltage signal V. REF Related; The dynamic bias current source I2 is connected between the source of the fourth MOSFET M1 and the source of the fifth MOSFET M2 and ground. It provides a dynamic second operating current I when the DC signal input to the input terminal exceeds a preset second value. b2 The dynamic second operating current I b2 It is related to the preset second value.
2. The regulated power supply circuit as described in claim 1, characterized in that, It also includes a unity-gain buffer, connected between the gate of the third MOSFET P3 and the gate of the first MOSFET P1.
3. The regulated power supply circuit as described in claim 1, characterized in that, It also includes the first capacitor C1 and / or the second capacitor C2; The first capacitor C1 is connected between the drain of the third MOSFET P3 and the gate of the first MOSFET P1. The second capacitor C2 is connected between the output terminal and ground.
4. The regulated power supply circuit as described in claim 1, characterized in that, The first MOSFET P1, the second MOSFET P2, and the third MOSFET P3 are P-type MOSFETs; the fourth MOSFET M1 and the fifth MOSFET M2 are N-type MOSFETs.
5. The regulated power supply circuit as described in claim 1, characterized in that, The voltage limiting electrical signal V LIM The DC signal V is limited by a voltage limiting circuit. REC Obtain after voltage limiting; The voltage limiting circuit includes a voltage limiting first connection terminal Q1, a voltage limiting second connection terminal Q2, and a voltage limiting first MOSFET M. P1 Voltage-limiting second MOSFET M P2 Voltage-limiting third MOSFET M P3 , voltage-limiting fourth MOSFET M P4 5th MOSFET M P5 First resistor R1 and second resistor R2; The voltage-limiting first connection terminal Q1 is used for the DC signal V. REC The input, the second voltage-limiting connection terminal Q2, is used to output the voltage-limiting electrical signal V. LIM The first voltage-limiting connection terminal Q1 and the second voltage-limiting connection terminal Q2 are electrically connected; Voltage limiting first MOSFET M P1 The gate and drain are connected to the voltage-limiting first connection terminal Q1; Voltage-limiting second MOSFET M P2 The gate and drain of the first MOSFET M with voltage limiting P1 The source connection; Voltage-limiting third MOSFET M P3 The gate and drain of the voltage-limiting second MOSFET M P2 The source connection, limiting the voltage of the third MOSFET M P3 The source is grounded; Voltage-limiting fourth MOSFET M P4 The gate and voltage-limiting third MOSFET M P3 The gate connection limits the voltage of the fourth MOSFET M. P4 The source is grounded; Voltage limiting fifth MOSFET M P5 The gate and voltage-limiting third MOSFET M P3 The gate connection limits the voltage of the fifth MOSFET M. P5 The source is grounded; One end of the first resistor R1 is connected to the voltage-limiting fourth MOSFET M. P4 One end is connected to the drain terminal, and the other end is connected to the voltage-limiting second connection terminal Q2; One end of the second resistor R2 is connected to the voltage-limiting fifth MOSFET M. P5 One end is connected to the drain terminal, and the other end is connected to the voltage-limiting second connection terminal Q2.
6. The regulated power supply circuit as described in claim 5, characterized in that, The dynamic bias current source I2 includes a first dynamic connection terminal Q3, a second dynamic connection terminal Q4, and a dynamic first MOSFET M. P6 ; The first dynamic connection terminal Q3 is connected to the source of the fifth MOSFET M2; The second dynamic connection terminal Q4 and the voltage-limiting third MOSFET M P3 Gate connection; Dynamic first MOSFET M P6 The gate of the first dynamic MOSFET is connected to the second dynamic connection terminal Q4. P61 The drain of the first dynamic connection terminal Q3 is connected to the first dynamic connection terminal M. P61 The source electrode is grounded.
7. The regulated power supply circuit as described in claim 6, characterized in that, The voltage-limiting first MOSFET M P1 Voltage-limiting second MOSFET M P2 Voltage-limiting third MOSFET M P3 , voltage-limiting fourth MOSFET M P4 5th MOSFET M P5 and dynamic first MOSFET M P6 It is a P-type MOSFET.
8. The regulated power supply circuit as described in claim 1, characterized in that, The static bias current source I1 includes a first static connection terminal O1, a second static connection terminal O2, and a static first MOSFET M. N1 and static second MOSFET M N2 ; The first static connection terminal O1 is used for the reference voltage signal V REF Input; The second static connection terminal O2 is used to connect to the source of the fifth MOS transistor M2; Static first MOSFET M N1 The gate and drain of the first MOS transistor are connected to the first static connection terminal O1. N1 The source is grounded; Static second MOSFET M N2 The gate of the second static MOSFET is connected to the first static connection terminal O1. N2 The drain of the second MOS transistor is connected to the second static connection terminal O2. N2 The source electrode is grounded.
9. A radio frequency energy receiving device, characterized in that, Includes the regulated power supply circuit as described in any one of claims 1 to 8.
10. A radio frequency signal communication device, characterized in that, Includes the radio frequency energy receiving device as described in claim 9.