Compressed memory system and method of managing compressed data

Abstract

A compressed memory system and a method of managing compressed data are disclosed. The method includes: storing first data from a first slot corresponding to a front portion among compressed data of raw data in a first region of a memory; storing second data of a remaining slot in a second region of the memory, the remaining slot including data other than the first data from the compressed data; and storing metadata corresponding to the second data in a metadata table in a third region of the memory.

Description

[0001] This application claims the benefit of Korean Patent Application No. 10-2024-0154488, filed on November 4, 2024, with the Korean Intellectual Property Office, the entire disclosure of which is incorporated herein by reference for all purposes. Technical Field

[0002] The following describes methods for compressing storage systems and managing compressed data. Background Technology

[0003] With the widespread adoption of applications requiring large amounts of storage (such as big data and / or machine learning), the demand for storage devices in data centers has increased. In response to this demand, devices for expanding main memory are being actively researched; however, the typical expansion of memory capacity by adding storage devices can increase the total cost of ownership (TCO) due to the cost of purchasing the devices and their additional power consumption. Summary of the Invention

[0004] This summary is provided to present, in a simplified form, the selection of concepts further described in the following detailed description. This summary is not intended to identify key or essential features of the claimed subject matter, nor is it intended to help determine the scope of the claimed subject matter.

[0005] In one general aspect, a processor-implemented method is provided here comprising: storing first data of compressed data from raw data corresponding to a first slot in a first region of memory; storing second data of remaining slots in a second region of memory, the remaining slots including data from the compressed data other than the first data; and storing metadata corresponding to the second data in a metadata table in a third region of memory.

[0006] The step of storing the first data may include: storing the first data in a first region of the memory for each of the blocks of original data in the same order as the blocks of original data corresponding to the first data.

[0007] The first data and the original data blocks can be mapped one-to-one in the order of the original data addresses.

[0008] The step of storing the first data may include storing the first data in parallel in a first region of the memory.

[0009] The step of storing the data in the first slot can be performed either channel-by-channel or row-by-row.

[0010] The metadata table may include entries for metadata about the compressed size of the compressed data and the location information of the stored second data, and the metadata entries may be mapped one-to-one with the blocks of the original data in the order of the addresses of the original data.

[0011] Metadata may include the number of slots allocated to the second data and the physical address of the second data corresponding to each block of the original data.

[0012] The first size of the first region can be dynamically adjusted based on one or more of the memory compression ratio and the memory size.

[0013] The step of storing the first data may include: dividing the block of original data into multiple sub-blocks, and storing the first sub-block data of the first sub-block corresponding to the front of each of the multiple sub-blocks in a first area of ​​the memory.

[0014] The step of storing metadata corresponding to the second data may include storing metadata corresponding to the remaining sub-slot data of the remaining sub-slots of each of the sub-blocks, excluding the first sub-block data, in a metadata table.

[0015] Metadata may include one or more of the following: the number of slots allocated to each data slice of the remaining subslots, the physical address of the data in the remaining subslots corresponding to each block of the original data, and the compressed size of the data in the remaining subslots.

[0016] In one general aspect, a processor-implemented method is provided here comprising: receiving from a host device a read request for target data in compressed data stored in memory; in response to the read request, calculating a device physical address of a first slot corresponding to the target data and a device physical address of an entry in a metadata table; decompressing first data in the first slot by reading data from the first slot and decompressing remaining data in the remaining slots other than the first slot by reading entries in the metadata table, based on the device physical address; and sending block data obtained by combining the decompressed first data and the decompressed remaining data to the host device.

[0017] The read request may include an index of the target data.

[0018] The decompression steps may include: determining the first physical address of the first slot of the target block corresponding to the target data and the second physical address of the metadata table of the target block by means of the index of the target data; decompressing the data of the first slot by reading the data of the first slot based on the first physical address; reading the entries of the metadata table based on the second physical address in addition to reading the first data; and decompressing the remaining data by obtaining the physical addresses of the corresponding data of the remaining slots from the entries of the metadata table.

[0019] The steps of determining the first physical address and the second physical address may include: determining the first physical address by multiplying the index of the target block by the slot size and adding the base address of the first region of the memory to the first result of the first multiplication; and determining the second physical address by multiplying the index of the target block by the size of the metadata and adding the base address of the third region of the memory to the second result of the second multiplication.

[0020] In one general aspect, a non-transitory computer-readable storage medium is provided herein that stores instructions that, when executed by a processor, cause the processor to perform the method.

[0021] In one general aspect, an electronic device is provided here comprising: one or more processors configured to execute instructions; and a memory storing the instructions, wherein execution of the instructions configures the one or more processors to: store first data of compressed data from raw data corresponding to a first slot in a first region of the memory, store remaining data of the compressed data in the remaining slots other than the data in the first slot in a second region of the memory, and store metadata corresponding to the remaining data in a metadata table in a third region of the memory.

[0022] In one general aspect, a compressed memory system is provided herein comprising: a memory including one or more of a general memory region and a compressed memory region; a memory controller configured to generate a control signal for decompressing the target data in response to receiving a read request from a host device for target data in compressed data stored in the memory; and a compressor configured to store compressed data of raw data in the memory and to decompress the compressed target data in response to the control signal; the compressor comprising: compression and decompression means configured to decompress the first data in the first slot by reading the first data in the first slot corresponding to the target data, and to decompress the remaining data in the remaining slots by reading entries of a metadata table; and a memory means configured to combine the decompressed first data with the decompressed remaining data and send the combined data to the host device.

[0023] The memory device may also be configured to: store compressed first data of the first slot corresponding to the beginning of each block of the original data in the compressed data in a first region of the memory; store the remaining data of the remaining slots of the compressed data other than the data in the first slot in a second region of the memory; and store metadata corresponding to the remaining data in a metadata table in a third region of the memory.

[0024] The memory device may also be configured to: determine a first physical address of a first slot of a target block corresponding to the target data and a second physical address of the metadata table of the target block by means of an index of the target data; decompress the compression of the first slot data by means of reading the first slot data corresponding to the target data based on the first physical address; in addition to reading the first slot data, read the entry of the metadata table corresponding to the target data based on the second physical address; and decompress the compression of the remaining slot data by means of obtaining the physical address of the remaining slot data from the entry of the metadata table.

[0025] Other features and aspects will become clear from the following detailed description, the accompanying drawings and the appended claims. Attached Figure Description

[0026] Figure 1 Examples of memory compression and memory compaction processes are shown in typical compressed memory systems.

[0027] Figure 2 An example method for managing blocks of compressed data in a compressed storage system according to one or more embodiments is shown.

[0028] Figure 3A An example method for managing compressed memory by a memory device according to one or more embodiments is shown.

[0029] Figure 3B An example method for managing compressed memory by a memory device according to one or more embodiments is shown.

[0030] Figure 4 An example configuration of metadata for each data block is shown according to one or more embodiments.

[0031] Figure 5 Example configurations of metadata based on one or more embodiments are shown.

[0032] Figure 6 An example method of a memory device according to one or more embodiments is shown.

[0033] Figure 7 An example method of a memory device according to one or more embodiments is shown.

[0034] Figure 8 An example method for decompressing a compression according to one or more embodiments is shown.

[0035] Figure 9 An example method for processing a data read request in a compressed storage system according to one or more embodiments is shown.

[0036] Figure 10A and Figure 10B An example illustration of data access latency via priority reading of a first slot, according to one or more embodiments, is shown.

[0037] Figure 11 An example electronic device according to one or more embodiments is shown.

[0038] Figure 12 An example compressed storage system according to one or more embodiments is shown.

[0039] Figure 13A An example compressed storage system having multiple compression and decompression devices is shown according to one or more embodiments.

[0040] Figure 13B An example data configuration of the first slot in a compressed storage system having multiple compression and decompression devices according to one or more embodiments is shown.

[0041] Throughout the accompanying drawings and detailed embodiments, unless otherwise described or provided, the same reference numerals shall be understood to denote the same or similar elements, features, and structures. The drawings may not be to scale, and for clarity, illustration, and convenience, the relative sizes, proportions, and depictions of elements in the drawings may be exaggerated. Detailed Implementation

[0042] The following detailed embodiments are provided to aid the reader in gaining a comprehensive understanding of the methods, apparatus, and / or systems described herein. However, various changes, modifications, and equivalents of the methods, apparatus, and / or systems described herein will become clear upon understanding this disclosure. For example, the order of operations within and / or the sequence of operations described herein are merely examples and are not limited to the order of operations set forth herein, but may be changed as will become clear upon understanding this disclosure, except that the order of operations within and / or the sequence of operations must occur in a specific order. As another example, the order of operations and / or the sequence of operations within may be performed in parallel, except that at least a portion of the order of operations and / or the sequence of operations within must occur in a specific order (e.g., a specific order). Furthermore, for the sake of clarity and brevity, descriptions of features known upon understanding this disclosure may be omitted.

[0043] The features described herein may be implemented in different forms and should not be construed as limited to the examples described herein. Rather, the examples provided herein are merely illustrative of some of the many feasible ways of implementing the methods, apparatus, and / or systems described herein that will become clear upon understanding the disclosure of this application.

[0044] The terminology used herein is for describing various examples only and is not intended to limit this disclosure. Unless the context clearly indicates otherwise, the singular forms (“a,” “an,” and “the”) are also intended to include the plural forms. As a non-limiting example, the terms “comprising” or “including” and “having” indicate the presence of the stated features, quantities, operations, components, elements, and / or combinations thereof, but do not preclude the presence or addition of one or more other features, quantities, operations, components, elements, and / or combinations thereof, or the presence of alternatives to the stated features, quantities, operations, components, elements, and / or combinations thereof. Additionally, while one embodiment may illustrate the use of the terms “comprising” or “including” and “having” to indicate the presence of the stated features, quantities, operations, components, elements, and / or combinations thereof, other embodiments may exist where “one or more of the stated features, quantities, operations, components, elements, and / or combinations thereof are not present.”

[0045] As used herein, the term “and / or” includes any one of the associated listed items and any combination of any two or more. Phrases such as “at least one of A, B, and C”, “at least one of A, B, or C”, etc., are intended to have a separating meaning, and unless the corresponding description and embodiments require that such a list (e.g., “at least one of A, B, and C”) be interpreted as having a connecting meaning, these phrases “at least one of A, B, and C”, “at least one of A, B, or C”, etc., also include examples where one or more of each of A, B, and / or C (e.g., any combination of one or more of each of A, B, and C) may exist.

[0046] Unless otherwise defined, all terms used herein (including technical and scientific terms) shall have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure pertains based on an understanding of the disclosure of this application. Unless expressly defined herein, terms (such as those defined in a general dictionary) shall be interpreted as having a meaning consistent with their meaning in the context of the relevant art and in the disclosure of this application, and shall not be interpreted in an idealized or overly formal sense. The use of the term “may” herein with respect to examples or embodiments (e.g., regarding what an example or embodiment may include or may implement) indicates the existence of at least one example or embodiment that includes or implements such a feature; however, all examples are not limited thereto.

[0047] In one example, compressed storage technology (e.g., Figure 6 Method 600 can effectively reduce the TCO of data centers. Compressed storage technology can increase the effective capacity of storage devices by compressing data and storing the compressed data in the storage device.

[0048] Figure 1Examples of memory compression and compaction processes are shown in a typical compressed memory system. (Refer to...) Figure 1 In a non-limiting example, Figure 100 illustrates a typical process in which the original data 110 is converted into compressed data 130 by memory compression 120, and then the original data 110 is stored in memory device 150 by memory compaction 140.

[0049] On the other hand, in one example, as described in more detail below, compressed storage technology (e.g., Figure 6 Method 600) can increase the effective capacity of the memory device 150 by converting the original data 110 into compressed data 130 with a smaller capacity through compression in the memory compression process 120 and storing the compressed data 130 in the memory device 150. In contrast, when using typical compressed memory techniques, access latency can increase due to the analysis of metadata used to manage the compressed data 130 and decompress it to access the compressed data 130. Because the memory device 150 stores the compressed data 130, the memory device 150 can also be referred to as a "compressed memory device".

[0050] Compressed storage technology (e.g., Figure 6 The example of Method 600 allows data center service providers to handle larger storage needs without additional storage devices (e.g., storage device 150) or servers. In one example, in addition to compression algorithms, a compressed storage management scheme (e.g., Figure 2 Method 200) is used to improve the performance and compression efficiency of the compressed memory. The compressed memory management scheme can allocate compressed data 130 to the physical address space of the memory device 150 (e.g., ...). Figure 2 (a contiguous storage scheme 210), and can migrate compressed data 130 to minimize memory fragmentation (e.g., Figure 2 (Fragmented storage scheme 230). Even if the performance and efficiency of the compression algorithm are quite good, the access time to compressed data 130 may increase or the effective compression ratio may decrease if it is not combined with an appropriate compressed memory management scheme.

[0051] To efficiently utilize the compressed memory system, memory compression 120 and memory compaction 140 can be performed. Memory compression 120 reduces the size of the original data 110 and stores the original data 110, while memory compaction 140 stores the compressed data 130 in a physical memory device (or memory device) 150. In one example, memory compaction 140 may be performed by a memory device (e.g., Figure 11 Electronic devices 1100 and / or Figure 12 The compression / decompression device 1266 is used to perform the operation.

[0052] exist Figure 1 In a typical compressed memory system, raw data 110 can be constructed into data blocks of a specific size (e.g., 4 kilobyte pages). Each block of raw data 110 can be converted into a compressed data block 130 with the same or smaller size as the original data via memory compression 120. The compressed data block 130 can undergo memory compaction 140 to minimize the use of storage space in memory device 150. When memory compaction 140 is not performed, the compressed data block 130 can occupy the same space as the original data block 110, and thus, external memory fragmentation can occur and effective memory capacity cannot be increased. In this case, since the size and location information of the compressed data block 130 can be stored in a metadata table described below, the memory device 150 can be accessed by referring to the metadata table.

[0053] Memory device 150 may include a memory region for storing data. The memory region may include multiple memory blocks. Multiple memory blocks may be generated using some or all of the memory chips of memory device 150. Each memory block may correspond to a memory bank, and multiple memory blocks may be grouped per memory rank-wise and / or per memory channel-wise. For example, a memory rank may be a group of memory chips (e.g., dynamic random access memory (DRAM) chips) connected to the same chip selection and accessible simultaneously. A memory channel may be a group of memory chips accessible via the same channel (e.g., a memory channel).

[0054] A memory region can be an area (e.g., a physical region) within the memory chip of physical memory device 150 from which data can be read and / or where data can be written. The memory region can be located in the memory die or core die of memory device 150. Memory device 150 can cooperate with a host processor to process data in the memory region. For example, memory device 150 can process data based on instructions received from the host processor. Memory device 150 can control the memory region in response to instructions from the host processor. Memory device 150 can be decoupled from the host processor.

[0055] Figure 2 An example method for managing blocks of compressed data in a compressed storage system according to one or more embodiments is shown. (Refer to...) Figure 2 In a non-limiting example, method 200 may include a contiguous storage scheme 210 for blocks of compressed data and a fragmented storage scheme 230 for blocks of compressed data.

[0056] In other words, in one example, the method 200 for managing blocks of compressed data can be divided into two types: contiguous storage scheme 210 and fragmented storage scheme 230.

[0057] In one example, contiguous storage scheme 210 may map each block of compressed data to a contiguous physical address on the memory device. Contiguous storage scheme 210 may require one mapping information for each block in the metadata, but external fragmentation may occur due to the varying sizes of the compressed data blocks, and data migration may then be performed.

[0058] In one example, fragmented storage scheme 230 can divide blocks of compressed data into units smaller than the original data blocks and map these blocks to physical addresses on the memory device. Fragmented storage scheme 230 can prevent the aforementioned external fragmentation and eliminate the need for data migration; however, because the metadata can have as many mapping entries as the number of memory fragments, the size of the metadata can be increased.

[0059] Additional address translation of metadata in a compressed memory system can increase memory access latency.

[0060] In one example, to access data stored in compressed storage (or memory), the memory device can identify the size and location information of the compressed data by first reading a metadata table stored in a separate area of ​​the compressed storage device. The memory device can then read the compressed data by accessing the location where the actual compressed data is stored based on the metadata information, and can decompress the read data (i.e., decompress the read compressed data). In this case, a delay can occur because the memory device needs to wait until the request to read the metadata table is completed before sending an access request to the actual memory address where the compressed data is stored.

[0061] Furthermore, when managing compressed memory based on contiguous storage scheme 210, data migration can be performed to address external fragmentation or respond to changes in compression ratio. During data migration processing, computational resources and memory bandwidth can be consumed, and access latency can increase when data is accessed during the migration process.

[0062] Figure 3A An example method for managing compressed memory by a memory device according to one or more embodiments is illustrated. (Refer to...) Figure 3A In a non-limiting example, a process is shown in which a memory device (e.g., electronic device 1100) generates compressed data 320 by compressing raw data 310 and stores the compressed data 320 in memory 330 by memory compression.

[0063] As described above, the raw data 310 can be configured as data blocks of a specific size (e.g., block 0, block 1, block 2, block 3, etc.). The specific size could be, for example, a 4-kilobyte page, but this is not an isolated example. In this case, a "page" can be a small, fixed-size processing fragment, and can have a size of, for example, 4 kilobytes or 8 kilobytes, but this is not an isolated example. Because a page can be used as the basic unit of memory management, a page can also be referred to as a "memory page." Each operation of the process can be performed page by page. The number of pages can be determined based on the page size and / or the number of representable bits supported by the processor. Page-by-page data can be referred to as a "page".

[0064] Each of the blocks of original data 310 can be compressed by memory into a block of compressed data 320 with a size smaller than or the same as the original data.

[0065] In one example, the memory device may fragment and store a portion of the beginning of each block of compressed data 320. In this case, the unit in which the memory device fragments the blocks of compressed data 320 may be referred to as a "slot," and the size of a slot may be smaller than the size of a block of original data 310.

[0066] The data corresponding to the front part (front end) of the fragmented blocks (in other words, the slots (e.g., slots 0, 1, 2, and 3) located at the first (e.g., first position) of each block of compressed data 320) can be referred to as "first slot 325" or "first slot," and the data in the slot at the first position of each block ("first slot") can be referred to as "data in the first slot." The size of the first slot 325 can be determined, for example, by user settings or through experimentation. Performance can be improved as the size of the first slot 325 increases, but the compression ratio can be limited when the size of the first slot 325 is very large. Therefore, a trade-off relationship can be established between the compression ratio and the size of the first slot 325.

[0067] In this configuration, the memory device may store data from the first slot of each block of compressed data 320 in memory 330. Memory 330 may be compressed memory or general-purpose memory of a compressed memory device, but is not limited to this example. The type of memory 330 may be at least one of computational fast link (CXL) memory, graphics processing unit (GPU) memory, accelerator memory, general-purpose memory, compressed memory, and storage devices, but is not limited to this. The type of memory 330 may be determined by one of the operating system (OS), runtime, and user settings of the electronic device including the memory device.

[0068] More specifically, within compressed data 320, the memory device may store "the compressed first slot 325 data corresponding to the beginning of each block of the original data 310" in a first region 331 of the memory 330. Hereinafter, "first region" 331 may refer to a region in the memory 330 used to store the data of the first slot 325, which is the first slot data of each block. The memory device may store the data of the first slot 325 in the first region 331 of the memory 330 in the same order as the blocks of the original data 310 corresponding to the data of the first slot 325. In this case, the size of the first region 331 may be variable. The memory device may dynamically adjust the size of the first region 331 based on one or more of the compression ratio of the memory device (i.e., the compression ratio that achieves the maximum compression ratio of the memory) and the size of the memory (or compressed memory) 330. For example, when the compression ratio is low, the memory device may increase the size of the first region 331, and when the compression ratio is high, the memory device may decrease the size of the first region 331.

[0069] In this configuration, the data in the first slot 325 and the blocks of the original data 310 can be mapped one-to-one according to the address order of the original data 310 (e.g., the address order of the corresponding memory addresses and / or data addresses from the original data 310). In this configuration, in each block of the compressed data 320, the data in the remaining slots other than the data in the first slot 325 can be stored in the remaining data area of ​​the memory 330 using the contiguous storage scheme or fragmented storage scheme described above.

[0070] As described below, the memory device can store the data (compressed data) of the first slot 325 in parallel in the first region 331 of the memory 330. For example, the parallel storage of the compressed data can be performed in a channel-by-channel or row-by-row order or manner.

[0071] Furthermore, in compressed data 320, the memory device may store the data of the remaining slots other than the data in the first slot 325 in a second region 333 of the memory 330. In this case, the size of the first slot 325 does not need to be the same as the size of the remaining slots, and the data in the remaining slots may be in the form of separate slots or may be in a form that is not separated into separate slots. In the following text, "second region" 333 may refer to the region that stores the data of the remaining slots of each block.

[0072] In one example, the memory device may store metadata corresponding to the data in the remaining slots in a metadata table 340 of a third region 335 of memory 330. The metadata table 340 may store metadata (e.g., metadata MD0, metadata MD1, metadata MD2, corresponding metadata MD3, ...) corresponding to each of the remaining slots of compressed data 320, excluding the slot at the first location (e.g., "first slot 325") (e.g., slot 0, slot 1, slot 2, and slot 3). See below for further details. Figure 4 and Figure 5 Further description of the metadata configuration and the configuration of metadata table 340.

[0073] As described above, in one example, by allowing data access before reading metadata by fragmenting a portion of the front part of the compressed data 320 and storing that portion in a separate area of ​​the memory device (e.g., memory 330) in the same order as the block order of the original data 310, the latency for accessing data (e.g., compressed data 320) stored in memory 330 can be improved by reducing the metadata read time before reading the metadata.

[0074] Figure 3B An example method for managing compressed memory by a memory device according to one or more embodiments is illustrated. (Refer to...) Figure 3B In a non-limiting example, a process is shown in which a memory device (e.g., electronic device 1100) generates compressed data 360 by compressing raw data 350 configured as 4 kilobyte pages (e.g., page 0, page 1, page 2, page 3, ...) and stores the compressed data 360 in memory 370.

[0075] The raw data 350 can be configured as 4-kilobyte pages (e.g., page 0, page 1, page 2, page 3, ...). A page can be used as the basic unit of memory management. Each operation of this process can be performed page by page. The number of pages can be determined based on the page size and the number of representable bits supported by the processor.

[0076] Each of the 350 pages of original data can be compressed by memory into a 360-page compressed data set with a size smaller than or the same as the original data.

[0077] In one example, the memory device may fragment and store a portion of the beginning of each page of compressed data 360. In this case, the unit in which the memory device fragments the pages of compressed data 360 may be referred to as a "slot," and the size of a slot may be smaller than the size of a page of the original data 350.

[0078] The data corresponding to the beginning of the fragmented page (in other words, the data in the slots (e.g., slots 0-0, 1-0, 2-0, and 3-0) located at the first (e.g., first position) of each page of compressed data 360) can be referred to as "the data in the first slot 365". The size of the first slot 365 can be 1 kilobyte.

[0079] The memory device can store data from the first slot 365 of each page of the compressed data 360 in the memory 370. The memory 370 can be a general-purpose memory, such as a compressed memory or a compressed memory device, but is not limited to this example.

[0080] More specifically, in compressed data 360, the memory device can store the compressed data in the first slot 365 corresponding to the beginning of each page of the original data 350 in the first region 371 of the memory 370.

[0081] In one example, the memory device can store the data of the first slot 365 in a first region 371 of the memory 370 in the same order as the pages of the original data 350 corresponding to the data of the first slot 365. In this case, the data of the first slot 365 and the pages of the original data 350 can be mapped one-to-one according to the address order. In this case, the data of the remaining slots in each page of the compressed data 360, excluding the data of the first slot 365, can be managed using the fragmented storage scheme described above, and the unit of fragmentation can be 1 kilobyte (the same unit as the first slot 365). However, the page (or data block) size and slot size can vary.

[0082] Furthermore, within compressed data 360, the memory device can store data from the remaining slots (e.g., slots 0-1, 0-2, 2-1, 2-2, 2-3, and 3-1) excluding the data in the first slot 365 in a second region 373 of the memory 370. The memory device can also store metadata corresponding to the data in the remaining slots in a metadata table 380 in a third region 375 of the memory 370. In this case, the size of the metadata table 380 can correspond to a cell smaller than a slot.

[0083] When the host device accesses data stored in memory 370 (e.g., compressed memory), the memory device may operate as follows.

[0084] In one example, when a host device sends a request to access compressed data 360 stored in memory 370, the memory device can calculate the device physical address of the metadata corresponding to the page to which the host device expects to access and the data of the first slot (e.g., "data of the first slot 365") based on the address of the memory 370 to which the host device expects to access.

[0085] More specifically, the memory device can read and decompress data from the first slot 365 from memory 370. The memory device can simultaneously perform the reading and decompression of data from the first slot 365 in parallel with reading metadata corresponding to the page at that address. The memory device can read the remaining slot data by identifying the device physical address of the remaining slot data via reading metadata. The memory device can decompress the compressed remaining slot data using compression and decompression devices, and can return all decompressed page data to the host device.

[0086] In this scenario, pages in the physical address space of the host device can be mapped to "the first slot with the same index as the corresponding page and the entry of metadata stored in metadata table 380". Therefore, the memory device can calculate the device physical address of the first slot 365 corresponding to the page and the device physical address of the metadata based on the physical address of the host device corresponding to the page. In this scenario, the host device can be the primary management entity of a computer system (e.g., an electronic device) and can be implemented as a main processor or server. The host processor may include, for example, a host CPU. For example, the host processor may include a processor core and a memory controller, but the examples are not limited thereto. The host processor can manage all operations and can delegate operations requiring acceleration (e.g., near-memory processing (PNM) operations) to the memory device.

[0087] More specifically, the page index PAGE_ID can be a value obtained by dividing the page's physical address PAGE_ADDR by 4 kilobytes (in this example, 4 kilobytes can be the basic unit of a page) (e.g., The device physical address of the first slot corresponding to the page (e.g., first slot 365) can be a value obtained by multiplying the index of each page by the slot size and adding it to the base address of the first slot region (e.g., FIRST_SLOT_ADDR=PAGE_ID*SLOT_SIZE+FIRST_SLOT_REGION_BASE_ADDR).

[0088] Furthermore, the device physical address of the metadata corresponding to the page can be a value obtained by multiplying the page index by the metadata size and adding it to the base address of the metadata region (e.g., METADATA_ADDR = PAGE_ID * METADATA_SIZE + METADATA_REGION_BASE_ADDR). In this case, the base address of the first slot region and the base address of the metadata region can be predetermined values. The memory device can directly obtain the base address of the first slot region and / or the base address of the metadata region by storing the base address in a register.

[0089] In this case, the location information of the remaining slots (excluding the first slot 365) corresponding to the page the host device expects to access can be stored in the entry of the metadata table 380 corresponding to that page. The memory device can obtain the device physical address of the remaining slots by reading the entry of the metadata table 380, and can decompress the compressed data of the remaining slots by reading the data of the remaining slots from the corresponding address.

[0090] Typically, a compressed storage system can use metadata containing information about the compressed size and location of the compressed data 360 to efficiently store and / or access the compressed data 360 in the compressed storage device. However, because there is a waiting time before the metadata is read, which occurs before accessing the compressed data 360 stored in the compressed storage device, the latency of typical data access can be increased.

[0091] In one example, the memory device can prevent waiting until the metadata is read and can reduce data access latency by calculating the address of the first slot 365 corresponding to each page without the need for additional address translation via metadata.

[0092] Furthermore, the memory device can store the compressed data of the first slot 365 in the first region 371 of the memory 370 in a channel-by-channel or row-by-row manner in parallel. By taking into account the memory interleaving characteristic, the memory device can simultaneously store the location in the memory 370 where the data of the first slot 365 is stored (e.g., the first region 371) or the location in the memory 370 where metadata is stored (e.g., the third region 375) in a channel or row to load the locations in multiple slots in parallel. Because the memory device is able to process requests for multiple data items in parallel at once, this allows the memory device to perform decompression with low latency.

[0093] Figure 4 This illustrates an example configuration of metadata for each data block according to one or more embodiments. (Refer to...) Figure 4 In a non-restrictive example, a metadata table (e.g., Figure 3A Metadata table 340 and / or Figure 3B The configuration of metadata entries 400 in the metadata table 380.

[0094] In one example, the metadata table may be stored in a separate storage area of ​​the compressed storage device. The metadata table may include compressed data (corresponding data blocks) compression size 410 and location information 430 of the remaining slot data (in other words, entries 400 storing metadata about the device physical address to which the remaining slot data is allocated). The entries 400 of the metadata table may be mapped one-to-one with blocks of the original data according to address order (e.g., the address order of the original data). The metadata entries 400 may be included in, for example... Figure 3B The metadata table 380 contains metadata MD0, MD1, ...

[0095] For example, when the page (or block) to be accessed is the second page, the location information of the remaining slots (excluding the first slot) corresponding to the second page can be stored in entry 400 of the metadata table corresponding to the second page. The memory device can obtain the device physical address of the remaining slots by reading entry 400 of the metadata table. The memory device can decompress the compressed data of the remaining slots by reading the data (compressed data) of the remaining slots from the device physical address of the remaining slots. In this case, the location information 430 of the remaining slot data may include the following references Figure 5 Metadata description 500.

[0096] Figure 5 This illustrates an example configuration of metadata based on one or more embodiments. (Refer to...) Figure 5 In a non-restrictive example, the configuration of metadata 500 is shown.

[0097] Metadata 500 may include the number of slots 510 for data allocated to the remaining slots (e.g., second slot, third slot, ..., Nth slot) other than the first slot, and the physical addresses 530 of the data in the remaining slots corresponding to the blocks of the original data. For example, the physical address of the data in the second slot may be the value of the physical address of the data in the remaining slots (slot 0-1, slot 0-2) other than the first slot (slot 0-0) in page 0 (or block 0).

[0098] Figure 6 Example methods of a memory device according to one or more embodiments are illustrated. In the following embodiments, the operations may be performed sequentially, but not necessarily sequentially. For example, the order of the operations may be changed, and at least two of the operations may be performed in parallel.

[0099] Reference Figure 6 In a non-limiting example, in method 600, the memory device (e.g., Figure 11 The electronic device 1100 can store the data of the first slot (or first slot data), the data of the remaining slots (or remaining slot data), and metadata in the corresponding areas of the memory through operations 610 to 630.

[0100] In one example, during operation 610, the memory device may store data from the compressed data of the original data corresponding to the first slot in a first region of the memory. The memory device may store the data of the first slot in the first region of the memory for each block of the original data in the same order as the order of the blocks of original data corresponding to the data of the first slot. The memory device may store the data of the first slot in the first region of the memory in parallel, either channel-by-channel or row-by-row.

[0101] In one example, during operation 620, the memory device may store the data of the remaining slots of compressed data, excluding the data of the first slot stored in operation 610, in a second area of ​​the memory.

[0102] In one example, during operation 630, the memory device may store metadata corresponding to the data in the remaining slots stored in operation 620 in a metadata table in a third region of the memory. The metadata table may include entries for metadata regarding the compressed size of the compressed data and the location information of the data in the remaining slots. The metadata entries may be mapped one-to-one with blocks of the original data in address order.

[0103] Figure 7 An example method of a memory device according to one or more embodiments is shown. (Refer to...) Figure 7 In a non-limiting example, in method 700, the memory device (e.g., Figure 11 The electronic device 1100 can decompress compressed data and send the decompressed data to the host device via operations 710 to 760.

[0104] In one example, during operation 710, within compressed data from the original data, the memory device may store data from a first slot corresponding to the beginning of each block of the original data in a first region of the memory. The memory device may store the data from the first slot in the first region of the memory device in the same order as the blocks of the original data corresponding to the data from the first slot.

[0105] In one example, during operation 720, the memory device may store the data of the remaining slots of compressed data, excluding the data of the first slot stored in operation 710, in a second area of ​​the memory.

[0106] In one example, during operation 730, the memory device may store metadata corresponding to the data in the remaining slots stored in operation 720 in a metadata table in a third area of ​​the memory.

[0107] In one example, during operation 740, the memory device may receive a read request from the host device for target data within compressed data stored in the memory. The memory device may receive a read request that includes an index of the target data. In this context, the read request may be referred to as an "access request".

[0108] In one example, in operation 750, the memory device may, in response to a read request received in operation 740, read first slot data (“first target slot data”) corresponding to target data and decompress the first slot data (“first target slot data”) corresponding to target data, and may read entries of metadata corresponding to the target data to decompress the remaining slot data (“remaining target slot data”). See below for further details. Figure 8 The decompression process via the memory device is described in more detail.

[0109] In one example, during operation 760, the memory device may combine the decompressed first slot data from operation 750 with the decompressed remaining target slot data, and may send the combined data to the host device. The memory device may send block data, consisting of "the combination of the decompressed first slot data and the decompressed remaining target slot data," to the host device.

[0110] Figure 8 An example method for decompressing compression according to one or more embodiments is shown. (Refer to...) Figure 8 In a non-limiting example, a memory device (e.g., Figure 11 The electronic device 1100 can be referenced above. Figure 7 Operation 750 decompresses the compressed data through operations 810 to 840.

[0111] In one example, during operation 810, the memory device can be accessed via a method including... Figure 7 The index of the target data in the read request of operation 740 determines the first physical address of the first slot of the target block corresponding to the target data and the second physical address of the metadata table of the target block. That is, the index of the target data in the read request provides the information (e.g., address information) needed to read the first target slot data and the remaining target slot data. The memory device can determine the first physical address by multiplying the target block index by the slot size and adding it to the base address of a first region of the memory (e.g., the region storing the first target slot data). The memory device can determine the second physical address by multiplying the target block index by the metadata size and adding it to the base address of the metadata.

[0112] In one example, in operation 820, the memory device can decompress the first target slot data by reading the first target slot data based on the first physical address determined in operation 810.

[0113] In one example, in operation 830, in addition to reading the first target slot data in operation 820 (i.e., simultaneously with reading the first target slot data in operation 820), the memory device may read an entry of the metadata table based on a second physical address.

[0114] In one example, during operation 840, the memory device can decompress the remaining target slot data by obtaining the physical address of the remaining target slot data from an entry in the metadata table read in operation 830.

[0115] Figure 9 An example method for processing a data read request in a compressed storage system according to one or more embodiments is shown. (Refer to...) Figure 9 In a non-limiting example, in method 900, the memory device (e.g., Figure 11 The electronic device 1100 can decompress the compressed data and return it via operations 910 to 980 in response to a data read request from the host device.

[0116] In one example, during operation 910, the memory device may receive from the host device a read request for target data within compressed data stored in the compressed memory.

[0117] In one example, in operation 920, in response to the read request in operation 910, the memory device may calculate the device physical address of the first slot corresponding to the target data and the device physical address of the entry in the metadata table. In this case, the first slot may correspond to a data block of the target data. Since each data block is mapped one-to-one with the block (or page) of the first slot and the entry in the metadata table in address order, the memory device can identify the device physical address of the corresponding first slot data and the device physical address of the entry in the metadata table by the index of the data block to be accessed.

[0118] In one example, in operation 930, based on the device physical address calculated in operation 920, the memory device can decompress the compressed data in the first slot in operation 940 by reading the data in the first slot. Furthermore, the memory device can read the data in the remaining slots in operation 960 by reading entries in the metadata table in operation 950. On the other hand, in a typical compressed memory system, it may be necessary to wait until the metadata read request is completed to identify the device physical address storing the compressed data. Meanwhile, in examples of compressed memory technology (e.g., ...), Figures 6 to 9In methods 600, 700, and 900, compression is decompressed by reading the data in the first slot before reading the metadata, while simultaneously reading the data and metadata in the remaining slots in parallel, thus reducing data access latency. In this case, the remaining slots can correspond to the remaining slots in the target data other than the first slot.

[0119] In one example, during operation 960, the memory device can identify the device physical address of the remaining data (data in the remaining slot) by means of an entry in the metadata table read in operation 950, and can read the remaining data.

[0120] In one example, during operation 970, the memory device may decompress the compressed data of the remaining slots read in operation 960.

[0121] In one example, in operation 980, the memory device can return decompressed block data to the host device by combining the decompressed data from the first slot in operation 940 with the decompressed data from the remaining slots in operation 970. In this case, the combined data may correspond to all the decompressed data corresponding to the target data.

[0122] Figure 10A and Figure 10B This illustrates an example of data access latency via preferential reading of a first slot, according to one or more embodiments. (Refer to...) Figure 10A In a non-limiting example, a diagram is shown illustrating the latency that occurs when accessing data in a typical (i.e., conventional) compressed memory management approach.

[0123] In a typical compressed memory management method, a waiting period may occur until the task responding to the metadata read request is completed to identify the physical address of the device storing the compressed data. In other words, after the metadata read (1001) is completed, the compressed data can be read from the address where the actual data is stored via the location address stored in the metadata (1003), and decompression (1005) can be performed on the read compressed data. Therefore, access to and reading of the compressed data may not be permitted until the metadata read (1001) is completed.

[0124] Reference Figure 10B In a non-limiting example, a description of a compressed memory management method (e.g., Figure 6 A diagram illustrating the latency that occurs when accessing data in method 600.

[0125] In one example, by fixing the location of the first slot allocated for each page (or block) of memory, the data in the first slot can be read directly without referencing metadata mapping information. In other words, while the memory device reads the data in the first slot (1010) and decompresses the compressed data in the first slot (1020), the memory device can perform metadata reading (1030), reading the remaining slot data (1040) and / or decompression (1050) in parallel. In this way, the memory device can reduce the latency that occurs when accessing data that appears in compressed memory.

[0126] Figure 11 An example electronic device according to one or more embodiments is shown. (Refer to...) Figure 11 In one non-limiting example, the electronic device 1100 for memory compression may include one or more processors 1110 and memory 1130. In one non-limiting example, one or more processors 1110 and memory 1130 in the electronic device 1100 may communicate via bus 1105.

[0127] One or more processors 1110 may be configured to execute programs or applications to configure processors 1110 to control electronic device 1100 to perform one or more operations and / or methods involving the management of the compressed memory as described above (e.g., Figures 6 to 9 Methods 600, 700, and 900 may include, for example, any one or a combination of two or more of a central processing unit (CPU), a graphics processing unit (GPU), a neural processing unit (NPU), and a tensor processing unit (TPU), but are not limited to the examples above.

[0128] Memory 1130 may store computer-readable instructions executable by one or more processors 1110. One or more processors 1110 may be configured to execute computer-readable instructions (such as those stored in memory 1130), and by executing these computer-readable instructions, one or more processors 1110 are configured to perform one or more or any combination of the operations and / or methods described herein. Memory 1130 may be volatile or non-volatile memory. When at least a portion of the instructions stored in memory 1130 is executed by one or more processors 1110, the at least a portion of the instructions causes one or more processors 1110 to store data from compressed data of the original data corresponding to the first slot in a first region of the memory, data from the remaining slots of the compressed data other than the first slot in a second region of the memory, and metadata corresponding to the data in the remaining slots in a metadata table in a third region of the memory.

[0129] Figure 12 An example compressed storage system according to one or more embodiments is shown. (Refer to...) Figure 12 In a non-limiting example, the compressed storage system 1200 may include a host device 1210, a memory 1230, and a compressed storage 1250. Because the memory 1230 is distinct from the compressed storage 1250, the memory 1230 may be referred to as "ordinary memory".

[0130] In one example, host device 1210 may be the primary management entity of a computer system. Host device 1210 may be implemented as a personal computer or a server. Host device 1210 may send necessary instructions to memory 1230 and / or compressed memory 1250 while executing the operating system and applications. Host device 1210 may execute multiple applications. Host device 1210 may manage the data in memory 1230 and / or compressed memory 1250 used for executing multiple applications. The data for multiple applications may be stored in memory 1230 or compressed memory 1250 page by page (e.g., 4 kilobytes or 8 kilobytes per page).

[0131] The memory 1230 may be referred to as a "memory module" and may store instructions (or programs) that can be executed by the host device 1210. For example, the instructions include instructions for performing operations of the host device 1210 and / or operations of each component of the host device 1210.

[0132] The memory 1230 can be divided into a general memory area and a compressed memory area. The memory 1230 can store pages corresponding to application programs. Pages can correspond to the operation units of a process.

[0133] Memory 1230 and / or compressed memory 1250 can be implemented as volatile memory devices or non-volatile memory devices. Volatile memory devices can be implemented as dynamic random access memory (DRAM), static random access memory (SRAM), thyristor RAM (T-RAM), zero-capacitor RAM (Z-RAM), or dual-transistor RAM (TTRAM). Non-volatile memory devices can be implemented as electrically erasable programmable read-only memory (EEPROM), flash memory, magnetic RAM (MRAM), spin-transfer torque (STT)-MRAM, conductive bridged RAM (CBRAM), ferroelectric RAM (FeRAM), phase-change RAM (PRAM), resistive RAM (RRAM), nanotube RRAM, polymer RAM (PoRAM), nanofloating gate memory (NFGM), holographic memory, molecular electronic memory devices, or insulator resistance variation memory.

[0134] Memory 1230 and compressed memory 1250 can be system memory of compressed memory system 1200 and can receive corresponding memory address ranges. Whether pages are stored in memory 1230 or compressed memory 1250 can be determined by the operating system, runtime and / or user settings of host device 1210.

[0135] The memory 1230 and the compressed memory 1250 can be configured to store individual data, or can be constructed such that the storage space for ordinary data and the storage space for compressed data in the memory 1230 are separate. When the storage space for ordinary data and the storage space for compressed data in the memory 1230 are separate, the compressed memory 1250 can be included as part of the memory 1230.

[0136] The compressed storage 1250 may include a storage controller 1251, a compressor 1260, and a storage 1253, but the examples are not limited thereto.

[0137] The memory controller 1251 can perform memory management related to the execution of the operating system and applications. In response to receiving a read request for target data of compressed data stored in the memory 1253 from the host device 1210, the memory controller 1251 can generate control signals for decompressing the target data.

[0138] The memory 1253 may include at least one of a general memory region and a compressed memory region.

[0139] The compressor 1260 can store the compressed data obtained by compressing the original data in the memory 1253, and can decompress the compressed target data according to the control signal generated by the memory controller 1251.

[0140] For example, compressor 1260 may be located adjacent to memory 1253, similar to near-memory processing unit (NMP), to perform real-time compression. Compressor 1260 may be included in at least one of, for example, a compute fast link (CXL) controller and a large language model (LLM) accelerator, but the examples are not limited thereto.

[0141] The compressor 1260 can manage memory regions that will be allocated to applications requiring large amounts of memory through the configuration and operation described above. This management method can be applied to various computer systems (such as mobile devices and servers).

[0142] Furthermore, the compressor 1260 may be executed by a dedicated acceleration unit (e.g., near-memory processing (PNM)) located close to the memory. Because the compressor 1260 accelerates compression and / or decompression, the compressor 1260 may be referred to as a "compression accelerator" or "accelerator".

[0143] Compressor 1260 may include memory device 1263 and compression and decompression means (or compression / decompression means) 1266. For example... Figure 12 As shown, in one example, memory device 1263 may be disposed between memory controller 1251 and memory 1253 of compressed memory 1250. Memory device 1263 may be associated with the aforementioned memory device (e.g., Figure 11 The electronic device 1100 corresponds to this, but the examples are not limited to this.

[0144] In one example, memory device 1263 can combine the decompressed data from the first slot, decompressed by compression and decompression device 1266, with the decompressed data from the remaining slots, and can send the combined data to host device 1210. Memory device 1263 can store the decompressed data from the first slot, corresponding to the beginning of each block of the original data, from the compressed data in compression and decompression device 1266 in a first region of memory 1253. Memory device 1263 can store the data from the remaining slots, excluding the data from the first slot, from the compressed data in compression and decompression device 1266 in a second region of memory 1253. Furthermore, memory device 1263 can store metadata corresponding to the data from the remaining slots in a third region of memory 1253.

[0145] In one example, the compression and decompression device 1266 can decompress data in the first slot by reading data from the first slot corresponding to the target data, and can decompress data in the remaining slots by reading entries from the metadata table. One or more compression and decompression devices 1266 may be provided.

[0146] The memory device 1263 can determine the first physical address of the first slot of the target block corresponding to the target data and the second physical address of the metadata table of the target block by using the index of the target data. The memory device 1263 can decompress the compressed data of the first slot by reading the data of the first slot corresponding to the target data based on the first physical address, using at least one of the compression and decompression devices 1266. In addition to reading the data of the first slot, the memory device 1263 can read the entry of the metadata table corresponding to the target data based on the second physical address. The memory device 1263 can decompress the compressed data of the remaining slot by obtaining the physical address of the remaining slot data from the entry of the metadata table, using at least one of the compression and decompression devices 1266.

[0147] The above-described compressed memory management method can be applied to software-defined far-memory based on memory compression, memory compression mounted on an accelerator, and / or storage device compression. Furthermore, in one example, in addition to being located between memory 1253 and memory controller 1251 in the compressed memory 1250, memory device 1263 can be located at different locations (e.g., between cache memory and memory or in the memory bus).

[0148] Figure 13A An example compressed storage system having multiple compression and decompression devices is shown according to one or more embodiments. Figure 13B An example data configuration of the first slot in a compressed storage system having multiple compression and decompression devices according to one or more embodiments is shown.

[0149] Reference Figure 13A and Figure 13B In a non-limiting example, a memory device or a compressed memory system including a memory device may divide the block 1310 of raw data into a plurality of sub-blocks 1320. The compressed memory system may divide the block 1310 of raw data into a plurality of sub-blocks 1320 (e.g., sub-blocks (SB)0, SB1, SB2, and SB3), the number of which may correspond to the number (e.g., 4) of compression / decompression devices 1330 (e.g., compression / decompression device 0, compression / decompression device 1, compression / decompression device 2, and compression / decompression device 3). One or more blocks 1310 of raw data may exist.

[0150] The compressed storage system can be configured in various compression / decompression devices 1330 corresponding to multiple sub-blocks 1320 (e.g., Figure 12 Compression and / or decompression are performed on each of the plurality of sub-blocks 1320 in the compression and decompression device 1266.

[0151] The compression storage system can form a first slot (e.g., "first slot") 1340 by aggregating a portion of the front portion of a plurality of compressed sub-blocks 1320 in each compression / decompression device 1330.

[0152] The compression memory system can form a first slot 1340 by compressing data corresponding to the first slot of the front portion of each of the plurality of compressed sub-blocks 1320 in the respective compression / decompression devices 1330, and can store the first slot 1340 in a first region 1350 of the memory. In this case, the compression memory system can store metadata corresponding to the data of the remaining sub-slots of each of the plurality of sub-blocks 1320 other than the compressed data of the first sub-slot in a metadata table.

[0153] In one example, when accessing multiple compressed sub-blocks 1320 in various compression / decompression devices 1330, the compression memory system may have previously read data from the first sub-slot (“first sub-slot”) of the corresponding data block. Since a portion of the initial data of each sub-block is stored in the first sub-slot, the compression memory system can decompress the compression in parallel using multiple compression / decompression devices 1330. The compression memory system can identify the addresses of the data in the remaining sub-slots by reading metadata while decompressing the data in the first sub-slot. The compression memory system can decompress the compression by reading the data in the remaining sub-slots from the identified addresses. In this case, the metadata may include additional information for managing the data in the multiple sub-slots. The metadata may correspond to the data in the remaining sub-slots and may include at least one of the following: the number of slots allocated to each data slice in the remaining sub-slots, the physical address of the data in the remaining sub-slot corresponding to block 1310 of the original data, and the compressed size of each data slice in the remaining sub-slots.

[0154] The information described herein and disclosed herein is about Figures 1 to 13BThe described memory, processor, electronic device, electronic device 1100, one or more processors 1110, memory 1130, compressed memory system 1200, host device 1210, memory 1230, compressed memory 1250, memory controller 1251, memory 1253, compressor 1260, memory device 1263, and compression and decompression device 1266 are implemented or represent hardware components by hardware components. As described above, or in addition to the above description, examples of hardware components that can be used to perform the operations described in this application include, where appropriate, controllers, sensors, generators, drivers, memories, comparators, arithmetic logic units, adders, subtractors, multipliers, dividers, integrators, and any other electronic components configured to perform the operations described in this application. In other examples, one or more hardware components performing the operations described in this application are implemented by computing hardware (e.g., by one or more processors or computers). A processor or computer may be implemented using one or more processing elements, such as logic gate arrays, controllers and arithmetic logic units, digital signal processors, microcomputers, programmable logic controllers, field-programmable gate arrays, programmable logic arrays, microprocessors, or any other means or combination of means configured to respond to and execute instructions in a defined manner to achieve a desired result. In one example, the processor or computer includes or is connected to one or more memories storing instructions or software executed by the processor or computer. Hardware components implemented by the processor or computer may execute instructions or software (such as an operating system (OS) and one or more software applications running on the OS) for performing the operations described herein. The hardware components may also access, manipulate, process, create, and store data in response to the execution of instructions or software. For the sake of brevity, the singular terms “processor” or “computer” may be used in the description of the examples described herein, but in other examples, multiple processors or computers may be used, or a processor or computer may include multiple processing elements or multiple types of processing elements or both. For example, a single hardware component or two or more hardware components may be implemented using a single processor, or two or more processors, or a processor and a controller. One or more hardware components may be implemented by one or more processors, or processors and controllers. One or more other hardware components may be implemented by one or more other processors, or additional processors and additional controllers. One or more processors, or processors and controllers, may implement a single hardware component or two or more hardware components.As described above, or in addition to the above description, the example hardware components may have any one or more different processing configurations, examples of which include: a single processor, a discrete processor, a parallel processor, a single instruction single data (SISD) multiprocessing, a single instruction multiple data (SIMD) multiprocessing, multiple instruction single data (MISD) multiprocessing, and multiple instruction multiple data (MIMD) multiprocessing.

[0155] Figures 1 to 13B The method of performing the operations described in this application is executed by computing hardware (e.g., by one or more processors or a computer), which is implemented as described above to execute instructions or software for performing the operations performed by the method described in this application. For example, a single operation or two or more operations may be executed by a single processor, or two or more processors, or a processor and a controller. One or more operations may be executed by one or more processors or a processor and a controller, and one or more other operations may be executed by one or more other processors, or additional processors and additional controllers. One or more processors, or a processor and a controller, may execute a single operation or two or more operations.

[0156] Instructions or software for controlling computing hardware (e.g., one or more processors or computers) to implement hardware components and perform the methods described above can be written as computer programs, code segments, instructions, or any combination thereof to individually or collectively instruct or configure one or more processors or computers to operate as a machine or special-purpose computer to perform operations performed by the hardware components and methods described above. In one example, the instructions or software include machine code (such as machine code generated by a compiler) that is directly executed by one or more processors or computers. In another example, the instructions or software include higher-level code that is executed by one or more processors or computers using an interpreter. Instructions or software can be written using any programming language based on the block diagrams and flowcharts shown in the accompanying drawings and the corresponding description herein, which disclose algorithms for performing operations performed by the hardware components and methods described above.

[0157] Instructions or software used to control computing hardware (e.g., one or more processors or computers) to implement hardware components and perform the methods described above, along with any associated data, data files, and data structures, may be recorded, stored, or fixed in or on one or more non-transitory computer-readable storage media, and therefore are not signals in themselves. Examples of non-transitory computer-readable storage media, as described above or in addition to the above description, include: read-only memory (ROM), random access programmable read-only memory (PROM), electrically erasable programmable read-only memory (EEPROM), random access memory (RAM), dynamic random access memory (DRAM), static random access memory (SRAM), flash memory, non-volatile memory, CD-ROM, CD-R, CD+R, CD-RW, CD+RW, DVD-ROM, DVD-R, DVD+R, DVD-RW, DVD+RW, DVD-RAM, BD-ROM, BD-R, BD-R LTH, BD-RE, Blu-ray or optical disc storage devices, hard disk drives (HDDs), solid-state drives (SSDs), flash memory, card storage (such as micro multimedia cards or cards (e.g., Secure Digital (SD) or Extreme Digital (XD))), magnetic tape, floppy disks, magneto-optical data storage devices, optical data storage devices, hard disks, solid-state drives, and any other means configured to store instructions or software and any associated data, data files, and data structures in a non-transitory manner and to provide said instructions or software and any associated data, data files, and data structures to one or more processors or computers so that one or more processors or computers can execute the instructions. In one example, the instructions or software and any associated data, data files, and data structures are distributed across a networked computer system, such that the instructions and software and any associated data, data files, and data structures are stored, accessed, and executed by one or more processors or computers in a distributed manner.

[0158] While this disclosure includes specific examples, it will be clear upon understanding this disclosure that various changes in form and detail may be made in these examples without departing from the spirit and scope of the claims and their equivalents. The examples described herein are to be considered descriptive only and not for limiting purposes. The description of features or aspects in each example is to be applied to similar features or aspects in other examples. Suitable results may be achieved if the described techniques are performed in a different order, and / or if the components in the described system, architecture, apparatus, or circuit are combined in a different manner, and / or replaced or supplemented by other components or their equivalents.

[0159] Therefore, in addition to the foregoing and all the accompanying drawings, the scope of this disclosure also includes the claims and their equivalents, that is, all variations within the scope of the claims and their equivalents should be interpreted as included in this disclosure.

Claims

1. A method for managing compressed data, the method comprising: The first data in the compressed data from the original data, corresponding to the first slot at the beginning, is stored in the first region of the memory. The second data of the remaining slots is stored in the second region of the memory, and the remaining slots include data from the compressed data other than the first data; as well as The metadata corresponding to the second data is stored in a metadata table in the third area of ​​the memory.

2. The method according to claim 1, wherein, The steps for storing the first data include: For each block of original data, the first data is stored in the first region of memory in the same order as the blocks of original data corresponding to the first data.

3. The method according to claim 1, wherein, The first data and the original data blocks are mapped one-to-one in the order of the original data addresses.

4. The method according to claim 1, wherein, The steps for storing the first data include: The first data is stored in parallel in the first area of ​​the memory.

5. The method according to claim 4, wherein, The step of storing the first data in the first slot is performed using either a channel-by-channel approach or a row-by-row approach.

6. The method according to claim 1, wherein, The metadata table includes entries for the compressed size of the compressed data and metadata information about the location where the second data is stored. The metadata entries are mapped one-to-one with the blocks of the original data in the order of their addresses.

7. The method according to claim 1, wherein, The metadata includes the number of slots allocated to the second data and the physical address of the second data corresponding to each block of the original data.

8. The method according to claim 1, wherein, The first size of the first region is dynamically adjusted based on one or more of the memory compression ratio and the memory size.

9. The method according to claim 1, wherein, The steps for storing the first data include: Divide the original data into multiple sub-blocks; and The first sub-slot data corresponding to the front of the first sub-slot of each of the plurality of sub-blocks is stored in the first region of the memory.

10. The method according to claim 9, wherein, The steps for storing the metadata corresponding to the second data include: The metadata corresponding to the remaining sub-slot data of the remaining sub-slots of each of the plurality of sub-blocks, excluding the data of the first sub-slot, is stored in the metadata table.

11. The method according to claim 10, wherein, Metadata includes: One or more of the following: the number of slots allocated to each data slice in the remaining subslots, the physical address of the data in each corresponding remaining subslot in the block of original data, and the compressed size of the data in the remaining subslots.

12. A method for managing compressed data, the method comprising: Receive a request from the host device to read the target data from the compressed data stored in the memory; In response to the read request, calculate the device physical address of the first slot corresponding to the target data and the device physical address of the entry in the metadata table; Based on the physical address of the device, the first data of the first slot is decompressed by reading the first data of the first slot, and the remaining data of the remaining slots other than the first slot is decompressed by reading the entries of the metadata table; as well as The block data obtained by combining the first decompressed data and the remaining decompressed data is sent to the host device.

13. The method according to claim 12, wherein, The read request includes an index of the target data.

14. The method according to claim 12, wherein, The decompression steps include: The first physical address of the first slot of the target block corresponding to the target data and the second physical address of the metadata table of the target block are determined by the index of the target data. The compression of the first data in the first slot is decompressed by reading the first data in the first slot based on the first physical address; In addition to reading the first data, entries in the metadata table are read based on the second physical address; and The remaining data is decompressed by obtaining the physical address of the corresponding data in the remaining slot from the entries in the metadata table.

15. The method according to claim 14, wherein, The steps to determine the first physical address and the second physical address include: The first physical address is determined by multiplying the target block index by the slot size and adding the base address of the first region of memory to the result of the first multiplication; and The second physical address is determined by multiplying the target block's index by the size of the metadata and adding the base address of the third region of memory to the result of the second multiplication.

16. A non-transitory computer-readable storage medium for storing instructions, which, when executed by a processor, cause the processor to perform the method according to any one of claims 1 to 15.

17. An electronic device comprising: One or more processors are configured to execute instructions; as well as Memory, storing instructions, wherein execution of the instructions configures the one or more processors to: The first data in the compressed data from the original data, corresponding to the first slot at the beginning, is stored in the first region of the memory. The remaining data in the remaining slots of the compressed data, excluding the first data in the first slot, are stored in the second area of ​​the memory; and The metadata corresponding to the remaining data is stored in a metadata table in the third area of ​​the memory.

18. A compressed storage system, the compressed storage system comprising: Memory, including one or more general memory regions and compressed memory regions; The memory controller is configured to generate a control signal for decompressing the target data in response to receiving a read request from the host device for target data in compressed data stored in the memory; as well as A compressor is configured to store compressed data of the original data in a memory, and to decompress the compressed target data in response to the control signal. The compressor includes: The compression and decompression apparatus is configured to decompress the first data in the first slot by reading the first data in the first slot corresponding to the target data, and to decompress the remaining data in the remaining slots by reading entries from the metadata table; and The memory device is configured to: combine the decompressed first data with the decompressed remaining data; and send the combined data to the host device.

19. The compressed storage system according to claim 18, wherein, The memory device is also configured to: The first data in the first slot corresponding to the front part of each block of the original data in the compressed data is stored in the first region of the memory; The remaining data in the remaining slots of the compressed data, excluding the first data in the first slot, are stored in the second area of ​​the memory; and The metadata corresponding to the remaining data is stored in a metadata table in the third area of ​​the memory.

20. The compressed storage system according to claim 18, wherein, The memory device is also configured to: The first physical address of the first slot of the target block corresponding to the target data and the second physical address of the metadata table of the target block are determined by the index of the target data. The compression and decompression devices decompress the first data in the first slot by reading the first data in the first slot corresponding to the target data based on the first physical address. In addition to reading the first data from the first slot, the entry in the metadata table corresponding to the target data is read based on the second physical address; and The remaining data in the remaining slots is decompressed by the compression and decompression devices by obtaining the physical address of the remaining data in the remaining slots from the entries in the metadata table.

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