Millimeter wave radar boiler heating surface tube crack detection method based on GPU parallelization

Abstract

The invention provides a millimeter-wave radar boiler heating surface tube crack detection method based on GPU parallelization, and the method comprises the steps: constructing a three-layer parallelization frame integrating data flow, calculation and control, and employing the large-scale parallel calculation capability of a GPU to detect the crack of a heating surface tube of a millimeter-wave radar boiler. The whole-process acceleration processing from preprocessing, range profile reconstruction, feature extraction to intelligent identification is carried out on massive echo signals acquired by the millimeter wave radar, so that high-precision and high-real-time online detection and positioning of the heating surface pipe wall fine cracks are realized in a complex environment in a boiler with strong interference; finally, the detection efficiency is improved, meanwhile, the technical effect of high detection confidence is kept, and powerful technical support is provided for safe operation and preventive maintenance of the power plant boiler.

Description

Technical Field

[0001] This invention relates to the technical field of industrial defect detection, and in particular to a method for detecting cracks in boiler heating surface tubes using millimeter-wave radar based on GPU parallelization. Background Technology

[0002] Boilers are key equipment in power plant thermal energy systems. Their heating surface tubes are subjected to high temperature and high pressure environments for extended periods, making them highly susceptible to structural defects such as microcracks. If these cracks are not detected and addressed in a timely manner, they may lead to boiler leaks or even explosions.

[0003] Traditional crack detection methods mainly include ultrasonic testing, infrared thermography, and manual inspection. These methods have the following drawbacks: Limited detection accuracy: Infrared thermography is greatly affected by temperature distribution and has difficulty identifying minute cracks in environments with strong interference; Poor adaptability: Ultrasonic testing requires contact with the wall surface, making it difficult to apply in real-time online environments at high temperatures; Insufficient real-time performance: Manual inspection and serial signal processing methods cannot meet the needs of large-scale and rapid detection during boiler operation.

[0004] Millimeter-wave radar, with its advantages of penetrating flue gas, non-contact detection, and sub-millimeter resolution, has become a potential solution for boiler inspection. However, the processing of millimeter-wave echo signals involves massive amounts of data, making real-time detection difficult with traditional CPU serial processing methods. Existing methods lack GPU parallel framework design and crack identification algorithm optimization schemes for radar data. Summary of the Invention

[0005] The first aspect of this disclosure provides a method for detecting cracks in boiler heating surface tubes using millimeter-wave radar based on GPU parallelization, comprising the following steps: S1: Scan the boiler heating surface tube wall with millimeter-wave radar, collect raw echo signal data, and transmit the raw echo signal data to GPU memory; S2: On the GPU, the original echo signal data is preprocessed by parallel computing to generate a range profile. Parallel feature extraction is performed on the range profile to obtain crack candidate regions. The crack candidate regions are then identified in parallel using a pre-trained neural network model to obtain crack detection results. S3: Output and visualize the crack detection results.

[0006] In conjunction with the first aspect, the signal preprocessing of the original echo signal data through parallel computing includes: The original echo signal data is parallelized for amplitude normalization and noise reduction using CUDA thread blocks. The denoised signal is weighted using window functions by utilizing CUDA kernel functions and shared memory. The batch FFT schedule of the cuFFT library is called to perform fast Fourier transform on the weighted signal in parallel to generate a range profile; The power spectrum of the range image is calculated in parallel.

[0007] In conjunction with the first aspect, the parallelized feature extraction of the distance image includes: Through parallel computation, the neighborhood orientation gradient and gradient magnitude of each pixel in the distance image are calculated. Thresholds are dynamically calculated based on local mean and standard deviation, and mask matrices for candidate crack pixels are generated in parallel. A parallel connected component labeling algorithm based on parallel disjoint set is used to perform parallel connected component analysis on the crack candidate pixels to identify the crack region; The identified crack regions are post-processed in parallel using GPU morphological filtering kernel functions.

[0008] In conjunction with the first aspect, the parallel identification of the crack candidate regions using a pre-trained neural network model includes: The crack candidate regions are input into a lightweight CNN model optimized by TensorRT. On the GPU, forward inference of the model is executed in parallel using multiple CUDA streams and batch input mode. Output the confidence level, location, and size information of the crack.

[0009] A second aspect of this disclosure provides a millimeter-wave radar boiler heating surface tube crack detection system based on GPU parallelization, comprising: The millimeter-wave radar signal acquisition module is used to control the radar probe array to scan the boiler heating surface tube wall and acquire raw echo signal data. The GPU parallel signal processing module is used to perform parallel signal preprocessing on the original echo signal data on the GPU to generate a range profile. A crack feature extraction and recognition module is used to perform parallel feature extraction on the distance image on the GPU and to recognize cracks using a neural network model. The detection result visualization module is used to display the location, size, and confidence level of the crack in real time.

[0010] In conjunction with the second aspect, the GPU parallel signal processing module includes: The preprocessing kernel function is used to perform parallelized magnitude normalization and denoising. The FFT kernel function is used to call the cuFFT library to generate distance images in parallel. Feature enhancement kernel function for parallel computation of the power spectrum of range profiles.

[0011] In conjunction with the second aspect, the crack feature extraction and recognition module includes: The gradient calculation kernel function is used to compute the gradient of the distance image in parallel and generate candidate regions; Connectivity analysis kernel function, used for parallel labeling and merging of crack candidate pixels; Morphological filtering kernel function, used to perform dilation and erosion operations in parallel; A model inference engine for optimizing and loading neural network models via TensorRT and performing inference in parallel on GPUs.

[0012] In conjunction with the second aspect, the system adopts a multi-radar probe parallel input architecture, and the GPU parallel signal processing module and the crack feature extraction and recognition module support multi-GPU deployment.

[0013] A third aspect of this disclosure provides an electronic device comprising: One or more processors; A storage unit is used to store one or more programs, which, when executed by one or more processors, enable the one or more processors to implement the GPU-parallelized millimeter-wave radar boiler heating surface tube crack detection method.

[0014] A fourth aspect of this disclosure provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, enables the implementation of the GPU-parallelized millimeter-wave radar boiler heating surface tube crack detection method.

[0015] Beneficial Effects: This disclosure provides a GPU-parallelized millimeter-wave radar method for detecting cracks in boiler heating surface tubes. By constructing a three-layer parallel framework integrating data flow, computation, and control, and utilizing the massive parallel computing capabilities of GPUs, the method accelerates the entire process of processing massive echo signals acquired by millimeter-wave radar, from preprocessing, range image reconstruction, feature extraction to intelligent recognition. This enables high-precision, high-real-time online detection and location of minute cracks in the heating surface tube wall in the complex environment of a boiler with strong interference. Ultimately, this improves detection efficiency while maintaining high detection confidence, providing strong technical support for the safe operation and preventive maintenance of power plant boilers. Attached Figure Description

[0016] Figure 1 This is a schematic flowchart of a millimeter-wave radar boiler heating surface tube crack detection method based on GPU parallelization, according to an embodiment of this disclosure. Figure 2This is a schematic diagram of a millimeter-wave radar boiler heating surface tube crack detection system based on GPU parallelization according to an embodiment of the present disclosure; Figure 3 An electronic device as described in the disclosed embodiments. Detailed Implementation

[0017] Exemplary embodiments will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description relates to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with those disclosed herein.

[0018] The terminology used in this disclosure is for the purpose of describing particular embodiments only and is not intended to be limiting of the present disclosure. The singular forms “a,” “the,” and “the” as used in this disclosure and the appended claims are also intended to include the plural forms unless the context clearly indicates otherwise. It should also be understood that the term “and / or” as used herein refers to and includes any and all possible combinations of one or more of the associated listed items.

[0019] Figure 1 This is a schematic flowchart of a millimeter-wave radar boiler heating surface tube crack detection method based on GPU parallelization, according to an embodiment of this disclosure. The method includes the following steps: S1: Scan the boiler heating surface tube wall with millimeter-wave radar, collect raw echo signal data, and transmit the raw echo signal data to GPU memory; Specifically, this step is the system's data input phase. First, a millimeter-wave radar probe array deployed inside the boiler scans the heated surface tube wall to be inspected. The radar emits electromagnetic waves and receives the echo signals reflected back from the tube wall, thereby acquiring raw data containing information about the tube wall surface condition. This data is typically in complex form (I / Q data) containing amplitude and phase information, and the data volume is enormous.

[0020] This step is fundamental to the entire detection process, and its quality directly determines the accuracy of the final detection. Asynchronously transferring data from host memory to GPU memory is a crucial preparation for utilizing the GPU for high-speed parallel computing, avoiding bottlenecks caused by data exchange in subsequent calculations.

[0021] Non-contact data acquisition was achieved, enabling it to penetrate interfering environments such as flue gas inside boilers. Simultaneously, massive amounts of data were pre-loaded into GPU memory, laying the foundation for subsequent large-scale parallel processing—a crucial step in achieving high real-time performance.

[0022] S2: On the GPU, the original echo signal data is preprocessed by parallel computing to generate a range profile. Parallel feature extraction is performed on the range profile to obtain crack candidate regions. The crack candidate regions are then identified in parallel using a pre-trained neural network model to obtain crack detection results. The GPU invokes parallel CUDA kernel functions to normalize the amplitude and filter the original, noisy echo signal to improve signal quality. Subsequently, using the highly optimized cuFFT library on the GPU, batch fast Fourier transforms are performed on the cleaned signal to convert the time-domain signal into a range image, thereby clearly distinguishing the surface of the pipe wall and its defects in the range dimension.

[0023] Based on the generated distance image, the GPU continues to perform parallel computation. By calculating the gradient magnitude of each pixel, edge regions with drastic grayscale changes in the image are identified. Then, a dynamic thresholding and parallel connected component analysis algorithm is used to filter out candidate regions that conform to crack morphology characteristics from these edge regions, effectively removing irrelevant noise interference.

[0024] The extracted crack candidate regions are input into a pre-trained, lightweight neural network model (such as a CNN) optimized and accelerated by TensorRT. The GPU utilizes its powerful parallel inference capabilities to perform batch classification of these candidate regions, determine whether they are real cracks, and output the corresponding confidence scores.

[0025] This step is crucial for transforming raw data into valuable information. It leverages the GPU's many-core parallel architecture to thoroughly parallelize and accelerate signal processing, image generation, and intelligent analysis tasks that were traditionally executed serially on the CPU and were extremely time-consuming.

[0026] It improves the accuracy and robustness of identifying minute cracks in complex backgrounds.

[0027] S3: Output and visualize the crack detection results.

[0028] The final crack detection results obtained in step S2 (including information such as crack location, length, and confidence level) are transferred from the GPU back to the host memory.

[0029] The results of machine processing are transformed into information that humans can intuitively understand and use. Through a graphical interface, the distribution, severity, and size of cracks are clearly marked on the boiler structure diagram using methods such as color coding, bounding boxes, and 3D mapping.

[0030] It enables real-time presentation and intuitive interpretation of test results, providing maintenance personnel with accurate decision-making basis, enabling them to quickly locate defects, assess risks and take timely maintenance measures, and ultimately transform technical testing capabilities into actual production safety assurance.

[0031] Furthermore, the signal preprocessing of the original echo signal data through parallel computing includes: The original echo signal data is parallelized for amplitude normalization and noise reduction using CUDA thread blocks. The denoised signal is weighted using window functions by utilizing CUDA kernel functions and shared memory. The batch FFT schedule of the cuFFT library is called to perform fast Fourier transform on the weighted signal in parallel to generate a range profile; The power spectrum of the range image is calculated in parallel.

[0032] Signal preprocessing is fundamental to subsequent analysis. Its core objective is to transform the raw, noisy echo signal into a clear, feature-identifiable range profile. This process is entirely parallelized on the GPU. First, CUDA thread blocks are used to perform parallel amplitude normalization and denoising on massive amounts of raw echo signal data. This step ensures the comparability of echo signals at different distances and intensities and initially filters out high-frequency noise introduced by the environment, providing a clean signal source for subsequent transformations. Next, CUDA kernel functions and shared memory are used to weight the denoised signal with window functions. Shared memory significantly accelerates the convolution operation between window functions (such as the Hanning window) and the signal, effectively suppressing the spectral leakage phenomenon commonly seen in FFT transforms, making the target more focused in the distance dimension. Then, the batch FFT scheduler from the cuFFT library is invoked to perform parallel Fast Fourier Transforms (FFTs) on the weighted signals. This step is a crucial acceleration operation, enabling simultaneous transformation of signals from multiple radar channels and multiple frames of data. It efficiently converts the time-domain signal into a frequency-domain range profile, thus clearly distinguishing reflection points at different locations along the range dimension. Finally, the power spectrum of the range profile is calculated in parallel. Each GPU thread independently calculates the signal strength of one or more range cells, converting the complex-form FFT result into a power value representing the intensity of reflection energy, generating the final intensity image for visual analysis and feature extraction.

[0033] Furthermore, the parallelized feature extraction of the distance image includes: Through parallel computation, the neighborhood orientation gradient and gradient magnitude of each pixel in the distance image are calculated. Thresholds are dynamically calculated based on local mean and standard deviation, and mask matrices for candidate crack pixels are generated in parallel. A parallel connected component labeling algorithm based on parallel disjoint set is used to perform parallel connected component analysis on the crack candidate pixels to identify the crack region; The identified crack regions are post-processed in parallel using GPU morphological filtering kernel functions.

[0034] The task of the feature extraction stage is to automatically and accurately locate pixel regions that may be cracks from the preprocessed range image. This process also heavily relies on the parallel architecture of the GPU. First, through parallel computation, the neighborhood directional gradient and gradient magnitude of each pixel in the range image are calculated. This operation is implemented by a custom CUDA kernel function, with each thread responsible for one pixel, synchronously calculating its difference in the X and Y directions and the combined gradient magnitude, thereby quickly outlining the edge information of all intensity abrupt changes in the image. These edges are typical manifestations of cracks. Next, a threshold is dynamically calculated based on the local mean and standard deviation, and a mask matrix of crack candidate pixels is generated in parallel. This method can adapt to the contrast changes in different regions of the image. By comparing the gradient value of each pixel with the local threshold in parallel through the GPU, a binary mask image is generated, initially filtering out significant edge pixels. Then, a connected component labeling algorithm based on parallel disjoint-set data structure is employed to perform parallel connected component analysis on crack candidate pixels. This algorithm transforms the originally serial region labeling and merging process into parallel execution, utilizing warp-level atomic operations to efficiently resolve ownership conflicts between pixels, thereby quickly identifying potential crack regions composed of adjacent candidate pixels and calculating their area, bounding rectangle, and other geometric properties. Finally, the identified crack regions are post-processed in parallel using GPU morphological filtering kernel functions. Dilation and erosion operations accelerated by shared memory can fill tiny holes, connect broken crack fragments, and smooth edges, while eliminating isolated noise points. This results in more complete and regular crack candidate regions, laying a solid foundation for final classification and recognition.

[0035] Furthermore, the parallel identification of the crack candidate regions using a pre-trained neural network model includes: The crack candidate regions are input into a lightweight CNN model optimized by TensorRT. On the GPU, forward inference of the model is executed in parallel using multiple CUDA streams and batch input mode. Output the confidence level, location, and size information of the crack.

[0036] The crack identification stage utilizes a deep learning model to distinguish between genuine and fake candidate regions and performs fine-grained quantization. The entire process is significantly accelerated on a GPU. First, the crack candidate regions output from the feature extraction module are input into a lightweight CNN model optimized with TensorRT. The TensorRT engine performs a series of optimizations on the network structure, such as layer fusion and precision quantization (e.g., FP16), significantly reducing computational load and memory consumption. Hardware acceleration using the GPU's Tensor Cores ensures the model maintains high accuracy while meeting the latency requirements of real-time inference. Next, on the GPU, the model's forward inference is executed in parallel using multiple CUDA streams and batch input mode. The multi-stream mechanism allows data copying and model computation to overlap, while batch processing can infer dozens of candidate regions simultaneously, fully utilizing the GPU's computing power and greatly improving overall throughput, avoiding the efficiency loss associated with processing candidate regions one by one. Finally, the confidence score, location, and size information of the crack are output. The optimized model will output a confidence score between 0 and 1 for each candidate region, representing the probability that the region is a real crack. Combined with the region location and pixel size obtained in the feature extraction stage, the final detection result containing qualitative judgment and quantitative measurement is generated, providing comprehensive and accurate data support for subsequent visualization and decision-making.

[0037] For example, taking the heat-receiving tubes of the screen-type superheater of a 300MW subcritical boiler in a power plant as the detection object, the millimeter-wave radar adopts a 76–81 GHz linear frequency modulated continuous wave (FMCW) system, with N_r = 16 antenna array elements, N_c = 1024 sampling points per frame, and continuously acquiring N_f = 32 frames of data to form the input three-dimensional tensor S_raw ∈ C^{32×16×1024}. First, this tensor is asynchronously copied from the host memory to the GPU memory via the PCIe bus. The custom CUDA kernel function Kernel_Normalize() is called to allocate one thread for each complex sample in the tensor, for a total of 32×16×1024 = 524,288 threads executing in parallel.

[0038] Each thread reads its corresponding complex sample, calculates the sum of squares to obtain the signal strength I = (real² + imag²), and then uses a local window of shared memory size 7 to perform parallel moving average filtering to remove high-frequency noise. For example, for frame 0, channel 0, and sample point 512, the original intensity value is 12.3, which becomes 11.8 after 7-point neighborhood mean filtering. At the same time, global amplitude normalization is performed to linearly map all intensity values ​​to the [0,1] interval.

[0039] After denoising is completed, the batch FFT plan of the cuFFT library is called to create a batch processing plan containing N_r×N_f=16×32=512 independent transformations, each transformation having a length of 1024.

[0040] The `cufftExecC2C()` interface is used to perform parallel FFT on the normalized complex signal, resulting in a range image matrix R(i,j,k), where i∈[0,31] represents the frame number, j∈[0,15] represents the channel number, and k∈[0,1023] represents the range cell number. For example, in the range spectrum of the 2nd channel of the 5th frame, the complex amplitude corresponding to the 200th range cell is (45.2, -12.3), and the modulus is 46.8. Thread synchronization is achieved through a Warp-level Barrier (__syncwarp()), ensuring that all 32 threads within the same Warp complete their FFTs before proceeding with subsequent operations.

[0041] Subsequently, each thread independently calculates the power spectrum P(i,j,k)=|R(i,j,k)|², resulting in a 32×16×1024 power spectrum matrix. To reduce shared memory write conflicts, a column-priority storage (Bank Conflict Free layout) is adopted, meaning adjacent threads access adjacent column addresses, ensuring that write operations from the 32 threads within the same warp are evenly distributed across the 32 memory banks. For example, the power values ​​of distance cells 0 to 31 in channel 0 of frame 0 are written consecutively without conflict.

[0042] After the power spectrum matrix is ​​generated, the custom CUDA kernel function Kernel_Gradient() is started to extract crack candidate regions. This kernel function allocates a thread for each pixel (corresponding to a distance unit) to calculate the neighborhood directional gradient in parallel: for the 300th pixel in the 5th channel of the 100th frame, the value of the next pixel P(100,5,301) and the value of the previous pixel P(100,5,299) are taken, and the gradient in the X direction G_x = P(100,5,301) - P(100,5,299) is calculated; Take the same distance cell P(101,5,300) from the same channel in the next frame and P(99,5,300) from the previous frame, and calculate the gradient in the Y direction G_y = P(101,5,300) - P(99,5,300); then calculate the gradient magnitude M = √(G_x² + G_y²). The gradient magnitude results of all threads are written to shared memory in parallel.

[0043] Then, for each pixel, the mean μ and standard deviation σ within a 3×3 local window centered on that pixel are calculated, and a dynamic threshold T = μ + 2.5σ (α = 2.5) is set. If the gradient magnitude M of the pixel ≥ T, it is marked as a crack candidate pixel, and the corresponding position in the mask matrix M_mask is set to 1; otherwise, it is set to 0. For example, in a local region with a flat background, μ = 0.05, σ = 0.02, T = 0.10, and a pixel with M = 0.23, it is determined to be a candidate pixel.

[0044] After obtaining the binary mask matrix, a connected component labeling algorithm based on parallel union-find is used to identify crack regions. Specifically, each thread initializes its corresponding pixel as an independent node, with its parent node pointing to itself. Then, four-neighbor merging is performed in parallel: for each pixel, if it is a candidate pixel (M_mask = 1), it checks whether its right and lower adjacent pixels are also candidate pixels. If so, the parent nodes of the two are merged using an atomic comparison swap operation (atomicCAS). After the first round of merging, parent node path compression is implemented through warp-level atomic operations, ensuring that all nodes in the same connected region directly point to the root node.

[0045] Finally, the number of pixels and boundary coordinates of each root node are counted, and the bounding box (minimum row number, maximum row number, minimum column number, maximum column number) and area (number of pixels) of the crack region are output. For example, in a 32×1024 power spectrum, a connected region containing 87 pixels is detected, whose bounding rectangle is [120, 125] frames × [340, 380] distance units, corresponding to a crack length of approximately 4.2 mm and a width of approximately 0.35 mm in actual space.

[0046] Next, the GPU morphological dilation and erosion kernel function `Kernel_Morphology()` is called to post-process the mask. This kernel function loads 3×3 neighborhood data using shared memory. Each thread performs a dilation operation (assigning the maximum neighborhood value to the center pixel) and an erosion operation (assigning the minimum neighborhood value to the center pixel), eroding first and then dilating to remove isolated noise and smooth crack edges. For example, an isolated noise point of only 2 pixels in the previous step is eliminated after the erosion operation, while the edges of an 87-pixel crack region are filled into a more regular shape.

[0047] Crack candidate region slices are fed into a lightweight CNN model for real / false crack detection. This embodiment uses a TinyResNet architecture with a single-channel image of size 32×32 pixels as input. During model training, 5000 labeled images were collected, including 2000 positive samples (real cracks) and 3000 negative samples (welding marks, oxide scale, etc.). After training, the PyTorch model is exported as an ONNX file and then optimized using TensorRT: FP16 quantization is enabled (builder->setFp16Mode(true)). TensorRT automatically merges convolutional layers, batch normalization layers, and ReLU layers into a CBR kernel and utilizes Tensor Cores to accelerate matrix operations. The optimized engine reduces the inference time for a single slice on an NVIDIA T4 GPU from the original 6.2 ms to 0.9 ms.

[0048] On the GPU, a batch input mode (batch=32) is used to simultaneously input 32 crack candidate region slices into the model for parallel forward inference. Each CUDA Stream is bound to an inference instance, creating a total of 4 Streams to implement a multi-stream pipeline—when Stream0 is performing model inference, Stream1 is loading the next batch of data, with inference and data transmission completely overlapping. For example, a detection generates 128 candidate regions, which are inferred sequentially in 4 batches, with a total time of approximately 36 ms (including data transmission). The model outputs the crack confidence p for each slice. For the aforementioned 87-pixel region, the model outputs p=0.94, classifying it as a real crack; while for a weld mark region with an area of ​​45 pixels, p=0.12, classifying it as an artifact.

[0049] Finally, the output is fused and visualized: the areas identified as real cracks are mapped back to the boiler's 3D coordinate system using a pre-calibrated coordinate transformation matrix, yielding the crack center coordinates (X = 1250 mm, Y = 3400 mm, Z = 560 mm), crack length 4.2 mm, width 0.35 mm, and orientation angle 15°. On the visualization interface, crack confidence levels are displayed using color coding: cracks with p ≥ 0.8 are displayed in dark red, 0.6 ≤ p < 0.8 in orange, and p < 0.6 in yellow. Simultaneously, detailed information for each crack is output to the console in real time. “Crack #001 | Coordinates (1250, 3400, 560) mm | Length 4.2 mm, Width 0.35 mm | Aspect Angle 15° | Confidence Level 0.94”. The system continuously monitors 100 frames of data, calculates the growth trend of the crack length, and generates a preventive maintenance warning if the weekly growth rate exceeds 5%. Through the above specific implementation method, those skilled in the art can completely reproduce the crack detection process of boiler heating surface tubes based on GPU parallelization millimeter-wave radar.

[0050] Figure 2 This is a schematic diagram of a millimeter-wave radar boiler heating surface tube crack detection system based on GPU parallelization, according to an embodiment of the present disclosure, including: The millimeter-wave radar signal acquisition module 210 is used to control the radar probe array to scan the boiler heating surface tube wall and acquire raw echo signal data. This module serves as the sensing front-end and data source for the entire detection system. Its core responsibility is to proactively acquire raw state information of the boiler's heated surface tube walls. By precisely controlling a millimeter-wave radar probe array positioned at specific locations inside the boiler, this module scans the tube walls in a linear frequency modulated continuous wave (FMCW) mode. During the scan, it captures high-frequency electromagnetic wave signals reflected from the tube wall surface and microscopic defects within it, and down-converts these signals into complex data (I / Q data) containing amplitude and phase information. This high-resolution raw echo signal data is temporarily stored in the host memory, providing first-hand data raw materials for subsequent in-depth processing. The performance of this module, such as the scan frame rate and sampling rate, directly determines the system's ability to detect minute cracks and rapid changes.

[0051] The GPU parallel signal processing module 220 is used to perform parallel signal preprocessing on the original echo signal data on the GPU to generate a range profile. This module is the core computing engine of the system, responsible for the crucial task of transforming the raw signal into a visual image. Its primary operating environment is the GPU's memory and computing cores. After receiving the raw echo signal data from the acquisition module, the module invokes a series of highly optimized CUDA kernel functions for parallel pipelined processing. This includes using thousands of threads simultaneously for amplitude normalization and moving average denoising to eliminate environmental interference; subsequently, it employs shared-memory-accelerated window function convolution to suppress spectral leakage; finally, by calling the batch FFT plan from the cuFFT library, it transforms thousands of signal channels in parallel from the time domain to the frequency domain, generating a distance image (or distance-power spectrum) that visually displays the reflection intensity of the tube wall at different distances. This series of intensive computational tasks is executed in parallel through the GPU's many-core architecture, greatly accelerating the process that was originally extremely time-consuming in serial processing on the CPU, forming the technological cornerstone for achieving high real-time performance of the system.

[0052] The crack feature extraction and recognition module 230 is used to perform parallel feature extraction on the distance image on the GPU and to recognize cracks using a neural network model. This module acts as the system's "intelligent brain," responsible for accurately locating and identifying cracks from the initially processed distance image. It also runs entirely on the GPU, achieving seamless integration and parallel acceleration of feature extraction and pattern recognition. The module first performs pixel-level parallel gradient calculations on the generated distance image, segments potential crack edge points using dynamic thresholding, and then rapidly aggregates these scattered pixels into connected candidate regions using an advanced algorithm based on parallel disjoint-set data structures. Next, GPU-accelerated morphological filtering (such as dilation and erosion) is used to post-process these candidate regions to connect breakpoints, smooth edges, and remove noise. Finally, the processed candidate regions are fed into a lightweight convolutional neural network (CNN) model optimized and accelerated by the TensorRT engine for parallel inference. This model efficiently performs the final classification of each candidate region on the GPU in batch processing, outputting the confidence level of whether it is a real crack, and accurately calculating its location and geometric dimensions, achieving automated and high-precision defect identification.

[0053] The detection result visualization module 240 is used to display the location, size, and confidence level information of the crack in real time.

[0054] This module serves as the human-computer interface between the system and maintenance personnel, transforming the abstract data generated by the aforementioned modules into intuitive and actionable visual information. It receives structured data from the identification module, including the coordinates, length, width, and confidence level of each confirmed crack. This information is then fused and mapped onto a 3D model or 2D unfolded diagram of the boiler's heating surface, and rendered and displayed in real-time using various methods such as color (e.g., highlighting high-risk cracks in red), outlines, and numerical annotations. This visual output allows maintenance personnel to readily grasp the boiler's internal health status, quickly locate defects, accurately assess the severity of risks, and provide direct and reliable data for subsequent maintenance decisions, lifespan prediction, and preventative maintenance. Ultimately, it transforms efficient computational detection capabilities into practical safety measures.

[0055] Furthermore, the GPU parallel signal processing module includes: The preprocessing kernel function is used to perform parallelized magnitude normalization and denoising. The FFT kernel function is used to call the cuFFT library to generate distance images in parallel. Feature enhancement kernel function for parallel computation of the power spectrum of range profiles.

[0056] The high performance of the GPU's parallel signal processing module stems from its highly specialized parallel computing kernel functions. The preprocessing kernel, the first step in the entire signal processing pipeline, utilizes thousands of GPU threads to simultaneously process massive amounts of raw echo signal data points. Each thread independently handles the computation of one or a group of data points, achieving global parallelization of amplitude normalization and moving average denoising. This not only eliminates gain fluctuations and random noise introduced during signal acquisition but also provides clean and standardized data input for subsequent processing. The FFT kernel undertakes the crucial transformation from signal to image. It doesn't simply define a custom computation unit but efficiently calls and manages NVIDIA's cuFFT mathematical library, deeply optimized for GPUs. Through its "Batch FFT Scheme" interface, it can organize data from thousands of radar channels into a massive computational task package and submit it to the GPU's numerous streaming multiprocessors for parallel Fourier transform. This compresses the thousands of iterations required in serial processing into a single parallel computation activity, significantly accelerating the generation of range images. The feature enhancement kernel function continues to leverage its parallel advantages after the FFT transformation. It organizes GPU threads to perform parallel sum-of-squares operations on the newly generated complex distance image results. Each thread quickly calculates the signal power value of a distance cell, ultimately converting the entire complex spectrum into a grayscale intensity image, i.e., the power spectrum, which is easier to perform visual analysis and feature extraction. This lays a solid foundation for subsequent crack recognition.

[0057] Furthermore, the crack feature extraction and recognition module includes: The gradient calculation kernel function is used to compute the gradient of the distance image in parallel and generate candidate regions; Connectivity analysis kernel function, used for parallel labeling and merging of crack candidate pixels; Morphological filtering kernel function, used to perform dilation and erosion operations in parallel; A model inference engine for optimizing and loading neural network models via TensorRT and performing inference in parallel on GPUs.

[0058] The crack feature extraction and recognition module achieves an intelligent leap from image to decision through the collaborative work of multiple internal dedicated kernel functions and the inference engine. The gradient calculation kernel function, a pioneer in crack detection, allocates an independent computation thread to each pixel in the image, calculates its gradients in the X and Y directions in parallel, and synthesizes the gradient magnitude. This quickly and comprehensively outlines all possible edge contours in the entire image. Combined with dynamic thresholding technology based on local statistical characteristics, it filters out the most significant edge points in parallel, generating a binary map of candidate crack regions. The connected component analysis kernel function then performs the crucial region aggregation task. It employs a parallel disjoint-set data structure algorithm designed specifically for GPUs, transforming the traditionally serial pixel labeling and region merging operations into a parallel process. Utilizing GPU warp-level primitives, it efficiently resolves pixel ownership conflicts, thereby clustering scattered candidate pixels into several connected, independent candidate regions in a very short time and calculating the basic geometric properties of each region. The morphological filtering kernel function acts as a region optimizer. Utilizing shared memory-accelerated convolution operations, it performs morphological operations such as dilation and erosion on each candidate region in parallel. This effectively connects crack fragments broken by noise, smooths region edges, and filters out isolated noise points with excessively small areas, significantly improving the quality of candidate regions. Finally, all candidate regions are fed into the model inference engine. The core of this engine is the deep optimization of a trained lightweight CNN model using TensorRT, including layer fusion, accuracy calibration, and automatic kernel tuning. This generates a highly efficient runtime engine, which performs inference in parallel on the GPU using multi-stream and batch processing techniques. This enables instantaneous classification and accurate quantization of a large number of candidate regions, outputting the final crack confidence, location, and size information.

[0059] Furthermore, the system adopts a multi-radar probe parallel input architecture, and the GPU parallel signal processing module and the crack feature extraction and recognition module support multi-GPU deployment.

[0060] The system's multi-radar probe parallel input architecture and multi-GPU deployment capability are key design features that pave the way for large-scale industrial applications. The multi-radar probe parallel input architecture means the system can simultaneously accept and control multiple radar probe arrays deployed at different locations on the boiler. These probes can scan synchronously, injecting data streams into the system in parallel through multiple PCIe channels or high-speed network interfaces. This significantly expands the coverage of a single detection, enabling comprehensive and rapid detection of the heating surfaces of large boilers, fundamentally solving the problems of low efficiency and limited coverage of single-radar scanning. Furthermore, to handle these doubled or even multiplied data streams, the GPU parallel signal processing module and crack feature extraction and recognition module are designed to support multi-GPU deployment. This means that massive computational tasks can be dynamically allocated across multiple GPU processors. The system can adopt a multi-GPU parallel solution within a node or even a clustered solution with multiple machines and multiple GPUs. Through NVIDIA's NVLink high-speed interconnect technology and multi-device computing framework, different radar data streams or different processing stages of the same data stream are scheduled to different GPUs for computation, realizing horizontal scaling of computing power. This not only ensures that the system can maintain extremely high real-time performance when the amount of data surges, but also ensures that the utilization of all computing hardware is maximized through dynamic load balancing, demonstrating the system's powerful scalability and practical value in complex industrial scenarios.

[0061] Electronic device 300 can be a desktop computer, laptop, handheld computer, cloud server, or other electronic device. Electronic device 300 may include, but is not limited to, processor 301 and memory 302. Those skilled in the art will understand that... Figure 3 This is merely an example of electronic device 300 and does not constitute a limitation on electronic device 300. It may include more or fewer components than shown, or combine certain components, or different components. For example, electronic device may also include input / output devices, network access devices, buses, etc.

[0062] Processor 301 can be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor can be a microprocessor or any conventional processor.

[0063] The memory 302 can be an internal storage unit of the electronic device 300, such as a hard disk or RAM of the electronic device 300. The memory 302 can also be an external storage device of the electronic device 300, such as a plug-in hard disk, Smart Media Card (SMC), Secure Digital (SD) card, or Flash Card equipped on the electronic device 300. Furthermore, the memory 302 can include both internal and external storage units of the electronic device 300. The memory 302 is used to store the computer program 303 and other programs and data required by the electronic device. The memory 302 can also be used to temporarily store data that has been output or will be output.

[0064] The above embodiments are only used to illustrate the technical solutions of this disclosure, and are not intended to limit it. Although this disclosure has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of this disclosure, and should all be included within the protection scope of this disclosure.

Claims

1. A method for detecting cracks in boiler heating surface tubes using millimeter-wave radar based on GPU parallelization, characterized in that, Includes the following steps: S1: Scan the boiler heating surface tube wall with millimeter-wave radar, collect raw echo signal data, and transmit the raw echo signal data to GPU memory; S2: On the GPU, the original echo signal data is preprocessed by parallel computing to generate a range profile. Parallel feature extraction is performed on the range profile to obtain crack candidate regions. The crack candidate regions are then identified in parallel using a pre-trained neural network model to obtain crack detection results. S3: Output and visualize the crack detection results.

2. The method according to claim 1, characterized in that, The signal preprocessing of the original echo signal data through parallel computing includes: The original echo signal data is parallelized for amplitude normalization and noise reduction using CUDA thread blocks. The denoised signal is weighted using window functions by utilizing CUDA kernel functions and shared memory. The batch FFT schedule of the cuFFT library is called to perform fast Fourier transform on the weighted signal in parallel to generate a range profile; The power spectrum of the range image is calculated in parallel.

3. The method according to claim 1, characterized in that, The parallel feature extraction of the distance image includes: Through parallel computation, the neighborhood orientation gradient and gradient magnitude of each pixel in the distance image are calculated. Thresholds are dynamically calculated based on local mean and standard deviation, and mask matrices for candidate crack pixels are generated in parallel. A parallel connected component labeling algorithm based on parallel disjoint set is used to perform parallel connected component analysis on the crack candidate pixels to identify the crack region; The identified crack regions are post-processed in parallel using GPU morphological filtering kernel functions.

4. The method according to claim 1, characterized in that, The parallel identification of the crack candidate regions using a pre-trained neural network model includes: The crack candidate regions are input into a lightweight CNN model optimized by TensorRT. On the GPU, forward inference of the model is executed in parallel using multiple CUDA streams and batch input mode. Output the confidence level, location, and size information of the crack.

5. An electronic device, characterized in that, include: One or more processors; A storage unit is used to store one or more programs, which, when executed by one or more processors, enable the one or more processors to implement the GPU-parallelized millimeter-wave radar boiler heating surface tube crack detection method according to any one of claims 1 to 4.

6. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by the processor, it can implement the millimeter-wave radar boiler heating surface tube crack detection method based on GPU parallelization according to any one of claims 1 to 4.

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