Satellite-borne flywheel high-real-time rotating speed collecting and processing method, system and equipment and storage medium
By interleaving multi-bit cyclic pulse signals to control the onboard flywheel counter, time alignment and real-time judgment of multi-scale data were achieved, solving the timeliness and correlation problems in the acquisition of onboard flywheel speed and improving the response speed and accuracy of satellite attitude control.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- SHANGHAI AEROSPACE COMP TECH INST
- Filing Date
- 2026-02-05
- Publication Date
- 2026-05-12
AI Technical Summary
Existing methods for acquiring the rotational speed of spaceborne flywheels suffer from poor data timeliness and data isolation across multiple scales, failing to meet the real-time and time-correlation requirements of high-dynamic, high-precision satellite attitude control.
A multi-bit cyclic pulse signal is used to control the alternating start of long-cycle and short-cycle pulse counters, and the count value is latched before the end of the counting cycle and synchronously updated to the common register, so as to realize the time alignment and real-time judgment of multi-scale data.
It significantly reduced data latency, improved the real-time performance and comparability of rotational speed data, and enhanced the response speed and accuracy of attitude control.
Smart Images
Figure CN122017276A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of spaceborne flywheel measurement and control technology, and in particular to a method, system, device and storage medium for high real-time speed acquisition and processing of spaceborne flywheels. Background Technology
[0002] The onboard flywheel is a key actuator in the satellite attitude and orbit control subsystem. By changing its own rotational speed, it generates reaction torque, enabling precise adjustment and stable control of the satellite's attitude. The flywheel's rotational speed information is the core input for the attitude and orbit control algorithm to perform torque calculations, status feedback, and fault diagnosis. The real-time performance, accuracy, and correlation between the collected data directly determine the precision and response speed of the satellite's attitude control.
[0003] Currently, the common method for acquiring the rotational speed of spaceborne flywheels is a pulse counting method with a single counting window. This method typically sets a counting cycle of a fixed duration (e.g., 0.50 seconds or 0.25 seconds), latches and outputs the count value at the end of each cycle, and then resets the counter to start the next cycle. This traditional method has two significant drawbacks: First, the data timeliness is poor. Due to the use of a single, continuous counting window, there is an inherent delay of up to one counting cycle between the end of the counting window and the data being read by the user. For example, for a 0.50-second counting cycle, the maximum time error of the output data is as high as 0.50 seconds; for a 0.25-second cycle, the error is also 0.25 seconds. This large fixed delay cannot meet the stringent requirements of real-time status feedback for high-dynamic, high-precision satellite attitude control.
[0004] Secondly, multi-scale data are isolated and cannot be effectively correlated. If the system simultaneously collects rotational speed data at different time units (e.g., needing both 0.50-second counts for macro-trend judgment and 0.25-second counts for rapid response), in traditional methods, these two data points originate from independent counting windows with random start times. Their update times have no definite relationship, causing the data to be misaligned on the time axis. Therefore, the control system cannot reliably infer whether the flywheel is currently accelerating, decelerating, or running at a constant speed by directly comparing these two values, losing potentially valuable state trend information.
[0005] In summary, existing technologies struggle to provide multi-scale rotational speed information with strict time correlation while maintaining low latency, thus limiting further performance improvements in attitude and orbit control systems. Therefore, a high real-time rotational speed acquisition and processing method is urgently needed that can significantly improve data timeliness and achieve intrinsic time alignment of multi-scale acquired data. Summary of the Invention
[0006] The purpose of this invention is to overcome the shortcomings of existing technologies and provide a method for high real-time speed acquisition and processing of spaceborne flywheels, including: S1: Generate a multi-bit cyclic pulse signal with a period of T. Based on the cyclic pulse signal, control a first number of long-period pulse counters and a second number of short-period pulse counters to start alternately at a fixed time interval ΔT. The counting period of the long-period pulse counter is T1, and the counting period of the short-period pulse counter is T2, and T1>T2. S2: At the end of the counting cycle of each counter and before the arrival of its corresponding next start pulse, latch the current count value of the counter, and synchronously update the latest latched long-cycle pulse count value of all long-cycle pulse counters and the latest latched short-cycle pulse count value of all short-cycle pulse counters to a common register. S3: Synchronously read a long-cycle pulse count value CNT1 and a short-cycle pulse count value CNT2 from the common register. The maximum time delay between the end time of the measurement time window corresponding to each of the long-cycle pulse count value CNT1 and the short-cycle pulse count value CNT2 and the reading time is not greater than the time interval ΔT. Based on the numerical relationship between the long-cycle pulse count value CNT1 and the short-cycle pulse count value CNT2, determine the motion trend of the flywheel in the corresponding time period.
[0007] Preferably, in step S1, generating a multi-bit cyclic pulse signal with a period of T includes: Generate a cyclic pulse signal en_sp[N-1:0] with a bit width of N bits, where N is an integer greater than 1; In the cyclic pulse signal, starting from the least significant bit en_sp[0], every time interval ΔT, the next higher bit generates a valid pulse in sequence. After traversing all bits once within the period T = N * Δt, the cycle starts again from en_sp[0].
[0008] Preferably, in step S1, controlling a first number of long-period pulse counters and a second number of short-period pulse counters to start alternately at a fixed time interval ΔT includes: The first number of long-cycle pulse counters is set to equal N. Each long-cycle pulse counter is uniquely associated with a bit in the cyclic pulse signal en_sp[N-1:0]. When the associated bit generates a valid pulse, the corresponding long-cycle pulse counter is cleared and a counting cycle of T1=T begins. A second number of short-cycle pulse counters is set to N / 2. Each short-cycle pulse counter is associated with two specific bits in the cyclic pulse signal en_sp[N-1:0]. The two associated bits are spaced N / 2 positions apart in the bit traversal sequence of the cyclic pulse signal. When any associated bit generates a valid pulse, the corresponding short-cycle pulse counter is cleared and a counting cycle of T2=T / 2 begins.
[0009] Preferably, the bit width N=8, the fixed time interval ΔT=62.5ms, the counting period T1 of the long pulse counter=0.50s, and the counting period T2 of the short pulse counter=0.25s.
[0010] Preferably, in step S2, before the arrival of the next start pulse at the end of the counting cycle of each counter, the current count value of the counter is latched, including: When a valid pulse is generated in a bit of the cyclic pulse signal en_sp[N-1:0], a long-cycle pulse counter and a short-cycle pulse counter associated with that bit are triggered. Before each counter is cleared and a new round of counting begins, the current count value within the current counting cycle is latched.
[0011] Preferably, in step S2, the step of synchronously updating the latest latched long-period pulse count value in all the long-period pulse counters and the latest latched short-period pulse count value in all the short-period pulse counters to a common register includes: The common register includes a long-cycle count register cntA and a short-cycle count register cntB, which are used to store the latest latched long-cycle pulse count value and short-cycle pulse count value, respectively. After each latching operation, the latest latched long-cycle pulse count value is written to the long-cycle count register cntA, and the latest latched short-cycle pulse count value is written to the short-cycle count register cntB. The writing times of the two count values are strictly synchronized, and the update period of the common register is equal to the fixed time interval ΔT.
[0012] Preferably, in step S3, determining the flywheel's motion trend within the corresponding time period based on the numerical relationship between the long-period pulse count value CNT1 and the short-period pulse count value CNT2 includes: If the ratio of the long-period pulse count value CNT1 to the short-period pulse count value CNT2 is approximately equal to T1 / T2, then it is determined that the flywheel rotates at approximately a constant speed during the time period corresponding to the long period T1. If the ratio of the long-cycle pulse count value CNT1 to the short-cycle pulse count value CNT2 is less than T1 / T2, it is determined that the flywheel exhibits an accelerating rotation trend during the time period corresponding to the long cycle T1. If the ratio of the long-cycle pulse count value CNT1 to the short-cycle pulse count value CNT2 is greater than T1 / T2, then it is determined that the flywheel exhibits a deceleration rotation trend during the time period corresponding to the long cycle T1.
[0013] Based on the same concept, the present invention also provides a spaceborne flywheel high real-time speed acquisition and processing system, comprising: The timing beat generation and phase allocation module is used to generate a multi-bit cyclic pulse signal with a period of T. Based on the cyclic pulse signal, it controls a first number of long-period pulse counters and a second number of short-period pulse counters to start alternately at a fixed time interval ΔT. The counting period of the long-period pulse counter is T1, and the counting period of the short-period pulse counter is T2, and T1>T2 are satisfied. The parallel counting and synchronous latch update module is used to latch the current count value of each counter at the end of its counting cycle and before the arrival of its corresponding next start pulse, and synchronously update the latest latched long-cycle pulse count value among all long-cycle pulse counters and the latest latched short-cycle pulse count value among all short-cycle pulse counters to a common register. The data reading and motion analysis module is used to synchronously read a long-cycle pulse count value CNT1 and a short-cycle pulse count value CNT2 from the common register. The maximum time delay between the end time of the measurement time window corresponding to each of the long-cycle pulse count value CNT1 and the short-cycle pulse count value CNT2 and the reading time is not greater than the time interval ΔT. Based on the numerical relationship between the long-cycle pulse count value CNT1 and the short-cycle pulse count value CNT2, the motion trend of the flywheel in the corresponding time period is determined.
[0014] Based on the same concept, the present invention also provides a computer device, including a memory and a processor, wherein the memory stores computer-readable instructions, and when the computer-readable instructions are executed by the processor, the processor causes the processor to perform the steps of a high real-time rotational speed acquisition and processing method for a spaceborne flywheel as described in the embodiments.
[0015] Based on the same concept, the present invention also provides a storage medium storing computer-readable instructions, which, when executed by one or more processors, cause the one or more processors to perform the steps of a spaceborne flywheel high real-time speed acquisition and processing method as described in any one of the embodiments.
[0016] Compared with the prior art, the beneficial effects of the present invention are: (1) This invention generates a multi-bit cyclic pulse signal at regular intervals and controls multiple long-cycle and short-cycle pulse counters to start alternately with a fixed phase difference based on this signal, thus realizing a distributed, polling-based parallel counting architecture. This architecture decomposes a single continuous counting window into multiple phase-staggered sub-windows, so that at any given time, there is always a counter that is about to complete a full counting cycle, thereby significantly reducing the maximum time delay of the output data from the entire counting cycle (T1 or T2) of the traditional method to a fixed phase difference interval ΔT, significantly improving the real-time performance of the rotational speed data.
[0017] (2) This invention achieves strict alignment of update times for data collected at two different time scales by latching the current value of each counter before it is restarted at the end of each counter cycle and synchronously updating the latest latched long-cycle and short-cycle count values of all counters to the same common register. This solves the problem of isolated and uncorrelated update times of multi-scale data in traditional methods, making the long-cycle count value CNT1 and the short-cycle count value CNT2 directly comparable, laying a data foundation for subsequent state analysis.
[0018] (3) This invention achieves real-time, quantitative analysis of the flywheel's motion trend (uniform speed, acceleration, or deceleration) during the past T1 time period by synchronously reading CNT1 and CNT2, both of which have better timeliness than ΔT, from the common register, and making judgments based on their numerical relationship (such as the ratio compared with T1 / T2). This provides a higher-order state observation method for satellite attitude and orbit control systems than the original rotational speed data, enabling the control system to perceive the dynamic changes of the flywheel earlier, thereby generating more forward-looking and accurate control commands, effectively improving the response speed and stability accuracy of attitude control. Attached Figure Description
[0019] Various other advantages and benefits will become apparent to those skilled in the art upon reading the following detailed description of preferred embodiments. The accompanying drawings are for illustrative purposes only and are not intended to limit the invention.
[0020] Figure 1 This is a flowchart of a method for acquiring and processing high real-time rotational speed of a spaceborne flywheel according to the present invention; Figure 2 This is another flowchart of a method for acquiring and processing high real-time rotational speed of a spaceborne flywheel according to the present invention; Figure 3 A schematic diagram showing how the timing pulse output module generates an 8-bit pulse signal en_sp[7:0], which is generated sequentially from the least significant bit to the most significant bit at intervals of 62.5ms and cycles periodically. Figure 4A schematic diagram of the eight-stage counting cycle latch output sent to the telemetry register used for the flywheel 0.50s rotational speed pulse acquisition function; Figure 5 A schematic diagram of the timing relationship of the eight-level counter timing cycle latch and the reset counter used for the flywheel 0.50s speed pulse acquisition function; Figure 6 A schematic diagram of the four-stage counting cycle latch output sent to the telemetry register used for the flywheel 0.25s rotational speed pulse acquisition function; Figure 7 This is a schematic diagram of the timing relationship of the four-level counter timing cycle latch and the reset counter used for the flywheel 0.25s speed pulse acquisition function. Detailed Implementation
[0021] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention. Obviously, the described embodiments are only some, not all, of the embodiments described in this application. All other embodiments obtained by those skilled in the art based on the embodiments in this application without creative effort are within the scope of protection of this application.
[0022] Those skilled in the art will understand that, unless otherwise stated, the singular forms “a” and “an” used herein, and “the”, may also include the plural forms. It should be further understood that the term “comprising” as used in this specification means the presence of the stated features, integers, steps, operations, elements, and / or components, but does not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.
[0023] First Embodiment Please see Figure 1 and Figure 2 As shown, this embodiment provides a method for high real-time speed acquisition and processing of a spaceborne flywheel. This method is implemented through a spaceborne flywheel 1, a 0.50s speed acquisition pulse count 2 and an eight-level counting loop latch 3, a 0.25s speed acquisition pulse count 4 and a four-level counting loop latch 5, a timing pulse output 6, and a pulse count register 7 for the most recent 62.5ms. The method includes the following steps: S1: Generate a multi-bit cyclic pulse signal with a period of T as a global synchronization beat. Based on the cyclic pulse signal, control the first number of long-period pulse counters and the second number of short-period pulse counters to start alternately at a fixed time interval ΔT. The counting period of the long-period pulse counter is T1, and the counting period of the short-period pulse counter is T2, and T1>T2 is satisfied. Specifically, in this embodiment, a pulse signal characterizing the rotational speed of the onboard flywheel 1 is generated during its rotation. The pulse frequency range is usually 0 to 10KHz. This pulse signal is input to the 0.50s pulse counter 2 for speed acquisition. After the pulse transition edge is acquired, the counter increments. The pulse counter has a counting period of 0.50s and periodically clears the count value and recounts.
[0024] Please see Figure 3 As shown, in step S1, a multi-bit cyclic pulse signal with a period of T is generated, including: Generate a cyclic pulse signal en_sp[N-1:0] with a bit width of N bits, where N is an integer greater than 1; In the cyclic pulse signal, starting from the least significant bit en_sp[0], every time interval ΔT, the next higher bit generates a valid pulse in sequence. After traversing all bits once within the period T = N*Δt, the cycle starts again from en_sp[0]. Specifically, in this embodiment, a very short high-level pulse signal is generated on the 0th bit (least significant bit) of an 8-bit register inside the timing pulse output 6. After the initial pulse is generated, a 62.5 millisecond timer is started. When the 62.5 millisecond timer ends, the high-level pulse is moved to the 1st bit of the status register, and a short pulse is generated as well. At the same time, the 0th bit returns to the low level. This process is repeated strictly according to the 62.5 millisecond interval. The high-level pulse is generated sequentially on the 2nd bit, the 3rd bit... up to the 7th bit (most significant bit). After the pulse on the 7th bit is generated, after another 62.5 milliseconds, the high-level pulse will cycle back to the 0th bit and restart the above sequential shifting process. Finally, this 8-bit register outputs a set of cyclic pulse signals named en_sp[7:0].
[0025] Please see Figure 4 , Figure 5 , Figure 6 and Figure 7 As shown, in step S1, controlling a first number of long-period pulse counters and a second number of short-period pulse counters to start alternately at a fixed time interval ΔT includes: The first number of long-cycle pulse counters is set to N. Each long-cycle pulse counter is uniquely associated with a bit in the cyclic pulse signal en_sp[N-1:0]. When the associated bit generates a valid pulse, the corresponding long-cycle pulse counter is cleared and a counting cycle of T1=T begins. Specifically, in this embodiment, eight independent 0.50-second counters 2 (which can be named CntA1 to CntA8) are fixedly bound to each bit signal of en_sp[7:0]. When a bit (such as en_sp[2]) generates a valid pulse, the corresponding long-cycle pulse counter is cleared and a counting cycle of T1=T begins. When a high pulse occurs, the specific counter it is bound to (i.e., CntA3) will immediately perform two actions: First, it will clear its current accumulated value (initialize it to zero if it is the first time); then, it will start a new counting cycle with a duration of 0.50 seconds, during which the input flywheel pulses will be accumulated. Since the pulses from en_sp[0] to en_sp[7] arrive in sequence and are spaced 62.5 milliseconds apart, the clearing and restarting times of the eight counters from CntA1 to CntA8 are naturally staggered, and the starting points of the cycles of two adjacent counters differ by 62.5 milliseconds.
[0026] The second number of short-cycle pulse counters is set to N / 2. Each short-cycle pulse counter is associated with two specific bits in the cyclic pulse signal en_sp[N-1:0]. The two associated bits are spaced N / 2 positions apart in the bit traversal sequence of the cyclic pulse signal. When any associated bit generates a valid pulse, the corresponding short-cycle pulse counter is cleared and a counting cycle of T2=T / 2 begins. Specifically, in this embodiment, four independent 0.25-second counters (which can be named CntB1 to CntB4) are bound to two specific bit signals in en_sp[7:0]. The binding rule is to ensure that the interval between the two pulse signals bound to the same counter is exactly 0.25 seconds (i.e., four 62.5 millisecond intervals). For example, CntB1 is bound to en_sp[0] and en_sp[4]; CntB2 is bound to en_sp[1] and en_sp[5]; CntB3 is bound to en_sp[2] and en_sp[6]; and CntB4 is bound to en_sp[3] and en_sp[7].
[0027] Preferably, the bit width N=8, the fixed time interval ΔT=62.5ms, the counting period T1=0.50s for the long pulse counter, and the counting period T2=0.25s for the short pulse counter.
[0028] S2: At the end of the counting cycle of each counter and before the arrival of its corresponding next start pulse, the current count value of the counter is latched, and the latest latched long-cycle pulse count value among all long-cycle pulse counters and the latest latched short-cycle pulse count value among all short-cycle pulse counters are synchronously updated to a common register. Specifically, in this embodiment, the timing pulse output module 6 is connected to the speed acquisition 0.50s pulse count 2, the eight-level counting cyclic latch of the most recent count value 3, the speed acquisition 0.25s pulse count 4, and the four-level counting cyclic latch of the most recent count value 5, respectively. The high pulse signal en_sp[7:0] generated by it is used to trigger the speed acquisition 0.50s pulse count 2 and the speed acquisition 0.25s pulse count 4 to clear the counter and start counting again. At the same time, it acts on the eight-level counting cyclic latch of the most recent count value 3 and the four-level counting cyclic latch of the most recent count value 5, so that the count value latched before clearing the counter within the most recent 62.5ms time difference is sent to the pulse count register 7 within the most recent 62.5ms for the user to read and use.
[0029] Preferably, in step S2, before the arrival of the next start pulse at the end of the counting cycle of each counter, the current count value of the counter is latched, including: When a valid pulse is generated in a certain bit of the cyclic pulse signal en_sp[N-1:0], a long-cycle pulse counter and a short-cycle pulse counter associated with that bit are triggered. Before each counter is cleared and a new round of counting begins, the current count value within the current counting cycle is latched. Specifically, in this embodiment, the timing pulse output module 6 takes the 0.50-second counter CntA3 as an example. It is bound to en_sp[2]. When the next high pulse of en_sp[2] is about to be generated (which means that exactly 0.50 seconds have passed since its last start), after triggering, the current accumulated value of counter CntA3 (i.e., the total number of pulses in the past 0.50 seconds) is completely read out and written into the storage location allocated specifically for CntA3 in the eight-level counting cyclic latch module. This operation overwrites the old data at that position, which is equivalent to updating the latest 0.50-second count result of phase 2. Almost simultaneously, the eight-level counting polling latch module will select the most recently updated count value inside it (due to polling, this is always the value of a counter that just ended within the last 62.5 milliseconds) and prepare to send it to the common register. The exact same logical synchronization occurs in the 0.25-second counter array. For example, the 0.25-second counter CntB3 bound to en_sp[2] (assuming the binding relationship is that CntB3 corresponds to en_sp[2] and en_sp[6]) will also latch its current value to the corresponding position of the four-level counting loop latch module before the en_sp[2] pulse arrives, and update the output of the module to the latest 0.25-second count value. Since the en_sp pulse activates different bits in sequence, the storage positions inside the eight-level latch and the four-level latch are also updated in sequence, forming a data rotation refresh state. At any time, the output ports of the two latch modules hold the count value that was just refreshed in the most recent 62.5 millisecond tick.
[0030] Preferably, in step S2, the latest latched long-cycle pulse count value in all long-cycle pulse counters and the latest latched short-cycle pulse count value in all short-cycle pulse counters are synchronously updated to a common register, including: The common registers include a long-cycle counter register cntA and a short-cycle counter register cntB, which are used to store the latest latched long-cycle pulse count value and short-cycle pulse count value, respectively. Specifically, in this embodiment, when a high pulse of a certain bit of en_sp (such as en_sp[2]) is generated, it not only triggers the clearing and restarting operation of the corresponding counter, but also serves as a global synchronization signal. Under the drive of this synchronization signal, the latest value of the current output of the eight-level counting cyclic latch 3 (i.e., the count value of CntA3 that has just been latched) is written into the last 62.5ms. The memory cell marked cntA in the pulse count register is simultaneously updated. At the same time, the latest value of the current output of the fourth-level count cycle latch 5 (i.e., the count value of CntB3 that was just latched) is written to the memory cell cntB in the same register. After this update, cntA and cntB in the register are updated at once to represent the pulse counts of the just ended specific time periods of 0.50 seconds and 0.25 seconds, respectively. These two time periods are highly correlated on the time axis (the 0.25-second segment is the latter half of the 0.50-second segment or the part immediately following it, depending on the design binding relationship). After each latching operation, the latest latched long-cycle pulse count value is written to the long-cycle count register cntA, and the latest latched short-cycle pulse count value is written to the short-cycle count register cntB. The writing times of the two count values are strictly synchronized, and the update period of the common register is equal to the fixed time interval ΔT.
[0031] S3: Synchronously read a long-cycle pulse count value CNT1 and a short-cycle pulse count value CNT2 from the common register. The maximum time delay between the end time of the measurement time window corresponding to each of the long-cycle pulse count values CNT1 and CNT2 and the reading time is no greater than the time interval ΔT. Based on the numerical relationship between the long-cycle pulse count value CNT1 and the short-cycle pulse count value CNT2, determine the motion trend of the flywheel within the corresponding time period. Specifically, in this embodiment, an eight-level counter cyclically latches the most recent count value 3, cyclically updating eight flywheel speed pulse counters 21. This ensures that before each counter is cleared, the current count value is latched and updated in the telemetry register available for user reading. This ensures that regardless of when the user reads the flywheel speed pulse count register, the 0.50s speed pulse count value read is always a pulse count value with a time error of no more than 62.5ms from the current time. The eight-level counter cyclically latches the most recent count value 3, cyclically updating eight flywheel speed pulse counters 21, ensuring that before each counter is cleared, the current count value is latched and updated in the telemetry register available for user reading. The current count value is stored and updated in the telemetry register available for user reading. This ensures that whenever the user reads the flywheel speed pulse count register, the 0.50s speed pulse count value read is always a pulse count value with a time error of no more than 62.5ms from the current moment. The four-level counting cyclically latches the most recent count value, implementing a cyclical operation of four flywheel speed pulse counters 41. This ensures that before each counter is cleared, the current count value is latched and updated in the telemetry register available for user reading, thus ensuring that whenever the user reads the flywheel speed pulse count register... The counting register reads a 0.25s rotational speed pulse count value that is always within 62.5ms of the current time. The pulse count register 7 within the most recent 62.5ms consists of two telemetry registers: a latched 0.50s pulse count cntA71 within the most recent 62.5ms and a 0.25s pulse count cntB72 within the most recent 62.5ms. Its function is to dynamically lock two rotational speed pulse count values within 62.5ms of the current time for the user to read and use at any time.
[0032] Preferably, in step S3, based on the numerical relationship between the long-cycle pulse count value CNT1 and the short-cycle pulse count value CNT2, the motion trend of the flywheel within the corresponding time period is determined, including: If the ratio of the long-period pulse count value CNT1 to the short-period pulse count value CNT2 is approximately equal to T1 / T2, then it is determined that the flywheel rotates at approximately a constant speed during the time period corresponding to the long period T1. If the ratio of the long-cycle pulse count value CNT1 to the short-cycle pulse count value CNT2 is less than T1 / T2, it is determined that the flywheel exhibits an accelerating rotation trend during the time period corresponding to the long cycle T1. If the ratio of the long-cycle pulse count value CNT1 to the short-cycle pulse count value CNT2 is greater than T1 / T2, it is determined that the flywheel is decelerating during the time period corresponding to the long cycle T1.
[0033] The spaceborne flywheel high real-time speed acquisition and processing method provided by this invention solves the problems of poor timeliness and weak correlation between different speed data in traditional flywheel speed pulse acquisition. It can provide flywheel speed information with smaller time error and higher accuracy for attitude control and adjustment tasks during satellite flight, thereby providing a more accurate and effective calculation basis for attitude control algorithms and achieving the goal of precise control of satellite attitude.
[0034] The present invention provides flywheel speed pulse telemetry information with time units of 0.50s and 0.25s and a time error of no more than 62.5ms. The delay error is reduced by 4 to 8 times compared with the traditional method, which effectively improves the timeliness of telemetry data and can meet the needs of various current satellite attitude and orbit control systems for flywheel speed telemetry status.
[0035] Second Embodiment Based on the same concept, the present invention also provides a spaceborne flywheel high real-time speed acquisition and processing system, comprising: The timing beat generation and phase allocation module is used to generate a multi-bit cyclic pulse signal with a period of T. Based on the cyclic pulse signal, it controls a first number of long-period pulse counters and a second number of short-period pulse counters to start alternately at a fixed time interval ΔT. The counting period of the long-period pulse counter is T1, the counting period of the short-period pulse counter is T2, and T1>T2 are satisfied. The parallel counting and synchronous latch update module is used to latch the current count value of each counter at the end of its counting cycle and before the arrival of its corresponding next start pulse, and synchronously update the latest latched long-cycle pulse count value among all long-cycle pulse counters and the latest latched short-cycle pulse count value among all short-cycle pulse counters to a common register. The data reading and motion analysis module is used to synchronously read a long-cycle pulse count value CNT1 and a short-cycle pulse count value CNT2 from a common register. The maximum time delay between the end time of the measurement time window corresponding to each of the long-cycle pulse count values CNT1 and the short-cycle pulse count value CNT2 and the reading time is no greater than the time interval ΔT. Based on the numerical relationship between the long-cycle pulse count value CNT1 and the short-cycle pulse count value CNT2, the motion trend of the flywheel within the corresponding time period is determined.
[0036] Third Embodiment Based on the same concept, this embodiment also provides a computer device, including a memory and a processor. The memory stores computer-readable instructions, which, when executed by the processor, cause the processor to perform the steps of a high real-time rotational speed acquisition and processing method for a spaceborne flywheel as described in the embodiment.
[0037] Based on the same concept, the present invention also provides a storage medium storing computer-readable instructions, characterized in that, when the computer-readable instructions are executed by one or more processors, the one or more processors cause the one or more processors to perform the steps of a spaceborne flywheel high real-time speed acquisition and processing method as described in any one of the embodiments.
[0038] It is understood that, for the aforementioned method for high real-time rotational speed acquisition and processing of a spaceborne flywheel, if all components are implemented as software functional modules and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this invention, in essence, or the part that contributes to the prior art, or all or part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer server or a network device, etc.) to execute all or part of the steps of the methods in the various embodiments of this invention. The aforementioned storage medium includes: USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, optical disks, and other media capable of storing program code.
[0039] Computer-readable storage media may include data signals propagated in baseband or as part of a carrier wave, carrying readable program code. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. A readable storage medium may also be any readable medium other than a readable storage medium that can transmit, propagate, or transfer a program for use by or in connection with an instruction execution system, apparatus, or device. The program code contained on the readable storage medium may be transmitted using any suitable medium, including but not limited to wireless, wired, optical fiber, RF, etc., or any suitable combination thereof.
[0040] The above description is merely a preferred embodiment of the present invention. The scope of protection of the present invention is not limited to the above embodiments. All technical solutions falling within the scope of the present invention's concept are within the scope of protection of the present invention. It should be noted that for those skilled in the art, any improvements and modifications made without departing from the principles of the present invention should also be considered within the scope of protection of the present invention.
Claims
1. A method for high real-time rotational speed acquisition and processing of a spaceborne flywheel, characterized in that, Includes the following steps: S1: Generate a multi-bit cyclic pulse signal with a period of T. Based on the cyclic pulse signal, control a first number of long-period pulse counters and a second number of short-period pulse counters to start alternately at a fixed time interval ΔT. The counting period of the long-period pulse counter is T1, and the counting period of the short-period pulse counter is T2, and T1>T2. S2: At the end of the counting cycle of each counter and before the arrival of its corresponding next start pulse, latch the current count value of the counter, and synchronously update the latest latched long-cycle pulse count value of all long-cycle pulse counters and the latest latched short-cycle pulse count value of all short-cycle pulse counters to a common register. S3: Synchronously read a long-cycle pulse count value CNT1 and a short-cycle pulse count value CNT2 from the common register. The maximum time delay between the end time of the measurement time window corresponding to each of the long-cycle pulse count value CNT1 and the short-cycle pulse count value CNT2 and the reading time is not greater than the time interval ΔT. Based on the numerical relationship between the long-cycle pulse count value CNT1 and the short-cycle pulse count value CNT2, determine the motion trend of the flywheel in the corresponding time period.
2. The method for high real-time rotational speed acquisition and processing of a spaceborne flywheel according to claim 1, characterized in that, In step S1, a multi-bit cyclic pulse signal with a period of T is generated, including: Generate a cyclic pulse signal en_sp[N-1:0] with a bit width of N bits, where N is an integer greater than 1; In the cyclic pulse signal, starting from the least significant bit en_sp[0], every time interval ΔT, the next higher bit generates a valid pulse in sequence. After traversing all bits once within the period T = N * Δt, the cycle starts again from en_sp[0].
3. The method for high real-time rotational speed acquisition and processing of a spaceborne flywheel according to claim 2, characterized in that, In step S1, controlling a first number of long-period pulse counters and a second number of short-period pulse counters to start alternately at a fixed time interval ΔT includes: The first number of long-cycle pulse counters is set to equal N. Each long-cycle pulse counter is uniquely associated with a bit in the cyclic pulse signal en_sp[N-1:0]. When the associated bit generates a valid pulse, the corresponding long-cycle pulse counter is cleared and a counting cycle of T1=T begins. A second number of short-cycle pulse counters is set to N / 2. Each short-cycle pulse counter is associated with two specific bits in the cyclic pulse signal en_sp[N-1:0]. The two associated bits are spaced N / 2 positions apart in the bit traversal sequence of the cyclic pulse signal. When any associated bit generates a valid pulse, the corresponding short-cycle pulse counter is cleared and a counting cycle of T2=T / 2 begins.
4. The method for high real-time rotational speed acquisition and processing of a spaceborne flywheel according to claim 3, characterized in that, The bit width N=8, the fixed time interval ΔT=62.5ms, the counting period T1=0.50s of the long pulse counter, and the counting period T2=0.25s of the short pulse counter.
5. The method for high real-time rotational speed acquisition and processing of a spaceborne flywheel according to claim 3, characterized in that, In step S2, at the end of each counter's counting cycle and before the arrival of its corresponding next start pulse, the current count value of the counter is latched, including: When a valid pulse is generated in a bit of the cyclic pulse signal en_sp[N-1:0], a long-cycle pulse counter and a short-cycle pulse counter associated with that bit are triggered. Before each counter is cleared and a new round of counting begins, the current count value within the current counting cycle is latched.
6. The method for high real-time rotational speed acquisition and processing of a spaceborne flywheel according to claim 5, characterized in that, In step S2, the step of synchronously updating the latest latched long-period pulse count value in all the long-period pulse counters and the latest latched short-period pulse count value in all the short-period pulse counters to a common register includes: The common register includes a long-cycle count register cntA and a short-cycle count register cntB, which are used to store the latest latched long-cycle pulse count value and short-cycle pulse count value, respectively. After each latching operation, the latest latched long-cycle pulse count value is written to the long-cycle count register cntA, and the latest latched short-cycle pulse count value is written to the short-cycle count register cntB. The writing times of the two count values are strictly synchronized, and the update period of the common register is equal to the fixed time interval ΔT.
7. The method for high real-time rotational speed acquisition and processing of a spaceborne flywheel according to claim 1, characterized in that, In step S3, determining the flywheel's motion trend within the corresponding time period based on the numerical relationship between the long-period pulse count value CNT1 and the short-period pulse count value CNT2 includes: If the ratio of the long-period pulse count value CNT1 to the short-period pulse count value CNT2 is approximately equal to T1 / T2, then it is determined that the flywheel rotates at approximately a constant speed during the time period corresponding to the long period T1. If the ratio of the long-cycle pulse count value CNT1 to the short-cycle pulse count value CNT2 is less than T1 / T2, it is determined that the flywheel exhibits an accelerating rotation trend during the time period corresponding to the long cycle T1. If the ratio of the long-cycle pulse count value CNT1 to the short-cycle pulse count value CNT2 is greater than T1 / T2, then it is determined that the flywheel exhibits a deceleration rotation trend during the time period corresponding to the long cycle T1.
8. A spaceborne flywheel high real-time speed acquisition and processing system, characterized in that, include: The timing beat generation and phase allocation module is used to generate a multi-bit cyclic pulse signal with a period of T. Based on the cyclic pulse signal, it controls a first number of long-period pulse counters and a second number of short-period pulse counters to start alternately at a fixed time interval ΔT. The counting period of the long-period pulse counter is T1, and the counting period of the short-period pulse counter is T2, and T1>T2 are satisfied. The parallel counting and synchronous latch update module is used to latch the current count value of each counter at the end of its counting cycle and before the arrival of its corresponding next start pulse, and synchronously update the latest latched long-cycle pulse count value among all long-cycle pulse counters and the latest latched short-cycle pulse count value among all short-cycle pulse counters to a common register. The data reading and motion analysis module is used to synchronously read a long-cycle pulse count value CNT1 and a short-cycle pulse count value CNT2 from the common register. The maximum time delay between the end time of the measurement time window corresponding to each of the long-cycle pulse count value CNT1 and the short-cycle pulse count value CNT2 and the reading time is not greater than the time interval ΔT. Based on the numerical relationship between the long-cycle pulse count value CNT1 and the short-cycle pulse count value CNT2, the motion trend of the flywheel in the corresponding time period is determined.
9. A computer device, characterized in that, The system includes a memory and a processor, wherein the memory stores computer-readable instructions, which, when executed by the processor, cause the processor to perform the steps of a high real-time rotational speed acquisition and processing method for a spaceborne flywheel as described in any one of claims 1 to 7.
10. A storage medium storing computer-readable instructions, characterized in that, When the computer-readable instructions are executed by one or more processors, the one or more processors perform the steps of the high real-time rotational speed acquisition and processing method for a spaceborne flywheel as described in any one of claims 1 to 7.