Circuit and method for testing dynamic conduction threshold voltage of gallium nitride device

Abstract

The invention belongs to the technical field of power device testing, and particularly relates to a dynamic conduction threshold voltage testing circuit and method for a gallium nitride device. The problems of poor stress switching real-time performance, low parameter extraction precision, difficulty in covering various working conditions and the like in the dynamic threshold voltage representation of the existing GaN device are solved. The circuit comprises a high-voltage source circuit which is used for providing adjustable high-voltage bias and simulating high-voltage turn-off stress borne by a device in practical application; the stress control switch is used for accurately controlling the time and time sequence of stress application and realizing rapid switching between a stress state and a test state; the drain electrode load matching network is used for current limiting protection in an off-state drain electrode bias stress test and is used for providing adjustable working current for the device to be tested in a continuous switch stress test; and the threshold voltage test circuit is used for rapidly and accurately extracting the dynamic threshold voltage parameter of the device to be tested within the transient time after the stress is released.

Description

Technical Field

[0001] This invention relates to the field of power device testing technology, specifically to a test circuit and method for the dynamic on-threshold voltage of gallium nitride devices. Background Technology

[0002] With the rapid adoption of gallium nitride (GaN) power devices in high-frequency, high-efficiency applications such as consumer electronics, AI server power supplies, and electric transportation, they are gradually becoming the mainstream alternative to traditional silicon-based MOSFETs due to their low gate charge, high switching speed, and compact physical size. However, in real-world high-frequency, high-voltage operating environments, GaN devices (especially Schottky p-GaN gate HEMTs) face severe reliability challenges. Limited by the charge storage effect in the floating p-GaN layer, interface trap charge capture, and high-intensity electric field modulation, the device's threshold voltage (Vt) is significantly reduced. TH GaN devices exhibit significant dynamic instability. This dynamic threshold voltage drift not only alters the device's switching characteristics, leading to a compression of the gate drive tolerance, but may even trigger unexpected false turn-on, threatening system-level reliability and thermal management stability. Therefore, accurate extraction of the dynamic threshold voltage of GaN devices under stress has extremely high engineering application value.

[0003] However, existing characterization methods have significant limitations when dealing with dynamic threshold voltage measurements. Traditional test platforms often focus on static parameter measurements or dynamic on-resistance assessments, making it difficult to capture transient threshold voltage fluctuations of devices under the same electrical stress conditions. Standard test equipment also performs poorly in real-time synchronization between stress switching and signal acquisition, making it difficult to accurately reproduce the true characteristics at the moment of stress release. In summary, there is an urgent need for a GaN dynamic threshold voltage testing solution with high response speed and the ability to flexibly simulate multiple stress conditions to meet the stringent requirements of the industry for evaluating the dynamic characteristics of GaN devices. Summary of the Invention

[0004] The purpose of this invention is to solve the problems in existing gallium nitride (GaN) device dynamic threshold voltage testing technology, which are unable to accurately and efficiently capture transient threshold voltage drift (caused by p-GaN layer charge storage, interface trapping, and strong electric field modulation) under multiple dynamic conditions such as off-state drain bias stress or continuous switching stress. These problems are caused by poor real-time performance of stress switching, reliance on complex fitting for parameter extraction, and limited ability to simulate operating conditions.

[0005] To achieve the above objectives, the present invention employs the following technical means:

[0006] This invention provides a dynamic on-threshold voltage test circuit for gallium nitride devices, including a high-voltage source circuit, a stress-controlled switch, a drain-load matching network, a threshold voltage test circuit, and the device under test.

[0007] The output terminal of the high-voltage source circuit is connected to the input terminal of the stress control switch;

[0008] The output terminal of the stress control switch is connected to the first terminal of the drain load matching network;

[0009] The second end of the drain load matching network is connected to the drain of the device under test and the drain output of the threshold voltage test circuit, respectively.

[0010] The source of the device under test is connected to a reference ground, and its gate is connected to a drive circuit through a drive resistor. The gate of the device under test is also connected to the gate output terminal of the threshold voltage test circuit.

[0011] The threshold voltage test circuit and the drain and gate of the device under test form an adaptive closed-loop path, which is used to transiently advance the threshold voltage of the device under test during the test phase.

[0012] In the above scheme, the threshold voltage test circuit includes a test control switch S3, a controlled constant current source I1, a first isolation diode D1, a second isolation diode D2, and a drive circuit isolation switch S2.

[0013] The test control switch S3 is connected between the test auxiliary power supply and the input terminal of the controlled constant current source I1;

[0014] The output terminal of the controlled constant current source I1 is connected to the anode of the first isolation diode D1 and the anode of the second isolation diode D2, respectively.

[0015] The cathode of the first isolation diode D1 is connected to the drain of the gallium nitride device 5 under test, and its unidirectional conduction direction is from the anode to the cathode;

[0016] The cathode of the second isolation diode D2 is directly connected to the gate of the gallium nitride device under test, and its unidirectional conduction direction is from the anode to the cathode;

[0017] The source of the drive circuit isolation switch S2 is connected to the output terminal of the external drive circuit, and the drain is connected to the gate of the gallium nitride device under test.

[0018] The stress control switch is configured to be turned on during the stress application phase and turned off during the test phase; the drive circuit isolation switch S2 is configured to be turned on during the stress application phase to connect to the external drive circuit and turned off during the test phase to isolate the external drive circuit; the test control switch S3 is configured to be turned on during the test phase, so that the controlled constant current source I1 provides test current to the drain through the first isolation diode D1 and provides test current to the gate through the second isolation diode D2.

[0019] In the above scheme, the high-voltage source circuit consists of a DC high-voltage source Vbus and a filter capacitor C1 with low equivalent series resistance (ESR) connected in parallel.

[0020] In the above scheme, the stress control switch (2) is a bidirectional power switch S1 composed of two power MOSFETs connected back to back. The sources of the two MOSFETs are connected to each other and connected to the floating ground drive signal. The drains of the two transistors are respectively used as the input and output terminals of the stress control switch.

[0021] In the above scheme, the drain load matching network includes a drain load resistor R1.

[0022] In the above scheme, in the initial state, stress control switch S1, test control switch S3, and device under test are all turned off, and drive circuit isolation switch S2 is turned on.

[0023] Electrical stress application stage: Control the stress control switch to close, so that the high voltage source circuit applies electrical stress to the drain of the device under test through the drain load matching network, and at the same time control the test control switch S3 to open;

[0024] Electrical stress relief phase: The stress control switch is disconnected.

[0025] Gate isolation stage: The isolation switch S2 of the drive circuit is opened to electrically isolate the gate of the device under test from the drive circuit;

[0026] Threshold voltage test phase: The test control switch S3 is closed, so that the controlled constant current source I1 injects a test current of milliampere level (0.1 mA to 10 mA) into the drain of the gallium nitride device under test 5 through the first isolation diode D1. The test current causes the gate voltage of the device under test to rise. When the gate voltage reaches the dynamic threshold voltage, the device is turned on, and the gate voltage is clamped and maintained at the dynamic threshold voltage.

[0027] Voltage acquisition steps: The gate-source voltage of the device under test is acquired through the voltage acquisition unit and used as the dynamic threshold voltage measurement value.

[0028] Because the present invention employs the above-mentioned technical means, it has the following beneficial effects:

[0029] I. This invention constructs a stress control system comprising a high-voltage source circuit and a bidirectional power switch S1, which can accurately simulate the high-voltage turn-off stress environment experienced by GaN devices in actual power conversion topologies. Simultaneously, the innovatively designed threshold voltage test circuit introduces an adaptive feedback network composed of a constant current source I1, a first isolation diode D1, and a second isolation diode D2. By utilizing a drain current injection mechanism, the device under test is forced to automatically lock at the edge of the saturation region after stress release, realizing direct readout of the dynamic threshold voltage and effectively avoiding the complex post-data fitting errors in traditional scanning methods.

[0030] Second, this invention not only has extremely high sampling response speed and measurement resolution, but also has a stable circuit structure and strong anti-interference ability. It can truly reflect the physical characteristics of Schottky p-GaN gate devices under complex operating conditions, providing an efficient and accurate testing method for reliability assessment and drive optimization design of next-generation GaN power electronic systems.

[0031] Third, this invention solves the technical problem in traditional testing where the parasitic leakage path in the gate drive circuit causes test current shunting and makes it impossible to accurately control the gate capacitor charging process, thus affecting the accuracy of threshold voltage extraction. This is achieved by constructing an adaptive closed-loop path in the threshold voltage test circuit consisting of a controlled constant current source I1, a first isolation diode D1, and a second isolation diode D2, and by combining this with the technical means of physically disconnecting the external drive circuit by the drive circuit isolation switch S2 during the test phase. This achieves the effect of forcing the gate node to a high-resistance state during the test phase, ensuring that the test current is completely directionally injected into the gate capacitor, and using the drain current feedback mechanism to automatically stabilize the gate voltage at the moment the device is turned on. This realizes instantaneous locking and direct reading of the dynamic threshold voltage, avoiding system errors and human bias caused by relying on complex curve fitting.

[0032] Fourth, this invention solves the technical problem of residual charge or voltage disturbance interfering with the starting point of threshold voltage testing at the moment of stress release by configuring the conduction time of the test control switch S3 to be strictly delayed after the opening time of the stress control switch, and by dynamically adjusting its conduction duty cycle by the pulse controller to define the test window. It achieves the effect of accurately controlling the test timing and ensuring that the device under test is completely removed from the high-pressure stress environment before starting the threshold voltage extraction process, thereby significantly improving the timing accuracy and anti-transient interference capability of dynamic threshold voltage measurement.

[0033] V. This invention solves the technical problems of high voltage breaking down low-voltage components through the test path during the stress application stage and the impact of diode reverse recovery delay on the feedback loop establishment speed during the test stage by selecting isolation diodes D1 and D2 with high withstand voltage and fast recovery characteristics and connecting their cathodes to the drain and gate of the device under test, respectively. It achieves the effect of reliably blocking high voltage from entering the test circuit during the stress stage and quickly conducting during the test stage to build a low-delay gate-drain feedback loop, thus ensuring the component safety and dynamic response reliability of the test circuit during the rapid switching process between high and low voltage.

[0034] VI. This invention achieves significant synergistic effects by systematically integrating the bidirectional switching structure of the stress control switch, the timing control strategy of the isolation diodes D1 / D2 in the threshold voltage test circuit with the drive circuit isolation switch S2 and the test control switch S3, and the drain load matching network.

[0035] The rapid turn-off of the stress-controlled switch and the reverse cut-off characteristic of the isolation diode D1 together construct a dual high-voltage isolation barrier, completely eliminating the risk of backflow of test current. The disconnection of the drive circuit isolation switch S2 and the delayed conduction of the test control switch S3 work together to create a pure test environment free from external interference. On this basis, the isolation diodes D1 and D2 conduct forward during the test phase, forming an adaptive gate-drain feedback loop together with the controlled constant current source I1 and the device under test. This allows the test current injected into the gate to be dynamically balanced by the drain current path at the moment the device is turned on, forcing the gate-source voltage to spontaneously converge and stabilize at the dynamic threshold voltage. This combination of technologies not only overcomes the inherent limitations of single technologies in high-voltage isolation, timing control, and parameter extraction, but also enables the entire test process to complete the "stress application - stress release - environmental isolation - parameter locking" full-link operation within nanoseconds. It achieves a unified high real-time performance, high precision, and multi-condition adaptability for dynamic threshold voltage testing, providing a breakthrough test solution for the reliability assessment of gallium nitride devices under complex electrical stress conditions. Attached Figure Description

[0036] Figure 1 This is a schematic diagram of the circuit system structure of the present invention;

[0037] Figure 2 This is a schematic diagram of the dynamic threshold voltage test circuit of the present invention;

[0038] Figure 3 This is a key waveform of a dynamic threshold voltage test circuit under off-state drain bias stress according to Embodiment 1 of the present invention;

[0039] Figures 4 to 6 It is the key current path in different testing stages of the dynamic threshold voltage test circuit;

[0040] Figure 7This is a key waveform of a dynamic threshold voltage test circuit under continuous switching stress according to Embodiment 2 of the present invention.

[0041] Explanation of reference numerals in the attached figures:

[0042] 1-High voltage source circuit, 2-Stress control switch, 3-Drain load matching, 4-Threshold voltage test circuit, 5-Device under test. Detailed Implementation

[0043] The embodiments of the present invention will be described in detail below. Although the present invention will be described and illustrated in conjunction with some specific embodiments, it should be noted that the present invention is not limited to these embodiments. On the contrary, any modifications or equivalent substitutions made to the present invention should be covered within the scope of the claims of the present invention.

[0044] Furthermore, to better illustrate the present invention, numerous specific details are set forth in the following detailed embodiments. Those skilled in the art will understand that the present invention can be practiced without these specific details.

[0045] To address the problems of poor real-time performance of stress switching, low accuracy of parameter extraction, and difficulty in covering various operating conditions in the existing dynamic threshold voltage characterization of GaN devices, this invention proposes a dynamic conduction threshold voltage testing circuit and method for gallium nitride devices.

[0046] like Figure 1 As shown, the circuit of the present invention includes a high-voltage source circuit 1, a stress control switch 2, a drain load matching network 3, a threshold voltage test circuit 4, and a device under test (DUT) 5.

[0047] Among them, the high-voltage source circuit 1 is used to provide the off-state bias stress, and the output terminal of the high-voltage source circuit is connected to the input terminal of the stress control switch.

[0048] The stress control switch 2 is connected between the high voltage source circuit 3 and the drain load matching network 4. The output terminal of the stress control switch is connected to the first terminal of the drain load matching network 3 to switch the stress application and signal test states.

[0049] The drain load matching network 3 is used to provide a current-to-voltage sampling basis during the testing phase. The second end of the drain load matching network 3 is connected to the drain of the device under test 5 and the drain output of the threshold voltage test circuit, respectively.

[0050] The source of the device under test 5 is connected to the reference ground, and its gate is connected to the drive circuit through a drive resistor. The gate of the device under test is also connected to the gate output terminal of the threshold voltage test circuit.

[0051] The threshold voltage test circuit 4 is used to quickly lock in and extract the dynamic threshold voltage of the device during stress release transients. An adaptive closed-loop path is formed between the threshold voltage test circuit, the drain of the device under test, and the gate, to transiently advance the threshold voltage of the device under test during the testing phase.

[0052] High-voltage source circuit 1 includes DC power supply V bus and filter capacitor C1. Wherein, DC power supply V... bus The positive terminal is connected to the input terminal of stress control switch 2, and the negative terminal is connected to the source of device under test 5 and connected to common ground (GND); filter capacitor C1 is connected in parallel to DC power supply V. bus At both ends, it is used to stabilize the bus voltage and absorb transient stray charges during switching. It is designed to provide stable off-state drain bias stress for the device under test, simulating the high-voltage operating environment of an actual power converter.

[0053] The stress control switch 2 includes a bidirectional power switch S1. It consists of two enhancement-mode power transistors connected back-to-back. The sources of the two transistors are interconnected and connected to a floating ground drive signal. The drains of the two transistors serve as the input and output terminals of the stress control switch, respectively. This structure, by canceling the freewheeling effect of the MOSFET body diode, achieves the goal of cutting off the high-voltage source during the testing phase while preventing the test current from flowing back from the drain load matching network to the high-voltage source side.

[0054] The first controlled terminal is connected to the positive terminal of the high-voltage source circuit 1, the second controlled terminal is connected to the input terminal of the drain load matching network 3, and the driving terminal is connected to the control signal to realize the nanosecond-level shutdown of the high-voltage path and prevent current backflow during the dynamic threshold voltage test stage.

[0055] The drain-load matching network 3 includes a power resistor R1. Its upper end is connected to the output of the stress control switch S1, and its lower end is connected to the drain of the device under test (DUT). It is used to convert the current changes of the DUT into a voltage signal during the testing phase and to provide current-limiting protection.

[0056] The threshold voltage test circuit 4 includes a controlled constant current source I1, a drive circuit isolation switch S2, a test control switch S3, and isolation diodes D1 and D2.

[0057] The positive output terminal of the constant current source I1 is divided into two branches: the first branch is connected to the drain of the device under test through the isolation diode D1, which is used to provide a stable drain bias current during the threshold voltage test stage; the second branch is connected to the gate of the device under test through the isolation diode D2, which is used to inject a constant small current into the gate capacitance of the device under test during the threshold voltage extraction stage, and forms a gate-drain feedback loop with the first branch.

[0058] Specifically:

[0059] The first terminal of the test control switch S3 is connected to the test auxiliary power supply Vin, and the second terminal is connected to the input terminal of the constant current source I1. Driven by the pulse controller, its turn-on time lags behind the stress control switch's turn-off time. The test window is defined by adjusting its duty cycle.

[0060] The output terminal of the controlled constant current source I1 is connected to the anode of the first isolation diode D1 and the anode of the second isolation diode D2, respectively;

[0061] The cathode of the first isolation diode D1 is connected to the drain of the device under test (DUT), used to achieve electrical isolation between the high-voltage path and the low-voltage test circuit when S1 is closed; during the stress application phase, the cathode of the first isolation diode D1 withstands the high-voltage source V. bus It utilizes reverse cutoff characteristics to protect the constant current source I1 from being broken down;

[0062] The cathode of the second isolation diode D2 is connected to the test input terminal of the drive circuit isolation switch S2 to achieve electrical isolation between the drive circuit and the test circuit.

[0063] During the testing phase, the isolation diodes D1 and D2 are forward biased. The gate voltage of the device under test is charged to the point where the device under test is turned on. When the drain voltage drops to the point where the channel can carry the corresponding current, the gate voltage will be limited from further increasing, thereby balancing the gate-source voltage of the device under test at its threshold voltage.

[0064] The drain of the drive circuit isolation switch S2 is connected to the gate of the device under test (DUT), and the source is connected to the output of the DUT drive circuit to ensure that the gate drive circuit of the DUT is reliably turned off during the threshold voltage test stage, thereby achieving high gate impedance, forcing the current to be fully injected into the gate capacitor, and avoiding non-ideal leakage of test current.

[0065] This invention provides a method for testing the dynamic threshold voltage of gallium nitride devices, comprising:

[0066] When the circuit is used to extract the threshold voltage of the device under test (DUT) during off-state drain bias stress testing, in the initial state, the stress control switch S1, test control switch S3, and the DUT are all off, while the drive circuit isolation switch S2 is on. During the stress application phase, the stress control switch S1 is on, the drive circuit isolation switch S2 remains on, and the test control switch S3 and the DUT remain off. The anode of the isolation diode D1 is connected to the output terminal of the constant current source, and the cathode is connected to the drain of the DUT. The characteristic feature is that during the stress application phase, D1 is in a reverse cutoff state, achieving electrical isolation between the high-voltage path and the low-voltage test circuit. During the dynamic threshold voltage test phase, the stress control switch S1, drive circuit isolation switch S2, and the DUT are off, the test control switch S3 is on, and the constant current source I1 injects a milliampere-level current into the device. Due to the formation of a gate-drain feedback loop, the gate voltage of the DUT will spontaneously lock near its transient threshold voltage. The dynamic threshold voltage can be directly read out by acquiring the waveforms at both ends of the gate and source using an oscilloscope or a high-speed ADC.

[0067] When the circuit is used to extract the threshold voltage of the device under test (DUT) in continuous switching stress testing, in the initial state, the stress control switch S1, test control switch S3, and the DUT are all off, while the drive circuit isolation switch S2 is on. During the stress application phase, the stress control switch S1 is on, the drive circuit isolation switch S2 remains on, and the test control switch S3 remains off, with the DUT operating in pulse mode. The anode of the isolation diode D1 is connected to the output terminal of the constant current source, and the cathode is connected to the drain of the DUT. The characteristic feature is that during the stress application phase, D1 is in a reverse cutoff state, achieving electrical isolation between the high-voltage path and the low-voltage test circuit. During the dynamic threshold voltage test phase, the stress control switch S1, drive circuit isolation switch S2, and the DUT are off, the test control switch S3 is on, and the constant current source I1 injects a milliampere-level current into the device. Due to the formation of a gate-drain feedback loop, the gate voltage of the DUT will spontaneously lock near its transient threshold voltage. The dynamic threshold voltage can be directly read out by acquiring the waveforms at both ends of the gate and source using an oscilloscope or a high-speed ADC.

[0068] The following two specific embodiments illustrate the testing method for the dynamic threshold voltage test circuit of gallium nitride devices, and demonstrate the test platform's ability to simulate multiple stress conditions:

[0069] Example 1: Dynamic threshold voltage test of device under off-state drain bias stress

[0070] A circuit for testing the dynamic threshold voltage of a device under off-state drain bias stress, such as... Figure 2As shown. The power resistor R1 in the drain load matching network 3 is selected as a large resistance value in the kΩ range for current limiting protection. In this mode, the dynamic threshold voltage test circuit operates based on the following three main control signals: the gate signal V of the bidirectional power switch S1... GS,S1 The gate signal V of the drive circuit isolation switch S2 GS,S2 Test the gate signal V of control switch S3 GS,S3 and the gate signal V of the device under test GS,DUT Key waveforms of the test circuit are as follows: Figure 3 As shown.

[0071] Specifically, before time t0, stress control switch S1, test control switch S3, and device under test are all turned off, and drive circuit isolation switch S2 is turned on to eliminate the prestress continuously connected to high voltage source circuit 1.

[0072] At time t0, stress control switch S1 is turned on, drive circuit isolation switch S2 remains on, and test control switch S3 and the device under test remain off, entering the off-state drain bias stress application stage. During this stage, diode D1 is in reverse cutoff state, achieving electrical isolation between the high-voltage path and the low-voltage test circuit;

[0073] At time t1, stress control switch S1 is turned off first, and the charge at both ends of the drain-source capacitor of the device under test is transferred to both sides of the capacitor at the stress control switch. Then at time t2, drive circuit isolation switch S2 is opened to prevent the injected current from leaking non-ideally through the gate drive during the test phase.

[0074] At time t3, the test control switch S3 is turned on, and the controlled constant current source I1 injects a milliampere-level current into the device. The injected current is the gate-source capacitance C of the device under test. GS Charging (e.g.) Figure 4 (as shown), until the gate voltage V of the device under test. GS,DUT The current rises until its drain-source can stably pass the set current of the controlled constant current source I1 (e.g., Figure 5 As shown, the gate voltage of the device under test will automatically lock near its transient threshold voltage. The dynamic threshold voltage can be directly read out by acquiring the waveforms at both ends of the gate and source using an oscilloscope or a high-speed ADC.

[0075] At time t4, all control signals are turned off, and the test terminates.

[0076] Example 2: Dynamic threshold voltage test of device under continuous switching stress

[0077] Dynamic threshold voltage testing of devices under continuous switching stress, such as Figure 2 As shown. The power resistor R1 in the drain-load matching network 3 is set according to the required operating current, following the drain-source current I of the device under test. DS = Vbus / R1. In this mode, the dynamic threshold voltage test circuit operates based on the following three main control signals: the gate signal V of the bidirectional power switch S1. GS,S1 The gate signal V of the drive circuit isolation switch S2 GS,S2 Test the gate signal V of control switch S3 GS,S3 and the gate signal V of the device under test GS,DUT Key waveforms of the test circuit are as follows: Figure 7 As shown.

[0078] Compared to Example 1, during the stress application phase, the gate signal V of the device under test... GS,DUT For a pulse signal with a fixed frequency and duty cycle, when the device under test (DUT) is turned on, the main current path of the test circuit is as follows: Figure 6 As shown, the other working states are described in Example 1, and will not be repeated here.

Claims

1. A dynamic on-threshold voltage test circuit for gallium nitride devices, characterized in that, It includes a high-voltage source circuit (1), a stress control switch (2), a drain load matching network (3), a threshold voltage test circuit (4), and a device under test (5). The output terminal of the high-voltage source circuit (1) is connected to the input terminal of the stress control switch (2); The output terminal of the stress control switch (2) is connected to the first terminal of the drain load matching network (3); The second end of the drain load matching network (3) is connected to the drain of the device under test (5) and the drain output of the threshold voltage test circuit (4), respectively. The source of the device under test is connected to the reference ground, and its gate is connected to the drive circuit through the drive resistor. The gate of the device under test is also connected to the gate output terminal of the threshold voltage test circuit (4). The threshold voltage test circuit and the drain and gate of the device under test form an adaptive closed-loop path, which is used to transiently advance the threshold voltage of the device under test during the test phase.

2. The gallium nitride device dynamic on-threshold voltage test circuit according to claim 1, characterized in that, The threshold voltage test circuit (4) includes a test control switch S3, a controlled constant current source I1, a first isolation diode D1, a second isolation diode D2, and a drive circuit isolation switch S2; The test control switch S3 is connected between the test auxiliary power supply and the input terminal of the controlled constant current source I1; The output terminal of the controlled constant current source I1 is connected to the anode of the first isolation diode D1 and the anode of the second isolation diode D2, respectively. The cathode of the first isolation diode D1 is connected to the drain of the gallium nitride device 5 under test, and its unidirectional conduction direction is from the anode to the cathode; The cathode of the second isolation diode D2 is directly connected to the gate of the gallium nitride device under test (5), and its unidirectional conduction direction is from the anode to the cathode; The source of the drive circuit isolation switch S2 is connected to the output terminal of the external drive circuit, and the drain is connected to the gate of the gallium nitride device (5) under test. The stress control switch (2) is configured to be turned on during the stress application stage and turned off during the test stage; the drive circuit isolation switch S2 is configured to be turned on during the stress application stage to connect the external drive circuit and turned off during the test stage to isolate the external drive circuit; the test control switch S3 is configured to be turned on during the test stage, so that the controlled constant current source I1 provides test current to the drain through the first isolation diode D1 and provides test current to the gate through the second isolation diode D2.

3. The dynamic on-threshold voltage test circuit for gallium nitride devices according to claim 1, characterized in that, The high-voltage source circuit consists of a DC high-voltage source Vbus and a filter capacitor C1 with low equivalent series resistance (ESR) connected in parallel.

4. The dynamic on-threshold voltage test circuit for gallium nitride devices according to claim 1, characterized in that, The stress control switch (2) is a bidirectional power switch S1 consisting of two power MOSFETs connected back to back. The sources of the two MOSFETs are connected to each other and connected to a floating ground drive signal. The drains of the two transistors serve as the input and output terminals of the stress control switch, respectively.

5. The dynamic on-threshold voltage test circuit for gallium nitride devices according to claim 1, characterized in that, The drain load matching network (3) includes a drain load resistor R1.

6. A method for testing the dynamic threshold voltage of a gallium nitride device, employing the test circuit described in any one of claims 1-5, characterized in that, In the initial state, stress control switch S1, test control switch S3, and device under test are all off, and drive circuit isolation switch S2 is on. During the electrical stress application stage: the stress control switch (2) is closed, so that the high voltage source circuit (1) applies electrical stress to the drain of the device under test (5) through the drain load matching network (3), while the test control switch S3 is opened. Electrical stress release stage: The stress control switch (2) is disconnected; Gate isolation stage: Control the isolation switch S2 of the drive circuit to open, so that the gate of the device under test (5) is electrically isolated from the drive circuit; Threshold voltage test stage: Control the test control switch S3 to close, so that the controlled constant current source I1 injects a test current of milliampere level into the drain of the gallium nitride device under test (5) through the first isolation diode D1. The test current causes the gate voltage of the device under test (5) to rise. When the gate voltage reaches the dynamic threshold voltage, the device is turned on, and the gate voltage is clamped and maintained at the dynamic threshold voltage. Voltage acquisition steps: The gate-source voltage of the device under test (5) is acquired through the voltage acquisition unit and used as the dynamic threshold voltage measurement value.

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