IGBT module reactive aging test method based on SVPWM control

Abstract

The invention belongs to the technical field of reliability test of power electronic devices, particularly relates to an IGBT module reactive aging test method based on SVPWM control, and aims to solve the problems of current precision deviation, high energy consumption and insufficient junction temperature monitoring instantaneity in an IGBT aging test. The method comprises the following steps: constructing a reactive power circulation loop based on H-bridge topology, and accurately reproducing a working condition through an SVPWM closed-loop control algorithm; extracting turn-off delay time by using a parasitic inductance induced voltage, and inverting the junction temperature in real time by combining with a thermo-sensitive parameter model; and predicting the residual life by adopting the BP neural network optimized by SSA. By adopting the scheme, the voltage utilization rate can be improved, the test energy consumption can be greatly reduced, and non-intrusive junction temperature monitoring and high-precision failure early warning can be realized.

Description

Technical Field

[0001] This invention belongs to the field of power electronic device reliability testing technology, and in particular relates to a reactive power aging test method for IGBT modules based on SVPWM control. Background Technology

[0002] With the rapid development of the global new energy vehicle industry, the power density and integration of Insulated Gate Bipolar Transistor (IGBT) modules, the core energy conversion unit of power electronic converters, are constantly increasing. Under complex on-board conditions, IGBT modules not only need to withstand extremely high current loads but also frequently cope with current transients caused by starting, braking, and speed changes. This exposes power semiconductor devices to alternating electrical, thermal, and mechanical stresses over extended periods. According to the "bathtub curve" theory in reliability engineering, the failure mechanisms of IGBT modules at the packaging level, such as bond wire detachment and solder layer fatigue, are closely related to their current output capability and internal junction temperature fluctuations during the early stages of service and throughout their entire lifespan. Therefore, conducting rigorous accelerated aging tests before device delivery or during the R&D phase to verify their long-term service reliability has become a crucial step in ensuring the safe operation of the entire vehicle.

[0003] In existing reliability assessment systems, to simulate high-current operation while reducing energy consumption, engineers typically employ a reactive power aging test scheme based on an H-bridge topology. This scheme utilizes a three-phase load inductor to replace the actual motor load, achieving the cycling of inductive and capacitive reactive power through energy exchange between the supporting capacitor and the load inductor. This design avoids large-scale active power loss, allowing the test equipment to generate a large circulating current under relatively low grid input power, thereby inducing the self-heating effect of the IGBT module's internal chips and the cyclic thermal stress of its packaging structure. However, as the automotive industry's requirements for IGBT module performance indicators (switching frequency, thermal response speed, steady-state current accuracy, etc.) become increasingly stringent, traditional reactive power aging test schemes are gradually revealing deep-seated technical limitations in terms of both principle and engineering implementation.

[0004] First, existing technologies mostly employ open-loop control strategies. During aging tests lasting hundreds or even thousands of hours, open-loop control struggles to maintain long-term stability of current amplitude and phase due to bus voltage fluctuations, ambient temperature drift, and parameter shifts in the tested devices caused by aging. This deficiency in control precision not only causes test stress to deviate from preset operating conditions, reducing the equivalence of reliability assessments, but also risks abnormal device damage due to sudden overcurrent stress, severely impacting the safety margin of the test. Simultaneously, traditional modulation methods have bottlenecks in handling harmonic suppression and bus voltage utilization under high-current conditions, making it difficult to achieve precise excitation of the power module's electromagnetic characteristics during high-frequency dynamic switching.

[0005] The more fundamental contradiction lies in the inherent trade-off between the real-time performance and accuracy of junction temperature monitoring. Junction temperature is a core physical quantity driving IGBT module performance degradation and failure. However, because the power chip is packaged inside the module, traditional physical contact measurement methods (such as thermocouples or infrared temperature measurement) are limited by sensor response speed and the obstruction of the packaging structure, resulting in detection deviations often reaching tens of degrees Celsius, and they are completely unable to capture junction temperature fluctuations during switching transients. Although the technology field has begun to explore the use of thermally sensitive electrical parameters (TSEP) for quasi-online junction temperature prediction, in actual reactive power aging testing processes, how to deeply integrate complex electrical parameter extraction algorithms with power modulation strategies still faces significant challenges. For example, dynamic thermally sensitive parameter extraction based on turn-off delay time is highly susceptible to interference from circuit parasitic inductance and switching noise. Without precise signal conditioning and control logic support, real-time closed-loop feedback of junction temperature cannot be achieved in high-speed continuous operation aging conditions.

[0006] Furthermore, existing testing equipment often overlooks the high degree of coupling between electrical, water, and thermal multiple physical fields in its mechanical structure and cooling system design. The sealing reliability of water-cooled fixtures, the contact resistance stability of electrical connection springs, and the indentation problem on the device substrate under high current impact can all interfere with the benchmark of aging tests by altering the thermal resistance path or increasing contact losses. During long-term cycling, minute changes in thermal resistance accumulate, eventually leading to deviations in the judgment of aging patterns. In summary, how to construct a comprehensive testing method for complex reactive power cycle topologies that can achieve high-precision current closed-loop control, accurately reproduce actual vehicle operating conditions, and simultaneously possess real-time transient junction temperature monitoring capabilities has become a key technological bottleneck that urgently needs to be overcome in the current power semiconductor testing field.

[0007] Therefore, this invention aims to achieve efficient and precise control of the reactive power aging process of IGBT modules by introducing a space vector pulse width modulation (SVPWM) algorithm and combining it with high-precision dynamic parameter extraction. Summary of the Invention

[0008] This invention aims to address the technical problems in existing IGBT module aging tests, such as current accuracy deviations due to open-loop control, excessive energy losses, insufficient real-time junction temperature monitoring, and poor equivalence in replicating automotive operating conditions. It provides a reactive power aging test method for IGBT modules based on SVPWM control. This invention constructs a reactive power circulation loop based on an H-bridge topology, combining a space vector pulse width modulation (SVPWM) closed-loop control strategy with a thermally sensitive electrical parameter monitoring model based on parasitic parameters. This enables high-precision accelerated aging testing and lifespan prediction of automotive-grade IGBT modules while significantly reducing energy consumption.

[0009] To solve the above-mentioned technical problems, the technical solution adopted by the present invention is as follows: The system architecture is based on a multi-station synchronous testing platform. The platform hardware includes a high-voltage DC power supply, a bus capacitor bank, an IGBT module under test, a three-phase load inductor, a main control unit, a drive circuit, and a sensor acquisition system. The output terminal of the high-voltage DC power supply is connected in parallel with the bus capacitor bank, which consists of a filter capacitor, a support capacitor, and an absorption capacitor. The filter capacitor is used to suppress DC-side voltage ripple, the support capacitor is used to store and exchange reactive power fed back from the load inductor, and the absorption capacitor is placed near the DC bus terminal of the IGBT module under test to weaken transient voltage spikes during switching. The IGBT module under test is electrically connected to the three-phase load inductor through a three-phase full-bridge topology to form a reactive power loop. The main control unit adopts a heterogeneous system architecture based on an ARM processor and a field-programmable gate array (FPGA) and is responsible for executing SVPWM algorithm logic and closed-loop control instructions.

[0010] The core control flow of the IGBT module reactive power aging test method based on SVPWM control is as follows: First, a current closed-loop control model based on the transformation from a three-phase coordinate system to a two-phase stationary coordinate system is established. The main control unit acquires the U, V, and W three-phase current signals at the output of the IGBT module under test in real time through three-phase current sensors. i u 、i v 、i w The sampling frequency is not less than 200 kSa / s. The three-phase current is mapped to a two-phase stationary coordinate system using the Clarke Transform, resulting in... α Axis current components i α and i β Based on this, the given reference current i ref The reference voltage vector is compared with the feedback current and output through a proportional-integral (PI) regulator. V ref Coordinate components in the α−β plane u α and u β The transfer function expression of the PI controller is: G ( s )= K p + K i / s The proportionality coefficient Kp With integral coefficient K i Parameters are identified and preset based on the load inductance L and the desired time constant.

[0011] Then, the drive signal generation logic based on voltage space vector modulation (SVPWM) is executed. The main control unit generates the drive signal based on the output. u α and u β Calculate the reference voltage vector V ref Amplitude and phase angle i ,in i = arctan ( u β / u α According to the phase angle i determination V ref The sector position N is determined. Within the defined sector, the two adjacent valid vectors of that sector are used. V x 、V y And a linear combination of zero vectors V0 and V7. The action times T1 and T2 of adjacent effective vectors are calculated by the following formula: T 1=[3 1 / 2 T s | V ref |sin ( nπ / 3− i )] / V dc ; T 2=[3 1 / 2 T s | V ref |sin ( i −( n- 1) π / 3)] / V dc ; in, T s For the PWM switching cycle, V dc This is the real-time measured value of the DC bus voltage. i Reference voltage vector V ref The phase angle;V ref The reference voltage vector is used. To ensure waveform symmetry and reduce electromagnetic interference, a seven-segment PWM modulation mode is adopted, which evenly distributes the zero vector at the beginning, middle and end of the cycle. The generated six pulse signals are amplified by the optocoupler isolation circuit of the driver board and then applied to the gate of the IGBT module under test.

[0012] Preferably, during the reactive power aging test, a real-time junction temperature extraction mechanism based on the dynamic thermally sensitive electrical parameter (TSEP) is introduced. This method utilizes the auxiliary emitter parasitic inductance of the IGBT module's internal packaging structure. L eE As a sensing medium. At the instant the IGBT module under test is turned off, the collector current... i c rate of change yes c / dt Parasitic inductance L eE Transient voltage induced on the upper v eE The main control unit captures data through a high-speed sampling circuit. v eE The waveform is analyzed, and its characteristic points are identified to determine the turn-off delay time. t doff The shutdown delay time t doff Defined as the time difference between the moment the gate drive signal drops to the threshold and the moment the collector current begins to decrease. This is because the physical properties of the IGBT chip, such as carrier mobility and intrinsic carrier concentration, are affected by the junction temperature. T j High modulation, resulting in t doff and T j There exists a definite functional relationship between them. This invention uses a pre-calibrated thermally sensitive parameter model to invert the chip junction temperature in real time: T j = k · t doff + b ;in k This is the sensitivity coefficient. b This is the compensation constant.

[0013] Preferably, the reactive power aging test method simulates grid-side characteristics using the GRID arm of the H-bridge topology and simulates the inverter-side operating conditions using the INV arm. The modulation ratio of the SVPWM controller is adjusted accordingly. mBy controlling the phase angle, the load current amplitude and phase angle are decoupled, thus accurately reproducing the real-time fluctuations of active power P and reactive power Q under vehicle operating conditions on inductive loads. The calculation relationship between active and reactive power follows: P= ( u d i d +u q i q )·3 / 2; Q=( u q i d −u d i q )·3 / 2; in, u d , u q They are respectively d−q coordinate system d shaft and q Axis voltage components, i d , i q for d−q coordinate system d shaft and q Axis current component. Controlled by... i d The value is zero or a specific value to achieve pure reactive or composite stress loading.

[0014] Preferably, the method of the present invention further includes a data-driven aging state prediction process. First, the current, voltage, case temperature, and extracted junction temperature data collected during the test are preprocessed, and random noise is filtered out using a cubic exponential smoothing method. The iterative formula for the cubic exponential smoothing is as follows: S t (1) = α 1 y t +(1− α 1) S t−1 (1) ; S t (2) = α 1 S t (1) +(1− α1) S t−1 (2) ; S t (3)= α 1 S t (2) +(1−α1) S t−1 (3) ; in α 1 is the smoothing coefficient.

[0015] The preprocessed data is input into a BP neural network model optimized by the improved Sparrow Search Algorithm (SSA). This model initializes the population with a Tent chaotic map and performs a global optimal search on the initial weights and thresholds of the BP neural network by simulating the behaviors of sparrows as discoverers, joiners, and early warning providers. Finally, it outputs the remaining reliable lifetime prediction results and potential failure mechanism predictions for the IGBT module.

[0016] The testing hardware used in this invention has the following defined technical specifications: the reactive power voltage conditioning board adopts a precision resistor voltage divider structure with a voltage division ratio set to 0.01, and a front-end parallel compensation capacitor ensures a stable 10V low-voltage signal output under a 1200V high-voltage input. The constant-temperature water cooling unit adopts a one-to-five independent circulation architecture, with a water supply flow rate set to no less than 2.6m³ / h. 3 The system features adjustable water temperature control within a range of 10-85℃, and integrates a conductivity meter to monitor cooling water quality in real time to prevent electrochemical corrosion. The three-phase load inductors are connected in a star configuration, with a single-phase inductance of 0.1mH, a rated current of 400A, and a temperature rise limited to 95K.

[0017] Preferably, the test method employs a constant shell temperature fluctuation control strategy to implement accelerated aging. The main control unit controls the shell temperature based on thermocouple feedback. T c The output duty cycle of SVPWM is adjusted in real time, enabling the IGBT module to undergo high-frequency thermal cycling within a preset temperature range. This control strategy effectively induces thermal stress fatigue in the solder layer between the bonding wires and the DBC substrate, and between the DBC substrate and the heat sink, thereby completing a comprehensive assessment of the power module package reliability in a short time.

[0018] The present invention provides a reactive power aging test method for IGBT modules based on SVPWM control, the technical effects of which are significantly reflected in the following aspects: First, by introducing an SVPWM closed-loop control strategy, the problems of current waveform distortion and insufficient control accuracy caused by open-loop control in traditional aging tests are solved. Compared with traditional SPWM modulation, SVPWM modulation technology improves the utilization rate of the DC bus voltage and can generate a load current closer to a sine wave within the linear modulation range, significantly reducing harmonic losses. Current closed-loop control ensures that even if the parameters of the device under test drift during long-term aging, the test stress can still be strictly locked within the preset operating range, greatly improving the equivalence and repeatability of the test data.

[0019] Secondly, the application of the reactive power recycling topology enables efficient energy recovery and reuse. The inductive reactive power generated by the load inductance is fed back to the DC-side support capacitor through a reverse freewheeling diode, and then released again in the next switching cycle. The net input power of the entire test system only needs to compensate for the inherent losses and heat dissipation of the power circuit. Compared with traditional power dissipation tests using real motors or resistive loads, the energy efficiency of this invention is improved, significantly reducing the power operating cost of large-scale aging tests.

[0020] Furthermore, based on the turn-off delay time extraction technology using parasitic inductance-induced voltage, non-invasive, quasi-online real-time monitoring of IGBT junction temperature is achieved. This technology directly utilizes the internal structural parameters of the power module, eliminating the need for additional temperature sensors and thus removing the thermal delay effect of traditional contact-based temperature measurement. Its sampling frequency is synchronized with the switching frequency, enabling it to capture nanosecond-level switching transients, thereby accurately recording the junction temperature swing Δ. T j and junction temperature change rate dT j / dt This provides high-dimensional and high-precision data support for failure mechanism analysis.

[0021] Furthermore, the SSA-BP neural network prediction model integrated in this invention overcomes the shortcomings of the standard BP algorithm, which is prone to getting trapped in local optima, by introducing the Tent chaotic mapping and firefly perturbation strategy. This model can automatically extract feature vectors representing degradation from massive amounts of test data, achieving accurate early warning of IGBT module failures, and its prediction accuracy is improved compared to traditional empirical physical models.

[0022] Finally, the detailed optimizations of the system engineering, such as voltage conditioning with precision resistor voltage dividers, high-precision constant temperature water cooling control, and automated transfer mechanisms designed for multiple workstations, together build a highly reliable and highly automated testing environment. This not only shortens the cycle of a single test, but also ensures the traceability of data throughout the entire process through multi-channel synchronous acquisition technology. Attached Figure Description

[0023] Figure 1This is a flowchart illustrating the reactive power aging test method for IGBT modules based on SVPWM control according to the present invention.

[0024] Figure 2 The figure shows a cross-sectional view of an IGBT module.

[0025] Figure 3 This is a schematic diagram of the bathtub curve of the failure rate of the IGBT module at each stage. Detailed Implementation

[0026] The following is in conjunction with the appendix Figure 1~Figure 3 The present invention will be further described in detail below: See Figure 2 The IGBT module has a complex multi-layered structure, mainly comprising IGBT chips, FWD (Freewheeling Diode) chips, bonding wires, a DBC substrate, a heat sink substrate, a heat sink, control terminals, and power terminals. The lower surfaces of the IGBT chips and freewheeling diode chips are connected to the copper layer on the DBC via solder layers. The upper surfaces of the chips are interconnected, as are the chip upper surfaces and the copper layer on the DBC, via bonding wires. Simultaneously, the module's control terminals and power terminals are also connected to the chip upper surfaces and the copper layer on the DBC via bonding wires. The DBC substrate, short for Direct Copper Clad Laminate, utilizes ceramic surface metallization technology. The entire substrate consists of three layers: a middle ceramic insulating layer, and top and bottom copper clad layers. The upper copper layer of the DBC requires etching to meet the connection requirements of the IGBT module's internal circuitry. The lower copper layer of the DBC does not require etching and is directly soldered to the back of the ceramic layer, serving to aid in heat dissipation. Therefore, the DBC substrate ensures electrical insulation and thermal conduction between the silicon chip and the heat sink substrate. During the operation of the IGBT module, the IGBT chip and the freewheeling diode chip generate a lot of heat. Relying on the DBC substrate, copper substrate and heat sink, the heat generated by the chip is effectively transferred from top to bottom to the heat sink of the module through heat conduction, thereby releasing the heat to the outside of the module. This heat dissipation method can ensure that the chip of the module operates within the normal temperature range and maintain the normal operation of the IGBT module under high power conditions for a long time.

[0027] The failure rate of IGBT modules, from manufacturing and inspection to customer use and eventual failure, can be described using a bathtub curve, such as... Figure 3As shown, the curve divides the failure time of IGBT modules into three stages: early failure, mid-term failure, and late failure. According to the bathtub curve, the failure rate of IGBT modules is highest in the early stage, i.e., before the modules are inspected and shipped from the factory. This is due to defects in manufacturing technology and improper handling, storage, and installation of the modules. Bond wire failure and solder layer failure of the IGBT module both reflect its current output capability. Therefore, before the IGBT modules leave the factory, by conducting long-term, high-current aging tests on the modules according to the specific application conditions provided by the customer, the module's output current capability can be detected, product defects can be identified in the early stage, and products can be screened to complete the reliability verification of the IGBT modules.

[0028] This invention provides a reactive power aging test method for IGBT modules based on SVPWM control. The hardware system architecture is built on a highly integrated multi-station synchronous test platform. (See attached diagram) Figure 1 As shown, the hardware of this platform mainly includes a high-voltage DC power supply, a bus capacitor bank, an IGBT module under test, a three-phase load inductor, a main control unit, a drive circuit, and a sensor acquisition system. In the specific power electronic topology connection, the high-voltage DC power supply serves as the energy source for the entire system, and its output terminal is connected in parallel to the bus capacitor bank. This bus capacitor bank is not a single energy storage element, but rather a composite of filter capacitors, support capacitors, and absorption capacitors through a stacked busbar technology.

[0029] The filter capacitor is mainly used to suppress low-frequency voltage ripple from the DC power supply; the support capacitor, as the core energy exchange hub, is used to store and exchange the reactive power fed back by the three-phase load inductor during the switching off period, and its capacity configuration needs to meet the engineering requirement that the DC bus voltage fluctuation rate is less than 1% during the reactive power cycle; the absorption capacitor is physically deployed as close as possible to the positive and negative input terminals of the DC bus of the IGBT module under test, so as to take advantage of its low equivalent series inductance (ESL) characteristics to minimize the voltage spikes caused by lead inductance of the IGBT during high-speed switching transients.

[0030] The IGBT module under test is electrically connected to a three-phase load inductor through a standard three-phase full-bridge topology. In this topology, six IGBT chips under test form three-phase bridge arms (U, V, W). The midpoint of each phase bridge arm is connected to one terminal of the three-phase load inductor, while the other end of the three-phase load inductor is shorted using a star connection.

[0031] This configuration forms a closed reactive power loop, allowing energy to circulate back and forth between the DC bus and the inductor without consuming a large amount of active power.

[0032] The main control unit, serving as the system's computational brain, adopts a heterogeneous system architecture based on an ARM processor and a field-programmable gate array (FPGA). The ARM processor runs the embedded operating system, handling high-level aging control strategies, data storage, and human-machine interaction; the FPGA, leveraging its parallel computing advantages, executes high-frequency SVPWM algorithm logic, synchronous control of multi-channel ADCs, and nanosecond-level protection logic.

[0033] In the core control flow of the reactive power aging test method for IGBT modules based on SVPWM control, the first step is to establish a current closed-loop control model based on the transformation from a three-phase coordinate system to a two-phase stationary coordinate system. During the test operation, the three-phase current sensors in the sensor acquisition system acquire the U, V, and W three-phase current signals at the output terminal of the IGBT module under test in real time. i u 、 i v 、i w .

[0034] To ensure the bandwidth and waveform fidelity of the control loop, the sampling frequency is set to no less than 200 kSa / s. After receiving the digitized current signal, the main control unit uses the Clarke Transform to map the three-phase current to a two-phase stationary coordinate system, obtaining... α Axis current components i α and β Axis current components i β Based on this, the system will use the given reference current. i ref (Typically set to a sinusoidal peak value according to the aging test outline) The difference between the current and the feedback current is calculated, and the reference voltage vector is output through a proportional-integral (PI) regulator. V ref Coordinate components in the α−β plane u α and u β The transfer function expression of the PI controller is: G ( s )= K p + K i / s Among them, the proportionality coefficient K p With integral coefficient K iThe parameter identification process is based on the inductance L of the three-phase load inductor, the on-resistance of the IGBT module under test, and the desired closed-loop system time constant, which are predetermined by the pole placement method.

[0035] The next crucial step is executing the drive signal generation logic based on voltage space vector modulation (SVPWM). The main control unit generates the drive signal according to the aforementioned output... u α and u β Calculate the reference voltage vector V ref Amplitude and phase angle i ,in i = arctan ( u β / u α Determined based on phase angle θ V ref The sector position N in the spatial vector diagram, where N∈{1,2,3,4,5,6}. Within the defined sector, utilize the two adjacent valid vectors of that sector. V x 、V y The zero vectors V0 and V7 are linearly combined to synthesize the target reference voltage vector.

[0036] The durations T1 and T2 of adjacent effective vectors follow the volt-second balance principle and can be precisely calculated using the following formula: T 1=[3 1 / 2 T s | V ref |sin ( nπ / 3− i )] / V dc ; T 2=[3 1 / 2 T s | V ref |sin ( i −( n- 1) π / 3)] / V dc ; in, T s For the PWM switching cycle, V dcThis is the real-time measured value of the DC bus voltage. i Reference voltage vector V ref The phase angle; V ref This is the reference voltage vector.

[0037] To ensure the symmetry of the current waveform, reduce common-mode interference, and lower switching losses, this method employs a seven-segment PWM modulation mode. In this mode, the zero vector is evenly distributed at the beginning, middle, and end of the cycle. The generated six complementary pulse signals undergo dead-time compensation processing within the FPGA, and then are level-shifted and amplified by the optocoupler isolation circuit in the driver circuit before being applied to the gate of the IGBT module under test.

[0038] In a preferred embodiment of the present invention, a real-time junction temperature extraction mechanism based on dynamic thermally sensitive electrical parameters (TSEP) is introduced during reactive power aging testing to monitor the actual internal heating of the power chip. This mechanism cleverly utilizes the auxiliary emitter parasitic inductance that is unavoidable in the IGBT module packaging structure. L eE As a sensing medium. At the instant the IGBT module under test is turned off, the collector current... i c rate of change yes c / d t A transient voltage will be induced on the parasitic inductance of the auxiliary emitter. v eE Satisfying the relation v eE =L eE ⋅ yes c / dt .

[0039] The main control unit captures data through a high-speed sampling circuit (sampling rate set to 100 MSa / s or higher). v eE The waveform characteristics are analyzed, and the characteristic points of voltage drop are accurately identified to determine the turn-off delay time. t doff The shutdown delay time t doff Defined as the time when the gate drive signal drops to the turn-off threshold and the collector current i c The time difference between the start of the descent. This is because the physical properties of the IGBT chip, such as carrier mobility and intrinsic carrier concentration, are affected by the junction temperature. T j The high modulation leads tot doff and T j There is a highly linear correspondence between them.

[0040] This method establishes the following linear inversion model by pre-calibrating the thermally sensitive parameters of IGBTs from the same batch under a constant temperature environment: T j = k · t doff + b .in, k These are the sensitivity coefficients obtained through least squares fitting. b As a compensation constant, k、b The acquisition process is as follows: First, standard calibration is performed: Temperature control in a constant temperature chamber to establish a stable junction temperature: The IGBT module is placed in a constant temperature chamber with fixed water cooling to eliminate the influence of self-heating. The temperature points in the constant temperature chamber are set sequentially: 25℃, 50℃, 75℃, 100℃, 125℃, and 150℃. Hold each temperature point for ≥30 minutes to ensure chip junction temperature. T j ≈shell temperature T c ≈ Temperature of the constant temperature chamber.

[0041] Then, a double-pulse test was performed to collect the turn-off delay time. t doff : Applying a double pulse under static low current and rated bus voltage prevents self-heating.

[0042] Acquisition: Gate drive signal V ge collector current I c and the transient voltage induced by the parasitic inductance of the auxiliary emitter. v eE ; Extract shutdown delay time t doff : t doff =When the gate drops to the turn-off threshold→ I c The time difference when the descent begins.

[0043] Each temperature point was tested ≥10 times, outliers were removed, and the average value was taken as the result for that temperature. t doffi .

[0044] Re-collect true junction temperatureT ji The reference junction temperature is recorded synchronously at each temperature point. T ji .

[0045] A set of corresponding data was obtained: ( T j1 , t doff1 ), ( T j2 , t doff2 ), ..., ( T jn , t doffn ); calculate k、b : ; .

[0046] The application of the above process enables the system to acquire the chip junction temperature in real time, with the switching frequency as the period, without damaging the package or embedding thermocouples, thus reducing junction temperature fluctuations Δ. T j This provides a closed-loop feedback basis for precise control.

[0047] At the level of simulating complex operating conditions in aging tests, the reactive power aging test method achieves high-fidelity simulation of the actual operating conditions of the vehicle inverter through the decoupled control logic of the H-bridge topology. Specifically, the main control unit achieves independent decoupled control of the load current amplitude and phase angle by adjusting the modulation ratio m and current phase angle of the SVPWM controller in real time.

[0048] This control strategy allows for precise simulation of the real-time fluctuations in the inverter's active power PP and reactive power QQ during dynamic processes such as acceleration, deceleration, and hill climbing under inductive loads. The calculation of active and reactive power follows a synchronous rotating coordinate system (…). d−q Power formula in coordinate system: P= ( u d i d +u q i q )·3 / 2; Q=( u q i d −u d i q )·3 / 2; By order i d With a value of zero or fluctuating according to a preset curve, pure reactive stress loading or composite current stress loading can be achieved.

[0049] To uncover performance degradation patterns of IGBT modules from massive amounts of test data, this invention integrates a data-driven aging state prediction process. First, the raw current, voltage, case temperature, and extracted junction temperature data acquired by the sensor acquisition system undergo a data preprocessing stage. In this stage, the system employs a cubic exponential smoothing method to filter out random noise caused by electromagnetic interference or sampling quantization.

[0050] The iterative process of triple exponential smoothing consists of three levels of smoothing operators: First smoothing value S t (1) = α 1 y t +(1− α 1) S t−1 (1) ; Secondary smoothing value S t (2) = α 1 S t (1) +(1− α 1) S t−1 (2) ; Triple smoothing value S t (3)= α 1 S t (2) +(1−α1) S t−1 (3) ; in α 1 is the smoothing coefficient. S t−1 (1) for t The smoothed value at time -1. S t−1 (2) for t The quadratic smoothing value at time -1 S t−1 (3) for t The three-fold smoothed value at time -1.

[0051] The configuration is optimized based on the dynamic characteristics of the signal. The preprocessed feature dataset is input into a BP neural network model optimized by an improved Sparrow Search Algorithm (SSA). This model introduces a Tent chaotic map during the initialization phase to enhance population diversity and ergodicity. By simulating the behaviors of finders, joiners, and early warning birds in a sparrow population during predation, a global optimal search is performed in the multi-dimensional weight space to find the initial weights and thresholds that minimize the neural network's prediction error. The model ultimately outputs the predicted Remaining Reliable Lifetime (RUL) of the IGBT module and makes probabilistic predictions of potential failure modes (bond wire detachment, solder layer fatigue, etc.).

[0052] At the engineering implementation level, all hardware units used in this invention have undergone rigorous industrial-grade selection and parameter calculation. The voltage conditioning board employs a high-precision resistor voltage divider structure with a precisely set voltage division ratio of 0.01. An RC compensation circuit is connected in parallel at the front end of the voltage divider resistors to ensure that the output 10V low-voltage signal has extremely high phase linearity and amplitude accuracy under a 1200V high-voltage bus input. The constant-temperature water cooling unit adopts a one-to-five independent circulation architecture designed for multi-station operation. It integrates a high-power heat exchanger, a variable-frequency water pump, and a precision proportional-integral regulating valve. The water supply flow rate is set to be no less than 2.6 m³ / h, and the water temperature control range covers 10℃ to 85℃ with an accuracy maintained within ±0.2℃.

[0053] In addition, an online conductivity meter is integrated into the water circulation system. When an abnormal increase in cooling water conductivity is detected, the system automatically activates ion exchange resin filtration to prevent electrochemical corrosion of the IGBT heat sink. The three-phase load inductor is wound with a specially designed high-frequency magnetic powder core, with a single-phase inductance of 0.1mH and a rated effective current of 400A. Through a reasonable airflow design, the coil temperature rise is limited to within 95K under continuous high-current operation, avoiding the negative impact on the accuracy of current closed-loop control due to inductance drift with temperature.

[0054] In a preferred embodiment of the present invention, the testing method employs a constant case temperature fluctuation control strategy to implement accelerated aging. The main control unit uses the case temperature feedback from the thermocouple located at the center of the IGBT module base plate. T c By combining the real-time modulation parameters of SVPWM, the duty cycle and cycle period of the output current are dynamically adjusted. This strategy enables the IGBT module to undergo forced thermal cycling within a preset temperature fluctuation range.

[0055] This periodic thermomechanical stress loading can precisely excite and amplify fatigue damage caused by thermal expansion coefficient (CTE) mismatch at heterogeneous interfaces within the power module package (such as the interface between aluminum bonding wires and silicon chips, the interface between the DBC substrate and the ceramic layer, and the interface between the DBC substrate and the heat sink copper base plate). By adjusting the cycle frequency and the peak junction temperature, a comprehensive evaluation of the reliability of automotive-grade IGBT module packages can be achieved while significantly shortening the test cycle.

[0056] In terms of control precision and waveform quality, the SVPWM closed-loop control strategy adopted in this invention significantly reduces current THD. During the aging process, the current stress applied to the IGBT chip is closer to a true sine wave, avoiding additional abnormal heating caused by high-order harmonics. At the same time, the DC bus voltage utilization rate is improved. Under the same DC bus voltage, this invention can output a higher AC voltage amplitude, broadening the range of test conditions.

[0057] Because it employs a reactive power circulation loop, the system only needs to compensate for the conduction losses, switching losses, and resistive losses of the power devices via a high-voltage DC power supply. Under the same aging current stress, the total input power of the system of this invention is only 18.5kW, while traditional dissipative testing, where all energy is converted into resistance heat, has an input power as high as 120kW. This invention achieves a high energy saving rate, which means a significant reduction in electricity costs for large-scale aging laboratories that require hundreds of workstations to operate simultaneously.

[0058] In terms of sensing accuracy, the turn-off delay time is based on the extraction of auxiliary emitter parasitic inductance. t doff It can reflect the chip junction temperature with high linearity. By comparing with laboratory reference values ​​of implanted fiber optic temperature sensors, the quasi-online monitoring error of this invention is small, which is better than the error caused by the limitations of traditional methods due to packaging obstruction and thermal response hysteresis. This high-precision real-time temperature feedback is a technical prerequisite for realizing closed-loop control of junction temperature and accelerating the accurate establishment of lifetime models.

[0059] Finally, regarding aging state prediction and safety assurance, thanks to the powerful modeling capability of the SSA-BP neural network for nonlinear degradation characteristics, this invention achieves a small prediction error for the remaining lifespan of IGBTs. Simultaneously, because the FPGA layer integrates an early warning mechanism based on anomaly identification of current change rate, the system's response time to early faults such as bond wire breakage is shortened, effectively preventing serious accidents such as device explosions during aging testing and protecting the safety of the testing equipment.

[0060] The main control unit specifically compensates for the dead-time effect in real time when performing SVPWM calculations. During IGBT switching, a dead-time must be set to prevent shoot-through between the upper and lower transistors of the same bridge arm. td However, dead time causes a shift in the amplitude and phase of the output voltage vector, leading to low-frequency oscillations in the current waveform. This method automatically superimposes a compensating voltage vector within the FPGA by monitoring the current polarity in real time, ensuring that the output current remains smooth near the zero-crossing point. This is of great significance for evaluating the reliability of IGBTs under light loads or near the zero-crossing point.

[0061] The high-speed sampling circuit in the sensor acquisition system employs a differential input structure and is equipped with a broadband low-pass filter with a cutoff frequency of 500MHz to filter out the severe electromagnetic pulse noise generated by the power circuit. The acquired data... v eE The signal generates a timing trigger signal through a high-speed comparator, activating the FPGA's internal 2GHz ultra-high-speed counter, thereby achieving... t doff Nanosecond-level resolution extraction. This extreme capture of the underlying signal ensures the robustness of subsequent junction temperature calculations.

[0062] In actual operation, the constant-temperature water cooling unit communicates with the main control unit in real time via the Modbus TCP protocol. When the aging test enters the cooling phase, the main control unit instructs the proportional-integral control valve of the water cooling unit to fully open and increases the water pump frequency, utilizing the high heat capacity of the cooling water to achieve a rapid drop in chip temperature. During the heating phase, a rapid temperature rise is achieved by reducing the flow rate and combining this with the power losses of the IGBT itself. This coordinated control strategy of "active cooling and passive heating" results in a high case temperature change rate. dT c / dt Adjustable and controllable, it greatly enhances the flexibility of accelerated aging tests.

Claims

1. A reactive power aging test method for IGBT modules based on SVPWM control, characterized in that, The method is implemented based on a multi-station synchronous testing platform, which includes a high-voltage DC power supply, a bus capacitor bank, an IGBT module under test, a three-phase load inductor, a main control unit, a drive circuit, and a sensor acquisition system. The method includes the following steps: S1: Construct a reactive power circulation loop based on H-bridge topology: Connect the output terminal of the high-voltage DC power supply in parallel with the bus capacitor bank, and connect the IGBT module under test to the three-phase load inductor through a three-phase full-bridge topology to form a closed loop in which energy circulates between the DC bus and the inductor. S2: Establishing a Current Closed-Loop Control Model: The main control unit acquires the three-phase current signal at the output of the IGBT module under test through the sensor acquisition system, and uses the Clarke transform to map the three-phase current to a two-phase stationary coordinate system to obtain... α Axis current components i α and β Axis current components i β The reference voltage vector is output via a proportional-integral regulator. V ref exist α−β Coordinate components on the plane u α and u β ; S3: Execute Space Vector Pulse Width Modulation (SVPWM) driver: The main control unit, according to... u α and u β Determine the reference voltage vector V ref The sector position is determined, and the duration of adjacent effective vectors and zero vectors is calculated to generate a seven-segment pulse signal, which is then applied to the gate of the IGBT module under test via the drive circuit. S4: Implement real-time junction temperature monitoring and aging assessment: Capture the transient induced voltage during turn-off using the auxiliary emitter parasitic inductance of the internal packaging structure of the IGBT module under test, extract the real-time junction temperature through the inversion model, and combine the voltage, current and temperature data acquired by the sensor acquisition system to output the remaining reliable lifetime result using the aging state prediction model.

2. The reactive power aging test method for an IGBT module based on SVPWM control according to claim 1, characterized in that, The establishment of the current closed-loop control model in step S2 specifically includes: The three-phase current signals U, V, and W are synchronously acquired by a three-phase current sensor installed at the output terminal of the three-phase full-bridge. i u 、i v 、i w ; The main control unit adopts a heterogeneous architecture based on an ARM processor and a field-programmable gate array (FPGA). The FPGA performs Clarke transform operations, and its coordinate transformation matrix satisfies the power invariance constraint, converting the three-phase current signal into components in a two-phase stationary coordinate system in real time. i α and i β ; The preset sinusoidal reference current i ref The difference between the current and the feedback current is calculated and input to the proportional-integral (PI) controller. The transfer function expression of the PI controller is as follows: G ( s )= K p + K i / s ； Among them, the proportionality coefficient K p With integral coefficient K i It is obtained in advance by pole placement method based on the inductance L of the three-phase load inductor, the on-resistance of the IGBT module under test, and the desired closed-loop system time constant.

3. The reactive power aging test method for an IGBT module based on SVPWM control according to claim 1, characterized in that, The specific process of executing the SVPWM drive logic in step S3 is as follows: The main control unit is based on coordinate components u α and u β Calculate the reference voltage vector V ref phase angle θ : θ = arctan ( u β / u α ), and based on the phase angle θ The spatial vector map is divided into six symmetrical sectors; In the determined first n Within a sector, based on the volt-second balance principle, two adjacent effective vectors are used. V x 、V y Perform synthesis, effective vector V x 、V y The durations T1 and T2 are calculated using the following formula: T 1=[3 1 / 2 T s | V ref |sin ( nπ / 3− θ )] / V dc ； T 2=[3 1 / 2 T s | V ref |sin ( θ −( n- 1) π / 3)] / V dc ； in, T s For the PWM switching cycle, V dc This is the real-time measured value of the DC bus voltage. θ Reference voltage vector V ref The phase angle; V ref Reference voltage vector; The generated six pulse signals undergo dead-time compensation processing inside the FPGA. By monitoring the current polarity in real time and automatically superimposing a compensation voltage vector inside the FPGA, the current zero-crossing distortion caused by the dead-time effect is eliminated. The pulse signals are amplified by the optocoupler isolation circuit in the drive circuit to drive the switching action of the IGBT module under test.

4. The reactive power aging test method for an IGBT module based on SVPWM control according to claim 1, characterized in that, The bus capacitor bank is constructed using a stacked busbar technology and includes: A filter capacitor, connected in parallel to the front end of the DC bus, is used to suppress low-frequency voltage ripple introduced by the DC power supply. Support capacitors are used to store and exchange reactive power fed back by the three-phase load inductance during the IGBT module under test when it is turned off. The capacity configuration of these capacitors ensures that the DC bus voltage fluctuation rate is less than 1% during the reactive power cycle. The absorption capacitor is physically deployed near the positive and negative input terminals of the DC bus of the IGBT module under test. It utilizes its low equivalent series inductance to reduce the voltage spikes of the IGBT module under test during high-speed switching transients.

5. The reactive power aging test method for an IGBT module based on SVPWM control according to claim 1, characterized in that, In step S4, the mechanism for extracting the real-time junction temperature includes: At the instant the IGBT module under test is turned off, the collector current... i c rate of change di c / d t A transient induced voltage is generated on the parasitic inductance of the auxiliary emitter. v eE ; The transient induced voltage is captured by a high-speed sampling circuit. v eE The waveform shows that the high-speed sampling circuit adopts a differential input structure and is equipped with a broadband low-pass filter, with the sampling rate set above 100 MSa / s; Main control unit identification v eE Calculate the voltage drop characteristic points of the waveform and the turn-off delay time. t doff The shutdown delay time t doff Defined as the time when the gate drive signal drops to the turn-off threshold and the collector current i c The time difference between the start of descent.

6. The reactive power aging test method for an IGBT module based on SVPWM control according to claim 5, characterized in that, The main control unit uses the shutdown delay time based on the pre-calibrated thermal sensitivity parameter model. t doff Real-time inversion of chip junction temperature T j : T j = k · t doff + b ； in, k This is the sensitivity coefficient. b This is the compensation constant; The sampling frequency of the inversion model is synchronized with the switching frequency of SVPWM to achieve control over the chip junction temperature swing Δ. T j and junction temperature change rate dT j / dt Precise online monitoring.

7. The reactive power aging test method for an IGBT module based on SVPWM control according to claim 5, characterized in that, The method also achieves vehicle-mounted operating condition reproduction through decoupled control logic of the H-bridge topology, specifically as follows: The main control unit simulates the real-time fluctuations of active power P and reactive power Q during vehicle dynamics by adjusting the modulation ratio mm and current phase angle of the SVPWM controller in real time across the three-phase load inductor. The calculation relationship follows the power formula in a synchronous rotating coordinate system. P= ( u d i d +u q i q )·3 / 2； Q=( u q i d −u d i q )·3 / 2； in, u d , u q They are respectively d−q coordinate system d shaft and q Axis voltage components, i d , i q for d−q coordinate system d shaft and q Axis current components; By controlling i d The load can be zero or fluctuate according to a preset curve to achieve pure reactive stress loading or composite current stress loading.

8. The reactive power aging test method for an IGBT module based on SVPWM control according to claim 1, characterized in that, The test method employs a constant shell temperature fluctuation control strategy to accelerate aging. The specific steps are as follows: The main control unit uses the case temperature fed back by the thermocouple located at the center of the IGBT module base plate under test. T c The output duty cycle and thermal cycle of SVPWM are adjusted in real time to ensure that the IGBT module under test is cyclically heated within a preset temperature fluctuation range. The test platform also includes a constant-temperature water-cooling unit, which adopts a one-to-five independent circulation architecture. The main control unit communicates with the constant-temperature water-cooling unit via the Modbus TCP protocol, and coordinates the proportional-integral regulating valve and variable frequency water pump of the water-cooling unit according to the heating and cooling stages of the aging test to achieve control over the shell temperature change rate. dT c / dt Closed-loop regulation.

9. The reactive power aging test method for an IGBT module based on SVPWM control according to claim 1, characterized in that, The aging state prediction model is constructed based on a backpropagation neural network optimized by the improved Sparrow Search Algorithm (SSA). The prediction process includes: Data preprocessing: The original current, voltage, case temperature, and junction temperature data were filtered using a cubic exponential smoothing method. The iterative formula for the smoothing operator is as follows: S t (1) = α 1 y t +(1− α 1) S t−1 (1) ； S t (2) = α 1 S t (1) +(1− α 1) S t−1 (2) ； S t (3)= α 1 S t (2) +(1−α1) S t−1 (3) ； in α 1 represents the smoothing coefficient; Model optimization: The sparrow population is initialized using the Tent chaotic map. By simulating the predation and defense behaviors of discoverers, joiners, and early warning birds, the initial weights and thresholds of the BP neural network are globally optimized to minimize the prediction error. Output results: Input the preprocessed feature vector into the optimized neural network to output the remaining reliable lifetime prediction value and failure mechanism prediction result of the IGBT module under test.

10. The reactive power aging test method for an IGBT module based on SVPWM control according to claim 1, characterized in that, The sensor acquisition system is equipped with a voltage conditioning board, which adopts a precision resistor voltage divider structure with a voltage division ratio set to 0.

01. An RC compensation circuit is connected in parallel at the front end to convert the 1200V high voltage signal into a 10V low voltage signal. The water supply flow rate of the constant temperature water cooling unit is set to be no less than 2.6m³. 3 / h, the water temperature is controlled within the range of 10-85℃, and an online conductivity meter is integrated to monitor the cooling water quality; The three-phase load inductor is star-connected, with a single-phase inductance of 0.1mH, a rated current effective value of 400A, and a temperature rise limited to within 95K.

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