Method, device and equipment for generating routing tape of impedance slice of circuit board and medium

By automatically generating the soldering tape for circuit board impedance slices, the problems of low efficiency and poor accuracy of manual generation are solved, achieving efficient and accurate soldering tape production.

CN122017530APending Publication Date: 2026-05-12DELTON TECH (GUANGZHOU) INC
View PDF 0 Cites 0 Cited by

Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
DELTON TECH (GUANGZHOU) INC
Filing Date
2026-02-12
Publication Date
2026-05-12

AI Technical Summary

Technical Problem

In the existing technology, the manual generation of router tapes during the impedance slicing analysis of circuit boards is inefficient and prone to errors, making it difficult to meet the production requirements of highly integrated circuit boards.

Method used

By reading the target impedance line from the impedance file of the first impedance test board, a slice trajectory line that meets the preset requirements is generated, and its line width is adjusted to be the same as the diameter of the router. The router strip positioning hole is determined from the drill hole, and the router strip is automatically generated.

Benefits of technology

It improves the efficiency of ribbon production, reduces costs, avoids errors caused by human factors, and improves the accuracy of ribbon production.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN122017530A_ABST
    Figure CN122017530A_ABST
Patent Text Reader

Abstract

The invention discloses a gong tape generation method, device and equipment for impedance slices of a circuit board and a medium. According to the method, the target impedance line is read from the impedance file of the impedance first-time test panel, the target impedance line is taken as a reference, the slicing trajectory line is automatically generated, the line width of the slicing trajectory line is adjusted to be the same as the diameter of the milling cutter, and the milling belt positioning hole is determined from the drilling hole of the impedance first-time test panel. And packaging the slice trajectory after the line width adjustment and the gong band positioning hole into the gong band, so that automatic generation of the gong band is realized, gong band generation efficiency is improved, cost is reduced, gong band errors caused by human factors are avoided, and gong band accuracy is improved.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] This invention relates to circuit board impedance testing technology, and more particularly to a method, apparatus, equipment, and medium for generating router strips for circuit board impedance slices. Background Technology

[0002] An impedance board is a printed circuit board (PCB) designed and manufactured to give signal transmission lines on the board specific characteristic impedances. Its core function is to solve signal integrity problems in high-speed, high-frequency signal transmission. Before mass production, impedance boards need to undergo Impedance First Article (IFA) trial production to confirm the rationality of the impedance design. The design is adjusted based on the IFA test results to ensure that mass production meets customer impedance requirements. Therefore, a slice analysis is required on the IFA, that is, slicing the locations of the impedance lines and then analyzing the results to ensure the rationality of the impedance design.

[0003] The key to performing initial impedance analysis on a test board is locating the impedance lines and generating the routing tape (a CNC program that controls the router) for the slice. Currently, most methods involve manually locating the impedance lines, drawing the router tool traces, and manually writing the routing tape. As circuit boards become increasingly integrated and sophisticated, the number of impedance lines requiring control also increases. Manually generating the routing tape is time-consuming, inefficient, and prone to errors due to human factors. Summary of the Invention

[0004] This invention provides a method, apparatus, equipment, and medium for generating solder strips for circuit board impedance slices, so as to realize the automatic generation of solder strips, improve the efficiency of solder strip generation, reduce costs, avoid solder strip errors caused by factors, and improve the accuracy of solder strips.

[0005] In a first aspect, the present invention provides a method for generating the routing strip of an impedance slice on a circuit board, comprising:

[0006] Read the target impedance line from the impedance file of the first impedance test board. The target impedance line is one of the multiple impedance lines of the first impedance test board.

[0007] Using the target impedance line as a reference, a slice trajectory line that meets the preset requirements is generated. The slice trajectory line is used to define the stroke trajectory of the milling cutter.

[0008] Adjust the line width of the slicing trajectory line to be the same as the diameter of the auger;

[0009] Determine the positioning holes for the screw belt from the drill holes in the first impedance test plate;

[0010] The slice trajectory line with the adjusted line width is packaged with the positioning hole of the gong tape to form a gong tape.

[0011] Optionally, the target impedance line includes multiple segments, and a slice trajectory line conforming to preset requirements is generated using the target impedance line as a reference, including:

[0012] Arrange the segments of the target impedance line in descending order of length to obtain a segment sequence;

[0013] Select the segment with the longest length from the segmented sequence as the target segment;

[0014] Using the target segment as a reference, candidate slice trajectory lines that meet preset requirements are generated in the slice layer;

[0015] Determine whether the candidate slice trajectory line intersects with the slice trajectory lines of other impedance lines generated earlier, or whether the distance between them is less than the diameter of the milling cutter;

[0016] If so, select the next segment from the segment sequence as the target segment, and return to execute the step of generating a candidate slice trajectory line that meets the preset requirements in the slice layer with the target segment as a reference, until the slice trajectory line of the target impedance line is obtained or all segments in the segment sequence are traversed.

[0017] If not, the candidate slice trajectory line is used as the slice trajectory line of the target impedance line, and the next impedance line is used as the target impedance line. Then, the process returns to the step of generating a slice trajectory line that meets the preset requirements in the slice layer with the target impedance line as a reference, until all impedance lines of the first impedance test board have been traversed.

[0018] Optionally, using the target segment as a reference, candidate slice trajectory lines that meet preset requirements are generated, including:

[0019] Using the midpoint of the target segment as a reference point, nodes are generated on both sides at a preset distance from the target segment, where the preset distance is half the slice width;

[0020] Draw a line segment parallel to the target segment, with the node as the midpoint, and the length of the line segment is the length of the slice;

[0021] Connect the endpoints of the two line segments to obtain a sliced ​​wireframe;

[0022] Starting from one corner of the slice frame, back a set distance along the length and width of the slice to obtain a retaining rib that maintains the connection between the slice and the impedance initial test plate;

[0023] The two points after the retraction are used as the cutting point and lifting point of the gong cutter, respectively, to obtain the candidate slice trajectory line.

[0024] Optionally, determining whether the candidate slice trajectory line intersects with or is less than the diameter of the milling cutter with other pre-generated impedance lines includes:

[0025] Copy the slice trajectory lines of other impedance lines generated earlier in the slice layer to the touch layer;

[0026] The candidate slice trajectory line is subjected to a touch test with the slice trajectory lines of other impedance lines generated in the touch layer. The touch test is used to determine whether the candidate slice trajectory line intersects with the slice trajectory lines of other impedance lines generated in the touch layer or whether the distance is less than the diameter of the router.

[0027] When the candidate slice trajectory line touches any slice trajectory line of another impedance line generated earlier, the next segment is selected from the segment sequence as the target segment, and the process returns to the step of generating a candidate slice trajectory line that meets the preset requirements in the slice layer with the target segment as a reference, until the slice trajectory line of the target impedance line is obtained or all segments in the segment sequence are traversed.

[0028] When the candidate slice trajectory does not touch any of the slice trajectory of other impedance lines generated earlier, the candidate slice trajectory is copied to the touch layer as the slice trajectory of the target impedance line, and the next impedance line is taken as the target impedance line. Then, the process returns to the step of generating a slice trajectory that meets the preset requirements in the slice layer with the target impedance line as a reference, until all impedance lines of the first impedance test board have been traversed.

[0029] Optionally, adjusting the line width of the slicing trajectory line to be the same as the diameter of the milling cutter includes:

[0030] The channel conversion function in Genesis software is used to convert the slice layer into a router channel layer, so that the line width of the slice trajectory line is adjusted to be the same as the diameter of the router blade.

[0031] Optionally, determining the routing positioning holes from the drilled holes of the impedance initial test plate includes:

[0032] Determine the vertex of the first impedance test plate;

[0033] From the drill strip layer of the impedance test board, select the holes that are closest to the vertex and whose diameter meets the requirements of the drill strip positioning hole as candidate holes. The drill strip layer includes all the drill holes of the impedance test board.

[0034] A hole concentric with the candidate hole and with a smaller diameter is generated as a positioning hole for the screw belt.

[0035] Optionally, after packaging the slice trajectory line with the adjusted line width and the router tape positioning hole into a router tape, the method further includes:

[0036] Output a file reflecting the position of the slice trajectory line and the screw tape positioning hole on the impedance initial test plate;

[0037] Output the impedance information table corresponding to the slice trajectory line. The impedance information table includes the type of the impedance line, the signal layer in which it is located, the reference layer of the impedance line, the line width, the line spacing, the impedance value, and the impedance tolerance.

[0038] Secondly, the present invention also provides a router for generating impedance slices on a circuit board, comprising:

[0039] The impedance line reading module is used to read the target impedance line from the impedance file of the first impedance test board, wherein the target impedance line is one of the multiple impedance lines of the first impedance test board;

[0040] The trajectory drawing module is used to generate a slice trajectory line that meets preset requirements with the target impedance line as a reference. The slice trajectory line is used to define the stroke trajectory of the milling cutter.

[0041] The line width adjustment module is used to adjust the line width of the slicing trajectory line to be the same as the diameter of the slicing cutter;

[0042] The positioning hole determination module is used to determine the positioning holes of the router strip from the drill holes of the impedance first test plate;

[0043] The grooving generation module is used to package the slice trajectory line after the line width adjustment with the grooving positioning hole into a grooving.

[0044] Thirdly, the present invention also provides an electronic device, comprising:

[0045] One or more processors;

[0046] Storage device for storing one or more programs;

[0047] When the one or more programs are executed by the one or more processors, the one or more processors implement the method for generating router strips of circuit board impedance slices as provided in the first aspect of the present invention.

[0048] Fourthly, the present invention also provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the method for generating router strips for circuit board impedance slices as provided in the first aspect of the present invention.

[0049] The present invention provides a method for generating routing tape for impedance slicing on circuit boards. The method reads a target impedance line from the impedance file of the initial impedance test board. The target impedance line is one of multiple impedance lines on the initial impedance test board. Using the target impedance line as a reference, a slicing trajectory line conforming to preset requirements is generated. This slicing trajectory line defines the travel trajectory of the router. The line width of the slicing trajectory line is adjusted to be the same as the diameter of the router. Routing tape positioning holes are determined from the drilled holes of the initial impedance test board. The slicing trajectory line with adjusted line width and the router tape positioning holes are packaged together to form routing tape. This invention achieves automatic routing tape generation by reading the target impedance line from the impedance file, automatically generating a slicing trajectory line with the target impedance line as a reference, adjusting the line width of the slicing trajectory line to be the same as the diameter of the router, determining the router tape positioning holes from the drilled holes of the initial impedance test board, and packaging the slicing trajectory line with adjusted line width and the router tape positioning holes together to form routing tape. This improves routing tape generation efficiency, reduces costs, avoids routing tape errors caused by human factors, and improves routing tape accuracy.

[0050] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0051] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0052] Figure 1 A flowchart of a method for generating router strips for impedance slices on a circuit board provided by the present invention;

[0053] Figure 2 A schematic diagram of a candidate slice trajectory line provided by the present invention;

[0054] Figure 3 PDF diagrams of the slicing trajectory lines and the positioning holes of the gong belt provided for this invention;

[0055] Figure 4 Impedance information table diagram provided for this invention;

[0056] Figure 5 A schematic diagram of a circuit board impedance slicing ribbon generation device provided by the present invention;

[0057] Figure 6 This is a schematic diagram of the structure of an electronic device provided by the present invention.

[0058] The accompanying drawings illustrate specific embodiments of this application, which will be described in more detail below. These drawings and descriptions are not intended to limit the scope of the concept in any way, but rather to illustrate the concept of this application to those skilled in the art through reference to particular embodiments. Detailed Implementation

[0059] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0060] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0061] Figure 1 The flowchart illustrates a method for generating router strips of impedance slices on a circuit board, as provided by this invention. This embodiment is applicable to the automatic generation of router strips for impedance slices. The method can be executed by the circuit board impedance slice router strip generation device provided by this invention. This device can be implemented in software and / or hardware, and is typically configured in electronic devices, such as… Figure 1 As shown, the method for generating the router strip for the impedance slice of this circuit board includes the following steps:

[0062] S101. Read the target impedance line from the impedance file of the first impedance test board. The target impedance line is one of the multiple impedance lines of the first impedance test board.

[0063] In this embodiment of the invention, a target impedance line is read from the impedance file of the initial impedance test board. The target impedance line is one of multiple impedance lines on the initial impedance test board. The impedance file is a pre-generated file used to record the impedance information of each impedance line in the initial impedance test board. The impedance information may include the type of impedance line, the signal layer to which the impedance line belongs, the line width of the impedance line, the line spacing of the impedance line, the reference layer of the impedance line, the impedance value, and the impedance tolerance, etc., which are not limited herein. In this embodiment of the invention, the type of impedance line may include single-ended impedance lines and differential impedance lines.

[0064] For example, the impedance file can be a CSV file. Before preparing the impedance file, some information corresponding to the initial impedance test plate needs to be entered into the database. Then, Genesis software is used to retrieve the information corresponding to the initial impedance test plate from the database and generate the impedance file. The information entered into the database in advance includes ERP files and TGZ files. The ERP file contains the impedance information of each impedance line in the initial impedance test plate, and this impedance information needs to be written in a standardized manner. In particular, the design line width, design line spacing, and the layer to which they belong must completely correspond to the information in the TGZ file.

[0065] S102. Using the target impedance line as a reference, generate a slicing trajectory line that meets the preset requirements. The slicing trajectory line is used to define the travel trajectory of the router bit.

[0066] In this embodiment of the invention, a slice trajectory line conforming to preset requirements is generated using the target impedance line as a reference. The slice trajectory line is used to define the travel trajectory of the router bit. For example, the impedance line is usually a broken line formed by connecting multiple line segments. One segment of the impedance line can be selected as a reference to draw a slice trajectory line that meets the size requirements. The slice trajectory line is used to define the travel trajectory of the router bit, that is, the router bit is subsequently controlled to execute the router program according to the slice trajectory line to router impedance slices from the impedance test board.

[0067] In some embodiments of the present invention, the impedance line is typically a broken line formed by connecting multiple line segments, that is, the target impedance line includes multiple segments, and the above step S102 includes the following sub-steps:

[0068] S1021. Arrange the segments of the target impedance line in descending order of length to obtain the segment sequence.

[0069] In this embodiment of the invention, the length of each segment can be calculated by the coordinates of the two endpoints of each segment. Then, the segments of the target impedance line are arranged in descending order of length to obtain a segment sequence.

[0070] S1022. Select the segment with the longest length from the segmented sequence as the target segment.

[0071] The longest segment in the segmented sequence is selected as the target segment. After subsequent slicing, the slices are usually polished to expose the target segment for microscopic observation or compositional analysis of the target impedance lines. This invention prioritizes the longest segment as the target segment, facilitating slice polishing and subsequent microscopic observation or compositional analysis.

[0072] S1023. Using the target segment as a reference, generate candidate slice trajectory lines that meet the preset requirements on the slice layer.

[0073] In this embodiment of the invention, candidate slice trajectory lines that meet the size requirements are generated on the slice layer, with the target segment as a reference. For example, the candidate slice trajectory lines can be in the form of wireframes, where one set of opposite sides of the wireframe is parallel to the target segment, and the other set of opposite sides is perpendicular to the target segment, with the target segment located at the center of the wireframe. The slice layer is a layer in the Genesis software used to record the candidate slice trajectory lines.

[0074] Figure 2 This is a schematic diagram of a candidate slice trajectory line provided by the present invention, such as... Figure 2 As shown, exemplary, in some embodiments of the present invention, segmentation is based on a target ( Figure 2 Using the midpoint of the white highlighted line segment as a reference point, nodes are generated on both sides at a preset distance from the target segment. The preset distance is half the slice width. A line segment is drawn parallel to the target segment, with the node as the midpoint and the length of the line segment equal to the slice length. The endpoints of the two line segments are connected (the length of the connecting line is the slice width) to obtain the slice outline. Starting from one corner of the slice outline, a set distance (e.g., 0.5mm) is retracted along the length and width directions of the slice to obtain the rib that maintains the connection between the slice and the impedance initial test plate. The two retracted points are used as the down-cutting point and up-cutting point of the milling cutter, respectively, to obtain the candidate slice trajectory line. Figure 2 (The unclosed wireframe indicated by the middle arrow). The purpose of the retainer is to prevent the slice from completely separating from the impedance test plate after subsequent milling. Instead, the retainer maintains the connection. The retainer is usually small in size, strong enough to maintain the connection between the slice and the impedance test plate, but weak enough that the slice can be easily separated by hand or a simple fixture.

[0075] S1024. Determine whether the candidate slice trajectory line intersects with the slice trajectory lines of other impedance lines generated earlier, or whether the distance between them is less than the diameter of the auger.

[0076] In this embodiment of the invention, the slice trajectory lines of other impedance lines generated earlier can be pre-recorded. When a new candidate slice trajectory line is generated, it is determined whether the candidate slice trajectory line intersects with the slice trajectory lines of other impedance lines generated earlier or whether the distance is less than the diameter of the milling cutter.

[0077] In some embodiments of the present invention, the slice trajectory lines of other impedance lines generated earlier in the slice layer are copied to the touch layer. For example, each time a slice trajectory line of an impedance line is generated, the slice trajectory line is copied from the slice layer to the touch layer. When a new candidate slice trajectory line is generated, a touch test is performed between the candidate slice trajectory line and the slice trajectory lines of other impedance lines generated earlier in the touch layer. The touch test is used to determine whether the candidate slice trajectory line intersects with the slice trajectory lines of other impedance lines generated earlier or whether the distance is less than the diameter of the router bit.

[0078] S1025. If yes, select the next segment from the segment sequence as the target segment, and return to execute the step of generating a candidate slice trajectory line that meets the preset requirements in the slice layer with the target segment as a reference, until the slice trajectory line of the target impedance line is obtained or all segments in the segment sequence are traversed.

[0079] If the currently generated candidate slice trajectory line intersects with or is less than the diameter of the slicing cutter of other impedance lines generated earlier in the touch layer, it means that if the candidate slice trajectory line is used as the slice trajectory line of the target impedance line, it will cause other slices to be destroyed when the target impedance line is sliced ​​in the future. Therefore, it is necessary to select the next segment as the target segment from the segment sequence and return to execute the step of generating a candidate slice trajectory line that meets the preset requirements in the slice layer with the target segment as a reference, until the slice trajectory line of the target impedance line is obtained or all segments in the segment sequence are traversed.

[0080] S1026. If not, then use the candidate slice trajectory line as the slice trajectory line of the target impedance line, and use the next impedance line as the target impedance line, and return to execute the step of generating a slice trajectory line that meets the preset requirements in the slice layer with the target impedance line as a reference, until all impedance lines of the first impedance test board have been traversed.

[0081] If the currently generated candidate slice trajectory does not intersect with the slice trajectory of other impedance lines generated earlier in the touch layer, or the distance is less than the diameter of the router blade, it means that if the candidate slice trajectory is used as the slice trajectory of the target impedance line, the subsequent slicing of the target impedance line will not destroy other slices. Therefore, the candidate slice trajectory is copied to the touch layer as the slice trajectory of the target impedance line, and the next impedance line is used as the target impedance line. Then, the process returns to the step of generating a slice trajectory that meets the preset requirements in the slice layer with the target impedance line as a reference, until all impedance lines of the first impedance test board have been traversed.

[0082] S103. Adjust the line width of the slicing trajectory line to be the same as the diameter of the slicing cutter.

[0083] In this embodiment of the invention, the line width of the slicing trajectory line is adjusted to be the same as the diameter of the milling cutter to ensure the accuracy of the processing path and avoid overcutting.

[0084] For example, in some embodiments of the present invention, the channel conversion function in Genesis software can be invoked to convert the slice layer into a router channel layer, so that the line width of the slice trajectory line is adjusted to be the same as the diameter of the router blade.

[0085] S104. Determine the positioning holes for the router belt from the drill holes in the first impedance test plate.

[0086] In this embodiment of the invention, routing positioning holes are determined from the drilled holes of the impedance initial test board. These routing positioning holes are used to fix the impedance initial test board during the routing process, preventing misalignment that could lead to slicing failure. The drilled holes may include plated holes and unplated holes. Plated holes are mainly used to achieve electrical connections between different circuit layers, while unplated holes are used to mount components or to provide alignment and spacing between layers.

[0087] In some embodiments of the present invention, step S104 above may include the following sub-steps:

[0088] 1. Determine the vertex of the first impedance test plate.

[0089] For example, Genesis software can be used to read the profile information of the first impedance test plate to obtain the vertices of the first impedance test plate. The profile information of the first impedance test plate records the physical properties of the first impedance test plate, including size, vertex position, material, etc.

[0090] 2. Select the holes closest to the vertex and whose diameter meets the requirements of the positioning hole of the drill tape from the drill tape layer of the impedance test board as candidate holes. The drill tape layer includes all the drill holes of the impedance test board.

[0091] The drill tape refers to the CNC program used to control the drilling machine to perform drilling. It records information about various holes on the impedance initial test board, such as electroplated holes, non-electroplated holes, hole diameter, and hole position. The drill tape layer refers to the layer in Genesis software used to record the above hole information and graphics. In this embodiment of the invention, holes closest to the vertex and with a diameter that meets the requirements for drill tape positioning holes (e.g., between 2mm and 6mm) are selected as candidate holes from the drill tape layer of the impedance initial test board. For example, typically, 2-4 drill tape positioning holes are needed to achieve stable positioning. Therefore, in this embodiment of the invention, it is not necessary to limit the selection of a corresponding candidate hole for each vertex.

[0092] 3. Generate holes that are concentric with the candidate holes and have a smaller diameter than the candidate holes as positioning holes for the screw belt.

[0093] In this embodiment of the invention, a hole concentric with the candidate hole and with a smaller diameter is generated as a router positioning hole. This positioning hole is used to insert a positioning pin during subsequent router programming to fix the initial impedance test board. The diameter of the positioning pin is typically equal to or slightly larger than the diameter of the router positioning hole (interference fit). If the candidate hole is directly used as the router positioning hole, the positioning pin may not be able to be removed after the router programming is completed. Therefore, in this embodiment of the invention, the diameter of the router positioning hole is smaller than the diameter of the candidate hole, and the diameter of the positioning pin is equal to or slightly larger than the diameter of the router positioning hole (interference fit) to facilitate the removal of the positioning pin.

[0094] S105. Pack the slice trajectory line after line width adjustment with the router positioning hole into a router.

[0095] In this embodiment of the invention, the slice trajectory line with adjusted linewidth and the router tape positioning holes are packaged into a router tape. For example, using the router tape generation function of Genesis software, the slice trajectory line with adjusted linewidth and the router tape positioning holes are combined into a new layer, and the slice trajectory line with adjusted linewidth and the router tape positioning holes are encoded together into a router tape.

[0096] In some embodiments of the present invention, after packaging the slice trajectory line with the line width adjustment and the router tape positioning hole into a router tape, the method further includes:

[0097] 1. Output a file reflecting the position of the slice trajectory line and the positioning hole of the router on the impedance test plate.

[0098] Figure 3 The PDF image shows the slicing trajectory line and the positioning hole of the grommets provided for this invention. Figure 4 The impedance information table provided by this invention is as follows: Figure 3 As shown, in this embodiment of the invention, after combining the slice trajectory line with the router positioning hole after the line width adjustment into a new layer, the layer is saved as a file reflecting the position of the slice trajectory line and the router positioning hole on the impedance first test plate, for example, a PDF file, for easy viewing by engineers. Each slice trajectory line has its unique number. Figure 3 The polygonal shape enclosed by the polygons is the shape of the first impedance test plate. The unclosed wireframe with the number is the slice trajectory line. The three circles near the vertex of the first impedance test plate are the positioning holes for the router.

[0099] 2. Output the impedance information table corresponding to the slice trajectory line. The impedance information table includes the type of impedance line, the signal layer in which it is located, the reference layer of the impedance line, the line width, the line spacing, the impedance value, and the impedance tolerance.

[0100] like Figure 4As shown in this embodiment of the invention, after generating the gong tape, the impedance information corresponding to each slice trajectory line is output. The impedance information includes the type of impedance line, the signal layer in which it is located, the reference layer of the impedance line, the line width, the line spacing, the impedance value, and the impedance tolerance. In this way, an impedance information table is formed, which is convenient for engineers to view. Figure 3 In this text, the units for line width and line spacing are millimeters, and the units for impedance values ​​and tolerances are ohms.

[0101] The present invention provides a method for generating routing tape for impedance slicing on circuit boards. The method reads a target impedance line from the impedance file of the initial impedance test board. The target impedance line is one of multiple impedance lines on the initial impedance test board. Using the target impedance line as a reference, a slicing trajectory line conforming to preset requirements is generated. This slicing trajectory line defines the travel trajectory of the router. The line width of the slicing trajectory line is adjusted to be the same as the diameter of the router. Routing tape positioning holes are determined from the drilled holes of the initial impedance test board. The slicing trajectory line with adjusted line width and the router tape positioning holes are packaged together to form routing tape. This invention achieves automatic routing tape generation by reading the target impedance line from the impedance file, automatically generating a slicing trajectory line with the target impedance line as a reference, adjusting the line width of the slicing trajectory line to be the same as the diameter of the router, determining the router tape positioning holes from the drilled holes of the initial impedance test board, and packaging the slicing trajectory line with adjusted line width and the router tape positioning holes together to form routing tape. This improves routing tape generation efficiency, reduces costs, avoids routing tape errors caused by human factors, and improves routing tape accuracy.

[0102] Figure 5 A schematic diagram of a circuit board impedance slicing and ribbon generation device provided by the present invention is shown below. Figure 5 As shown, the circuit board impedance slicing ribbon generation device includes:

[0103] Impedance line reading module 201 is used to read the target impedance line from the impedance file of the first impedance test board, wherein the target impedance line is one of the multiple impedance lines of the first impedance test board;

[0104] The trajectory drawing module 202 is used to generate a slice trajectory line that meets preset requirements with the target impedance line as a reference. The slice trajectory line is used to define the stroke trajectory of the milling cutter.

[0105] The line width adjustment module 203 is used to adjust the line width of the slicing trajectory line to be the same as the diameter of the slicing cutter;

[0106] The positioning hole determination module 204 is used to determine the positioning hole of the screw tape from the drilled holes of the impedance first test plate;

[0107] The grooving generation module 205 is used to package the slice trajectory line after the line width adjustment with the grooving positioning hole into a grooving.

[0108] In some embodiments of the present invention, the target impedance line includes multiple segments, and the trajectory drawing module 202 includes:

[0109] The sorting submodule is used to arrange the segments of the target impedance line in descending order of length to obtain a segment sequence;

[0110] The target segment determination submodule is used to select the segment with the longest length from the segment sequence as the target segment;

[0111] The candidate trajectory line generation submodule is used to generate candidate slice trajectory lines that meet preset requirements in the slice layer with the target segment as a reference.

[0112] The judgment submodule is used to determine whether the candidate slice trajectory line intersects with the slice trajectory lines of other impedance lines generated in advance or whether the distance is less than the diameter of the auger.

[0113] The first return execution submodule is used to select the next segment as the target segment from the segment sequence when the candidate slice trajectory line intersects with the slice trajectory lines of other impedance lines generated in advance or the distance is less than the diameter of the auger, and return to execute the step of generating a candidate slice trajectory line that meets the preset requirements in the slice layer with the target segment as a reference, until the slice trajectory line of the target impedance line is obtained or all segments in the segment sequence are traversed.

[0114] The second return execution submodule is used to take the candidate slice trajectory line as the slice trajectory line of the target impedance line when the candidate slice trajectory line does not intersect with the slice trajectory lines of other impedance lines generated in advance or the distance is less than the diameter of the router. Then, the next impedance line is taken as the target impedance line, and the execution returns to the step of generating a slice trajectory line that meets the preset requirements in the slice layer with the target impedance line as a reference, until all impedance lines of the first impedance test board have been traversed.

[0115] In some embodiments of the present invention, the candidate trajectory line generation submodule includes:

[0116] A node generation unit is used to generate nodes on both sides of the target segment at a preset distance from the midpoint of the target segment, with the midpoint of the target segment as a reference point, and the preset distance is half the width of the slice.

[0117] The first drawing unit is used to draw line segments along the direction parallel to the target segment, wherein the line segment has the node as its midpoint and the length of the line segment is the length of the slice;

[0118] The second drawing unit is used to connect the endpoints of the two line segments to obtain a sliced ​​wireframe;

[0119] The retraction unit is used to retract a set distance along the length and width directions of the slice, starting from one corner of the slice frame, to obtain a retaining rib that maintains the connection between the slice and the impedance initial test plate.

[0120] The candidate trajectory line determination unit is used to take the two points after the retraction as the cutting point and lifting point of the gong cutter, respectively, to obtain the candidate slice trajectory line.

[0121] In some embodiments of the present invention, the determination submodule includes:

[0122] The trajectory line copying unit is used to copy the slice trajectory lines of other impedance lines generated earlier in the slice layer to the touch layer;

[0123] The touch test unit is used to perform a touch test on the candidate slice trajectory line and the slice trajectory line of other impedance lines generated in the touch layer. The touch test is used to determine whether the candidate slice trajectory line intersects with the slice trajectory line of other impedance lines generated in the touch layer or whether the distance is less than the diameter of the router.

[0124] The first return execution unit is used to select the next segment from the segment sequence as the target segment when the candidate slice trajectory line touches the slice trajectory line of any other impedance line generated in advance, and return to execute the step of generating a candidate slice trajectory line that meets the preset requirements in the slice layer with the target segment as a reference, until the slice trajectory line of the target impedance line is obtained or all segments in the segment sequence are traversed.

[0125] The second return execution unit is used to copy the candidate slice trajectory line as the slice trajectory line of the target impedance line to the touch layer when the candidate slice trajectory line does not touch any other slice trajectory line of the impedance line generated in advance, and to return to execute the step of generating a slice trajectory line that meets the preset requirements in the slice layer with the target impedance line as a reference, until all impedance lines of the impedance first test board have been traversed.

[0126] In some embodiments of the present invention, the line width adjustment module 203 includes:

[0127] The channel conversion submodule is used to call the channel conversion function in Genesis software to convert the slice layer into a router channel layer, so that the line width of the slice trajectory line is adjusted to be the same as the diameter of the router.

[0128] In some embodiments of the present invention, the positioning hole determining module 204 includes:

[0129] The vertex determination submodule is used to determine the vertices of the impedance initial test plate;

[0130] The candidate hole determination submodule is used to select the holes that are closest to the vertex and whose diameter meets the requirements of the screw tape positioning hole from the drill strip layer of the impedance first test board as candidate holes. The drill strip layer includes all the drill holes of the impedance first test board.

[0131] The positioning hole generation submodule is used to generate holes that are concentric with the candidate holes and have a smaller diameter than the candidate holes as positioning holes for the grommets.

[0132] In some embodiments of the present invention, the circuit board impedance slice routing apparatus further includes:

[0133] The file output module is used to output a file reflecting the position of the slice trajectory line and the router positioning hole on the impedance first test plate after packaging the slice trajectory line with the line width adjustment and the router positioning hole into a router.

[0134] The information table output module is used to output the impedance information table corresponding to the slice trajectory line. The impedance information table includes the type of the impedance line, the signal layer in which it is located, the reference layer of the impedance line, the line width, the line spacing, the impedance value, and the impedance tolerance.

[0135] The aforementioned circuit board impedance slice routing device can execute the circuit board impedance slice routing method provided in the foregoing embodiments of the present invention, and has the corresponding functional modules and beneficial effects of executing the circuit board impedance slice routing method.

[0136] Figure 6 This is a schematic diagram of an electronic device provided by the present invention. The electronic device is intended to represent various forms of digital computers, such as laptop computers, desktop computers, workstations, personal digital assistants, servers, blade servers, mainframe computers, and other suitable computers. The electronic device can also represent various forms of mobile devices, such as personal digital processors, cellular phones, smartphones, wearable devices (such as helmets, glasses, watches, etc.), and other similar computing devices. The components shown herein, their connections and relationships, and their functions are merely illustrative and are not intended to limit the implementation of the invention described and / or claimed herein.

[0137] like Figure 6As shown, the electronic device includes at least one processor 11 and a memory, such as a read-only memory (ROM) 12 or a random access memory (RAM) 13, communicatively connected to the at least one processor 11. The memory stores computer programs executable by the at least one processor. The processor 11 can perform various appropriate actions and processes based on the computer programs stored in the ROM 12 or loaded from storage unit 18 into the RAM 13. The RAM 13 can also store various programs and data required for the operation of the electronic device. The processor 11, ROM 12, and RAM 13 are interconnected via a bus 14. An input / output (I / O) interface 15 is also connected to the bus 14.

[0138] Multiple components in the electronic device are connected to the I / O interface 15, including: an input unit 16, such as a keyboard, mouse, etc.; an output unit 17, such as various types of displays, speakers, etc.; a storage unit 18, such as a disk, optical disk, etc.; and a communication unit 19, such as a network card, modem, wireless transceiver, etc. The communication unit 19 allows the electronic device to exchange information / data with other devices through computer networks such as the Internet and / or various telecommunications networks.

[0139] Processor 11 can be a variety of general-purpose and / or special-purpose processing components with processing and computing capabilities. Some examples of processor 11 include, but are not limited to, a central processing unit (CPU), a graphics processing unit (GPU), various special-purpose artificial intelligence (AI) computing chips, various processors running machine learning model algorithms, a digital signal processor (DSP), and any suitable processor, controller, microcontroller, etc. Processor 11 performs the various methods and processes described above, such as the method for generating router tape for circuit board impedance slicing.

[0140] In some embodiments, the method for generating the circuit board impedance slice routing strip can be implemented as a computer program tangibly contained in a computer-readable storage medium, such as storage unit 18. In some embodiments, part or all of the computer program can be loaded and / or installed on an electronic device via ROM 12 and / or communication unit 19. When the computer program is loaded into RAM 13 and executed by processor 11, one or more steps of the circuit board impedance slice routing strip generation method described above can be performed. Alternatively, in other embodiments, processor 11 can be configured to perform the circuit board impedance slice routing strip generation method by any other suitable means (e.g., by means of firmware).

[0141] Various embodiments of the systems and techniques described above herein can be implemented in digital electronic circuit systems, integrated circuit systems, field-programmable gate arrays (FPGAs), application-specific integrated circuits (ASICs), application-specific standard products (ASSPs), systems-on-a-chip (SoCs), payload-programmable logic devices (CPLDs), computer hardware, firmware, software, and / or combinations thereof. These various embodiments may include implementations in one or more computer programs that can be executed and / or interpreted on a programmable system including at least one programmable processor, which may be a dedicated or general-purpose programmable processor, capable of receiving data and instructions from a storage system, at least one input device, and at least one output device, and transmitting data and instructions to the storage system, the at least one input device, and the at least one output device.

[0142] Computer programs used to implement the methods of the present invention may be written in any combination of one or more programming languages. These computer programs may be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, such that when executed by the processor, the computer programs cause the functions / operations specified in the flowcharts and / or block diagrams to be performed. The computer programs may be executed entirely on a machine, partially on a machine, or as a standalone software package, partially on a machine and partially on a remote machine, or entirely on a remote machine or server.

[0143] In the context of this invention, a computer-readable storage medium can be a tangible medium that may contain or store a computer program for use by or in conjunction with an instruction execution system, apparatus, or device. A computer-readable storage medium may include, but is not limited to, electronic, magnetic, optical, electromagnetic, infrared, or semiconductor systems, apparatus, or devices, or any suitable combination thereof. Alternatively, a computer-readable storage medium may be a machine-readable signal medium. More specific examples of machine-readable storage media include electrical connections based on one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fibers, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof.

[0144] To provide interaction with a user, the systems and techniques described herein can be implemented on an electronic device having: a display device (e.g., a CRT (cathode ray tube) or LCD (liquid crystal display) monitor) for displaying information to the user; and a keyboard and pointing device (e.g., a mouse or trackball) through which the user provides input to the electronic device. Other types of devices can also be used to provide interaction with the user; for example, feedback provided to the user can be any form of sensory feedback (e.g., visual feedback, auditory feedback, or tactile feedback); and input from the user can be received in any form (including sound input, voice input, or tactile input).

[0145] The systems and technologies described herein can be implemented in computing systems that include backend components (e.g., as data servers), or middleware components (e.g., application servers), or frontend components (e.g., user computers with graphical user interfaces or web browsers through which users can interact with implementations of the systems and technologies described herein), or any combination of such backend, middleware, or frontend components. The components of the system can be interconnected via digital data communication of any form or medium (e.g., communication networks). Examples of communication networks include local area networks (LANs), wide area networks (WANs), blockchain networks, and the Internet.

[0146] A computing system can include clients and servers. Clients and servers are generally located far apart and typically interact through communication networks. The client-server relationship is created by computer programs running on the respective computers and having a client-server relationship with each other. The server can be a cloud server, also known as a cloud computing server or cloud host, which is a hosting product within the cloud computing service system to address the shortcomings of traditional physical hosts and VPS services, such as high management difficulty and weak business scalability.

[0147] This invention also provides a computer program product, including a computer program that, when executed by a processor, implements the method for generating router strips for circuit board impedance slices as provided in any embodiment of this application.

[0148] In implementing the computer program product, computer program code for performing the operations of this invention can be written in one or more programming languages ​​or a combination thereof. Programming languages ​​include object-oriented programming languages ​​such as Java, Smalltalk, and C++, as well as conventional procedural programming languages ​​such as C or similar languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving remote computers, the remote computer can be connected to the user's computer via any type of network—including a local area network (LAN) or a wide area network (WAN)—or can be connected to an external computer (e.g., via the Internet using an Internet service provider).

[0149] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.

[0150] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Those skilled in the art should understand that various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A method for generating routing tape for impedance slicing on a circuit board, characterized in that, include: Read the target impedance line from the impedance file of the first impedance test board. The target impedance line is one of the multiple impedance lines of the first impedance test board. Using the target impedance line as a reference, a slice trajectory line that meets the preset requirements is generated. The slice trajectory line is used to define the stroke trajectory of the milling cutter. Adjust the line width of the slicing trajectory line to be the same as the diameter of the auger; Determine the positioning holes for the screw belt from the drill holes in the first impedance test plate; The slice trajectory line with the adjusted line width is packaged with the positioning hole of the gong tape to form a gong tape.

2. The method for generating the routing tape for circuit board impedance slicing according to claim 1, characterized in that, The target impedance line comprises multiple segments. Using the target impedance line as a reference, a slice trajectory line conforming to preset requirements is generated, including: Arrange the segments of the target impedance line in descending order of length to obtain a segment sequence; Select the segment with the longest length from the segmented sequence as the target segment; Using the target segment as a reference, candidate slice trajectory lines that meet preset requirements are generated in the slice layer; Determine whether the candidate slice trajectory line intersects with the slice trajectory lines of other impedance lines generated earlier, or whether the distance between them is less than the diameter of the milling cutter; If so, select the next segment from the segment sequence as the target segment, and return to execute the step of generating a candidate slice trajectory line that meets the preset requirements in the slice layer with the target segment as a reference, until the slice trajectory line of the target impedance line is obtained or all segments in the segment sequence are traversed. If not, the candidate slice trajectory line is used as the slice trajectory line of the target impedance line, and the next impedance line is used as the target impedance line. Then, the process returns to the step of generating a slice trajectory line that meets the preset requirements in the slice layer with the target impedance line as a reference, until all impedance lines of the first impedance test board have been traversed.

3. The method for generating the routing tape for circuit board impedance slicing according to claim 2, characterized in that, Using the target segment as a reference, candidate slice trajectory lines that meet preset requirements are generated, including: Using the midpoint of the target segment as a reference point, nodes are generated on both sides at a preset distance from the target segment, where the preset distance is half the slice width; Draw a line segment parallel to the target segment, with the node as the midpoint, and the length of the line segment is the length of the slice; Connect the endpoints of the two line segments to obtain a sliced ​​wireframe; Starting from one corner of the slice frame, back a set distance along the length and width of the slice to obtain a retaining rib that maintains the connection between the slice and the impedance initial test plate; The two points after the retraction are used as the cutting point and lifting point of the gong cutter, respectively, to obtain the candidate slice trajectory line.

4. The method for generating the routing tape for circuit board impedance slicing according to claim 2, characterized in that, Determining whether the candidate slice trajectory line intersects with or is less than the diameter of the milling cutter with other pre-generated impedance lines includes: Copy the slice trajectory lines of other impedance lines generated earlier in the slice layer to the touch layer; The candidate slice trajectory line is subjected to a touch test with the slice trajectory lines of other impedance lines generated in the touch layer. The touch test is used to determine whether the candidate slice trajectory line intersects with the slice trajectory lines of other impedance lines generated in the touch layer or whether the distance is less than the diameter of the router. When the candidate slice trajectory line touches any slice trajectory line of another impedance line generated earlier, the next segment is selected from the segment sequence as the target segment, and the process returns to the step of generating a candidate slice trajectory line that meets the preset requirements in the slice layer with the target segment as a reference, until the slice trajectory line of the target impedance line is obtained or all segments in the segment sequence are traversed. When the candidate slice trajectory does not touch any of the slice trajectory of other impedance lines generated earlier, the candidate slice trajectory is copied to the touch layer as the slice trajectory of the target impedance line, and the next impedance line is taken as the target impedance line. Then, the process returns to the step of generating a slice trajectory that meets the preset requirements in the slice layer with the target impedance line as a reference, until all impedance lines of the first impedance test board have been traversed.

5. The method for generating the routing tape of a circuit board impedance slice according to any one of claims 1-4, characterized in that, Adjusting the line width of the slicing trajectory line to be the same as the diameter of the milling cutter includes: The channel conversion function in Genesis software is used to convert the slice layer into a router channel layer, so that the line width of the slice trajectory line is adjusted to be the same as the diameter of the router blade.

6. The method for generating the router strip for circuit board impedance slicing according to any one of claims 1-4, characterized in that, Determining the routing hole from the drilled holes of the impedance initial test plate includes: Determine the vertex of the first impedance test plate; From the drill strip layer of the impedance test board, select the holes that are closest to the vertex and whose diameter meets the requirements of the drill strip positioning hole as candidate holes. The drill strip layer includes all the drill holes of the impedance test board. A hole concentric with the candidate hole and with a smaller diameter is generated as a positioning hole for the screw belt.

7. The method for generating the routing tape of a circuit board impedance slice according to any one of claims 1-4, characterized in that, After packaging the slice trajectory line with the adjusted line width and the router tape positioning hole into a router tape, the process also includes: Output a file reflecting the position of the slice trajectory line and the screw tape positioning hole on the impedance initial test plate; Output the impedance information table corresponding to the slice trajectory line. The impedance information table includes the type of the impedance line, the signal layer in which it is located, the reference layer of the impedance line, the line width, the line spacing, the impedance value, and the impedance tolerance.

8. A device for generating routing tape for impedance slicing of circuit boards, characterized in that, include: The impedance line reading module is used to read the target impedance line from the impedance file of the first impedance test board, wherein the target impedance line is one of the multiple impedance lines of the first impedance test board; The trajectory drawing module is used to generate a slice trajectory line that meets preset requirements with the target impedance line as a reference. The slice trajectory line is used to define the stroke trajectory of the milling cutter. The line width adjustment module is used to adjust the line width of the slicing trajectory line to be the same as the diameter of the slicing cutter; The positioning hole determination module is used to determine the positioning holes of the router strip from the drill holes of the impedance first test plate; The grooving generation module is used to package the slice trajectory line after the line width adjustment with the grooving positioning hole into a grooving.

9. An electronic device, characterized in that, include: One or more processors; Storage device for storing one or more programs; When the one or more programs are executed by the one or more processors, the one or more processors implement the method for generating the circuit board impedance slice as described in any one of claims 1-7.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When executed by the processor, the program implements the method for generating the circuit board impedance slice as described in any one of claims 1-7.