Signal measurement data processing method, system and device

By obtaining the edge precision measurement time and sampling clock period in IC chip testing and filtering out resampled edges, the signal resampling problem in high-frequency signal measurement is solved, and more accurate signal measurement is achieved.

CN122017538AActive Publication Date: 2026-05-12HANGZHOU CHANGCHUAN TECH CO LTD
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
HANGZHOU CHANGCHUAN TECH CO LTD
Filing Date
2026-04-10
Publication Date
2026-05-12

AI Technical Summary

Technical Problem

In IC chip testing, there is a problem of signal resampling during high-frequency signal measurement, which leads to inaccurate measurements.

Method used

By acquiring the raw measurement data, the precise measurement time and sampling clock period of the edge are determined, and the resampled edge is filtered to obtain the target edge, thus preventing signal resampling.

Benefits of technology

It improves the accuracy of signal measurement, prevents signal resampling and missed sampling, and ensures the integrity of measurement data.

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Abstract

The invention relates to a signal measurement data processing method, system and device. The method comprises the following steps: acquiring original measurement data; obtaining the accurate measurement time of each edge based on each piece of original measurement data; determining a re-sampling edge based on the accurate measurement time of each edge and the sampling clock period; and / or determining a re-sampling edge based on the accurate measurement time of each edge, the sampling clock period and the carry chain length error; and filtering the re-mining edge from the edges to obtain a target edge. By adopting the method, signal resampling can be prevented, and the accuracy of the measurement data of the to-be-measured signal is ensured.
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Description

Technical Field

[0001] This application relates to the field of semiconductor technology, and in particular to a signal measurement data processing method, system, and apparatus. Background Technology

[0002] In the IC (chip testing) industry, the main purpose of the Time Measurement Unit (TMU) is to measure the timing information (cycle, frequency, high and low level time, rise and fall time, delay, jitter, etc.) of the input signals (i.e., the signals under test of the chip) of the test board.

[0003] In traditional techniques, when measuring high-frequency signals under test, the carry chain length is often longer than the sampling clock period. This requires recording the states of all 784 taps in the carry chain for each cycle. This can lead to a problem where, for example, if an edge of the signal under test is sampled at the end of the carry chain in the previous cycle, it will also be sampled at the beginning of the carry chain in the next cycle. The FPGA will treat the two sampling results as two edges of the signal under test, but in reality, it is a single edge, which means that signal resampling has occurred.

[0004] For example, the ClkPeriod sampling clock period is 2.5ns. When the number of ClkNum sampling clock periods is 1, there is an edge that falls on Tap700. When the number of ClkNum sampling clock periods is 2, the above edge will flow to the position around Tap50. These two edges are actually one edge, that is, signal resampling has occurred. Summary of the Invention

[0005] Therefore, it is necessary to provide a signal measurement data processing method, system, and apparatus that can prevent signal resampling in response to the above-mentioned technical problems.

[0006] In a first aspect, this application provides a signal measurement data processing method, including:

[0007] Obtain raw measurement data;

[0008] Based on the original measurement data, the precise measurement time of each edge is obtained;

[0009] The resampled edge is determined based on the precision measurement time of each edge and the sampling clock period; and / or the resampled edge is determined based on the precision measurement time of each edge, the sampling clock period, and the carry chain length error.

[0010] The target edge is obtained by filtering the resampled edges from each of the edges.

[0011] In one embodiment, determining the resampling edge based on the precision measurement time of each edge and the sampling clock period includes:

[0012] If the measurement time of the edge is greater than the sampling clock period, the edge is determined to be a resampled edge.

[0013] In one embodiment, determining the resampling edge based on the precision measurement time of each edge, the sampling clock period, and the carry chain length error includes:

[0014] Determine the difference between the precise measurement time of the edge and the sampling clock period;

[0015] If the difference is greater than the carry chain length error, the edge is determined to be a re-sampling edge.

[0016] In one embodiment, the method further includes:

[0017] Determine the length of the carry chain, and determine the imbalance error segmentation point based on the length of the carry chain;

[0018] Based on the unbalanced error segmentation points, the positions of the first carry chain and the second carry chain are obtained;

[0019] The carry chain length error is obtained based on the measured values ​​of the first carry chain position and the second carry chain position.

[0020] In one embodiment, determining the resampled edge based on the precision measurement time of each edge and the sampling clock period; and determining the resampled edge based on the precision measurement time of each edge, the sampling clock period, and the carry chain length error includes:

[0021] The edges to be resampled and confirmed are determined based on the precision measurement time of each edge and the sampling clock cycle.

[0022] The resampling edge is determined based on the precision measurement time of each of the edges to be confirmed and resampled, the sampling clock period, and the carry chain length error.

[0023] In one embodiment, the method further includes:

[0024] The edge time is determined based on the sampling clock period, the fine measurement time corresponding to the fine measurement value of each edge, and the coarse measurement value of each edge.

[0025] In one embodiment, determining the edge time based on the sampling clock period, the fine measurement time corresponding to the fine measurement value of each edge, and the coarse measurement value of each edge includes:

[0026] The initial edge time is determined based on the coarse measurement value and the sampling clock period;

[0027] The edge time is obtained based on the initial edge time and the precision measurement time.

[0028] In one embodiment, after filtering the resampled edges from each of the edges to obtain the target edge, the process includes:

[0029] The bubble edge is determined based on the coarse measurement values ​​of two adjacent target edges and the edge time of the target edges;

[0030] The effective edge is obtained by filtering the bubble edge from the target edge.

[0031] In one embodiment, determining the bubble edge based on the coarse measurement values ​​of two adjacent target edges and the edge time of the target edge includes:

[0032] If the difference between the coarse measurement values ​​of two adjacent target edges is 1, and the difference between the target edge times of two adjacent target edges is less than the period threshold, the latter of the two adjacent target edges is taken as the bubble edge; the period threshold is half of the period of the signal to be measured.

[0033] In one embodiment, prior to acquiring the raw measurement data, the process includes:

[0034] Obtain sampling configuration information, which includes sampling clock period and frequency of the signal under test, and the frequency of the signal under test is used to determine whether it is a high-frequency mode;

[0035] In high-frequency mode, the raw data of the carry chain is acquired once every sampling clock cycle, and the coarse measurement value is determined based on the number of sampling clock cycles.

[0036] Edge detection is performed on the original data to obtain the fine measurement value, and the coarse measurement value and the fine measurement value are used as the original measurement data.

[0037] In one embodiment, the step of performing edge detection on the original data to obtain a precise measurement value includes:

[0038] High-low level transition points are detected in the raw data;

[0039] When there is a continuous preset number of raw data that change from low level to high level or from high level to low level, the precision measurement value is determined based on the position where the data changes from low level to high level or from high level to low level.

[0040] In one embodiment, obtaining the precise measurement time of each edge based on the original measurement data includes:

[0041] Based on the precise measurement value of the edge, the precise measurement time corresponding to the precise measurement value is obtained by looking up the table.

[0042] Secondly, this application also provides a time measurement system, the time measurement system comprising:

[0043] An FPGA is used to acquire sampling configuration information, which includes a sampling clock cycle and the frequency of the signal under test. The frequency of the signal under test is used to determine whether it is a high-frequency mode. In the case of high-frequency mode, the raw data of the carry chain is acquired once every sampling clock cycle, and a coarse measurement value is determined based on the number of sampling clock cycles. Edge detection is performed on the raw data to obtain a fine measurement value. The coarse measurement value and the fine measurement value are used as the raw measurement data.

[0044] A driver is used to execute the signal measurement data processing method described in any of the above embodiments.

[0045] Thirdly, this application also provides a signal measurement data processing apparatus, comprising:

[0046] The measurement data acquisition module is used to acquire raw measurement data;

[0047] The precision measurement time determination module is used to obtain the precision measurement time of each edge based on the original measurement data.

[0048] The resampling edge determination module is used to determine the resampling edge based on the precision measurement time and sampling clock period of each edge; and / or to determine the resampling edge based on the precision measurement time of each edge, the sampling clock period, and the carry chain length error.

[0049] A filtering module is used to filter the resampled edges from each of the edges to obtain the target edge.

[0050] The above-described signal measurement data processing method, system, and apparatus acquire raw measurement data; based on the raw measurement data, obtain the precision measurement time of each edge; determine the resampled edge based on the precision measurement time of each edge and the sampling clock cycle; and / or determine the resampled edge based on the precision measurement time of each edge, the sampling clock cycle, and the carry chain length error; filter the resampled edges from each edge to obtain the target edge. In this way, by identifying the resampled edges and filtering them, the accuracy of the measurement data is ensured. Attached Figure Description

[0051] To more clearly illustrate the technical solutions in the embodiments of this application or related technologies, the drawings used in the description of the embodiments of this application or related technologies will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0052] Figure 1 This is a schematic diagram of a time measurement system in one embodiment;

[0053] Figure 2 This is a flowchart illustrating a signal measurement data processing method in one embodiment;

[0054] Figure 3 This is a flowchart illustrating a signal measurement data processing method in another embodiment;

[0055] Figure 4 This is an internal structural diagram of a computer device in one embodiment. Detailed Implementation

[0056] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0057] It should be noted that the terms "first," "second," etc., used in this application can be used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish the first element from the second element. The terms "comprising" and "having," and any variations thereof, used in this application, are intended to cover non-exclusive inclusion. The term "multiple" used in this application refers to two or more. The term "and / or" used in this application refers to one of the embodiments, or any combination of multiple embodiments.

[0058] The application scenarios of the signal measurement data processing method provided in this application embodiment are as follows: Figure 1 The time measurement system shown may include an API layer, an FPGA, and a driver.

[0059] The TMU's API layer 130 can send TMU parameter configurations to the driver 110. The driver 110 includes a parameter receiving module 115 and a parameter configuration module 116. The parameter receiving module 115 receives and caches the configuration parameters sent by the API layer 130, including parameters such as the test signal frequency (DataRate). The test signal frequency (DataRate) is used to determine whether it is a high-frequency mode. The parameter configuration module 116 sends the received configuration parameters (i.e., the test signal frequency (DataRate)) and the sampling clock period to the FPGA and triggers the FPGA's TMU to acquire the test signal.

[0060] FPGA120 includes a TMU signal acquisition module 121, an edge detection module 122, and a RAM management module 123. The TMU signal acquisition module 121 is used to acquire the raw data (01 combination) output by the carry chain once every sampling clock cycle after receiving the start measurement command in high frequency mode, that is, the real-time state of the waveform of the signal under test in the carry chain, and store the acquired raw data in the FIFO buffer. The edge detection module 122 is used to determine a coarse measurement value based on the number of sampling clock cycles. The coarse measurement value is accumulated starting from 0. Each time the coarse measurement value is incremented by 1, 784 taps of raw data are measured. Edge detection is performed on the raw data to obtain a fine measurement value. The coarse and fine measurement values ​​are used as raw measurement data, for example, high-low level transition point detection is performed on the raw data. When there is a consecutive preset number of raw data transitions from low level to high level or from high level to low level, the fine measurement value is determined based on the position of the transition from low level to high level or from high level to low level. Specifically, it detects whether there is a stable high-low level transition in the 784-bit raw data collected in each tap (one tap represents one sampling clock cycle), and takes the stable high-low level transition as an edge, recording the raw measurement data corresponding to the edge. This raw measurement data includes the fine measurement value TapNum and the coarse measurement value ClkNum. The first storage unit in the RAM management module 123 stores the fine measurement value TapNum, and the second storage unit stores the coarse measurement value ClkNum. For example, if a stable high-low level transition is detected at bit N in the Mth sampling clock cycle, the coarse measurement value ClkNum=M and the fine measurement value TapNum=N corresponding to this edge are recorded. It should be noted that the edge detection module 122 detects stable high-low level transitions. This can be understood as recognizing that when 16 consecutive bits of 0 change to 1 are detected, the position of the 0-1 transition point is considered an edge, and a coarse measurement value and a fine measurement value are obtained.

[0061] API layer 130 can also send measurement result acquisition instructions to driver 110. Driver 110 also includes an edge result calculation module 112, a TMU raw measurement data management module 111, an edge processing module 113, and a signal splicing module 114. The TMU raw measurement data management module 111 is used to acquire and store raw measurement data from the RAM management module 123 of FPGA 120. The edge result calculation module 112 is used to calculate edge time based on the raw measurement data stored in the TMU raw measurement data management module. The edge processing module 113 may include a resampling edge determination module, a carry length error identification module, and a carry tail bubble error identification module. These modules are used to filter edges based on the raw measurement data and edge time to obtain valid edges. The signal splicing module 114 splices the valid edges to obtain the final measurement data.

[0062] One point to note is that the driver 110 may include at least one of a resampling edge determination module and a Carry length error identification module. Both the resampling edge determination module and the Carry length error identification module are used to filter out resampling edges in the edge. In other embodiments, it may also include a Carry tail bubble error identification module. Specific limitations can be found above.

[0063] As an example, the aforementioned driver 110 and FPGA 120 can both be drivers for digital boards and FPGAs.

[0064] In one exemplary embodiment, such as Figure 2 As shown, a signal measurement data processing method is provided, including steps 202 to 206. It should be noted that this signal measurement data processing method can be applied to a driver or FPGA, meaning that the modules originally in the driver are executed centrally in the FPGA. Wherein:

[0065] S202: Obtain raw measurement data.

[0066] The driver can obtain raw measurement data from the FPGA. This raw measurement data can include the fine measurement value TapNum and the coarse measurement value ClkNum. The coarse measurement value ClkNum refers to the number of sampling clock cycles that have elapsed, and the fine measurement value TapNum refers to the position of the edge in the raw data output by the carry chain.

[0067] S204: Based on the original measurement data, obtain the precise measurement time of each edge.

[0068] The fine measurement time is obtained based on the fine measurement value TapNum in the original measurement data. For example, if TapNum is 365, then the corresponding fine measurement time FineTime means the total length (total delay) of Tap1 to Tap365 on the carry chain. This length is obtained by accumulating the length of each Tap (the delay of each tap) during the TMU path calibration process, and the sum is stored as calibration data in the database.

[0069] In some optional embodiments, the precision measurement time of each edge is obtained based on each original measurement data, including: based on the precision measurement value of the edge, the precision measurement time corresponding to the precision measurement value is obtained by looking up a table.

[0070] Optionally, in this application, the fine measurement time refers to the total length from Tap1 to the corresponding TapN on the carry chain, where N is a positive integer greater than or equal to 1. This length is obtained by accumulating the length of each Tap during the TMU path calibration process, and the accumulated sum is stored as calibration data in the database. In other words, a lookup table is used to store the data in the database, allowing the fine measurement time FineTime to be obtained directly from the database based on the fine measurement value TapNum. The lookup table indicates the mapping relationship between the fine measurement value TapNum and the fine measurement time FineTime. When the signal measurement data processing method is applied to a driver, the database can be stored in the hardware of the host computer; when the signal measurement data processing method is applied to an FPGA, the database can be stored in the DDR of the digital board.

[0071] S206: Determine the resampled edge based on the precision measurement time and sampling clock cycle of each edge; and / or determine the resampled edge based on the precision measurement time, sampling clock cycle, and carry chain length error of each edge.

[0072] The resampled edge is a real edge that has been sampled twice, and the edge sampled in the second sampling is the resampled edge.

[0073] In this application, the resampled edge can be determined by method one: based on the edge's precision measurement time and sampling clock period; and / or by method two: based on the precision measurement time of each edge, sampling clock period, and carry chain length error.

[0074] Among them, three scenarios—based solely on Method 1, based solely on Method 2, and based on both Method 1 and Method 2—can solve the problem of re-sampling. Furthermore, scenarios based on Method 2, Method 1, and Method 2 can also solve the problem of missed sampling.

[0075] In some optional embodiments, the resampling edge is determined based on the precision measurement time of each edge and the sampling clock period, including: determining the edge as a resampling edge when the precision measurement time of the edge is greater than the sampling clock period.

[0076] For example, the resampling edge determination module of the driver identifies and determines the fine measurement time of each edge. That is, if the edge detection time FineTime is greater than the sampling clock period ClkPeriod, the current edge is marked and determined to be a resampling edge; if FineTime is less than ClkPeriod, the edge is not a resampling edge.

[0077] In other embodiments, determining the resampled edge based on the precision measurement time, sampling clock period, and carry chain length error of each edge includes: determining the difference between the precision measurement time and sampling clock period of the edge; and determining the edge as a resampled edge if the difference is greater than the carry chain length error.

[0078] The difference is FineTime-ClkPeriod. If (FineTime-ClkPeriod) > CarryLengthError, then the edge is considered a resampled edge; otherwise, it is not a resampled edge.

[0079] The carry chain length error (CarryLengthError) can be determined based on the length of the carry chain. In some optional embodiments, the determination of the carry chain length error includes: determining the length of the carry chain and determining the imbalance error segmentation point based on the length of the carry chain; obtaining the first carry chain position and the second carry chain position based on the imbalance error segmentation point; and obtaining the carry chain length error based on the measured values ​​of the first carry chain position and the second carry chain position.

[0080] The imbalance error segmentation point can be determined based on the code density algorithm and the carry chain length. For example, if the carry chain length is 8 or 4, the imbalance error segmentation point 16 can be determined.

[0081] The first carry chain position is the position before the imbalance error segmentation point, and the second carry chain position is the position after the imbalance error segmentation point. The calibration error corresponding to the first carry chain position is larger, while the calibration error corresponding to the second carry chain position is smaller. Therefore, the carry chain length error can be obtained based on the precision measurement time corresponding to the first carry chain position and the precision measurement time corresponding to the second carry chain position.

[0082] To make it easier to understand, let's take an example. Since FineTime in the judgment condition is the detection time corresponding to the precise measurement value TapNum of the edge, the specific calibration method is Carry8 calibration based on the code density algorithm. This calibration method itself will have a certain error. The largest error comes from the calibration result of the first 16 Taps of the carry chain being too large. Therefore, the first 16 Taps are the first carry chain position, and the 16th to 32nd Taps are the second carry chain position. It is known that FineTime(n) represents the total length represented by the first n taps on the carry chain. Based on the above background, the algorithm of CarryLengthError can be obtained, that is, the carry chain length error CarryLengthError = FineTime(16) - (FineTime(32)- FineTime(16)).

[0083] S208: Filter and resample edges from each edge to obtain the target edge.

[0084] In this application, after determining the remining edge, the process filters from the edge to the remining edge to obtain the target edge.

[0085] The above signal measurement data processing method acquires raw measurement data; based on each raw measurement data, it obtains the precision measurement time of each edge; based on the precision measurement time of each edge and the sampling clock cycle, it determines the resampled edge; and / or based on the precision measurement time of each edge, the sampling clock cycle, and the carry chain length error, it determines the resampled edge; and filters the resampled edges from each edge to obtain the target edge. In this way, by identifying the resampled edges and filtering them to the resampled edges, the problem of edge resampling is solved, thereby ensuring the accuracy of the measurement data.

[0086] In some optional embodiments, the edge determination can be performed by combining the above-mentioned methods one and two. Specifically, the re-sampling edge is determined based on the precision measurement time and sampling clock period of each edge; and the re-sampling edge is determined based on the precision measurement time, sampling clock period and carry chain length error of each edge, including: determining the edge to be confirmed for re-sampling based on the precision measurement time and sampling clock period of each edge; and determining the re-sampling edge based on the precision measurement time, sampling clock period and carry chain length error of each edge to be confirmed for re-sampling.

[0087] In this embodiment, edge detection is first performed using Method 1 to determine resampled edges and non-resampled edges. Then, the Carry length error identification module in this application performs a secondary detection on each resampled edge to reduce the number of detections, improve detection efficiency, and prevent valid edges from being incorrectly identified as resampled edges. For resampled edges that do not meet the secondary detection conditions, their resampled edge marking is removed. This Method 1 can prevent signal resampling. Because carry chain calibration errors cause inaccurate measurement time, valid edges may be incorrectly identified as resampled edges. Without Method 2 detection, valid edges identified as resampled edges in Method 1 will be discarded, leading to signal loss. Method 2 detection can prevent signal loss.

[0088] In some optional embodiments, the method further includes determining the edge time of an edge based on the sampling clock period, the fine measurement time corresponding to the fine measurement value of each edge, and the coarse measurement value of each edge.

[0089] The TMU raw measurement data management module reads all the raw measurement data of RAM stored in the RAM management module in the FPGA and transmits it to the driver result calculation module. The driver result calculation module can obtain the edge time of each edge according to the measurement mode (i.e., when MeasureMode=edge measurement) and the raw measurement data (i.e., the fine measurement time corresponding to the fine measurement value of each edge and the coarse measurement value of each edge).

[0090] In some optional embodiments, the edge time of an edge is determined based on the sampling clock period, the fine measurement time corresponding to the fine measurement value of each edge, and the coarse measurement value of each edge, including: determining the initial edge time based on the coarse measurement value and the sampling clock period; and obtaining the edge time based on the initial edge time and the fine measurement time.

[0091] In this embodiment, the edge result calculation module can determine the initial edge time based on the coarse measurement value and the sampling clock period. The initial edge time is equal to ClkNum*ClkPeriod, where ClkNum is the coarse measurement value and ClkPeriod is the sampling clock period.

[0092] The edge time of the last edge is EdgeTime = ClkNum * ClkPeriod – FineTime, where FineTime is the fine measurement time corresponding to the fine measurement value Tapnum of the edge. The specific method for obtaining this fine measurement time can be found above, and will not be repeated here.

[0093] In some optional embodiments, after filtering and resampling edges from each edge to obtain the target edge, the process includes: determining the bubble edge based on the coarse measurement values ​​of two adjacent target edges and the edge time of the target edge; and filtering the bubble edge from the target edge to obtain the effective edge.

[0094] The bubble edge refers to the unstable 0-1 transition phenomenon in the carry chain, such as 0100000011111111. If this bubble edge appears in the middle of the carry chain, the FPGA can filter it out and identify it as 0000000011111111, which is recorded as a stable 0-1 transition. However, if the edge falls near the boundary of the sampling period (i.e., the fine time of the edge is approximately equal to ClkPeriod), a 0-1 transition will appear at the end of the carry chain, and a 0-1 transition will also appear at the beginning of the next carry chain data. In this case, the FPGA cannot filter out the unstable 0-1 transition. That is, in the previous step, 010000 (i.e., an unstable 0-1 transition) might be sampled, while in the next step, 011111111 is sampled. The next step is actually sampling a bubble.

[0095] Therefore, in this application, the bubble edge is determined based on the coarse measurement value of two adjacent target edges and the edge time of the target edge. Thus, based on the coarse measurement value and the edge time of the target edge, it can be determined that the two target edges are close to the boundary position of the sampling period, so one of them must be the bubble edge.

[0096] In some optional embodiments, determining the bubble edge based on the coarse measurement values ​​of two adjacent target edges and the edge time of the target edges includes: if the difference between the coarse measurement values ​​of two adjacent target edges is 1 and the difference between the target edge times of two adjacent target edges is less than a period threshold, the latter of the two adjacent target edges is taken as the bubble edge; the period threshold is half of the period of the signal to be measured.

[0097] Specifically, in the driving layer, the phenomenon is that the time interval between two consecutive edges is very short, which satisfies two conditions: the difference between the coarse measurement values ​​ClkNum of two adjacent target edges is 1, and the difference in time between two adjacent target edges is less than 0.5*PeriodMin. 0.5*PeriodMin is the period threshold, where PeriodMin is half the period of the signal under test.

[0098] To facilitate understanding, let's illustrate with an example. Consider two adjacent target edges A1 and A2. Target edge A1 receives its edge at the same time in two consecutive frames, which is EdgeTime1. Target edge A2 receives its edge at the same time in two consecutive frames, which is EdgeTime2. The coarse measurement value of target edge A1 is a1, and the coarse measurement value of target edge A2 is a2. Therefore, if we determine that a2-a1=1 and EdgeTime2-EdgeTime1<0.5*PeriodMin, then edge A2 is a bubble edge. This bubble edge A2 is filtered out, and the remaining edges are the valid edges.

[0099] In some optional embodiments, before acquiring the raw measurement data, the process includes: acquiring sampling configuration information, which includes a sampling clock cycle and the frequency of the signal under test, the frequency of the signal under test being used to determine whether it is a high-frequency mode; in the case of a high-frequency mode, acquiring the raw data of the carry chain once every sampling clock cycle, and determining a coarse measurement value based on the number of sampling clock cycles; performing edge detection on the raw data to obtain a fine measurement value, and using the coarse measurement value and the fine measurement value as the raw measurement data.

[0100] The raw measurement data can be acquired in the FPGA. The FPGA can acquire the sampling configuration information issued by the driver. This sampling configuration information can include the sampling clock cycle and the frequency of the signal under test. The frequency of the signal under test, DataRate, is used to determine whether it is a high-frequency mode. In the case of high-frequency mode, the raw data of the carry chain is collected once every sampling clock cycle. The number of sampling clock cycles is the coarse measurement value. Edge detection of the raw data output by the carry chain can obtain the fine measurement value.

[0101] Specifically, edge detection is performed on the raw data to obtain the precise measurement value, including: detecting high and low level transition points in the raw data; and determining the precise measurement value based on the position of the transition from low to high or from high to low when there is a continuous preset number of raw data transitions from low to high or from high to low.

[0102] Specifically, after the TMU receives the start measurement command, the number of sampling clock cycles is incremented from 0. Each time the number of sampling clock cycles is incremented by 1, the FPGA reads the status of 784 taps (i.e., 784 bits of data). After the 784 bits of data per tap, i.e., the raw data, are stored in the FPGA, the FPFA performs stable high / low level transition detection on the raw data. For example, if a stable high / low level transition is detected at bit N in the Mth sampling clock cycle, the coarse measurement value of the corresponding edge is recorded as M, and the fine measurement value as N. A stable edge can be understood as a consecutive preset number of bits changing from 0 to 1, or a consecutive preset number of bits changing from 1 to 0, where the preset number can be 16. A consecutive preset number of bits changing from 0 to 1 is a rising edge, and a consecutive preset number of bits changing from 1 to 0 is a falling edge.

[0103] For ease of understanding, the following is combined Figure 3 As shown, Figure 3 The flowchart below illustrates a signal measurement data processing method in another embodiment. In this embodiment, the driver sends sampling configuration information to the FPGA. In high-frequency mode, the FPGA acquires the raw data of the carry chain once every sampling clock cycle and determines the coarse measurement value based on the number of sampling clock cycles. Edge detection is performed on the raw data to obtain the fine measurement value. The coarse and fine measurement values ​​are used as the raw measurement data. Upon receiving a measurement result acquisition instruction, the driver acquires the raw measurement data from the FPGA and obtains the fine measurement time of the edge based on the fine measurement value in the raw measurement data.

[0104] The resampling edge determination module in the driver performs the first determination, that is, determines the edge to be confirmed for resampling based on the precision measurement time of each edge and the sampling clock period.

[0105] The Carry length error identification module in the driver performs a second judgment, that is, it determines the re-sampling edge based on the precision measurement time, sampling clock period and carry chain length error of each edge to be confirmed and re-sampling. In this way, the re-sampling edge is filtered from each edge to obtain the target edge.

[0106] The Carry tail bubble error recognition module in the driver determines the bubble edge based on the coarse measurement values ​​of two adjacent target edges and the edge time of the target edge; it then filters the bubble edge from the target edges to obtain the effective edge.

[0107] The signal splicing module in the driver splices multiple valid edges together and returns them to the API layer as a complete edge measurement result.

[0108] In the above embodiments, the first determination can prevent signal resampling. Because the carry chain calibration error leads to inaccurate measurement time, valid edges may be incorrectly identified as resampling edges. Without a second determination, the valid edges identified as resampling edges in the first determination will be discarded, resulting in signal omission. The second determination can prevent signal omission. By using the TMU in the FPGA to initially acquire all edges, and then combining it with carry chain resampling edge recognition, carry chain length error recognition, carry chain edge bubble recognition, signal splicing and other technologies, the problems of discontinuous signal acquisition, signal omission, and resampling that exist in traditional TMU measurement of high-frequency signals are solved.

[0109] It should be understood that although the steps in the flowcharts of the above embodiments are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the above embodiments may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages in other steps. It is understood that the steps in different embodiments can be freely combined as needed, and all non-contradictory solutions formed by such combinations are within the scope of protection of this application.

[0110] Based on the same inventive concept, this application also provides a signal measurement data processing apparatus for implementing the signal measurement data processing method described above. The solution provided by this apparatus is similar to the implementation scheme described in the above method; therefore, the specific limitations in one or more of the signal measurement data processing apparatus embodiments provided below can be found in the limitations of the signal measurement data processing method described above, and will not be repeated here.

[0111] In one exemplary embodiment, such as Figure 1 As shown, a signal measurement data processing device is provided, comprising:

[0112] TMU raw measurement data management module 111 is used to acquire raw measurement data;

[0113] Edge result calculation module 112 is used to obtain the precise measurement time of each edge based on each original measurement data;

[0114] Edge processing module 113 is used to determine resampled edges based on the precision measurement time and sampling clock period of each edge; and / or determine resampled edges based on the precision measurement time, sampling clock period and carry chain length error of each edge.

[0115] The signal splicing module 114 is used to filter and resample the edges from each edge to obtain the target edge.

[0116] In some optional embodiments, the edge processing module 113 is specifically used to determine an edge as a resampled edge when the edge measurement time is greater than the sampling clock period.

[0117] In some optional embodiments, the edge processing module 113 is specifically used to determine the difference between the edge's precision measurement time and the sampling clock period; if the difference is greater than the carry chain length error, the edge is determined to be a resampled edge.

[0118] In some optional embodiments, the edge processing module 113 is specifically used to determine the length of the carry chain and determine the imbalance error segmentation point based on the length of the carry chain; obtain the first carry chain position and the second carry chain position based on the imbalance error segmentation point; and obtain the carry chain length error based on the measured value of the first carry chain position and the measured value of the second carry chain position.

[0119] In some optional embodiments, the edge processing module 113 is specifically used to determine the edge to be resampled and confirmed based on the precision measurement time of each edge and the sampling clock period.

[0120] The resampling edge is determined based on the precision measurement time, sampling clock cycle, and carry chain length error of each edge to be confirmed and resampled.

[0121] In some optional embodiments, the edge result calculation module 112 is specifically used to determine the edge time based on the sampling clock period, the fine measurement time corresponding to the fine measurement value of each edge, and the coarse measurement value of each edge.

[0122] In some optional embodiments, the edge result calculation module 112 is specifically used to determine the initial edge time based on the coarse measurement value and the sampling clock period; and to obtain the edge time based on the initial edge time and the fine measurement time.

[0123] In some optional embodiments, the edge processing module 113 is specifically used to determine the bubble edge based on the coarse measurement values ​​of two adjacent target edges and the edge time of the target edge; and to filter the bubble edge from the target edges to obtain the effective edge.

[0124] In some optional embodiments, the edge processing module 113 is specifically used to take the latter of the two adjacent target edges as the bubble edge when the difference between the coarse measurement values ​​of two adjacent target edges is 1 and the difference between the target edge times of two adjacent target edges is less than the period threshold; the period threshold is half of the period of the signal to be measured.

[0125] In some alternative embodiments, the above-described apparatus further includes:

[0126] The TMU signal acquisition module 121 is used to acquire sampling configuration information, which includes the sampling clock cycle and the frequency of the signal under test. The frequency of the signal under test is used to determine whether it is a high-frequency mode. In the case of high-frequency mode, the raw data of the carry chain is acquired once every sampling clock cycle.

[0127] The edge detection module 122 is used to determine the coarse measurement value based on the number of sampling clock cycles; to perform edge detection on the raw data to obtain the fine measurement value, and to use the coarse measurement value and the fine measurement value as the raw measurement data.

[0128] In some optional embodiments, the edge detection module 122 is specifically used to detect high and low level transition points of the raw data; when there is a continuous preset number of raw data that change from low level to high level or from high level to low level, the precision measurement value is determined based on the position of the change from low level to high level or the position of the change from high level to low level.

[0129] In some optional embodiments, the edge result calculation module 112 is specifically used to obtain the precision measurement time corresponding to the precision measurement value based on the edge precision measurement value by looking up a table.

[0130] Each module in the aforementioned signal measurement data processing device can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in or independent of the processor in a computer device, or stored in the memory of a computer device as software, so that the processor can call and execute the operations corresponding to each module.

[0131] In one exemplary embodiment, a computer device is provided, which may be a terminal, and its internal structure diagram may be as follows: Figure 4As shown, the computer device includes a processor, memory, input / output interface, communication interface, display unit, and input device. The processor, memory, and input / output interface are connected via a system bus, and the communication interface, display unit, and input device are also connected to the system bus via the input / output interface. The processor provides computational and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system and computer programs. The internal memory provides an environment for the operation of the operating system and computer programs stored in the non-volatile storage media. The input / output interface is used for exchanging information between the processor and external devices. The communication interface is used for wired or wireless communication with external terminals; wireless communication can be achieved through Wi-Fi, mobile cellular networks, Near Field Communication (NFC), or other technologies. When the computer program is executed by the processor, it implements a signal measurement data processing method. The display unit is used to form a visually visible image and can be a display screen, projection device, or virtual reality imaging device. The display screen can be an LCD screen or an e-ink screen. The input device of the computer device can be a touch layer covering the display screen, or buttons, trackballs, or touchpads set on the casing of the computer device, or external keyboards, touchpads, or mice, etc.

[0132] Those skilled in the art will understand that Figure 4 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0133] In one embodiment, a computer device is also provided, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps in the above method embodiments.

[0134] In one embodiment, a computer-readable storage medium is provided having a computer program stored thereon that, when executed by a processor, implements the steps in the above method embodiments.

[0135] In one embodiment, a computer program product is provided, including a computer program that, when executed by a processor, implements the steps in the above method embodiments.

[0136] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, artificial intelligence (AI) processors, etc., and are not limited to these.

[0137] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0138] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A signal measurement data processing method, characterized in that, include: Obtain raw measurement data; Based on the original measurement data, the precise measurement time of each edge is obtained; The resampled edge is determined based on the precision measurement time of each edge and the sampling clock period; and / or the resampled edge is determined based on the precision measurement time of each edge, the sampling clock period, and the carry chain length error. The target edge is obtained by filtering the resampled edges from each of the edges.

2. The method according to claim 1, characterized in that, The determination of resampling edges based on the precision measurement time and sampling clock period of each edge includes: If the measurement time of the edge is greater than the sampling clock period, the edge is determined to be a resampled edge.

3. The method according to claim 1, characterized in that, The determination of resampling edges based on the precision measurement time of each edge, the sampling clock period, and the carry chain length error includes: Determine the difference between the precise measurement time of the edge and the sampling clock period; If the difference is greater than the carry chain length error, the edge is determined to be a re-sampling edge.

4. The method according to claim 3, characterized in that, The method further includes: Determine the length of the carry chain, and determine the imbalance error segmentation point based on the length of the carry chain; Based on the unbalanced error segmentation points, the positions of the first carry chain and the second carry chain are obtained; The carry chain length error is obtained based on the measured values ​​of the first carry chain position and the second carry chain position.

5. The method according to claim 1, characterized in that, The resampling edge is determined based on the precision measurement time of each edge and the sampling clock period; Determining resampled edges based on the precision measurement time of each edge, the sampling clock period, and the carry chain length error includes: The edges to be resampled and confirmed are determined based on the precision measurement time of each edge and the sampling clock cycle. The resampling edge is determined based on the precision measurement time of each of the edges to be confirmed and resampled, the sampling clock period, and the carry chain length error.

6. The method according to any one of claims 1 to 5, characterized in that, The method further includes: The edge time is determined based on the sampling clock period, the fine measurement time corresponding to the fine measurement value of each edge, and the coarse measurement value of each edge.

7. The method according to claim 6, characterized in that, The determination of the edge time based on the sampling clock period, the fine measurement time corresponding to the fine measurement value of each edge, and the coarse measurement value of each edge includes: The initial edge time is determined based on the coarse measurement value and the sampling clock period; The edge time is obtained based on the initial edge time and the precision measurement time.

8. The method according to claim 6, characterized in that, After filtering the resampled edges from each of the edges to obtain the target edge, the process includes: The bubble edge is determined based on the coarse measurement values ​​of two adjacent target edges and the edge time of the target edges; The effective edge is obtained by filtering the bubble edge from the target edge.

9. The method according to claim 8, characterized in that, Determining the bubble edge based on the coarse measurement values ​​of two adjacent target edges and the edge time of the target edge includes: If the difference between the coarse measurement values ​​of two adjacent target edges is 1, and the difference between the target edge times of two adjacent target edges is less than the period threshold, the latter of the two adjacent target edges is taken as the bubble edge; the period threshold is half of the period of the signal to be measured.

10. The method according to any one of claims 1 to 4, characterized in that, Before acquiring the raw measurement data, the following steps are included: Obtain sampling configuration information, which includes sampling clock period and frequency of the signal under test, and the frequency of the signal under test is used to determine whether it is a high-frequency mode; In high-frequency mode, the raw data of the carry chain is acquired once every sampling clock cycle, and the coarse measurement value is determined based on the number of sampling clock cycles. Edge detection is performed on the original data to obtain the fine measurement value, and the coarse measurement value and the fine measurement value are used as the original measurement data.

11. The method according to claim 10, characterized in that, The step of performing edge detection on the original data to obtain precise measurement values ​​includes: High-low level transition points are detected in the raw data; When there is a continuous preset number of raw data that change from low level to high level or from high level to low level, the precision measurement value is determined based on the position where the data changes from low level to high level or from high level to low level.

12. The method according to claim 10, characterized in that, The process of obtaining the precise measurement time for each edge based on the original measurement data includes: Based on the precise measurement value of the edge, the precise measurement time corresponding to the precise measurement value is obtained by looking up the table.

13. A time measurement system, characterized in that, The time measurement system includes: An FPGA is used to acquire sampling configuration information, which includes a sampling clock cycle and the frequency of the signal under test. The frequency of the signal under test is used to determine whether it is a high-frequency mode. In the case of high-frequency mode, the raw data of the carry chain is acquired once every sampling clock cycle, and a coarse measurement value is determined based on the number of sampling clock cycles. Edge detection is performed on the raw data to obtain a fine measurement value. The coarse measurement value and the fine measurement value are used as the raw measurement data. A driver for performing the signal measurement data processing method according to any one of claims 1 to 8.

14. A signal measurement data processing device, characterized in that, include: The measurement data acquisition module is used to acquire raw measurement data; The precision measurement time determination module is used to obtain the precision measurement time of each edge based on the original measurement data. The resampling edge determination module is used to determine the resampling edge based on the precision measurement time and sampling clock period of each edge; and / or to determine the resampling edge based on the precision measurement time of each edge, the sampling clock period, and the carry chain length error. A filtering module is used to filter the resampled edges from each of the edges to obtain the target edge.