Chip power management method and system and medium

Abstract

The invention provides a chip power management method and system and a medium. The invention discloses a chip performance management method. The method comprises the following steps: setting an initial frequency and an initial set voltage of a chip; equivalent switched capacitance is measured through an equivalent switched capacitance monitor; measuring the junction temperature of the chip through a temperature sensor; measuring the performance index of the chip through a performance sensor; a control frequency of the chip is determined by the MPC controller based on the maximized objective function. According to the method, model prediction control is facilitated, the power consumption is reduced to the maximum extent on the premise of meeting the chip performance requirement, and the performance is improved to the maximum on the premise of meeting the power consumption constraint.

Description

Technical Field

[0001] This invention relates to the field of power management technology, and specifically to a chip power management method, system, and medium. Background Technology

[0002] With the rapid development of fields such as artificial intelligence and high-performance computing, the computing performance of GPUs is constantly improving. However, at the same time, their power consumption is also rising, leading to problems such as excessive energy consumption, high heat dissipation pressure, and decreased reliability. Dynamic power management is a key technology to solve these problems. Its core objective is to minimize power consumption while ensuring system stability and meeting the performance requirements of the GPU.

[0003] Existing GPU power management technologies have the following main drawbacks: The conflict of multiple objectives is difficult to coordinate: Existing technologies often struggle to balance multiple objectives such as maximizing performance, minimizing power consumption, and controlling temperature, which can easily lead to problems such as "excessive performance resulting in wasted power consumption" or "excessive energy saving resulting in insufficient performance".

[0004] The target frequency setting lacks scientific basis: Traditional methods mostly rely on empirical rules or simple threshold judgments to set the operating frequency, which cannot be accurately adapted to the dynamic changes in application load, resulting in insufficient rationality and effectiveness of frequency adjustment.

[0005] Insufficient global capability: Existing technologies mostly rely on local feedback regulation, which only considers the current system parameters and does not take into account future load change trends. This makes it easy to get stuck in local optima and cannot achieve global optimization across the entire time domain.

[0006] Response speed and stability are difficult to balance: When dealing with sudden load changes, traditional regulation mechanisms either respond too slowly and fail to match load demand in time, or they are too aggressive, causing drastic fluctuations in frequency and voltage, which affects performance stability.

[0007] Model predictive control (MPC), as an advanced control method, has the advantages of handling multi-constraint, multi-objective optimization problems and predicting future system states. Currently, there is no mature MPC-based dynamic power management solution for chips that can fully adapt to the hardware characteristics and dynamic load requirements of devices such as GPUs. Summary of the Invention

[0008] In view of this, this application provides a chip power management method, system, and medium to solve the above-mentioned technical problems in the prior art.

[0009] According to one aspect of this application, a chip performance management method is provided, the method comprising: Set the chip's initial frequency and initial voltage; The equivalent switched capacitance is measured using an equivalent switched capacitance monitor; The chip junction temperature is measured using a temperature sensor. Measure the chip's performance metrics using performance sensors; The control frequency of the chip is determined by the MPC controller based on the objective function; Adjust the chip's operating frequency according to the determined control frequency. The objective function is: , in: For performance reward functions; This is the power consumption loss function; This is the temperature loss function; α is the weight of the performance reward function, and its value ranges from 0 to 1. β is the weight of the energy loss function, and its value ranges from 0 to 1. n represents the nth chip; N represents the total number of chips, and N is greater than or equal to 1; The calculation formula is as follows:

[0010]

[0011] in, - This is the highest permissible frequency; - The frequency of k at the current time; - For the target frequency; - To obtain the current performance metrics from the performance monitor; - The performance index is predicted based on the target frequency f(k+1); - The performance reward value is predicted based on the target frequency f(k+1); The calculation formula is as follows:

[0012] in, - Maximum allowable power consumption; - The total power consumption is calculated using a power consumption prediction model based on the target frequency f(k+1). The calculation formula is as follows:

[0013] in, -Tj max This is the maximum permissible chip junction temperature; -Tj min Minimum allowable chip junction temperature; - This refers to the chip junction temperature predicted based on the target frequency.

[0014] According to a preferred embodiment of this application, determining the control frequency of the chip by maximizing the objective function includes: Preset step size based on chip frequency adjustment Construct a candidate frequency set: m is the maximum number of adjustment steps (1≤m); Calculate the objective function value for each candidate frequency; The candidate frequency with the largest objective function value is selected as the control frequency.

[0015] According to a preferred embodiment of this application, the execution module is configured to obtain the chip setting voltage using a voltage frequency model based on the control frequency, and to set the chip according to the chip setting voltage.

[0016] According to a preferred embodiment of this application, the process of determining the control frequency of the chip based on maximizing the objective function satisfies the following constraints: -Temperature constraint: T min <T<T max T max and T min These are the maximum and minimum allowable chip junction temperatures, respectively. - Voltage constraint: V min <V device <V max V max and V min These are the highest and lowest permissible voltages on the chip's MOSFET, respectively; -Frequency constraint: F min <f<F max F max and F min The highest and lowest permissible frequencies; -Power consumption constraint: P <P max P max Maximum allowable power consumption; According to a preferred embodiment of this application, the power consumption prediction model is as follows:

[0017] in,

[0018]

[0019] in, K tb , K vb These are the parameters for calculating leakage current power consumption in relation to temperature and voltage; V ref, T ref Calculate K during the testing process tb , K vb Use reference voltage and temperature; V device (k+1) represents the voltage across the MOSFET of the chip at time k+1; Tj(k+1) is the chip junction temperature at time k+1; Cac is the equivalent switched capacitor; The leakage current power consumption was measured under Vref and Tref conditions.

[0020] According to the preferred embodiment of this application,

[0021] in, For Cac and voltage V device The linear coefficients.

[0022] According to a preferred embodiment of this application, the voltage frequency model is as follows:

[0023] in, V set Indicates the chip's set voltage; V device This indicates the voltage across the chip's MOSFET; V droop V represents set To V device pressure drop,

[0024]

[0025] For voltage frequency parameters; These are the parameters for the pressure drop model; This refers to the control frequency of the chip.

[0026] According to a preferred embodiment of this application, the chip is a GPU chip.

[0027] According to another aspect of this application, a chip performance management system is provided for performing the method described above, the system comprising: The computing module is used to perform the chip's computational tasks; The state awareness module includes: A performance monitor is used to measure the performance metrics of the chip. Equivalent switched capacitance monitor, used to measure equivalent switched capacitance; Temperature sensor used to measure chip junction temperature; An MPC controller is used to determine the control frequency of the chip based on maximizing an objective function. The execution module is configured to set the chip based on the control frequency.

[0028] According to another aspect of this application, a computer-readable storage medium is provided that stores a computer program thereon, which, when executed by a processor, causes the processor to perform the method described above.

[0029] The above-described technical solution achieves the following beneficial effects: Achieving multi-objective collaborative optimal control: By constructing a multi-objective function that includes frequency, power consumption, and temperature, and combining weight allocation, the collaborative optimization of each objective is achieved; at the same time, temperature constraints, frequency constraints, voltage constraints, and power consumption constraints are embedded in the optimization process to ensure that the system achieves optimal performance under the premise of satisfying the constraints, and avoids the overall performance degradation of the system caused by single-objective optimization.

[0030] Precise target frequency setting: A state vector is constructed based on real-time feedback data from the Cac monitor, temperature sensor, and performance monitor to accurately represent the current operating status of the system; the future load change trend is predicted by the predictive model, and the optimal frequency is selected by the optimization algorithm, so that the frequency setting can accurately match the current and future load requirements, avoiding power waste caused by excessive frequency or insufficient performance caused by excessive frequency.

[0031] It has global optimization capabilities: It adopts the rolling optimization concept of MPC, predicts the system state in the next N steps through the prediction model, calculates the objective function value based on the future state sequence, and ensures that the optimization result is the optimal solution in the entire prediction interval, rather than only considering the local optimal solution of the current state, thereby improving the long-term operating performance of the system.

[0032] Balancing rapid response and stability: Short control cycles of 100µs to ms ensure rapid response to load changes; at the same time, by constructing a limited set of candidate frequencies (limiting the maximum number of adjustment steps), large-scale frequency adjustments are avoided, ensuring stable system operation. Attached Figure Description

[0033] The accompanying drawings are used to provide a further understanding of the technical solutions of this application and constitute a part of the specification. They are used together with the embodiments of this application to explain the technical solutions of this application, but do not constitute a limitation on the technical solutions of this application.

[0034] Figure 1 A flowchart illustrating the chip performance management method provided in an exemplary embodiment of this application is shown; Figure 2 A structural block diagram of a chip performance management system according to an exemplary embodiment of this application is shown. Detailed Implementation

[0035] Various exemplary embodiments of this application will now be described in detail with reference to the accompanying drawings. The descriptions of the exemplary embodiments are merely illustrative and are not intended to limit the scope of this application or its application or use. This application can be implemented in many different forms and is not limited to the embodiments described herein. These embodiments are provided to make the application thorough and complete, and to fully express the scope of this application to those skilled in the art.

[0036] Unless explicitly stated otherwise, an element may be one or more unless otherwise specified. The terms “multiple / several” mean two or more, the term “based on” should be interpreted as “at least partially based on,” and the terms “and / or” and “at least one of…” cover any one of the listed items and all possible combinations thereof. Furthermore, expressions such as “first,” “second,” etc., are for descriptive purposes only and do not indicate or imply their relative importance or implicitly specify the number of technical features indicated.

[0037] refer to Figure 1 The diagram illustrates a flowchart of a chip performance management method according to an exemplary embodiment of this application. Figure 1 As shown, the method includes: The initialization steps include setting the chip's initial frequency and initial voltage, such as setting the initial value f(0) and calculating and setting v(0) = 0.8 (V); The data acquisition steps include measuring the equivalent switched capacitance using an equivalent switched capacitance monitor; measuring the chip junction temperature using a temperature sensor; and measuring the chip's performance parameters using a performance sensor. The step of determining the control frequency includes determining the chip's control frequency based on an objective function using an MPC controller; The steps for adjusting the chip's operating frequency include adjusting the chip's operating frequency and corresponding voltage according to the determined control frequency; After adjusting the chip's operating frequency, wait for, for example, 1ms (one control cycle T), then return to the data acquisition step and enter the next control cycle to achieve rolling optimization.

[0038] The data acquisition step is performed by the state awareness module, which collects real-time state data during chip operation and constructs a state vector = [Cac, T, Perf, f], where - Equivalent switched capacitance Cac: Calculated by measuring and filtering using a Cac monitor; - Chip junction temperature T: Measured directly by a temperature sensor; -Performance Perf: Measured and filtered by a performance monitor; - Operating frequency f: The current configured frequency of the chip, the only controllable variable.

[0039] Meanwhile, ambient temperature is considered as a disturbance term. Since ambient temperature changes slowly, its change is negligible relative to the adjustment period of the control system and can be regarded as a static value.

[0040] Based on the predictive model, the MPC controller can predict the system state at future times. The predictive model in the MPC controller is introduced below.

[0041] The voltage-frequency model is used to determine the chip's set voltage based on the control frequency. The voltage corresponding to the chip's operating frequency usually refers to the voltage applied to the MOSFET (this voltage cannot be preset), not the output voltage of the external power supply. Therefore, the voltage-frequency model includes two models, one being V... device The model consists of two parts: one is the voltage applied to the MOSFET on the chip, and the other is the voltage drop V. droop Model, chip from V set (Set voltage) to V device The voltage drop V (on the MOSFET at the chip) droop The voltage drop is due to parasitic effects of resistance and inductance in the voltage transmission network, transient current surges, and intrinsic characteristics of semiconductor devices, resulting in an AC voltage drop (dynamic voltage drop) caused by IR voltage drop and di / dt, ultimately causing the MOSFET voltage to fall below the set value. Two models can be used to calculate the corresponding set voltage V at a given frequency target. set :

[0042] Where V device The model is:

[0043]

[0044] Based on the above equation, given the target frequency The minimum voltage required at that frequency can be calculated. ; and given voltage The highest frequency achievable at this voltage can be calculated. ,in: : This refers to the voltage and frequency parameters, which are calculated and generated during chip testing.

[0045] Where V droop The model is:

[0046] At a given frequency The value of V can be calculated using the above formula. set To V device voltage drop V droop .

[0047] in: - : These are the voltage drop model parameters, calculated, generated, and recorded during chip testing.

[0048] The equation for the equivalent switched capacitor Cac is:

[0049] The relationship between Cac and voltage is expressed as a linear one. , Cac is the linear coefficient of voltage V, which is generated during the test and is a known constant in the control system.

[0050] Chip junction temperature prediction model: The thermal model of a chip is used to describe the junction temperature of the chip. Ambient temperature In addition to the chip's thermal resistance Rth (K / W), thermal capacity Cth (J / K), power consumption P, and equivalent current, an RC network is constructed to describe the heat flow and temperature rise. The following is the steady-state junction temperature of the chip. With transient The model formula is used to describe how the chip junction temperature changes with power consumption and time:

[0051]

[0052]

[0053] in: R represents ambient temperature. ja For the chip's thermal resistance; τ is the thermal capacity of the chip; T is the thermal time constant; j This refers to the chip junction temperature. This represents the power consumption difference between time K+1 and time K; This represents the total power consumption of the chip at time k+1. Due to the temperature hysteresis, the stabilized chip junction temperature must be used when calculating the loss function or predicting power consumption. ,therefore .

[0054] The operating frequency f is the only controllable element in the system. .

[0055] Power consumption prediction model: The total power consumption of the chip is divided into dynamic power consumption and leakage current power consumption. Dynamic power consumption is related to Cac, voltage and frequency, while static power consumption is related to voltage and temperature, and is expressed by the following formula:

[0056]

[0057]

[0058] in: -K tb K vb These are the parameters for calculating leakage current, power consumption, temperature, and voltage. These parameters are generated during the testing process and recorded in the chip, which can then be directly read by the control system during the calculation process.

[0059] -V ref , T ref Calculate K during the testing process tb , K vb The reference voltage and temperature used at that time are known constants in the control system.

[0060] - During the testing process, in V ref , T ref The leakage current power consumption obtained under the test conditions will also be recorded in the chip, and the control system can directly read it during the calculation process.

[0061] - This refers to the chip junction temperature.

[0062] The objective function is a core component of a control system. Its role is to quantify the desired performance of the control system, ensuring the algorithm finds the optimal control sequence in each control cycle. The definition of the objective function directly determines the control effect of the MPC (Multi-Purpose Control System), such as tracking accuracy, performance, energy consumption, and constraint satisfaction. In this control system, under the premise of satisfying the constraints, the requirement of achieving the highest performance with the minimum power consumption is achieved by maximizing the following objective function: Its specific expression is as follows:

[0063] in: - As a performance reward function, the upper and lower limits of voltage / clock frequency are implicitly reflected in this function; - The power consumption loss function is used to explicitly reflect the power consumption wall constraint. - The temperature loss function will be explicitly reflected in the temperature wall constraint. -α is the weight of the performance reward function, and its value ranges from 0 < α < 1; -β is the weight of the energy loss function, and its value ranges from 0 < β < 1; -n indicates the nth chip; -N represents the total number of chips. N is greater than or equal to 1. For example, if the system control target is 2 chips, then n=1, 2, and N=2.

[0064] If α >> β, performance takes priority; if α << β, energy consumption takes priority. Users can configure this according to their needs, such as performance priority, energy consumption priority, or a balanced mode.

[0065] Temperature loss function Its expression is as follows:

[0066] in: -Tj max or Tj min These are the maximum and minimum allowable chip junction temperatures; - The predicted temperature values ​​for the target candidate set.

[0067] For each frequency point f in the candidate set f(x) i If the junction temperature predicted based on the candidate frequency exceeds the allowable temperature range, a maximum value is assigned to the temperature loss function to ensure that the objective function J of the candidate value is much smaller than the objective function values ​​of other candidate sets and will not be selected.

[0068] Power loss function The expression is as follows:

[0069] in: - Maximum allowable power consumption; - The total power consumption is calculated using a power consumption prediction model based on the candidate frequency f. For each frequency point f in the candidate set f(x) i If the power consumption predicted based on the candidate frequency is within the allowable power consumption range, then divide the predicted power consumption by P. max This makes the power loss function a value less than 1 and greater than 0. When the predicted P total If the maximum allowable power consumption is exceeded, an extremely large loss value is assigned to the power consumption loss function to ensure that the target frequency point is not selected.

[0070] Performance reward function The expression is as follows:

[0071]

[0072] in: - This is the highest permissible frequency; - The frequency used at the current time k; - For the target frequency; - The performance metrics collected from the performance monitor at the current moment; - : This refers to the performance metric predicted based on the target frequency f(k+1); - The performance reward value is predicted based on the target frequency f(k+1); Here, the value is constructed to be greater than 0 and less than 1, and its range is consistent with the power loss function.

[0073] The optimization process must meet the following constraints: -Temperature constraint: Tj min <Tj<Tj max Tj max and Tj min These are the maximum and minimum allowable junction temperatures, respectively. - Voltage constraint: V min <V<V max V max and V min Vset Maximum and minimum permissible voltages; -Frequency constraint: F min <f<F max F max and F min These are the highest and lowest permissible frequencies, respectively. -Power consumption constraint: P <P max P max This represents the maximum allowable power consumption.

[0074] Temperature and power consumption constraints are implicitly reflected in the power loss function and temperature loss function of the objective function. That is, if the temperature or power consumption calculated based on the target frequency exceeds the allowable range, the objective function corresponding to the target frequency will be a negative value and will not be selected, thereby ensuring that the system meets the temperature and power consumption constraints.

[0075] Frequency constraints and voltage constraints are based on a given f min and f max That was already satisfied at that time. In other words, f min and f max It is calculated under the condition of satisfying frequency and voltage constraints. Since it is calculated offline, it is not reflected in the control system.

[0076] In the above expression, k represents time k, and k+1 represents time k+1.

[0077] The optimization algorithm for determining the control frequency of a chip based on maximizing the objective function may include the following steps: Preset step size based on chip frequency adjustment Construct a candidate frequency set: ∩ [fmin, fmax] Where m is the maximum number of adjustment steps (1≤n). Traverse the candidate frequency set, calculate the objective function value corresponding to each candidate frequency through the prediction model, and select the candidate frequency with the largest objective function that satisfies all constraints as the optimal control frequency f(k+1).

[0078] The execution module uses the optimal frequency obtained by the MPC core optimization module as the control frequency, and calculates its voltage V using the voltage-frequency model. set The frequency and voltage are dynamically adjusted by configuring the chip's voltage management unit. Then, in the next control cycle T, the above "state awareness – optimization calculation – execution adjustment" process is repeated to achieve rolling time-domain optimization.

[0079] According to embodiments of this application, the core parameters of the chip performance management system are set as follows: - Frequency parameter: fmin =500MHz, f max =2500MHz, =20MHz, maximum adjustment steps m=5; - Voltage parameter: V min =0.7V, V max =0.9V; -Temperature parameter: Tj min =-5℃, Tj max =95℃; -Power consumption parameter: P max =300W; -MPC parameters: prediction time m = 20 steps, control period T = 1ms, objective function weights α = 0.85, β = 0.15.

[0080] Figure 2 A structural block diagram of a chip performance management system according to an exemplary embodiment of this application is shown. Figure 2 As shown, the system includes: - Computing Module: This is the computing module inside the GPU chip. It acts as the control object, executing application computing tasks. Its operating frequency and voltage can be adjusted by the power management unit. - The state awareness module includes: a performance monitor for measuring or characterizing the real-time performance metrics of the computing unit; an equivalent switched capacitor monitor for measuring the equivalent switched capacitor Cac; and a temperature sensor for measuring the chip junction temperature. - MPC Controller: Runs a discrete-time prediction model and an ergonomic optimization algorithm to determine the chip's control frequency based on maximizing the objective function. The default control cycle is, for example, 1ms. The MPC controller includes a temperature prediction model, a power consumption prediction model, a voltage and frequency calculation model, a performance prediction model, and filters. -Execution module: Based on the optimal objective function found by the optimization algorithm, the control frequency corresponding to the chip is set.

[0081] The present invention also provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, causes the processor to perform the above-described method.

[0082] The foregoing description and illustrations of the present invention are not restrictive. It will be apparent to those skilled in the art that the invention is not limited to the details of the exemplary embodiments described above, and that the invention can be implemented in other specific forms without departing from its spirit or essential characteristics. Therefore, the scope of protection claimed by the present invention is defined by the claims rather than the foregoing description, and all variations falling within the meaning and scope of equivalents of the claims are covered within the scope of protection of the present invention.

Claims

1. A chip performance management method, characterized in that, The method includes: Set the chip's initial frequency and initial voltage; The equivalent switched capacitance is measured using an equivalent switched capacitance monitor; The chip junction temperature is measured using a temperature sensor. Measure the chip's performance metrics using performance sensors; The control frequency of the chip is determined by the MPC controller based on the objective function; Adjust the chip's operating frequency according to the determined control frequency. The objective function is: ， in: For performance reward functions; This is the power consumption loss function; This is the temperature loss function; α is the weight of the performance reward function, and its value ranges from 0 to 1. β is the weight of the energy loss function, and its value ranges from 0 to 1. n represents the nth chip; N represents the total number of chips, and N is greater than or equal to 1; The calculation formula is as follows: in, - This is the highest permissible frequency; - The frequency of k at the current time; - For the target frequency; - To obtain the current performance metrics from the performance monitor; - The performance index is predicted based on the target frequency f(k+1); - The performance reward value is predicted based on the target frequency f(k+1); The calculation formula is as follows: in, - Maximum allowable power consumption; - The total power consumption is calculated using a power consumption prediction model based on the target frequency f(k+1). The calculation formula is as follows: in, -Tj max This is the maximum permissible chip junction temperature; -Tj min Minimum allowable chip junction temperature; - This refers to the chip junction temperature predicted based on the target frequency.

2. The method according to claim 1, characterized in that, Determining the chip's control frequency through the objective function includes: Preset step size based on chip frequency adjustment Construct a candidate frequency set: m is the maximum number of adjustment steps (1≤m); Calculate the objective function value for each candidate frequency; The candidate frequency with the largest objective function value is selected as the control frequency.

3. The method according to claim 1, characterized in that, Adjusting the chip's operating frequency according to the determined control frequency includes: Based on the control frequency, the chip set voltage is obtained using a voltage frequency model; and Configure the chip according to the chip's set voltage.

4. The method according to claim 1, characterized in that, The process of determining the control frequency of a chip based on the objective function satisfies the following constraints: -Temperature constraint: T min <T<T max T max and T min These are the maximum and minimum allowable chip junction temperatures, respectively. - Voltage constraint: V min <V device <V max V max and V min These are the highest and lowest permissible voltages on the chip's MOSFET, respectively; -Frequency constraint: F min <f<F max F max and F min The highest and lowest permissible frequencies; -Power consumption constraint: P <P max P max This represents the maximum allowable power consumption.

5. The method according to claim 1, characterized in that, The power consumption prediction model is as follows: in, in, K tb , K vb These are the parameters for calculating leakage current power consumption in relation to temperature and voltage; V ref, T ref Calculate K during the testing process tb , K vb Use reference voltage and temperature; V device (k+1) represents the voltage across the MOSFET of the chip at time k+1; Tj(k+1) is the chip junction temperature at time k+1; Cac is the equivalent switched capacitor; The leakage current power consumption was measured under Vref and Tref conditions.

6. The method according to claim 5, characterized in that... , in, For Cac and voltage V device The linear coefficients.

7. The method according to claim 3, characterized in that, The voltage-frequency model is as follows: in, V set Indicates the chip's set voltage; V device This indicates the voltage across the chip's MOSFET; V droop V represents set To V device pressure drop, For voltage frequency parameters; These are the parameters for the pressure drop model; This refers to the control frequency of the chip.

8. The method according to any one of claims 1 to 7, characterized in that, The chip in question is a GPU chip.

9. A chip performance management system for executing the method according to any one of claims 1 to 8, characterized in that, The system includes: The computing module is used to perform the chip's computational tasks; The state awareness module includes: A performance monitor is used to measure the performance metrics of the chip. Equivalent switched capacitance monitor, used to measure equivalent switched capacitance; Temperature sensor used to measure chip junction temperature; An MPC controller is used to determine the control frequency of a chip based on an objective function. The execution module is configured to set the chip based on the control frequency.

10. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it causes the processor to perform the method according to any one of claims 1 to 8.

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