Interlocking product data analysis method, system and equipment
By constructing a multi-branch tree model and using node replacement optimization technology, the problems of complex data structure parsing and consistency verification in interlocking equipment data verification were solved, improving the integrity and accuracy of data parsing and ensuring the safety and production efficiency of interlocking equipment.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- CRSC RESEARCH & DESIGN INSTITUTE GROUP CO LTD
- Filing Date
- 2026-01-04
- Publication Date
- 2026-05-12
AI Technical Summary
Existing technologies for data verification in interlocking equipment suffer from problems such as difficulty in detecting data configuration errors, difficulty in parsing complex data structures, and low efficiency in verifying data consistency and logical relationships, which limit the safety and production efficiency of interlocking equipment.
By constructing a multi-branch tree model and optimizing node replacement, structured parsing of interlocking program language data is achieved. Queue traversal and type replacement mechanisms are used to ensure the correct supplementation of unparsed nodes, thereby improving the completeness and accuracy of data parsing.
It significantly improves the sufficiency and accuracy of data verification, solves the technical problems of header file nesting and unresolved type references, realizes efficient structure variable assignment parsing and data consistency verification, reduces the risk of missed detections, and improves the delivery quality and safety of interlocking equipment.
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Figure CN122018913A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of railway signal safety control technology, and in particular to a data analysis method, system and equipment for interlocking products. Background Technology
[0002] Railway signal interlocking equipment is the core control system ensuring train operation safety. It uses technical means to precisely control key equipment within stations, such as routes, switches, and signals, and ensures correct interlocking relationships between these devices. With technological advancements, interlocking systems have evolved from early mechanical, electromechanical, and relay interlocking to the current mainstream computer interlocking systems. Computer interlocking systems, with software at their core, achieve interlocking logic control at different stations through data configuration, significantly improving operational safety and efficiency. As a high-safety component of the railway signaling system, interlocking systems can promptly implement protective measures in the event of equipment or system failures, preventing accidents from escalating and ensuring transportation safety.
[0003] The testing and verification of interlocking equipment includes two key aspects: functional verification and data verification. Data verification, as a crucial step in user acceptance of interlocking equipment, is particularly essential. In practical applications, even if the software's functional logic is correct, errors in the data configuration supporting those functions can still cause the system to issue incorrect signals, leading to interlocking equipment failure, serious safety issues, and even catastrophic consequences. Currently, interlocking equipment manufacturers primarily use black-box testing methods to verify displayed data. While this method can detect some configuration errors, it has significant limitations. First, black-box testing cannot comprehensively cover the verification of hidden data; for example, data validity checks and correlation verification rely heavily on manual operations, which are not only inefficient but also prone to errors introduced by human factors. Second, existing methods struggle to deeply analyze and comprehensively check complex nested structures or composite data configurations. Third, although some hidden errors can be detected through automated testing across the entire site, this method is costly and time-consuming, lacking economic viability and widespread application.
[0004] Existing technical solutions present a significant contradiction between the sufficiency and efficiency of data verification. Despite continuous efforts by manufacturers to improve data verification methods, the following key technical issues remain unresolved: First, a lack of systematic parsing capabilities for programming language-style data, particularly in handling complex syntax structures in C such as nested structures, macro definitions, and user-defined types; second, an inability to effectively handle parsing difficulties caused by mutual inclusion of header files, as well as issues related to unresolved type references; and third, existing methods struggle to achieve efficient and accurate data consistency checks and logical relationship verification, failing to ensure that data configurations fully comply with survey and engineering design requirements. These problems have become technical bottlenecks restricting the improvement of production efficiency and quality in interlocking equipment.
[0005] Chinese patent CN107808020A discloses a computer interlocking software development and implementation system based on a formal model. However, this system has the following shortcomings in practical applications: 1. Lack of in-depth analysis and verification of data configuration: It does not involve independent analysis and verification of engineering data (such as the data structure after survey and design conversion), making it unable to effectively detect data configuration errors and posing a risk of interlocking failure due to data errors. 2. Reliance on formal models, unable to handle non-model-based data problems: While SCADE tools can automatically generate code and verify logical consistency, they cannot handle conversion errors during data configuration. For example, if there are nested structure errors or header file reference problems in the data configuration, the formal model cannot identify such non-logical data defects. 3. Limited test coverage: It lacks automated verification of data consistency (such as comparison with survey and design data) and correlation (such as the constraint relationship between routes and turnouts). Implicit data errors (such as mistakenly adding turnouts at the end of the data) require manual inspection or full-station automated testing, which is inefficient and costly.
[0006] Therefore, how to achieve structured parsing of interlocking program language data, efficiently process complex data structures, improve the completeness and accuracy of data parsing, and ultimately ensure railway traffic safety has become an urgent technical problem to be solved. Summary of the Invention
[0007] In view of this, in order to overcome the shortcomings of the prior art, the present invention aims to provide a method, system and device for data analysis of interlocking products.
[0008] According to a first aspect of the present invention, a method for analyzing interlocking product data is provided, the method comprising the following steps: S1: Parse the programming language data in the interlocking software to obtain the structure type definition and structure variables; S2: Construct a multi-way tree based on the structure type definition, and optimize the multi-way tree model by replacing nodes. This optimization includes: Scan the parsed structure types and their multi-way trees in the global storage sequentially to check for any unresolved nodes; For a multi-way tree with unresolved nodes, initialize the processing queue and enqueue the head node; When the queue is not empty, dequeue the node and traverse its child nodes; if a child node is not a leaf node, enqueue it. If it is a leaf node and the type is unresolved, then look up the corresponding type in the global storage; If a corresponding type is found, the current node is replaced with a copy of the multi-way tree of that type, and the copied child nodes are enqueued. If no corresponding type is found, the multi-way tree is marked as incomplete, and the next child node is processed. S3: Use an optimized multi-branch tree to assign and parse the structure variables to obtain their values; S4: Verify the obtained structure variable values with the input data and output the verification results.
[0009] Furthermore, in step S1, parsing the program language data in the interlocking software includes: parsing macro definitions, user-defined types, structure data declarations, and structure data definitions in the C language according to the programming syntax rules of the interlocking equipment.
[0010] Furthermore, in step S2, a multi-way tree model is constructed based on the structure type definition, including: using a finite state machine to parse the structure type definition, constructing a multi-way tree, and when a structure with an undefined member variable type is encountered, creating an unparsed node and marking its state.
[0011] Furthermore, in step S2, the finite state machine includes the following states: start state, parse structure key state, parse type name state, parse left curly brace state, parse member variable state, parse right curly brace state, and end state.
[0012] Furthermore, in step S2, the optimization of the multi-branch tree model through node replacement also includes: storing only one copy of the multi-branch tree structure for each structure type, and directly pointing to the stored multi-branch tree structure when nesting references are made.
[0013] Further, step S3 includes: using a finite state machine to find the corresponding structure type in the global variables declared by the structure type that has been parsed through the header file, obtaining the corresponding multi-branch tree structure according to the found structure type, and parsing the assigned data according to the found multi-branch tree structure.
[0014] Furthermore, in step S3, the finite state machine includes the following states: start state, resolve variable type state, resolve variable name state, resolve equal sign state, resolve left brace state, resolve numerical value state, resolve comma state, resolve right brace state, and end state.
[0015] Further, step S4 includes: The obtained structure variable values are checked for consistency with the input data. If they are inconsistent, the check fails. When the two are consistent, the logical relationship between the obtained structure variable values and the input data is checked. If the logical relationship between the two conforms to the interlocking logic rules, the check is deemed to have passed. If the logical relationship between the two does not conform to the interlocking logic rules, the check is deemed to have failed, and the check result is output.
[0016] According to a second aspect of the present invention, an interlocking product data analysis system is provided, the system comprising an analysis server, the analysis server comprising: The programming language parsing module is used to parse the programming language data in the interlocking software and obtain the structure type definitions and structure variables. The structure type definition parsing module is used to construct a multi-way tree based on the structure type definition and optimize the multi-way tree model by replacing nodes. The structure variable parsing module is used to parse the assignment of structure variables using an optimized multi-way tree to obtain the numerical values of the structure variables; The verification module is used to verify the obtained structure variable values against the input data and output the verification results. The structure type definition parsing module is used for: Scan the parsed structure types and their multi-way trees in the global storage sequentially to check for any unresolved nodes; For a multi-way tree with unresolved nodes, initialize the processing queue and enqueue the head node; When the queue is not empty, dequeue the node and traverse its child nodes; if a child node is not a leaf node, enqueue it. If it is a leaf node and the type is unresolved, then look up the corresponding type in the global storage; If a corresponding type is found, the current node is replaced with a copy of the multi-way tree of that type, and the copied child nodes are enqueued. If no corresponding type is found, the multi-way tree is marked as incomplete, and the next child node is processed.
[0017] According to a third aspect of the present invention, a computer device is provided, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the method described in the first aspect of the present invention.
[0018] The interlocking product data analysis method, system, and equipment of the present invention achieve structured parsing of interlocking program language data by constructing a multi-branch tree model and optimizing node replacement, efficiently processing complex data structures, and ensuring that unparsed nodes are correctly supplemented through queue traversal and type replacement mechanisms, thereby improving the completeness and accuracy of data parsing. Attached Figure Description
[0019] To more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings used in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0020] Figure 1 This is an example architecture diagram of an interlocking product data analysis system according to an embodiment of the present invention; Figure 2 This is an example architecture diagram of the analysis server of an interlocking product data analysis system according to an embodiment of the present invention; Figure 3 This is a flowchart illustrating the steps of an interlocking product data analysis method according to an embodiment of the present invention. Figure 4 A schematic diagram illustrating the principle of the interlocking product data analysis method according to an embodiment of the present invention; Figure 5 This is an example diagram of a finite state machine for parsing structure type definitions according to an embodiment of the present invention; Figure 6 Example diagram of structure type definition according to an embodiment of the present invention; Figure 7 Here is an example diagram of a multi-way tree structure generated from the state machine parsing. Figure 8 This is an example diagram of a multi-way tree structure after processing unknown nodes; Figure 9 This is an example diagram of a multi-branch tree optimized according to the method of an embodiment of the present invention; Figure 10 This is an example diagram of a finite state machine for parsing structure variables according to an embodiment of the present invention; Figure 11 An example diagram showing the assigned multi-way tree obtained by the method according to an embodiment of the present invention; Figure 12 This is a schematic diagram of the structure of the device provided by the present invention. Detailed Implementation
[0021] The embodiments of the present invention will now be described in detail with reference to the accompanying drawings.
[0022] It should be noted that, in the absence of conflict, the following embodiments and features can be combined with each other; and, based on the embodiments of this disclosure, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this disclosure.
[0023] It should be noted that various aspects of embodiments within the scope of the appended claims are described below. It will be apparent that the aspects described herein can be embodied in a wide variety of forms, and any particular structure and / or function described herein is merely illustrative. Based on this disclosure, those skilled in the art will understand that one aspect described herein can be implemented independently of any other aspect, and two or more of these aspects can be combined in various ways. For example, any number of aspects set forth herein can be used to implement the device and / or practice the method. Additionally, this device and / or method can be implemented using structures and / or functionalities other than one or more of the aspects set forth herein.
[0024] The data analysis principle of the interlocking products in this embodiment is as follows: The verification of interlocking data must be based on the parsing of configuration data, and the parsing of data objects requires the parsing of corresponding data types and data variables. In the parsing process, the parsing of macro definitions will be involved. Therefore, the parsing of structure type definitions is carried out on the basis that the macro definitions have been parsed.
[0025] The standard parsing process for structure type definitions involves first parsing the structure definition, then parsing the structure variables, and finally extracting the data from the structure variables for data validation. The algorithm is as follows: The finite state machine is defined according to the structure type for parsing, and a parse multi-way tree is constructed; the finite state machine is defined according to the structure variables for parsing, and a variable assignment multi-way tree is constructed; based on this, interlocking data verification is performed according to the input of the interlocking product.
[0026] Figure 1 This is an example architecture diagram of an interlocking product data analysis system according to an embodiment of the present invention, such as... Figure 1 As shown, the system may include an analysis server 101, a communication network 102, and / or one or more analysis clients 103. Figure 1 The example in the text is multiple analysis clients 103.
[0027] Analysis server 101 can be any suitable server for storing information, data, programs, and / or any other suitable type of content. In some embodiments, analysis server 101 can perform appropriate functions. For example, in some embodiments, analysis server 101 can be used for interlocking product data analysis. As an optional example, in some embodiments, analysis server 101 can be used to: parse program language data in interlocking software to obtain structure type definitions and structure variables; construct a multi-way tree based on the structure type definitions, and optimize the multi-way tree model through node replacement; use the optimized multi-way tree to assign and parse the structure variables to obtain the structure variable values; verify the obtained structure variable values against the input data, and output the verification results.
[0028] Figure 2 This is an example architecture diagram of the analysis server of an interlocking product data analysis system according to an embodiment of the present invention, as shown below. Figure 2 As shown, the analysis server in this embodiment includes: The programming language parsing module is used to parse the programming language data in the interlocking software and obtain the structure type definitions and structure variables. The structure type definition parsing module is used to construct a multi-way tree based on the structure type definition and optimize the multi-way tree model by replacing nodes. The structure variable parsing module is used to parse the assignment of structure variables using an optimized multi-way tree to obtain the numerical values of the structure variables; The verification module is used to verify the obtained structure variable values against the input data and output the verification results.
[0029] As another example, in some embodiments, the analysis server 101 may send the interlocking product data analysis method to the analysis client 103 for user use, based on a request from the analysis client 103.
[0030] As an optional example, in some embodiments, the analysis client 103 is used to provide a visual analysis interface for receiving a user's selection input operation for interlocking product data analysis, and for retrieving and displaying the analysis interface corresponding to the option selected by the selection input operation from the analysis server 101 in response to the selection input operation. The analysis interface displays at least information on interlocking product data analysis and operation options for the information on interlocking product data analysis.
[0031] In some embodiments, communication network 102 can be any suitable combination of one or more wired and / or wireless networks. For example, communication network 102 can include any one or more of the following: the Internet, intranet, wide area network (WAN), local area network (LAN), wireless network, digital subscriber line (DSL) network, frame relay network, asynchronous transfer mode (ATM) network, virtual private network (VPN), and / or any other suitable communication network. Analysis client 103 can connect to communication network 102 via one or more communication links (e.g., communication link 104), which can be linked to analysis server 101 via one or more communication links (e.g., communication link 105). Communication links can be any communication link suitable for transmitting data between analysis client 103 and analysis server 101, such as network links, dial-up links, wireless links, hardwired links, any other suitable communication links, or any suitable combination of such links.
[0032] The analysis client 103 may include any one or more clients that present an interface related to interlocking product data analysis in a suitable form for user use and operation. In some embodiments, the analysis client 103 may include any suitable type of device. For example, in some embodiments, the analysis client 103 may include a mobile device, tablet computer, laptop computer, desktop computer, and / or any other suitable type of client device.
[0033] Although the analytics server 101 is illustrated as a single device, in some embodiments, any suitable number of devices may be used to perform the functions performed by the analytics server 101. For example, in some embodiments, multiple devices may be used to implement the functions performed by the analytics server 101. Alternatively, cloud services may be used to implement the functions of the analytics server 101.
[0034] Based on the above system, this invention provides a method for analyzing interlocking product data, which will be described in the following embodiments.
[0035] Figure 3 This is a flowchart illustrating the steps of an interlocking product data analysis method according to an embodiment of the present invention. The interlocking product data analysis method of this embodiment can be executed on an analysis server and includes the following steps: Step S1: Parse the programming language data in the interlocking software to obtain the structure type definitions and structure variables.
[0036] As an optional example, in this embodiment, macro definitions, custom types, structure data declarations, and structure data definitions in the C language are parsed according to the programming syntax rules of the interlocking device.
[0037] In practical applications, the parsing of programming language data, based on the programming syntax rules and definitions of interlocking devices, and the analysis of data configuration rules within the domain, can be summarized in the following aspects: 1. Data declarations are defined using a structure, which in C is the struct type; 2. Nested definitions are allowed in data declarations, as shown in the following examples: struct A{ ... struct B{ ...... }; ... }; 3. The variable types in the data declaration can be types supported by the C language, enumeration types, structure types, or user-defined declared types; 4. Data declarations may include variable definitions of composite types, such as pointers and arrays, as shown in the following examples: struct A{ ... Variable type a [dimension]; ... Variable type *b; }; 5. Data declarations can use or not use typedef definitions; 6. When the variable definition in the data declaration is of a composite type, the dimension can be defined using a macro or not, and it may be an expression; 7. The data in the data definition may be macro definitions, numerical values, enumerations, or expressions.
[0038] The above data configuration rules are analyzed as follows: 1. Macro definition parsing; 2. Parsing of custom types, including types defined using the #define and typedef keywords; 3. Parsing of structure data declarations; 4. Parsing of structure data definitions.
[0039] The above analysis results are used for subsequent analysis.
[0040] S2: Construct a multi-branch tree based on the structure type definition, and optimize the multi-branch tree model by replacing nodes.
[0041] Figure 4 This is a schematic diagram illustrating the principle of the interlocking product data analysis method according to an embodiment of the present invention, such as... Figure 4As shown, as an optional example, this embodiment uses a finite state machine to parse the structure type definition and construct a multi-way tree. When a structure with an undefined member variable type is encountered, an unresolved node is created and its state is marked. The finite state machine includes the following states: start state, parse structure keyword state, parse type name state, parse left curly brace state, parse member variable state, parse right curly brace state, and end state. Figure 5 This is an example diagram of a finite state machine for parsing structure type definitions according to an embodiment of the present invention.
[0042] As an optional example, this embodiment optimizes the multi-way tree model by replacing nodes in the following manner: The process sequentially scans the resolved structure types and their multi-way trees in the global storage, checking for any unresolved nodes. For multi-way trees with unresolved nodes, a processing queue is initialized, and the head node is enqueued. If the queue is not empty, the node is dequeued, and its child nodes are traversed. If a child node is not a leaf node, it is enqueued. If it is a leaf node and is of an unresolved type, the corresponding type is searched in the global storage. If the corresponding type is found, the current node is replaced with a copy of the multi-way tree of that type, and the copied child nodes are enqueued. If no corresponding type is found, the multi-way tree is marked as incomplete, and the next child node is processed.
[0043] It should be noted that in this embodiment, each structure type stores only one copy of the multi-branch tree structure, and nested references directly point to the already stored multi-branch tree structure.
[0044] The following explanation is further elaborated in a specific scenario. In C, the declarations of various structure definitions are located in different header files, with mutual inclusion completing the definitions within their respective domains. For example, the following definition scans the file in the order of ah and bh. ah declares the structure RRR, and bh declares the structure NN. After executing the state machine, since NN was not parsed when parsing RRR, the node corresponding to NN is an unparsed node after the structure of RRR is parsed, and the corresponding state is q4. To avoid the problem of mutual inclusion of header files, a further processing is needed after parsing the declarations and definitions of each structure in the header file: 1. Scan the parsed structure declaration variables and their corresponding multi-way trees stored in the global variable stParaTypes in sequence. Use the flag notFinished in each multi-way tree to record whether there are any unresolved nodes; 2. For a multi-way tree corresponding to a structure, initialize the queue, check if the flag notFinished for the multi-way tree is true, and enqueue the head node; 3. If the queue is not empty, dequeue the child nodes; traverse the child nodes sequentially. 4. If child node A is a non-leaf node, enqueue it; 5. If child node A is a leaf node, check if its corresponding type name exists in stParaTypes. If it exists, find the multi-way tree A' corresponding to this type name, replace this node A with a copy of A', and enqueue the child nodes of this copy. If it does not exist, set notFinished to true and return to step 3 to traverse the next child node. 6. If notFinished is false, then the multi-branch tree corresponding to this structure has been processed, resulting in a complete parsed definition.
[0045] For example, consider the following: the `ah` header file declares the `RRR` type, `bh` declares the `NN` type, and `ch` declares the `cNN` type. During file scanning, the scanning order is `ah`, `bh`, `ch`. After `ah` finishes scanning the `RRR` type, since the `NN` type hasn't been scanned, its corresponding multi-way tree's child nodes can only be unknown nodes. Similarly, the `cNN` node in the `NN` type is also an unknown node. Through the above processing, while `RRR` waits for `NN` processing to complete, during `NN` processing, since the `cNN` type has no unknown nodes, it directly replaces its corresponding child nodes and sets `notFinished` to false. At this time, `RRR` also replaces the corresponding node of `NN`, and its `notFinished` is set to false. Thus, the multi-way trees corresponding to the three types are constructed. Figure 6 This is an example diagram of a structure type definition according to an embodiment of the present invention.
[0046] Suppose we have a program file with type declarations, defined as shown in Table 1 below: Table 1
[0047] The above structure type definitions are parsed. Figure 7 This is an example diagram of a multi-way tree structure generated from the state machine parsing; unknown nodes are processed in the parsed multi-way tree structure. Figure 8 This is an example diagram of a multi-way tree structure after processing unknown nodes; Figure 9 This is an example diagram of a multi-way tree optimized according to an embodiment of the present invention. Figure 9 As shown, each type has only one storage structure, and nested types directly point to this structure. After optimization, each type is processed only once, significantly reducing time complexity.
[0048] S3: Use an optimized multi-branch tree to assign and parse the structure variables to obtain their values.
[0049] The prerequisite for analyzing interlocking data configuration is the parsing of structure types and variable assignments. After parsing a C language structure type, the variables defined within it need to be parsed according to this structure to obtain the specific data results.
[0050] As an optional example, this embodiment uses a finite state machine to search for the corresponding structure type in the global variables declared by the structure type that has been parsed by the header file, obtains the corresponding multi-branch tree structure according to the searched structure type, and parses the assigned data according to the searched multi-branch tree structure.
[0051] A finite state machine includes the following states: start state, resolve variable type state, resolve variable name state, resolve equal sign state, resolve left curly brace state, resolve value state, resolve comma state, resolve right curly brace state, and end state. Figure 10 This is an example diagram of a finite state machine for parsing structure variables according to an embodiment of the present invention.
[0052] For example, the definition of struct A a={3,4,{5,{{6},{7}},8},9} is: struct A{ int x; int y; struct B b; int z; } struct B{ int d; struct C e; int f; }; struct C{ int g; int h; int i; }; Figure 11 An example diagram illustrating the method for obtaining a multi-way tree after assignment according to an embodiment of the present invention.
[0053] S4: Verify the obtained structure variable values with the input data and output the verification results.
[0054] The system performs a consistency check between the acquired structure variable values and the input data. If they do not match, the check fails. If they match, the system performs a logical relationship check between the acquired structure variable values and the input data. If the logical relationship between the two conforms to the interlocking logic rules, the check passes. If the logical relationship between the two does not conform to the interlocking logic rules, the check fails, and the check result is output.
[0055] In practical applications, the interlocking product data analysis method and system of this embodiment, through systematic data parsing, multi-branch tree modeling, and automated verification mechanisms, has achieved significant technological progress in the field of railway signal interlocking data verification. Based on type-defined and quantitatively defined multi-branch tree mapping and optimized multi-branch tree assignment, the specific beneficial effects are as follows: 1. Significantly improves the sufficiency and accuracy of data validation. By employing programming language parsing techniques, this system comprehensively handles macro definitions, user-defined types, nested structures, and composite types (such as pointers and arrays) in the C language, overcoming the limitations of traditional black-box testing that can only verify explicit data. Through systematic parsing of implicit data (such as relationships and validity), it achieves deep inspection of data configuration, effectively avoiding interlocking logic anomalies caused by implicit issues such as misconfigurations at the end of data lines or type errors, significantly reducing the risk of missed detections, and ensuring the comprehensiveness and accuracy of data verification.
[0056] 2. Solve the technical challenges of header file nesting and unresolved type references. This paper employs a multi-branch tree model and node replacement mechanism to effectively handle unresolved type references caused by mutual inclusion of header files. It uses a finite state machine to parse structure type definitions, constructs a multi-branch tree structure, and utilizes a global type table and queue traversal mechanism to dynamically replace unresolved nodes and optimize the multi-branch tree. This avoids redundant parsing and storage, solves the problem of incomplete parsing caused by nested header files in existing technologies, and improves the efficiency and reliability of data parsing.
[0057] 3. Achieve efficient structure variable assignment parsing and data extraction Based on a multi-branch tree model, this method uses another finite state machine to parse assignment statements of structure variables, extracting numerical information layer by layer and constructing an assignment multi-branch tree. It supports recursive parsing of complex nested structures (such as multiple structures, arrays, and expressions), ensuring that all numerical information is completely extracted. For assignment statements, it can accurately parse the numerical values at each level, providing a complete data foundation for subsequent verification.
[0058] 4. Automated data consistency comparison and logical relationship verification The parsed data is automatically compared with survey and design data (such as route, turnout, signal attributes and relationships) to achieve consistency checks. Simultaneously, logical verification is performed based on interlocking logic rules (such as the locking relationship between routes and turnouts, and the association between signals and sections). This method replaces traditional manual verification, significantly improving verification efficiency, avoiding human error, and generating structured reports that clearly indicate the location, type, and correction suggestions of errors.
[0059] 5. Optimize processing efficiency and resource utilization. By optimizing multi-branch tree storage (such as type-unique storage and pointer references to replace repeated construction) and using a breadth-first traversal algorithm, this invention significantly reduces time complexity and memory usage. Each structure type is processed only once, and nested references directly point to existing structures, avoiding redundant calculations and improving the efficiency of large-scale data processing. It is suitable for batch processing of multiple configuration files.
[0060] 6. Enhance system applicability and scalability The multi-branch tree parsing and verification method is not only applicable to railway signal interlocking equipment, but can also be extended to other signal control systems with high security requirements (such as train control systems and automatic driving signal systems). Its parsing mechanism, based on C language syntax rules, has good versatility, can adapt to the data configuration specifications of different manufacturers, and has broad application prospects.
[0061] 7. Improve the delivery quality and safety of interlocking equipment Comprehensive and efficient data verification ensures the correctness and consistency of interlocking equipment data configuration, preventing safety incidents caused by data errors (such as incorrect signal commands and switch malfunctions) at the source. Combined with actual engineering needs, this method supports a graphical interface and batch processing, significantly improving the factory quality and acceptance efficiency of interlocking equipment, and providing reliable protection for railway traffic safety.
[0062] like Figure 12 As shown, the present invention also provides a device including a processor 210, a communication interface 220, a memory 230 for storing processor-executable computer programs, and a communication bus 240. The processor 210, communication interface 220, and memory 230 communicate with each other via the communication bus 240. The processor 210 implements the aforementioned interlocking product data analysis method by running the executable computer program.
[0063] The computer program in memory 230, when implemented as a software functional unit and sold or used as an independent product, can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, or a part of the technical solution, can be embodied in the form of a software product. This computer software product is stored in a storage medium and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute all or part of the steps of the methods of the various embodiments of this application. The aforementioned storage medium includes various media capable of storing program code, such as USB flash drives, portable hard drives, read-only memory (ROM), random access memory (RAM), magnetic disks, or optical disks.
[0064] The system embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected based on actual needs to achieve the purpose of this embodiment. Those skilled in the art can understand and implement this without any creative effort.
[0065] Through the above description of the embodiments, those skilled in the art can clearly understand that each embodiment can be implemented by means of software plus necessary general-purpose hardware platforms, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solutions, in essence or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., including several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods of various embodiments or some parts of embodiments.
[0066] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.
Claims
1. A method for analyzing interlocking product data, characterized in that, The method includes the following steps: S1: Parse the programming language data in the interlocking software to obtain the structure type definition and structure variables; S2: Construct a multi-way tree based on the structure type definition, and optimize the multi-way tree model by replacing nodes. This optimization includes: Scan the parsed structure types and their multi-way trees in the global storage sequentially to check for any unresolved nodes; For a multi-way tree with unresolved nodes, initialize the processing queue and enqueue the head node; When the queue is not empty, dequeue the node and traverse its child nodes; if a child node is not a leaf node, enqueue it. If it is a leaf node and the type is unresolved, then look up the corresponding type in the global storage; If a corresponding type is found, the current node is replaced with a copy of the multi-way tree of that type, and the copied child nodes are enqueued. If no corresponding type is found, the multi-way tree is marked as incomplete, and the next child node is processed. S3: Use an optimized multi-branch tree to assign and parse the structure variables to obtain their values; S4: Verify the obtained structure variable values with the input data and output the verification results.
2. The interlocking product data analysis method according to claim 1, characterized in that, In step S1, the program language data in the interlocking software is parsed, including: parsing macro definitions, user-defined types, structure data declarations, and structure data definitions in the C language according to the programming syntax rules of the interlocking equipment.
3. The interlocking product data analysis method according to claim 1, characterized in that, In step S2, a multi-way tree model is constructed based on the structure type definition, including: using a finite state machine to parse the structure type definition, constructing a multi-way tree, and when a structure with an undefined member variable type is encountered, creating an unparsed node and marking its state.
4. The interlocking product data analysis method according to claim 3, characterized in that, In step S2, the finite state machine includes the following states: start state, parse structure key state, parse type name state, parse left curly brace state, parse member variable state, parse right curly brace state, and end state.
5. The interlocking product data analysis method according to claim 1, characterized in that, In step S2, the multi-branch tree model is optimized by replacing nodes. This also includes storing only one copy of the multi-branch tree structure for each structure type, and directly pointing to the stored multi-branch tree structure when nesting references are made.
6. The interlocking product data analysis method according to claim 1, characterized in that, Step S3 includes: using a finite state machine to find the corresponding structure type in the global variables declared by the structure type that has been parsed by the header file, obtaining the corresponding multi-branch tree structure according to the found structure type, and parsing the assigned data according to the found multi-branch tree structure.
7. The interlocking product data analysis method according to claim 6, characterized in that, In step S3, the finite state machine includes the following states: start state, resolve variable type state, resolve variable name state, resolve equal sign state, resolve left curly brace state, resolve numerical value state, resolve comma state, resolve right curly brace state, and end state.
8. The interlocking product data analysis method according to claim 1, characterized in that, Step S4 includes: The obtained structure variable values are checked for consistency with the input data. If they are inconsistent, the check fails. When the two are consistent, the logical relationship between the obtained structure variable values and the input data is checked. If the logical relationship between the two conforms to the interlocking logic rules, the check is deemed to have passed. If the logical relationship between the two does not conform to the interlocking logic rules, the check is deemed to have failed, and the check result is output.
9. A data analysis system for interlocking products, characterized in that, The system includes an analysis server, which includes: The programming language parsing module is used to parse the programming language data in the interlocking software and obtain the structure type definitions and structure variables. The structure type definition parsing module is used to construct a multi-way tree based on the structure type definition and optimize the multi-way tree model by replacing nodes. The structure variable parsing module is used to parse the assignment of structure variables using an optimized multi-way tree to obtain the numerical values of the structure variables; The verification module is used to verify the obtained structure variable values against the input data and output the verification results. The structure type definition parsing module is used for: Scan the parsed structure types and their multi-way trees in the global storage sequentially to check for any unresolved nodes; For a multi-way tree with unresolved nodes, initialize the processing queue and enqueue the head node; When the queue is not empty, dequeue the node and traverse its child nodes; if a child node is not a leaf node, enqueue it. If it is a leaf node and the type is unresolved, then look up the corresponding type in the global storage; If a corresponding type is found, the current node is replaced with a copy of the multi-way tree of that type, and the copied child nodes are enqueued. If no corresponding type is found, the multi-way tree is marked as incomplete, and the next child node is processed.
10. A computer device, characterized in that, The computer device includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the program to implement the steps of the method according to any one of claims 1-8.