Request response method and device, control system, vehicle, storage medium, program product and chip system

Abstract

The invention relates to a request response method and device, a control system, a vehicle, a storage medium, a program product and a chip system.The method comprises the steps that a second processor sends a data access request to a first processor under the condition that an access requirement for accessing the storage medium exists; the first processor accesses a storage medium in response to the data access request; and the second processor executes subsequent operation under the condition of receiving the response information returned by the first processor. The method is used for realizing real-time response feedback of tasks in the second processor.

Description

Technical Field

[0001] This disclosure relates to the field of computer storage technology, and in particular to a request-response method, apparatus, control system, vehicle, storage medium, program product, and chip system. Background Technology

[0002] As automotive electronic and electrical architectures evolve towards multi-core heterogeneous platforms, different functional modules in automotive operating systems (such as those based on AUTOSAR) need to be deployed on different physical cores. Typically, multi-core architectures use asynchronous cross-core service calls to achieve request-response between multiple cores. However, asynchronous cross-core service calls are difficult to meet the requirements of real-time synchronous response, high concurrency processing, and high reliability in real-world application scenarios. Summary of the Invention

[0003] To overcome the problems existing in related technologies, this disclosure provides a request-response method, apparatus, control system, vehicle, storage medium, program product, and chip system to solve the problem that the asynchronous cross-core service call method in the prior art cannot meet the real-time synchronous response requirement.

[0004] According to some embodiments of this disclosure, a request-response method is provided, including:

[0005] When the second processor has an access requirement to access the storage medium, it sends a data access request to the first processor; the first processor supports the access protocol of the storage medium.

[0006] The first processor accesses the storage medium in response to the data access request;

[0007] Upon receiving the response information returned by the first processor, the second processor performs subsequent operations.

[0008] After issuing a data access request, the second processor will only continue to execute subsequent operations after receiving the response information from the first processor. This process logically transforms the cross-core remote call process into a synchronous call process, avoiding response time fluctuations in the second processor due to factors such as task scheduling and message queue congestion. The second processor can stably obtain the access result within a certain period of time after issuing the data access request, thereby realizing real-time feedback of the tasks in the second processor.

[0009] In some embodiments of the first aspect, the access request is triggered by the second processor during the execution of a task to be processed, and upon receiving response information returned by the first processor, the second processor performs subsequent operations, including:

[0010] If the processing priority of the pending task is greater than or equal to the first priority threshold, the second processor blocks and waits until it receives the response information returned by the first processor, and then executes the subsequent operation of the pending task; wherein the processing priority is negatively correlated with the response latency.

[0011] In some embodiments of the first aspect, the method further includes:

[0012] Alternatively, if the processing priority of the task to be processed is less than the first priority threshold, the second processor, after submitting the data processing request to the first processor, executes other tasks and asynchronously waits for the response information returned by the first processor; if the second processor obtains the response information returned by the first processor, it continues to execute the subsequent operations of the task to be processed based on the response information.

[0013] The second processor can perform differentiated processing based on the importance of the tasks to be processed. For high-priority tasks, the second processor can ensure the shortest response latency for high-priority tasks through synchronous calls, guaranteeing the real-time, deterministic, and reliable nature of the response information, and eliminating random delays caused by task queues and scheduling timing in asynchronous communication. For low-priority tasks, the second processor can immediately execute other tasks after issuing a data access request, so that the time slice of the second processor can be fully utilized, avoiding idle time for the second processor, thereby significantly improving the overall processing capacity and concurrency performance.

[0014] In some embodiments of the first aspect, after the second processor submits the data processing request to the first processor, performs other tasks, and asynchronously waits for the response information returned by the first processor, the method further includes:

[0015] In response to the data access request, the first processor accesses the storage medium and stores the response information after the access is completed;

[0016] The second processor sends an information extraction request to the first processor, and the first processor responds to the information extraction request by reading the response information and returning it to the second processor.

[0017] The first processor can be changed from actively pushing access results to passively triggering pushes. This eliminates the need for the first processor to maintain complex message queues and retransmission mechanisms, allowing it to focus more on handling access services of storage media sent by different second processors. This design decouples the access requirements of the second processor from the push of access results by the first processor, reducing the coupling between the first and second processors and enhancing the independence and maintainability of different processors.

[0018] In some embodiments of the first aspect, after the second processor submits the data processing request to the first processor, performs other tasks, and asynchronously waits for the response information returned by the first processor, the method further includes:

[0019] In response to the data access request, the first processor accesses the storage medium and, after the access is completed, returns the response information to the shared memory;

[0020] The second processor reads the response information from the shared memory.

[0021] By pre-setting shared memory, after the first processor completes the access to the storage medium, it only needs to write the response information directly to the shared memory to complete the data access request. The first processor does not need to maintain a complex message push mechanism, and it also avoids the extra overhead of transmitting response information packets. The second processor only needs to read information from the shared memory without going through complex communication interactions with the first processor. At the same time, it can decouple the access requirements of the second processor from the push of the access results of the first processor, thereby reducing the coupling between the first processor and the second processor and enhancing the independence and maintainability of different processors.

[0022] In some embodiments of the first aspect, the first processor accesses the storage medium in response to the data access request, including:

[0023] When the first processor receives multiple data access requests sent by the second processor, it sorts the multiple data access requests.

[0024] The first processor responds to each of the data processing requests in sequence according to the sorting result, and accesses the storage medium.

[0025] A task scheduling mechanism for the first processor is set up. When the first processor faces concurrent requests from multiple second processors, it can achieve orderly scheduling of tasks by sorting multiple data access requests.

[0026] In some embodiments of the first aspect, the method further includes:

[0027] The first processor assigns corresponding identity tags to the multiple data access requests received;

[0028] The sorting of the multiple data access requests includes:

[0029] The first processor sorts the identity tags of the multiple data access requests according to the order in which they are received;

[0030] Alternatively, the first processor may sort the identity tags of the multiple data access requests based on the processing priority of the tasks to be processed corresponding to each data access request.

[0031] By assigning a unique identifier to each data access request, and then employing either a first-in-first-out (FIFO) sorting algorithm or a priority-based sorting algorithm, high-concurrency data access requests can be scheduled. The FIFO sorting algorithm is simple to implement and has low processing overhead, ensuring that all data access requests are processed in the order of arrival, thus preventing data response requests for low-priority tasks from being indefinitely postponed. On the other hand, the priority-based sorting algorithm fully considers the real-time requirements of different data response tasks, ensuring low-latency response for critical business operations by prioritizing the processing of data access requests for high-priority tasks.

[0032] In some embodiments of the first aspect, after the second processor sends a data access request to the first processor when it has an access need to access the storage medium, the method further includes:

[0033] The second processor times the duration of the first processor's response to the data access request;

[0034] If the timer reaches the preset duration threshold, the second processor continues to perform subsequent operations and marks the pending task corresponding to the data access request with a response failure label.

[0035] The second processor monitors the response time of the first processor. Once the response time reaches a preset time threshold, the second processor terminates the blocking and waits, and promptly abandons the response of the current pending task. In this way, even if a single data access request is not responded to, it will not affect the progress of other pending tasks, avoid the second processor from getting stuck in continuous blocking, and avoid slowing down the overall efficiency due to local anomalies.

[0036] In some embodiments of the first aspect, the step of the second processor continuing to perform subsequent operations when the timer reaches a preset duration threshold includes:

[0037] If the utilization rate of the first processor reaches a preset utilization rate threshold, and if the timing reaches a first preset duration threshold, the second processor continues to perform subsequent operations.

[0038] If the utilization rate of the first processor does not reach the preset utilization rate threshold, and the timing reaches the second preset duration threshold, the second processor continues to perform subsequent operations.

[0039] The first duration threshold is greater than the second duration threshold.

[0040] When the first processor is under high load, the second processor can appropriately reduce the response time requirement of the first processor to avoid misjudging the delay caused by the normal high load operation of the first processor as a response failure; when the first processor is under low load and should theoretically be able to respond quickly, the second processor can appropriately increase the response time requirement of the first processor and reduce invalid waiting by appropriately reducing the time threshold.

[0041] In some embodiments of the first aspect, the step of the second processor continuing to perform subsequent operations when the timer reaches a preset duration threshold includes:

[0042] If the processing priority of the task to be processed corresponding to the data access request is greater than or equal to the second priority threshold, and the timer reaches the third preset duration threshold, the second processor continues to execute subsequent operations.

[0043] If the processing priority of the task to be processed corresponding to the data access request is less than the second priority threshold, and the second processor continues to execute subsequent operations when the timer reaches the fourth preset duration threshold;

[0044] The third preset duration threshold is less than the fourth preset duration threshold.

[0045] The second processor can set shorter time thresholds for high-priority tasks with higher timeliness requirements, thereby prioritizing the validity of response information for high-priority tasks. If there is no response for a long time, it will not only affect core business, but may also cause cascading problems. Therefore, setting a shorter timeout threshold can quickly terminate invalid waiting and start alternative solutions. For low-priority tasks with lower timeliness requirements, the second processor can give them more patience. By setting a longer time threshold, it can avoid task failures caused by short timeouts, thereby reducing subsequent retry costs.

[0046] In some embodiments of the first aspect, after the second processor continues to perform subsequent operations when the timer reaches a preset duration threshold, and after the second processor marks a response failure tag on the pending task corresponding to the data access request, the method further includes:

[0047] The second processor sends a congestion warning to at least one of the second processors that supports the access protocol of the storage medium;

[0048] The second processor, which supports the access protocol of the storage medium, sends a switching prompt to the first processor and the remaining second processors based on the received congestion prompt.

[0049] It can switch the main core in a timely manner when the original main core experiences response congestion, thus avoiding system-wide process blockage due to the failure of a single processor.

[0050] In some embodiments of the first aspect, the second processor supporting the access protocol of the storage medium sends a switching prompt to the first processor and the remaining second processors based on a received congestion prompt, including:

[0051] At least one of the second processors supporting the access protocol of the storage medium determines a third processor to take over accessing the storage medium from the first processor based on the occupancy rate;

[0052] Based on the congestion warning, the third processor sends the switching warning to the first processor and the remaining second processors.

[0053] When the first processor experiences access congestion, the main core can be quickly switched over, thus avoiding interruption of storage media access. By comparing the utilization rate of at least one second processor that supports the storage media access protocol, it ensures that the switched main core has sufficient computing resources to take over the data access requests of the original main core, i.e., the first processor, thereby avoiding secondary congestion. By sending a switchover notification to the first processor and the remaining second processors, it can prevent the remaining second processors from continuously sending data access requests to the congested first processor, thereby avoiding invalid requests and resource waste.

[0054] In some embodiments of the first aspect, at least one second processor supporting the access protocol of the storage medium determines a third processor to take over accessing the storage medium from the first processor based on occupancy, including:

[0055] If at least one of the second processors supporting the access protocol of the storage medium receives a preset number of congestion prompts within a preset time period, a third processor is determined based on the occupancy rate to take over accessing the storage medium from the first processor.

[0056] If the second processor receives a congestion alert within a preset time period and the alert reaches a threshold, it indicates that the first processor's access to the storage medium has been continuously blocked. The second processor can quickly interrupt the blocked access link, allowing the access to the storage medium to resume and ensuring the normal processing of data read and write requests.

[0057] In some embodiments of the first aspect, after sending the switching prompt to the first processor and the remaining second processors, the method further includes:

[0058] The remaining second processors resend the data access request for the pending task marked with the response failure tag to the third processor;

[0059] Furthermore, when the first processor and the remaining second processors have an access requirement to access the storage medium, they send the data access request to the third processor.

[0060] By resending pending tasks marked with a failure response tag to the third processor, tasks that were previously not processed due to blockage by the first processor can be given a second chance to execute. This avoids these tasks being directly discarded due to the main core switch, preventing problems such as loss of business data, transaction interruption, or process stalls.

[0061] According to some embodiments of this disclosure, a request response apparatus is provided, comprising:

[0062] The sending module is configured to send a data access request to the first processor when the second processor has an access need to access the storage medium; the first processor supports the access protocol of the storage medium.

[0063] An access module is configured such that the first processor accesses the storage medium in response to the data access request;

[0064] The waiting module is configured to block and wait for the second processor until it receives a response from the first processor before performing subsequent operations.

[0065] In some embodiments of the second aspect, the access request is triggered by the second processor during the execution of a pending task, and the waiting module is further configured to:

[0066] If the processing priority of the pending task is greater than or equal to the first priority threshold, the second processor blocks and waits until it receives the response information returned by the first processor, and then executes the subsequent operation of the pending task; wherein the processing priority is negatively correlated with the response latency.

[0067] In some embodiments of the second aspect, the waiting module is further configured to:

[0068] If the processing priority of the pending task is less than the first priority threshold, the second processor, after submitting the data processing request to the first processor, executes other tasks and asynchronously waits for the response information returned by the first processor; if the second processor receives the response information returned by the first processor, it continues to execute the subsequent operations of the pending task based on the response information.

[0069] In some embodiments of the second aspect, the second waiting module is further configured to:

[0070] In response to the data access request, the first processor accesses the storage medium and stores the response information after the access is completed;

[0071] The second processor sends an information extraction request to the first processor, and the first processor responds to the information extraction request by reading the response information and returning it to the second processor.

[0072] In some embodiments of the second aspect, the second waiting module is further configured to:

[0073] In response to the data access request, the first processor accesses the storage medium and, after the access is completed, returns the response information to the shared memory;

[0074] The second processor reads the response information from the shared memory.

[0075] In some embodiments of the second aspect, the access module is further configured to:

[0076] When the first processor receives multiple data access requests sent by the second processor, it sorts the multiple data access requests.

[0077] The first processor responds to each of the data processing requests in sequence according to the sorting result, and accesses the storage medium.

[0078] In some embodiments of the second aspect, the request response device further includes:

[0079] The allocation module is configured so that the first processor allocates corresponding identity tags for the multiple data access requests received;

[0080] The access module is also configured to:

[0081] The first processor sorts the identity tags of the multiple data access requests according to the order in which they are received;

[0082] Alternatively, the first processor may sort the identity tags of the multiple data access requests based on the processing priority of the tasks to be processed corresponding to each data access request.

[0083] In some embodiments of the second aspect, the request response device further includes:

[0084] The timing module is configured to time the duration for the second processor to respond to the data access request.

[0085] The marking module is configured to, when the timer reaches a preset duration threshold, allow the second processor to continue performing subsequent operations and mark the pending task corresponding to the data access request with a response failure tag.

[0086] In some embodiments of the second aspect, the marking module is further configured to:

[0087] If the utilization rate of the first processor reaches a preset utilization rate threshold, and if the timing reaches a first preset duration threshold, the second processor continues to perform subsequent operations.

[0088] If the utilization rate of the first processor does not reach the preset utilization rate threshold, and the timing reaches the second preset duration threshold, the second processor continues to perform subsequent operations.

[0089] The first duration threshold is greater than the second duration threshold.

[0090] In some embodiments of the second aspect, the marking module is further configured to:

[0091] If the processing priority of the task to be processed corresponding to the data access request is greater than or equal to the second priority threshold, and the timer reaches the third preset duration threshold, the second processor continues to execute subsequent operations.

[0092] If the processing priority of the task to be processed corresponding to the data access request is less than the second priority threshold, and the second processor continues to execute subsequent operations when the timer reaches the fourth preset duration threshold;

[0093] The third preset duration threshold is less than the fourth preset duration threshold.

[0094] In some embodiments of the second aspect, the first waiting module and the marking module are further configured to:

[0095] The second processor sends a congestion warning to at least one of the second processors that supports the access protocol of the storage medium;

[0096] The second processor, which supports the access protocol of the storage medium, sends a switching prompt to the first processor and the remaining second processors based on the received congestion prompt.

[0097] In some embodiments of the second aspect, the first waiting module is further configured to:

[0098] At least one of the second processors supporting the access protocol of the storage medium determines a third processor to take over accessing the storage medium from the first processor based on the occupancy rate;

[0099] The second processor supporting the access protocol of the storage medium sends a switching prompt to the first processor and the remaining second processors based on the received congestion prompt, including:

[0100] Based on the congestion warning, the third processor sends the switching warning to the first processor and the remaining second processors.

[0101] In some embodiments of the second aspect, the first waiting module is further configured to:

[0102] If at least one of the second processors supporting the access protocol of the storage medium receives a preset number of congestion prompts within a preset time period, a third processor is determined based on the occupancy rate to take over accessing the storage medium from the first processor.

[0103] In some embodiments of the second aspect, the first waiting module is further configured to:

[0104] The remaining second processors resend the data access request for the pending task marked with the response failure tag to the third processor;

[0105] Furthermore, when the first processor and the remaining second processors have an access requirement to access the storage medium, they send the data access request to the third processor.

[0106] According to some embodiments of this disclosure, a control system is provided, including a first processor, a second processor, and a storage medium, wherein the first processor supports an access protocol for the storage medium;

[0107] The control system is used to implement the steps of the method in any of the above embodiments, such that when the second processor has an access need to access the storage medium, it sends a data access request to the first processor; the first processor responds to the data access request and accesses the storage medium; and the second processor performs subsequent operations upon receiving the response information returned by the first processor.

[0108] According to some embodiments of this disclosure, a vehicle is provided, including the control system of any of the above embodiments.

[0109] According to some embodiments of this disclosure, a computer-readable storage medium is provided that stores a computer program or instructions, which, when executed by a processor of an electronic device, enable the electronic device to perform the steps of the method described in any of the above embodiments.

[0110] According to some embodiments of this disclosure, a computer program product is provided, including a computer program that is executed by a processor to perform the steps of the method described in any of the above embodiments.

[0111] According to some embodiments of this disclosure, a chip system is provided, including a processing unit and an interface circuit. The processing unit obtains program instructions through the interface circuit, and the program instructions are executed by the processing unit. The processing unit is used to perform the steps of the method described in any of the above embodiments.

[0112] The technical solutions provided by the embodiments of this disclosure may include the following beneficial effects: After issuing a data access request, the second processor immediately enters a blocking waiting state until it receives the response information from the first processor before continuing to execute subsequent operations. This process logically transforms the cross-core remote call process into a synchronous call process, avoiding the response time fluctuations of the tasks in the second processor caused by factors such as task scheduling and message queue congestion. The second processor can stably obtain the access results within a certain period of time after issuing the data access request, thereby realizing real-time feedback of the tasks in the second processor.

[0113] It should be understood that the above general description and the following detailed description are exemplary and explanatory only, and are not intended to limit this disclosure. Attached Figure Description

[0114] The accompanying drawings, which are incorporated in and form a part of this specification, illustrate embodiments consistent with this disclosure and, together with the description, serve to explain the principles of this disclosure.

[0115] Figure 1 This is a flowchart illustrating a request-response method according to some embodiments of the present disclosure.

[0116] Figure 2 This is a flowchart illustrating another request-response method according to some embodiments of the present disclosure.

[0117] Figure 3 This is a flowchart illustrating yet another request-response method according to some embodiments of the present disclosure.

[0118] Figure 4 This is a block diagram illustrating a request response apparatus according to some embodiments of the present disclosure.

[0119] Figure 5This is a block diagram illustrating another request response apparatus according to some embodiments of the present disclosure.

[0120] Figure 6 This is a block diagram illustrating yet another request response apparatus according to some embodiments of the present disclosure.

[0121] Figure 7 This is a functional block diagram of a vehicle according to some embodiments of the present disclosure.

[0122] Figure 8 This is a functional block diagram of a chip system according to some embodiments of the present disclosure. Detailed Implementation

[0123] Some embodiments of this disclosure will now be described in detail, examples of which are illustrated in the accompanying drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings denote the same or similar elements. Various changes, modifications, and equivalents of the methods, apparatus, and / or systems described herein will become apparent upon understanding this disclosure. For example, the order of operations described herein is merely illustrative and is not limited to those orders set forth herein, but can be changed as will become apparent upon understanding this disclosure, except for operations that must be performed in a particular order. Furthermore, for clarity and brevity, descriptions of features known in the art may be omitted.

[0124] The embodiments described in the following examples of this disclosure are not representative of all embodiments consistent with this disclosure. Rather, they are merely examples of apparatuses and methods consistent with some aspects of this disclosure as detailed in the appended claims.

[0125] Figure 1 This is a flowchart illustrating a request-response method according to some embodiments of this disclosure, such as... Figure 1 As shown, the request-response method can be applied to a control system, which includes a first processor, a second processor, and a storage medium. The first processor supports the access protocol of the storage medium, and the request-response method includes the following steps.

[0126] In step S11, the second processor sends a data access request to the first processor when it has an access requirement to access the storage medium.

[0127] A control system refers to a control unit based on a multi-core processor architecture. Examples include automotive electronic control units and Internet of Things (IoT) control units.

[0128] The first processor refers to the main core (Server core) in a multi-core control system that runs a complete Non-Volatile Memory (NVM) protocol stack and has direct access to the storage medium hardware. The NVM protocol stack refers to a layered software component that provides standardized interfaces at the top and encapsulates the complex operational details of the Flash hardware at the bottom, enabling secure, reliable, and efficient management of non-volatile memory.

[0129] As an example, the storage medium can refer to non-volatile memory. The first processor provides a unified and simple interface to the multi-core control system by configuring a protocol stack with non-volatile memory, thereby enabling access to the non-volatile memory.

[0130] The second processor refers to the slave core, or client core, in a multi-core control system. The second processor does not have the ability to directly access the storage medium and needs to request the first processor to access it on its behalf through cross-core communication.

[0131] In this embodiment, when the application running on the second processor needs to perform non-volatile storage operations, such as reading some data, writing some data, or setting the state of a data block, the second processor can encapsulate this access request into a structured data access request and send it to the first processor.

[0132] In step S12, the first processor accesses the storage medium in response to the data access request.

[0133] After receiving a data access request from the second processor, the first processor's NVM protocol stack can run layer by layer downwards, with the lowest-level driver ultimately performing the actual operation on the storage medium.

[0134] In step S13, the second processor blocks and waits until it receives a response from the first processor before performing subsequent operations.

[0135] The response information refers to the result data packet returned by the first processor to the second processor after processing the data access request. It contains the result status of accessing the storage medium or the data obtained from the storage medium.

[0136] In this embodiment, after the second processor sends a data access request to the first processor, the thread executed by the second processor is immediately suspended and enters a waiting state. This means that the second processor will not execute any subsequent instructions in the current task, and the remaining tasks that the second processor needs to process will also be blocked and enter a waiting state.

[0137] After the first processor finishes accessing the storage medium according to the data access request, it generates a response message and sends it to the second processor. After receiving the response message, the second processor executes the subsequent business logic of the current task according to the result of the data access request contained in the response message.

[0138] In the above request-response method, the second processor immediately enters a blocking waiting state after issuing a data access request, and only continues to execute subsequent operations after receiving the response information from the first processor. This process logically transforms the cross-core remote call process into a synchronous call process, avoiding response time fluctuations in the second processor due to factors such as task scheduling and message queue congestion. The second processor can stably obtain the access result for a period of time after issuing the data access request, thereby realizing real-time feedback of the tasks in the second processor.

[0139] In some optional embodiments, the access request is triggered by the second processor during the execution of the task to be processed, and step S13 includes:

[0140] If the processing priority of the pending task is greater than or equal to the first priority threshold, the second processor blocks and waits until it receives the response information returned by the first processor before executing the subsequent operations of the pending task; where the processing priority is negatively correlated with the response latency.

[0141] If the processing priority of the pending task is less than the first priority threshold, the second processor will execute other tasks after submitting the data processing request to the first processor, and asynchronously wait for the response information returned by the first processor.

[0142] Upon receiving the response information returned by the first processor, the second processor continues to execute subsequent operations of the pending task based on the response information.

[0143] The first priority threshold refers to a preset priority benchmark value used to classify the tasks to be processed in the second processor. The first priority threshold is used to determine whether to adopt a blocking wait strategy to wait for the response information returned by the first processor.

[0144] In this embodiment, the second processor can divide the read tasks into two categories, high-priority tasks and low-priority tasks, by presetting a first priority threshold.

[0145] When the second processor determines that the processing priority of the currently executing task is greater than or equal to the first priority threshold, it classifies the task as a high-priority task. At this time, the second processor will immediately enter a blocking waiting state after issuing a data access request to suspend all subsequent operations of the high-priority task. All subsequent tasks in the task queue where the task is located will also enter a blocking waiting state. The second processor needs to wait for the response information from the first processor to continue executing the high-priority task, so as to avoid the second processor prioritizing other low-priority tasks after issuing a data access request, which would cause a delay in the response of the high-priority task.

[0146] When the second processor receives the response information returned by the first processor, the second processor immediately uses the response information to continue the subsequent operations of the interrupted pending task, so as to achieve seamless processing of high-priority tasks, ensure that the execution flow of high-priority tasks is not interrupted, and enjoy the lowest response latency.

[0147] In addition, when the second processor determines that the processing priority of the currently executing task to be processed is less than the first priority threshold, it determines that the task to be processed is a low priority task. At this time, the second processor will continue to execute the subsequent operations of the low priority task after issuing a data access request, and after finishing the execution of the low priority task, it will continue to execute the subsequent tasks in the task queue where the task to be processed is located.

[0148] The second processor can process the response information returned by the first processor to update the system and provide feedback for low-priority tasks.

[0149] The aforementioned request-response method can differentiate processing based on the importance of the tasks to be processed. For high-priority tasks, the second processor can ensure the shortest response latency through synchronous calls, guaranteeing the real-time, deterministic, and reliable nature of the response information and eliminating random delays caused by task queues and scheduling timing in asynchronous communication. For low-priority tasks, the second processor can immediately execute other tasks after issuing a data access request, making full use of the second processor's time slice and avoiding idle time, thereby significantly improving overall processing capacity and concurrency performance.

[0150] In an optional embodiment, after the second processor submits the data processing request to the first processor, executes other tasks, and asynchronously waits for the response information returned by the first processor when the processing priority of the task to be processed is less than the first priority threshold, the method further includes:

[0151] The first processor responds to the data access request, accesses the storage medium, and stores the response information after the access is completed;

[0152] The second processor sends an information retrieval request to the first processor, and the first processor responds to the information retrieval request by reading the response information and returning it to the second processor.

[0153] An information retrieval request refers to a command issued by the second processor in asynchronous mode to the first processor to query and retrieve the access result of a completed data access request.

[0154] In this embodiment, after receiving a data access request from the second processor, the first processor may, for example, call its local NVM protocol stack to perform actual read and write operations on the physical storage medium. After the operation is completed, the first processor will not immediately send the response information back to the second processor. Instead, it will temporarily store the response information, which includes the operation status and returned data, in a predefined, shared storage area or in the first processor's local buffer.

[0155] The second processor can send an information retrieval request to the first processor when idle or at a preset frequency. This information retrieval request usually contains a unique identifier to indicate the response information corresponding to a specific data access request to be retrieved.

[0156] After receiving an information retrieval request, the first processor can read the corresponding prepared response information from the shared storage area or local buffer according to the identifier carried in the information retrieval request.

[0157] The above request-response method can change the first processor from actively pushing access results to passively triggering push, so that the first processor does not need to maintain complex message queues and retransmission mechanisms, and can focus more on handling access services of storage media sent by different second processors. Through this design, the access requirements of the second processor and the push of access results of the first processor are decoupled, thereby reducing the coupling between the first processor and the second processor and enhancing the independence and maintainability of different processors.

[0158] In some optional embodiments, after the second processor submits the data processing request to the first processor, performs other tasks, and asynchronously waits for the response information returned by the first processor, the second processor further includes:

[0159] The first processor responds to the data access request, accesses the storage medium, and returns response information to the shared memory after the access is completed;

[0160] The second processor reads the response information from shared memory.

[0161] Shared memory refers to a physical memory region that is mapped into the core address spaces of the first and second processors. Shared memory allows the first and second processors to directly read and write to it.

[0162] This embodiment provides another way for the second processor to obtain the access result of the data access request. In this embodiment, after receiving the data access request from the second processor, the first processor may, for example, call its local NVM protocol stack to perform actual read and write operations on the physical storage medium. After the operation is completed, the first processor returns response information containing the operation status, return data, etc. to the shared memory.

[0163] The second processor can respond to additional prompts sent by the first processor or, at a preset frequency, extract response information corresponding to data access requests from specific locations in shared memory.

[0164] After receiving an information retrieval request, the first processor can read the corresponding prepared response information from the shared storage area or local buffer according to the identifier carried in the information retrieval request.

[0165] The aforementioned request-response method, by pre-setting shared memory, allows the first processor to complete the data access request by simply writing the response information directly into the shared memory after accessing the storage medium. The first processor does not need to maintain a complex message push mechanism, and it also avoids the additional overhead of packet transmission of response information. The second processor only needs to read information from the shared memory without going through complex communication interactions with the first processor. At the same time, it can decouple the access requirements of the second processor from the push of the access results of the first processor, thereby reducing the coupling between the first and second processors and enhancing the independence and maintainability of different processors.

[0166] In some optional embodiments, step S12 includes:

[0167] When the first processor receives multiple data access requests from the second processor, it sorts the multiple data access requests.

[0168] The first processor responds to each data processing request in sequence according to the sorting result, and accesses the storage medium.

[0169] In this embodiment, a task scheduling mechanism for the first processor is set up. When the first processor faces concurrent requests from multiple second processors, it can achieve orderly scheduling of tasks by sorting multiple data access requests.

[0170] In one embodiment, the first processor assigns corresponding identity tags to the multiple received data access requests;

[0171] Specifically, the steps for sorting multiple data access requests include:

[0172] The first processor sorts the identity tags of multiple data access requests according to the order in which they are received;

[0173] Alternatively, the first processor may sort the identity tags of multiple data access requests based on the processing priority of the tasks to be processed corresponding to each data access request.

[0174] An identity tag is an identifier assigned by the first processor to uniquely identify and track a specific data access request. An identity tag can be a simple auto-incrementing sequence number or a structure containing more detailed information.

[0175] In this embodiment, based on the task scheduling mechanism of the first processor, an identity tag mechanism is introduced, so that when the first processor faces concurrent requests from multiple second processors, the first processor can generate and bind a unique identity tag for each data access request.

[0176] This identity tag serves as a unique identifier, which can uniquely identify a data access request. When the first processor sorts multiple received data access requests, it can rearrange only the sequence of these identity tags. Compared to directly moving the relevant data of the massive data access requests themselves, the sorting process takes less time and is more efficient.

[0177] In this embodiment, the first processor may use a first-in-first-out (FIFO) algorithm to sort the identity tags of multiple data access requests according to the order in which they arrive at the first processor. Alternatively, the first processor may use a priority scheduling algorithm to prioritize data access requests corresponding to high-priority tasks and prioritize data access requests corresponding to low-priority tasks, thereby ensuring that the response latency of high-priority tasks is minimized.

[0178] The aforementioned request-response method assigns a unique identity tag to each data access request and then uses either a first-in-first-out (FIFO) sorting algorithm or a priority-based sorting algorithm to schedule high-concurrency data access requests. The FIFO sorting algorithm is simple to implement and has low processing overhead, ensuring that all data access requests are processed in the order of arrival, thus preventing data response requests for low-priority tasks from being indefinitely postponed. The priority-based sorting algorithm fully considers the real-time requirements of different data response tasks, ensuring low-latency response for critical business operations by prioritizing the processing of data access requests for high-priority tasks.

[0179] In some optional embodiments, after step S11, the method further includes:

[0180] The second processor times the duration of the first processor's response to data access requests;

[0181] If the timer reaches the preset duration threshold, the second processor continues to perform subsequent operations and marks the pending task corresponding to the data access request with a response failure label.

[0182] A response failure label is an identifier added to the relevant data of a pending task. This data could be a task status table, metadata, etc. A response failure label is typically a predefined string, code, or status bit. It is used by the second processor to indicate that the data access request was not completed because the first processor timed out.

[0183] In this embodiment, while sending a data access request, the second processor automatically starts its internal timing module or calls the system-level timing function to start continuously timing the total time from when the first processor receives the data access request until it returns a valid response.

[0184] During the timing process, the second processor will compare the current accumulated timing duration with the preset timing threshold in real time. If the timing has not reached the preset timing threshold, the second processor will remain in a waiting state, that is, maintain the current congested state of the pending task, and continue to listen to the first processor until it receives the response information returned by the first processor or the timing reaches the threshold.

[0185] If the timeout reaches the preset time threshold and the second processor still has not received a response from the first processor, the second processor will no longer wait. The second processor can continue to execute other subsequent operations besides the pending task corresponding to the data access request, such as continuing to execute the next pending task, thereby avoiding the overall process blockage in the second processor due to waiting timeout. In addition, the second processor will clearly mark the response failure label in the metadata of the pending task corresponding to the data access request.

[0186] In the above request-response method, the second processor monitors the response time of the first processor. Once the response time reaches a preset duration threshold, the second processor terminates the blocking wait and promptly abandons the response of the current pending task. In this way, even if a single data access request is not responded to, it will not affect the progress of other pending tasks, avoid the second processor from being continuously blocked, and avoid slowing down the overall efficiency due to local anomalies.

[0187] In some optional embodiments, if the timer reaches a preset duration threshold, the second processor continues to perform subsequent operations, including:

[0188] If the utilization rate of the first processor reaches a preset utilization rate threshold, and if the timer reaches a first preset duration threshold, the second processor continues to execute subsequent operations.

[0189] If the utilization rate of the first processor does not reach the preset utilization rate threshold, and the timer reaches the second preset duration threshold, the second processor continues to perform subsequent operations.

[0190] The first duration threshold is greater than the second duration threshold.

[0191] In this embodiment, during the timing process, the second processor continuously acquires the current utilization rate of the first processor and compares it with a preset utilization rate threshold in real time. If the utilization rate of the first processor reaches the preset utilization rate threshold, the second processor can consider that the first processor is currently under high load, and the computing resources of the first processor may be occupied by a large number of tasks, and the processing capacity is close to saturation. At this time, the second processor continues timing. If the timing reaches a first preset duration threshold and no response information is received from the first processor, the second processor will no longer wait and will continue to execute other subsequent operations other than the pending task corresponding to the data access request, while marking the corresponding pending task with a response failure label.

[0192] If the utilization rate of the first processor does not reach the preset utilization rate threshold, the second processor can assume that the first processor is currently under low or normal load, and that the first processor has sufficient computing resources to process requests promptly. In this case, the second processor continues to time. If the time reaches the second preset duration threshold and no response information is received from the first processor, the second processor will no longer wait and will continue to execute other subsequent operations besides the pending task corresponding to the data access request, while marking the corresponding pending task with a response failure label.

[0193] With this setting, the second processor can appropriately reduce the response time requirement of the first processor when the first processor is under high load, so as to avoid misjudging the delay caused by the normal high load operation of the first processor as a response failure; when the first processor is under low load and should theoretically be able to respond quickly, the response time requirement of the first processor can be appropriately increased, and invalid waiting can be reduced by appropriately reducing the time threshold.

[0194] In the above request-response method, the second processor can dynamically adjust the timeout threshold according to the actual utilization rate of the first processor, thereby finding a relative balance between reducing invalid waiting and avoiding misjudging normal delays.

[0195] In some optional embodiments, if the timer reaches a preset duration threshold, the second processor continues to perform subsequent operations, including:

[0196] If the processing priority of the task to be processed corresponding to the data access request is greater than or equal to the second priority threshold, and if the timer reaches the third preset duration threshold, the second processor continues to execute subsequent operations.

[0197] If the processing priority of the task corresponding to the data access request is less than the second priority threshold, and the timer reaches the fourth preset duration threshold, the second processor continues to execute subsequent operations.

[0198] The third preset duration threshold is less than the fourth preset duration threshold.

[0199] In this embodiment, during the timing process, the second processor first extracts the processing priority of the current task to be processed and compares it with a preset second priority threshold. If the processing priority of the task to be processed is greater than or equal to the second priority threshold, the second processor can consider the task to be a high-priority task, such as a task that may directly affect the operation of core business or key user operations. In this case, the second processor continues to time. If the time reaches a third preset duration threshold and no response information is received from the first processor, the second processor will no longer wait and will continue to execute other subsequent operations other than the task to be processed corresponding to the data access request. At the same time, a response failure label is marked on the corresponding task to be processed.

[0200] If the processing priority of the pending task is less than the second priority threshold, the second processor can consider the task to be a low-priority task that does not affect core business and critical user operations. In this case, the second processor continues to time. If the time reaches the fourth preset time threshold and no response information is received from the first processor, the second processor will no longer wait and will continue to execute other subsequent operations other than the pending task corresponding to the data access request. At the same time, a response failure label will be marked on the corresponding pending task.

[0201] With this configuration, the second processor can set shorter time thresholds for high-priority tasks with higher timeliness requirements, thereby prioritizing the validity of response information for high-priority tasks. If there is no response for a long time, it will not only affect core business but may also cause cascading problems. Therefore, setting a shorter timeout threshold can quickly terminate invalid waiting and start alternative solutions. For low-priority tasks with lower timeliness requirements, the second processor can give them more patience. By setting a longer time threshold, task failures caused by short timeouts can be avoided, thereby reducing subsequent retry costs.

[0202] In the above request-response method, the second processor can dynamically adjust the timeout threshold according to the actual processing priority of the first processor, thereby finding a relative balance between reducing invalid waiting and avoiding misjudging normal delays.

[0203] It should be noted that, in other embodiments, the second processor may also set the time threshold of the current task to be processed according to the processing priority of the next task to be processed. When the processing priority of the next task to be processed is greater than or equal to the second priority threshold, that is, when it is a high-priority task, the processor may set a shorter time threshold for the current task to be processed. When the processing priority of the next task to be processed is less than the second priority threshold, that is, when it is a low-priority task, the processor may set a longer time threshold for the current task to be processed.

[0204] When the next pending task is a high-priority task, it means that the pending task is relatively urgent and may directly affect core business or key user experience. It needs to occupy the secondary processor resources for execution as soon as possible. At this time, the secondary processor sets a shorter time threshold for the current pending task, which allows the secondary processor to quickly terminate the invalid waiting for the current pending task and release resources for the next high-priority task, avoiding the high-priority task being blocked due to waiting for the current task to time out.

[0205] When the next pending task is a low-priority task, it means that the task is not urgent, does not affect core business operations, and does not require resource preemption. In this case, the second processor sets a longer time threshold for the current pending task, allowing it more time to wait for the first processor's response. This ensures that the task obtains a valid response before proceeding, avoiding unnecessary failures caused by short thresholds. This reduces the number of tasks marked as having failed responses and also lowers the resource consumption of retrying the task later.

[0206] In some optional embodiments, if the timer reaches a preset duration threshold, the second processor continues to perform subsequent operations, and after the second processor marks the response failure tag on the pending task corresponding to the data access request, the process further includes:

[0207] The second processor sends a blocking notification to at least one second processor that supports the access protocol of the storage medium;

[0208] The second processor, which supports the access protocol of the storage medium, sends a switching prompt to the first processor and the remaining second processors based on the received congestion prompt.

[0209] A congestion alert is a signal issued by a second processor that marks a response failure tag on the pending task corresponding to a data access request, to notify other second processors with access rights to the storage medium that the first processor's access channel for a specific storage medium has been congested.

[0210] A switchover notification is a notification issued by the second processor that has taken over access to the storage media in the current control system. It is used to notify the first processor and the other second processors that the main core has been switched over. Subsequently, the first processor and the other second processors need to send data access requests to the second processor that has taken over access to the storage media in order to access the storage media.

[0211] In this embodiment, after the second processor marks the pending task corresponding to the previous data access request with a response failure tag, it immediately initiates a status notification process to send a blocking notification to at least one second processor that supports the storage medium access protocol. The blocking notification may carry information including, but not limited to: the identifier of the first processor, the access type of this data access request, the specific reason for the response failure, and the corresponding pending task.

[0212] It should be noted that in the multi-core control system of this embodiment, a complete NVM protocol stack can run on one first processor and several second processors, and the first processor can be used as the main core of the current control system.

[0213] If multiple data access requests from secondary processors take longer than a preset time threshold to receive a response, it can be assumed that the current primary core, i.e., the first processor, may be malfunctioning or experiencing an abnormal blockage. The primary core is unable to continue responding to data access requests from other secondary processors. In this case, multiple secondary processors running a complete NVM protocol stack can take over the access permissions of the storage media of the current control system, i.e., switch the primary core, to ensure that data access requests from multiple processors in the control system can be responded to normally.

[0214] The above request-response method can switch the main core in a timely manner when the original main core experiences response congestion, thus avoiding system-wide process blockage due to the failure of a single processor.

[0215] Specifically, in one embodiment, the step of a second processor supporting the access protocol of the storage medium sending a switching prompt to the first processor and the remaining second processors based on a received congestion prompt includes:

[0216] Based on occupancy, at least one second processor that supports the storage medium access protocol determines a third processor to take over accessing the storage medium from the first processor.

[0217] Based on the congestion warning, the third processor sends a switchover prompt to the first processor and the remaining second processors.

[0218] Specifically, if at least one second processor supporting the access protocol of the storage medium receives a preset number of congestion prompts within a preset time period, a third processor is determined based on the occupancy rate to take over accessing the storage medium from the first processor.

[0219] When the second processor receives a threshold of congestion alerts within a preset time period, it indicates that the first processor's access to the storage medium has been continuously blocked. At this point, a third processor, which is available based on occupancy, is selected to take over, quickly interrupting the blocked access link and allowing access to the storage medium to resume, ensuring the normal processing of data read and write requests.

[0220] At least one second processor supporting the storage medium's access protocol can obtain the occupancy rate of other second processors supporting the access protocol (excluding itself) to achieve distributed negotiation. For example, the second processor with the lowest occupancy rate can be determined as the third processor, i.e., the new master core after the switch, to ensure that the new master core has sufficient resources to handle the data access requests of the first processor and avoid secondary congestion caused by excessive load on the new master core.

[0221] Once the third processor is identified, it will immediately send a switchover notification to the first processor and all other second processors based on the previously received congestion notification. This notification will clearly inform the first processor that it has been determined to be in access congestion and that subsequent data access requests for the storage medium will be handled by the third processor. It will also inform the second processors that subsequent data access requests must be sent to the third processor.

[0222] In the above request-response method, when the first processor access is blocked, the main core can be quickly switched, thereby avoiding the interruption of access to the storage medium. By comparing the utilization rate of at least one second processor that supports the access protocol of the storage medium, it is ensured that the switched main core has sufficient computing resources to take over the data access requests of the original main core, i.e., the first processor, thereby avoiding secondary blocking. By sending a switch notification to the first processor and the other second processors, the other second processors can be prevented from continuously sending data access requests to the blocked first processor, thereby avoiding invalid requests and resource waste.

[0223] In some optional embodiments, after sending the switchover prompt to the first processor and the remaining second processors, the method further includes:

[0224] The remaining second processors resend the data access requests for the pending tasks marked with a response failure tag to the third processor;

[0225] In addition, the first processor and the remaining second processors send data access requests to the third processor when they have access needs to access the storage medium.

[0226] In this embodiment, after the switch prompt is sent to the first processor and the remaining second processors, the remaining second processors immediately sort through their local task queues for pending tasks that were previously initiated to the first processor and marked with a response failure tag. These pending tasks may have failed to receive a valid response due to access congestion on the first processor.

[0227] The second processor can regenerate data access requests based on the access needs of these pending tasks, and change the recipient of the data access requests from the original first processor to the third processor.

[0228] Upon receiving the switching notification, the first processor will cease direct access to the storage medium. When the first processor has a need to access the storage medium, it will no longer initiate the access itself. Instead, it will encapsulate the corresponding access request into a data access request and send it to the third processor, which will then perform the storage medium access operation on its behalf.

[0229] The above request-response method, by resending pending tasks marked with a response failure tag to the third processor, allows tasks that were previously not processed due to blockage by the first processor to have a second chance for execution, avoiding the direct discarding of these tasks due to the main core switch, and preventing problems such as loss of business data, transaction interruption, or process lag.

[0230] Figure 2 This is a flowchart illustrating a request-response method according to some embodiments of the present disclosure. The request-response method is applied to a second processor in a control system. The control system also includes a first processor and a storage medium. The first processor supports an access protocol for the storage medium. The request-response method includes:

[0231] Step S21: When the second processor has an access requirement to access the storage medium, it sends a data access request to the first processor.

[0232] Step S22: Upon receiving the response information returned by the first processor, the second processor performs subsequent operations.

[0233] Figure 3 This is a flowchart illustrating a request-response method according to some embodiments of the present disclosure. The request-response method is applied to a first processor in a control system, which also includes a second processor and a storage medium. The first processor supports an access protocol for the storage medium. The request-response method includes:

[0234] Step S31: The first processor responds to the data access request and accesses the storage medium;

[0235] Step S32: When the access ends, the first processor sends a response message to the second processor.

[0236] It should be understood that although the steps in the flowcharts of the above embodiments are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the above embodiments may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages of other steps.

[0237] Figure 4 This is a block diagram illustrating a request response apparatus 400 according to some embodiments of the present disclosure. (Refer to...) Figure 4 The device is used in a control system, which includes a first processor, a second processor, and a storage medium. The first processor supports the access protocol of the storage medium.

[0238] The request-response device 400 includes a sending module 401, an access module 402, and a waiting module 403.

[0239] The sending module 401 is configured to send a data access request to the first processor when the second processor has an access need to access the storage medium;

[0240] Access module 402 is configured as a first processor to access the storage medium in response to a data access request;

[0241] The waiting module 403 is configured to block and wait for the second processor until it receives a response from the first processor before performing subsequent operations.

[0242] In some optional embodiments, the access request is triggered by the second processor while executing the task to be processed, and the waiting module 403 is further configured to:

[0243] If the processing priority of the pending task is greater than or equal to the first priority threshold, the second processor blocks and waits until it receives the response information returned by the first processor before executing the subsequent operations of the pending task; where the processing priority is negatively correlated with the response latency.

[0244] If the processing priority of the pending task is less than the first priority threshold, the second processor, after submitting the data processing request to the first processor, executes other tasks and asynchronously waits for the response information returned by the first processor. Upon receiving the response information from the first processor, the second processor continues to execute subsequent operations of the pending task based on the response information.

[0245] In some optional embodiments, the second waiting module 404 is further configured to:

[0246] The first processor responds to the data access request, accesses the storage medium, and stores the response information after the access is completed;

[0247] The second processor sends an information retrieval request to the first processor, and the first processor responds to the information retrieval request by reading the response information and returning it to the second processor.

[0248] In some optional embodiments, the second waiting module 404 is further configured to:

[0249] The first processor responds to the data access request, accesses the storage medium, and returns response information to the shared memory after the access is completed;

[0250] The second processor reads the response information from shared memory.

[0251] In some optional embodiments, the access module 402 is further configured to:

[0252] When the first processor receives multiple data access requests from the second processor, it sorts the multiple data access requests.

[0253] The first processor responds to each data processing request in sequence according to the sorting result, and accesses the storage medium.

[0254] like Figure 5 As shown, in some optional embodiments, the request response device 400 further includes:

[0255] The allocation module 404 is configured to assign corresponding identity tags to the first processor for multiple received data access requests;

[0256] Access module 402 is also configured as follows:

[0257] The first processor sorts the identity tags of multiple data access requests according to the order in which they are received;

[0258] Alternatively, the first processor may sort the identity tags of multiple data access requests based on the processing priority of the tasks to be processed corresponding to each data access request.

[0259] like Figure 6 As shown, in some optional embodiments, the request response device 400 further includes:

[0260] The timing module 405 is configured to time the duration of the second processor's response to the data access request from the first processor;

[0261] The marking module 406 is configured to, when the timer reaches a preset duration threshold, allow the second processor to continue performing subsequent operations and mark the pending task corresponding to the data access request with a response failure tag.

[0262] In some optional embodiments, the marking module 406 is also configured to:

[0263] If the utilization rate of the first processor reaches a preset utilization rate threshold, and if the timer reaches a first preset duration threshold, the second processor continues to execute subsequent operations.

[0264] If the utilization rate of the first processor does not reach the preset utilization rate threshold, and the timer reaches the second preset duration threshold, the second processor continues to perform subsequent operations.

[0265] The first duration threshold is greater than the second duration threshold.

[0266] In some optional embodiments, the marking module 406 is also configured to:

[0267] If the processing priority of the task to be processed corresponding to the data access request is greater than or equal to the second priority threshold, and if the timer reaches the third preset duration threshold, the second processor continues to execute subsequent operations.

[0268] If the processing priority of the task corresponding to the data access request is less than the second priority threshold, and the timer reaches the fourth preset duration threshold, the second processor continues to execute subsequent operations.

[0269] The third preset duration threshold is less than the fourth preset duration threshold.

[0270] In some optional embodiments, the waiting module 403 and the marking module 406 are further configured as follows:

[0271] The second processor sends a blocking notification to at least one second processor that supports the access protocol of the storage medium;

[0272] The second processor, which supports the access protocol of the storage medium, sends a switching prompt to the first processor and the remaining second processors based on the received congestion prompt.

[0273] In some optional embodiments, the waiting module 403 is also configured to:

[0274] Based on occupancy, at least one second processor that supports the storage medium access protocol determines a third processor to take over accessing the storage medium from the first processor.

[0275] The second processor, which supports the access protocol for the storage medium, sends a switchover prompt to the first processor and the remaining second processors based on the received congestion prompt, including:

[0276] Based on the congestion warning, the third processor sends a switchover prompt to the first processor and the remaining second processors.

[0277] In some optional embodiments, the waiting module 403 is also configured to:

[0278] If at least one second processor supporting the access protocol of the storage medium receives a preset number of congestion prompts within a preset time period, a third processor is determined based on the occupancy rate to take over accessing the storage medium from the first processor.

[0279] In some optional embodiments, the waiting module 403 is also configured to:

[0280] The remaining second processors resend the data access requests for the pending tasks marked with a response failure tag to the third processor;

[0281] In addition, the first processor and the remaining second processors send data access requests to the third processor when they have access needs to access the storage medium.

[0282] Regarding the apparatus in the above embodiments, the specific manner in which each module performs its operation has been described in detail in the embodiments related to the method, and will not be elaborated upon here.

[0283] Figure 7 This is a block diagram illustrating a vehicle 700 according to an exemplary embodiment. For example, vehicle 700 can be a hybrid vehicle, a non-hybrid vehicle, an electric vehicle, a fuel cell vehicle, or other types of vehicle. Vehicle 700 can be an intelligent driving vehicle, a semi-intelligent driving vehicle, or a non-intelligent driving vehicle.

[0284] Reference Figure 7 The vehicle 700 may include various subsystems, such as an infotainment system 710, a perception system 720, a decision control system 730, a drive system 740, and a computing platform 750. The vehicle 700 may also include more or fewer subsystems, and each subsystem may include multiple components. Furthermore, each subsystem and each component of the vehicle 700 can be interconnected via wired or wireless means.

[0285] In some embodiments, the infotainment system 710 may include a communication system, an entertainment system, and a navigation system, etc.

[0286] The perception system 720 may include several sensors for sensing information about the environment surrounding the vehicle 700. For example, the perception system 720 may include a global positioning system (which may be GPS, BeiDou, or other positioning systems), an inertial measurement unit (IMU), lidar, millimeter-wave radar, ultrasonic radar, and a camera device.

[0287] The decision control system 730 may include a computing system, a vehicle controller, a steering system, a throttle, and a braking system.

[0288] The drive system 740 may include components that provide powered motion to the vehicle 700. In one embodiment, the drive system 740 may include an engine, an energy source, a transmission system, and wheels. The engine may be one or a combination of internal combustion engines, electric motors, and compressed air engines. The engine is capable of converting energy provided by the energy source into mechanical energy.

[0289] Some or all of the functions of vehicle 700 are controlled by computing platform 750. Computing platform 750 may include at least one processor 751 and memory 752, and processor 751 may execute instructions 753 stored in memory 752.

[0290] Processor 751 can be any conventional processor, such as a commercially available CPU. Processors may also include graphics processing units (GPUs), field-programmable gate arrays (FPGAs), systems-on-chips (SoCs), application-specific integrated circuits (ASICs), or combinations thereof.

[0291] The memory 752 can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic storage, flash memory, magnetic disk or optical disk.

[0292] In addition to instruction 753, memory 752 can also store data, such as road maps, route information, vehicle position, direction, speed, and other data. The data stored in memory 752 can be used by computing platform 750.

[0293] In this embodiment of the disclosure, the processor 751 may execute instructions 753 to complete all or part of the steps of the request-response method described above.

[0294] In some embodiments of this disclosure, a computer-readable storage medium including instructions is also provided, such as a memory including instructions that can be executed by a processor of a device to perform the methods described above. For example, the computer-readable storage medium may be a ROM, random access memory (RAM), CD-ROM, magnetic tape, floppy disk, and optical data storage device, etc.

[0295] A computer-readable storage medium, when instructions in the storage medium are executed by a processor of a mobile terminal, enables the mobile terminal to perform a request-response method, the method comprising:

[0296] When the second processor has a need to access the storage medium, it sends a data access request to the first processor.

[0297] The first processor responds to the data access request and accesses the storage medium;

[0298] Upon receiving the response information from the first processor, the second processor performs subsequent operations.

[0299] In some optional embodiments, the access request is triggered by the second processor during the execution of the task to be processed. Upon receiving the response information returned by the first processor, the second processor performs subsequent operations, including:

[0300] If the processing priority of the pending task is greater than or equal to the first priority threshold, the second processor blocks and waits until it receives the response information returned by the first processor before executing the subsequent operations of the pending task; where the processing priority is negatively correlated with the response latency.

[0301] If the processing priority of the pending task is less than the first priority threshold, the second processor will execute other tasks after submitting the data processing request to the first processor, and asynchronously wait for the response information returned by the first processor.

[0302] Upon receiving the response information returned by the first processor, the second processor continues to execute subsequent operations of the pending task based on the response information.

[0303] In some optional embodiments, after the second processor submits the data processing request to the first processor, performs other tasks, and asynchronously waits for the response information returned by the first processor, the second processor further includes:

[0304] The first processor responds to the data access request, accesses the storage medium, and stores the response information after the access is completed;

[0305] The second processor sends an information retrieval request to the first processor, and the first processor responds to the information retrieval request by reading the response information and returning it to the second processor.

[0306] In some optional embodiments, after the second processor submits the data processing request to the first processor, performs other tasks, and asynchronously waits for the response information returned by the first processor, the second processor further includes:

[0307] The first processor responds to the data access request, accesses the storage medium, and returns response information to the shared memory after the access is completed;

[0308] The second processor reads the response information from shared memory.

[0309] In some alternative embodiments, the first processor, in response to a data access request, accesses the storage medium, including:

[0310] When the first processor receives multiple data access requests from the second processor, it sorts the multiple data access requests.

[0311] The first processor responds to each data processing request in sequence according to the sorting result, and accesses the storage medium.

[0312] In some optional embodiments, the method further includes:

[0313] The first processor assigns corresponding identity tags to the multiple data access requests received;

[0314] Sort multiple data access requests, including:

[0315] The first processor sorts the identity tags of multiple data access requests according to the order in which they are received;

[0316] Alternatively, the first processor may sort the identity tags of multiple data access requests based on the processing priority of the tasks to be processed corresponding to each data access request.

[0317] In some optional embodiments, after the second processor sends a data access request to the first processor when it has an access need to access the storage medium, it further includes:

[0318] The second processor times the duration of the first processor's response to data access requests;

[0319] If the timer reaches the preset duration threshold, the second processor continues to perform subsequent operations and marks the pending task corresponding to the data access request with a response failure label.

[0320] In some optional embodiments, if the timer reaches a preset duration threshold, the second processor continues to perform subsequent operations, including:

[0321] If the utilization rate of the first processor reaches a preset utilization rate threshold, and if the timer reaches a first preset duration threshold, the second processor continues to execute subsequent operations.

[0322] If the utilization rate of the first processor does not reach the preset utilization rate threshold, and the timer reaches the second preset duration threshold, the second processor continues to perform subsequent operations.

[0323] The first duration threshold is greater than the second duration threshold.

[0324] In some optional embodiments, if the timer reaches a preset duration threshold, the second processor continues to perform subsequent operations, including:

[0325] If the processing priority of the task to be processed corresponding to the data access request is greater than or equal to the second priority threshold, and if the timer reaches the third preset duration threshold, the second processor continues to execute subsequent operations.

[0326] If the processing priority of the task corresponding to the data access request is less than the second priority threshold, and the timer reaches the fourth preset duration threshold, the second processor continues to execute subsequent operations.

[0327] The third preset duration threshold is less than the fourth preset duration threshold.

[0328] In some optional embodiments, if the timer reaches a preset duration threshold, the second processor continues to perform subsequent operations, and after the second processor marks the response failure tag on the pending task corresponding to the data access request, the process further includes:

[0329] The second processor sends a blocking notification to at least one second processor that supports the access protocol of the storage medium;

[0330] The second processor, which supports the access protocol of the storage medium, sends a switching prompt to the first processor and the remaining second processors based on the received congestion prompt.

[0331] In some optional embodiments, a second processor supporting the storage medium access protocol sends a switching prompt to the first processor and the remaining second processors based on the received congestion prompt, including:

[0332] Based on occupancy, at least one second processor that supports the storage medium access protocol determines a third processor to take over accessing the storage medium from the first processor.

[0333] Based on the congestion warning, the third processor sends a switchover prompt to the first processor and the remaining second processors.

[0334] In some optional embodiments, at least one second processor supporting the storage medium access protocol determines a third processor to take over accessing the storage medium from the first processor based on occupancy, including:

[0335] If at least one second processor supporting the access protocol of the storage medium receives a preset number of congestion prompts within a preset time period, a third processor is determined based on the occupancy rate to take over accessing the storage medium from the first processor.

[0336] In some optional embodiments, after sending the switchover prompt to the first processor and the remaining second processors, the method further includes:

[0337] The remaining second processors resend the data access requests for the pending tasks marked with a response failure tag to the third processor;

[0338] In addition, the first processor and the remaining second processors send data access requests to the third processor when they have access needs to access the storage medium.

[0339] In some optional embodiments, when the instructions in the storage medium are executed by the processor of the mobile terminal, the mobile terminal is also enabled to execute a request-response method, the method including:

[0340] When the second processor has a need to access the storage medium, it sends a data access request to the first processor.

[0341] The second processor blocks and waits until it receives a response from the first processor before performing subsequent operations.

[0342] In some optional embodiments, when the instructions in the storage medium are executed by the processor of the mobile terminal, the mobile terminal is also enabled to execute a request-response method, the method including:

[0343] The first processor responds to the data access request and accesses the storage medium;

[0344] Upon completion of the access, the first processor sends a response message to the second processor.

[0345] This disclosure also provides a computer program product, including a computer program executed by a processor, which performs a request-response method, the method comprising:

[0346] When the second processor has a need to access the storage medium, it sends a data access request to the first processor.

[0347] The first processor responds to the data access request and accesses the storage medium;

[0348] Upon receiving the response information from the first processor, the second processor performs subsequent operations.

[0349] In some optional embodiments, the access request is triggered by the second processor during the execution of the task to be processed. Upon receiving the response information returned by the first processor, the second processor performs subsequent operations, including:

[0350] If the processing priority of the pending task is greater than or equal to the first priority threshold, the second processor blocks and waits until it receives the response information returned by the first processor before executing the subsequent operations of the pending task; where the processing priority is negatively correlated with the response latency.

[0351] If the processing priority of the pending task is less than the first priority threshold, the second processor, after submitting the data processing request to the first processor, executes other tasks and asynchronously waits for the response information returned by the first processor; if the second processor receives the response information returned by the first processor, it continues to execute the subsequent operations of the pending task based on the response information.

[0352] In some optional embodiments, after the second processor submits the data processing request to the first processor, performs other tasks, and asynchronously waits for the response information returned by the first processor, the second processor further includes:

[0353] The first processor responds to the data access request, accesses the storage medium, and stores the response information after the access is completed;

[0354] The second processor sends an information retrieval request to the first processor, and the first processor responds to the information retrieval request by reading the response information and returning it to the second processor.

[0355] In some optional embodiments, after the second processor submits the data processing request to the first processor, performs other tasks, and asynchronously waits for the response information returned by the first processor, the second processor further includes:

[0356] The first processor responds to the data access request, accesses the storage medium, and returns response information to the shared memory after the access is completed;

[0357] The second processor reads the response information from shared memory.

[0358] In some alternative embodiments, the first processor, in response to a data access request, accesses the storage medium, including:

[0359] When the first processor receives multiple data access requests from the second processor, it sorts the multiple data access requests.

[0360] The first processor responds to each data processing request in sequence according to the sorting result, and accesses the storage medium.

[0361] In some optional embodiments, the method further includes:

[0362] The first processor assigns corresponding identity tags to the multiple data access requests received;

[0363] Sort multiple data access requests, including:

[0364] The first processor sorts the identity tags of multiple data access requests according to the order in which they are received;

[0365] Alternatively, the first processor may sort the identity tags of multiple data access requests based on the processing priority of the tasks to be processed corresponding to each data access request.

[0366] In some optional embodiments, after the second processor sends a data access request to the first processor when it has an access need to access the storage medium, it further includes:

[0367] The second processor times the duration of the first processor's response to data access requests;

[0368] If the timer reaches the preset duration threshold, the second processor continues to perform subsequent operations and marks the pending task corresponding to the data access request with a response failure label.

[0369] In some optional embodiments, if the timer reaches a preset duration threshold, the second processor continues to perform subsequent operations, including:

[0370] If the utilization rate of the first processor reaches a preset utilization rate threshold, and if the timer reaches a first preset duration threshold, the second processor continues to execute subsequent operations.

[0371] If the utilization rate of the first processor does not reach the preset utilization rate threshold, and the timer reaches the second preset duration threshold, the second processor continues to perform subsequent operations.

[0372] The first duration threshold is greater than the second duration threshold.

[0373] In some optional embodiments, if the timer reaches a preset duration threshold, the second processor continues to perform subsequent operations, including:

[0374] If the processing priority of the task to be processed corresponding to the data access request is greater than or equal to the second priority threshold, and if the timer reaches the third preset duration threshold, the second processor continues to execute subsequent operations.

[0375] If the processing priority of the task corresponding to the data access request is less than the second priority threshold, and the timer reaches the fourth preset duration threshold, the second processor continues to execute subsequent operations.

[0376] The third preset duration threshold is less than the fourth preset duration threshold.

[0377] In some optional embodiments, if the timer reaches a preset duration threshold, the second processor continues to perform subsequent operations, and after the second processor marks the response failure tag on the pending task corresponding to the data access request, the process further includes:

[0378] The second processor sends a blocking notification to at least one second processor that supports the access protocol of the storage medium;

[0379] The second processor, which supports the access protocol of the storage medium, sends a switching prompt to the first processor and the remaining second processors based on the received congestion prompt.

[0380] In some optional embodiments, a second processor supporting the storage medium access protocol sends a switching prompt to the first processor and the remaining second processors based on the received congestion prompt, including:

[0381] Based on occupancy, at least one second processor that supports the storage medium access protocol determines a third processor to take over accessing the storage medium from the first processor.

[0382] Based on the congestion warning, the third processor sends a switchover prompt to the first processor and the remaining second processors.

[0383] In some optional embodiments, at least one second processor supporting the storage medium access protocol determines a third processor to take over accessing the storage medium from the first processor based on occupancy, including:

[0384] If at least one second processor supporting the access protocol of the storage medium receives a preset number of congestion prompts within a preset time period, a third processor is determined based on the occupancy rate to take over accessing the storage medium from the first processor.

[0385] In some optional embodiments, after sending the switchover prompt to the first processor and the remaining second processors, the method further includes:

[0386] The remaining second processors resend the data access requests for the pending tasks marked with a response failure tag to the third processor;

[0387] In addition, the first processor and the remaining second processors send data access requests to the third processor when they have access needs to access the storage medium.

[0388] In some alternative embodiments, the computer program is executed by a processor and is also capable of performing a request-response method, the method comprising:

[0389] When the second processor has a need to access the storage medium, it sends a data access request to the first processor.

[0390] The second processor blocks and waits until it receives a response from the first processor before performing subsequent operations.

[0391] In some alternative embodiments, the computer program is executed by a processor and is also capable of performing a request-response method, the method comprising:

[0392] The first processor responds to the data access request and accesses the storage medium;

[0393] Upon completion of the access, the first processor sends a response message to the second processor.

[0394] Some embodiments of this disclosure also provide a chip system, such as Figure 8 As shown, the chip system includes at least one processor 801 and at least one interface circuit 802. The processor 801 and the interface circuit 802 are interconnected via lines. For example, the interface circuit 802 can be used to receive signals from other devices (e.g., the memory of an electronic device). As another example, the interface circuit 802 can be used to send signals to other devices (e.g., the processor 801). Exemplarily, the interface circuit 802 can read instructions stored in memory and send those instructions to the processor 801. When the instructions are executed by the processor 801, the request-response device can perform the steps in the above embodiments. Of course, the chip system may also include other discrete devices, and some embodiments of this disclosure do not specifically limit this.

[0395] In some embodiments of this disclosure, the interface circuit 802 can acquire data, program instructions, and / or information from the internal storage area of ​​the chip system; it can also acquire data, program instructions, and / or information from outside the chip system.

[0396] Optionally, the chip system also includes a memory 803 for storing necessary computer programs and data.

[0397] Those skilled in the art will also understand that the various illustrative logical blocks and steps listed in the embodiments of this application can be implemented by electronic hardware, computer software, or a combination of both. Whether such functionality is implemented through hardware or software depends on the specific application and the overall system design requirements. Those skilled in the art can implement the functionality using various methods for each specific application, but such implementation should not be construed as exceeding the scope of protection of the embodiments of this application.

[0398] Furthermore, the term “exemplary” is used herein to mean serving as an example, instance, or illustration. Any aspect or design described herein as “exemplary” is not necessarily to be construed as advantageous compared to other aspects or designs. Rather, the use of the term “exemplary” is intended to present the concept in a concrete manner. As used herein, the term “or” is intended to mean an inclusive “or” rather than an exclusive “or.” That is, unless otherwise specified or clear from the context, “X applies A or B” is intended to mean any of the natural inclusive arrangements. That is, “X applies A or B” satisfies any of the foregoing instances if X applies A; X applies B; or both X applies A and B. Additionally, unless otherwise specified or clear from the context to refer to the singular form, the articles “a” and “an” as used in this application and the appended claims are generally understood to mean “one or more.”

[0399] Similarly, although this disclosure has been shown and described with respect to one or more implementations, equivalent variations and modifications will occur to those skilled in the art upon reading and understanding this specification and the accompanying drawings. This disclosure includes all such modifications and variations and is limited only by the scope of the claims. In particular, with respect to the various functions performed by the components described above (e.g., elements, resources, etc.), unless otherwise indicated, the terminology used to describe such components is intended to correspond to any component (functionally equivalent) that performs the specific function of the described component, even if structurally not equivalent to the disclosed structure. Furthermore, although specific features of this disclosure may have been disclosed with respect to only one of several implementations, such features may be combined with one or more other features of other implementations, as may be desired and advantageous to any given or particular application. Moreover, with regard to the terms “comprising,” “owning,” “having,” “having,” or variations thereof as used in the detailed description or claims, such terms are intended to be inclusive in a manner similar to the term “including.”

[0400] Other embodiments of this disclosure will readily occur to those skilled in the art upon consideration of the specification and practice of the invention disclosed herein. This application is intended to cover any variations, uses, or adaptations of this disclosure that follow the general principles of this disclosure and include common knowledge or customary techniques in the art not disclosed herein. The specification and examples are to be considered exemplary only, and the true scope and spirit of this disclosure are indicated by the following claims.

[0401] Although terms such as “first,” “second,” and “third” may be used herein to describe various components, parts, regions, layers, or sections, these components, parts, regions, layers, or sections are not limited to these terms. Rather, these terms are used only to distinguish one component, part, region, layer, or section from another. Therefore, without departing from the teachings of the examples described herein, the first component, part, region, layer, or section mentioned in the examples may also be referred to as the second component, part, region, layer, or section. Furthermore, the terms “first” and “second” are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as “first” or “second” may explicitly or implicitly include at least one of that feature. In the description herein, “a plurality” means at least two, such as two, three, etc., unless otherwise explicitly specified.

Claims

1. A request-response method, characterized in that, include: When the second processor has a need to access the storage medium, it sends a data access request to the first processor. The first processor supports the access protocol of the storage medium; The first processor accesses the storage medium in response to the data access request; Upon receiving the response information returned by the first processor, the second processor performs subsequent operations.

2. The request-response method according to claim 1, characterized in that, The access request is triggered by the second processor during the execution of a pending task. Upon receiving the response information returned by the first processor, the second processor performs subsequent operations, including: If the processing priority of the pending task is greater than or equal to the first priority threshold, the second processor blocks and waits until it receives the response information returned by the first processor, and then executes the subsequent operation of the pending task; wherein the processing priority is negatively correlated with the response latency.

3. The request-response method according to claim 2, characterized in that, The method further includes: If the processing priority of the pending task is less than the first priority threshold, the second processor, after submitting the data processing request to the first processor, executes other tasks and asynchronously waits for the response information returned by the first processor; if the second processor receives the response information returned by the first processor, it continues to execute the subsequent operations of the pending task based on the response information.

4. The request-response method according to claim 3, characterized in that, After submitting the data processing request to the first processor, the second processor performs other tasks and asynchronously waits for the response information returned by the first processor, and then further includes: In response to the data access request, the first processor accesses the storage medium and stores the response information after the access is completed; The second processor sends an information extraction request to the first processor, and the first processor responds to the information extraction request by reading the response information and returning it to the second processor.

5. The request-response method according to claim 3, characterized in that, After submitting the data processing request to the first processor, the second processor performs other tasks and asynchronously waits for the response information returned by the first processor, and then further includes: In response to the data access request, the first processor accesses the storage medium and, after the access is completed, returns the response information to the shared memory; The second processor reads the response information from the shared memory.

6. The request-response method according to claim 1, characterized in that, In response to the data access request, the first processor accesses the storage medium, including: When the first processor receives multiple data access requests sent by the second processor, it sorts the multiple data access requests. The first processor responds to each of the data processing requests in sequence according to the sorting result, and accesses the storage medium.

7. The request-response method according to claim 6, characterized in that, The method further includes: The first processor assigns corresponding identity tags to the multiple data access requests received; The sorting of the multiple data access requests includes: The first processor sorts the identity tags of the multiple data access requests according to the order in which they are received; Alternatively, the first processor may sort the identity tags of the multiple data access requests based on the processing priority of the tasks to be processed corresponding to each data access request.

8. The request-response method according to any one of claims 1-7, characterized in that, After the second processor sends a data access request to the first processor when it has an access need to access the storage medium, it further includes: The second processor times the duration of the first processor's response to the data access request; If the timer reaches the preset duration threshold, the second processor continues to perform subsequent operations and marks the pending task corresponding to the data access request with a response failure label.

9. The request-response method according to claim 8, characterized in that, When the timer reaches a preset duration threshold, the second processor continues to perform subsequent operations, including: If the utilization rate of the first processor reaches a preset utilization rate threshold, and if the timing reaches a first preset duration threshold, the second processor continues to perform subsequent operations. If the utilization rate of the first processor does not reach the preset utilization rate threshold, and the timing reaches the second preset duration threshold, the second processor continues to perform subsequent operations. The first duration threshold is greater than the second duration threshold.

10. The request-response method according to claim 8, characterized in that, When the timer reaches a preset duration threshold, the second processor continues to perform subsequent operations, including: If the processing priority of the task to be processed corresponding to the data access request is greater than or equal to the second priority threshold, and the timer reaches the third preset duration threshold, the second processor continues to execute subsequent operations. If the processing priority of the task to be processed corresponding to the data access request is less than the second priority threshold, and the second processor continues to execute subsequent operations when the timer reaches the fourth preset duration threshold; The third preset duration threshold is less than the fourth preset duration threshold.

11. The request-response method according to claim 8, characterized in that, The step of the second processor continuing to execute subsequent operations after the timer reaches a preset duration threshold, and marking the pending task corresponding to the data access request with a response failure label by the second processor, further includes: The second processor sends a congestion warning to at least one of the second processors that supports the access protocol of the storage medium; The second processor, which supports the access protocol of the storage medium, sends a switching prompt to the first processor and the remaining second processors based on the received congestion prompt.

12. The request-response method according to claim 11, characterized in that, The second processor supporting the access protocol of the storage medium sends a switching prompt to the first processor and the remaining second processors based on the received congestion prompt, including: At least one of the second processors supporting the access protocol of the storage medium determines a third processor to take over accessing the storage medium from the first processor based on the occupancy rate; Based on the congestion warning, the third processor sends the switching warning to the first processor and the remaining second processors.

13. The request-response method according to claim 12, characterized in that, The at least one second processor supporting the access protocol of the storage medium determines a third processor to take over accessing the storage medium from the first processor based on occupancy rate, including: If at least one of the second processors supporting the access protocol of the storage medium receives a preset number of congestion prompts within a preset time period, a third processor is determined based on the occupancy rate to take over accessing the storage medium from the first processor.

14. The request-response method according to claim 12, further comprising, after sending the switching prompt to the first processor and the remaining second processors: The remaining second processors resend the data access request for the pending task marked with the response failure tag to the third processor; Furthermore, when the first processor and the remaining second processors have an access requirement to access the storage medium, they send the data access request to the third processor.

15. A request-response device, characterized in that, include: The sending module is configured to send a data access request to the first processor when the second processor has an access need to access the storage medium; The first processor supports the access protocol of the storage medium; An access module is configured such that the first processor accesses the storage medium in response to the data access request; The waiting module is configured to allow the second processor to perform subsequent operations upon receiving a response from the first processor.

16. The request response apparatus according to claim 15, characterized in that, The access request is triggered by the second processor during the execution of the task to be processed, and the waiting module is further configured to: If the processing priority of the pending task is greater than or equal to the first priority threshold, the second processor blocks and waits until it receives the response information returned by the first processor, and then executes the subsequent operation of the pending task; wherein the processing priority is negatively correlated with the response latency.

17. The request response apparatus according to claim 16, characterized in that, The waiting module is also configured to: If the processing priority of the task to be processed is less than the first priority threshold, the second processor, after submitting the data processing request to the first processor, executes other tasks and asynchronously waits for the response information returned by the first processor. Upon receiving the response information returned by the first processor, the second processor continues to execute subsequent operations of the task to be processed based on the response information.

18. The request response apparatus according to claim 17, characterized in that, The waiting module is also configured to: In response to the data access request, the first processor accesses the storage medium and stores the response information after the access is completed; The second processor sends an information extraction request to the first processor, and the first processor responds to the information extraction request by reading the response information and returning it to the second processor.

19. The request response apparatus according to claim 17, characterized in that, The second waiting module is also configured as follows: In response to the data access request, the first processor accesses the storage medium and, after the access is completed, returns the response information to the shared memory; The second processor reads the response information from the shared memory.

20. The request response apparatus according to claim 15, characterized in that, The access module is also configured to: When the first processor receives multiple data access requests sent by the second processor, it sorts the multiple data access requests. The first processor responds to each of the data processing requests in sequence according to the sorting result, and accesses the storage medium.

21. The request response apparatus according to claim 20, characterized in that, The request response device further includes: The allocation module is configured so that the first processor allocates corresponding identity tags for the multiple data access requests received; The access module is also configured to: The first processor sorts the identity tags of the multiple data access requests according to the order in which they are received; Alternatively, the first processor may sort the identity tags of the multiple data access requests based on the processing priority of the tasks to be processed corresponding to each data access request.

22. The request response apparatus according to any one of claims 15-21, characterized in that, The request response device further includes: The timing module is configured to time the duration for the second processor to respond to the data access request. The marking module is configured to, when the timer reaches a preset duration threshold, allow the second processor to continue performing subsequent operations and mark the pending task corresponding to the data access request with a response failure tag.

23. The request response apparatus according to claim 22, characterized in that, The marking module is also configured to: If the utilization rate of the first processor reaches a preset utilization rate threshold, and if the timing reaches a first preset duration threshold, the second processor continues to perform subsequent operations. If the utilization rate of the first processor does not reach the preset utilization rate threshold, and the timing reaches the second preset duration threshold, the second processor continues to perform subsequent operations. The first duration threshold is greater than the second duration threshold.

24. The request response apparatus according to claim 22, characterized in that, The marking module is also configured to: If the processing priority of the task to be processed corresponding to the data access request is greater than or equal to the second priority threshold, and the timer reaches the third preset duration threshold, the second processor continues to execute subsequent operations. If the processing priority of the task to be processed corresponding to the data access request is less than the second priority threshold, and the second processor continues to execute subsequent operations when the timer reaches the fourth preset duration threshold; The third preset duration threshold is less than the fourth preset duration threshold.

25. The request response apparatus according to claim 22, characterized in that, The first waiting module and the marking module are further configured as follows: The second processor sends a congestion warning to at least one of the second processors that supports the access protocol of the storage medium; The second processor, which supports the access protocol of the storage medium, sends a switching prompt to the first processor and the remaining second processors based on the received congestion prompt.

26. The request response apparatus according to claim 25, characterized in that, The first waiting module is also configured as follows: At least one of the second processors supporting the access protocol of the storage medium determines a third processor to take over accessing the storage medium from the first processor based on the occupancy rate; The second processor supporting the access protocol of the storage medium sends a switching prompt to the first processor and the remaining second processors based on the received congestion prompt, including: Based on the congestion warning, the third processor sends the switching warning to the first processor and the remaining second processors.

27. The request response apparatus according to claim 25, characterized in that, The first waiting module is also configured as follows: If at least one of the second processors supporting the access protocol of the storage medium receives a preset number of congestion prompts within a preset time period, a third processor is determined based on the occupancy rate to take over accessing the storage medium from the first processor.

28. The request response apparatus according to claim 25, characterized in that, The first waiting module is also configured as follows: The remaining second processors resend the data access request for the pending task marked with the response failure tag to the third processor; Furthermore, when the first processor and the remaining second processors have an access requirement to access the storage medium, they send the data access request to the third processor.

29. A control system, characterized in that, It includes a first processor, a second processor, and a storage medium, wherein the first processor supports the access protocol of the storage medium; The control system is configured to employ the request-response method as described in any one of claims 1-14, such that when the second processor has an access requirement to access the storage medium, it sends a data access request to the first processor; the first processor responds to the data access request and accesses the storage medium; and the second processor, upon receiving the response information returned by the first processor, performs subsequent operations.

30. A vehicle, characterized in that, Includes the control system as described in claim 29.

31. A computer-readable storage medium, characterized in that, The storage medium stores a computer program or instructions that, when executed by a processor of an electronic device, enable the electronic device to perform a request-response method, the method comprising: When the second processor has an access requirement to access the storage medium, it sends a data access request to the first processor; the first processor supports the access protocol of the storage medium. The first processor accesses the storage medium in response to the data access request; Upon receiving the response information returned by the first processor, the second processor performs subsequent operations.

32. A computer program product, characterized in that, Includes a computer program, which, when executed by a processor, performs a request-response method, the method comprising: When the second processor has an access requirement to access the storage medium, it sends a data access request to the first processor; the first processor supports the access protocol of the storage medium. The first processor accesses the storage medium in response to the data access request; Upon receiving the response information returned by the first processor, the second processor performs subsequent operations.

33. A chip system, characterized in that, The chip system includes a processing unit and an interface circuit. The processing unit obtains program instructions through the interface circuit, and the program instructions are executed by the processing unit. The processing unit is used to execute a request-response method, the method including: When the second processor has an access requirement to access the storage medium, it sends a data access request to the first processor; the first processor supports the access protocol of the storage medium. The first processor accesses the storage medium in response to the data access request; Upon receiving the response information returned by the first processor, the second processor performs subsequent operations.

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