Parallel cut set simplification method based on fault tree logic embedded neural network

Abstract

The invention discloses a parallel cut set simplification method based on a fault tree logic embedded neural network, and relates to the field of fault tree analysis. In order to solve the problems that in the prior art, the cut set simplification calculation amount is exponentially increased, the parallelization degree is insufficient, the efficiency is low due to dependence on explicit comparison, and efficient implementation on a GPU architecture is difficult, the invention provides an efficient cut set simplification scheme utilizing fault tree logic and neural network structure fusion. The method comprises the following steps of: vectorizing an initial cut set, grouping according to orders, generating a corresponding subset basic matrix, and generating'order minus one 'subset tensors in batches through an index mask; inputting the subset tensor into a fault tree logic equivalent neural network to execute parallel Boolean judgment, and outputting a result of whether the subset triggers a top event or not; according to judgment result slice statistics, non-minimum cut sets are quickly removed, and a minimum cut set is obtained. The method is suitable for reliability analysis and safety evaluation of large complex systems such as aerospace, nuclear power, rail transit and petrochemical devices.

Description

Technical Field

[0001] This involves the field of fault tree analysis, and in particular, high-efficiency parallelized fault tree cut set solutions. Background Technology

[0002] Fault Tree Analysis (FTA) is one of the most classic and widely used logical analysis methods for assessing the reliability and safety of complex systems. By decomposing the top-level failure events of a system into hierarchical basic events, forming a fault tree structure with hierarchical logical relationships, it can systematically identify potential risk sources and their interrelationships within the system. Especially in high-reliability industries such as nuclear power, aerospace, rail transportation, petrochemicals, and military equipment, FTA has become a crucial foundation for quantitative risk assessment and safety decision-making.

[0003] In the qualitative analysis of fault trees, solving for the Minimal Cut Set (MCS) is a crucial step. The Minimal Cut Set is the smallest combination of basic events that leads to the top event, revealing the system's most vulnerable failure modes. Quickly and accurately obtaining all Minimal Cut Sets is essential for identifying system weaknesses, analyzing importance, controlling risks, and optimizing design. Therefore, efficient algorithms for solving Minimal Cut Sets have always been a key research focus in fault tree analysis.

[0004] Traditional methods for finding minimal cut sets typically involve two steps: First, an initial set of cut sets containing redundant terms is generated using algorithms such as MOCUS; then, this set is simplified, eliminating non-minimum cut sets. The core principle of simplification is the "absorption law": if cut set A is a proper subset of cut set B (i.e., all basic events in A are also in B, and B contains events other than those in A), then B is a non-minimum cut set and should be "absorbed" by A and eliminated.

[0005] In practical engineering, traditional minimal cut set simplification typically relies on the "absorption law," which states that if cut set A is a proper subset of cut set B, then B is absorbed by A and is no longer a minimal cut set. While logically rigorous, this method often involves pairwise comparisons, comparing each candidate cut set with all lower-order cut sets, resulting in a computational complexity of approximately O(N²). As the system size increases and the number of cut sets reaches tens or even hundreds of thousands, the number of comparisons increases quadratically, easily leading to computational bottlenecks. For example, in nuclear power systems or aerospace flight control systems, fault trees often contain tens of thousands of basic events and millions of cut set records. Traditional algorithms can take hours or even days to complete cut set simplification, severely impacting real-time performance and engineering application value.

[0006] In recent years, some studies have attempted to leverage GPU parallel computing to accelerate fault tree analysis. However, these methods often only achieve partial parallelism at the Boolean computation layer, still requiring explicit comparisons between cut sets, and lack a systematic design for cut set simplification. Meanwhile, artificial intelligence methods have also been attempted, such as reliability prediction models based on neural networks, but these methods typically rely on data training, failing to ensure the logical determinism and reproducibility of the results, and thus struggling to meet the verification and traceability requirements of safety-critical areas.

[0007] In summary, existing technologies suffer from problems such as exponential growth in computational load during the cut set simplification stage, insufficient parallelization, inefficiency due to reliance on explicit comparisons, and difficulty in efficient implementation on parallel architectures such as GPUs. Consequently, they are unable to support the need for efficient minimum cut set solutions for large-scale complex systems. Summary of the Invention

[0008] To address the shortcomings of existing technologies, such as the exponential growth of computational complexity during the cut set simplification stage, insufficient parallelization, inefficiency due to reliance on explicit comparisons, and difficulty in efficient implementation on parallel architectures like GPUs, thus hindering the efficient minimum cut set solution requirements for large-scale complex systems, the technical solution provided by this invention is as follows: A parallel cut-set simplification method based on fault tree logic embedded neural network includes: The steps involve preprocessing the initial set of cut sets, converting each cut set into a corresponding 0-1 vector under a fixed basic event order, calculating the order of each cut set and sorting them in ascending order, arranging cut sets of the same order consecutively to form groups of the same order, and outputting the structured cut set matrix and the number of cut sets at each order. Based on the structured cut set matrix and the number of cut sets at each order, for each candidate cut set, any basic event is removed from the candidate cut set in parallel to generate all "order minus one" subsets of the cut set. That is, the steps are to generate all subset vectors after changing "1" to "0" at a certain position of all candidate cut set vectors in batches, and to generate a matrix composed of the "order minus one" subset vectors of all candidate cut sets. The subset matrix is ​​input into a neural network structure equivalent to fault tree logic, parallel Boolean decision is performed, and a result vector is output, in which each element corresponds one-to-one with the subsets in the input matrix, and the value indicates whether the subset triggers the top event. Based on the result vector and the number of pre-recorded cut sets of each order, the result vector is divided into continuous slices with the same number of cut sets. If there is a result with the value "1" in the slice, the corresponding cut set is determined to be a non-minimum cut set and is removed. Otherwise, it is retained and identified as the minimum cut set, and the final set of minimum cut sets is output.

[0009] Furthermore, in a preferred embodiment, the basic event sequence is determined based on the fault tree topology, and a globally unique index is established through event numbers.

[0010] Furthermore, in a preferred embodiment, the row vectors of the cut sets are copied in batches according to the order of each candidate cut set, and a stacking operation is performed in the GPU parallel computing architecture so that the rows of the generated basic matrix are arranged continuously in the storage space.

[0011] Furthermore, in a preferred embodiment, the row coordinates and index vectors that are incremented by row are used to locate the position of the element to be modified in the matrix, and the value of all marked positions is changed from "1" to "0" in a single tensor assignment operation on the GPU.

[0012] Furthermore, in a preferred embodiment, the fault tree Boolean function module equivalent to the neural network is a feedforward neural network without training. It uses logic gate operations that map fault trees with fixed weights and activation functions, and can perform a one-time forward propagation of the input tensor on a graphics processor or other parallel acceleration hardware, thereby outputting the judgment results of all subsets in parallel.

[0013] Furthermore, in a preferred embodiment, the output of the neural network equivalent module is a one-dimensional result vector that maintains the correspondence of the input order, thereby ensuring the consistency of the index mapping between subsequent slices and candidate cut set groups.

[0014] Based on the same inventive concept, the present invention also provides a parallel cut-set simplification device based on fault tree logic embedded neural network, comprising: The module preprocesses the initial set of cut sets, converts each cut set into a corresponding 0-1 vector under a fixed basic event order, calculates the order of each cut set and sorts them in ascending order of order, arranges cut sets of the same order consecutively to form same-order groups, and outputs a structured cut set matrix and order information. Based on the structured cut set matrix and order information, for each candidate cut set, any basic event is removed from the candidate cut set in parallel to generate all "order minus one" subsets of the cut set, that is, batch generating all subset vectors after changing "1" to "0" at a certain position of all candidate cut set vectors, and generating a matrix composed of the "order minus one" subset vectors of all candidate cut sets. The subset matrix is ​​input into the neural network structure equivalent to the fault tree logic. Parallel Boolean decision is performed based on the connection relationship of the fault tree logic gates and the preset activation function. The output module is a result vector in which each element corresponds one-to-one with the subset in the input matrix and the value represents whether the subset triggers the top event. Based on the result vector and the pre-recorded order grouping information, the result vector is divided into multiple continuous slices and a logical OR operation is performed. If any slice contains a result with a value of "1", the corresponding cut set is determined to be a non-minimum cut set and is removed. Otherwise, it is retained and identified as a minimum cut set, and the module that outputs the final set of minimum cut sets is generated.

[0015] Based on the same inventive concept, the present invention also provides a computer storage medium for storing a computer program, wherein when the computer program is read by a computer, the computer executes the method described thereon.

[0016] Based on the same inventive concept, the present invention also provides a computer, including a processor and a storage medium, wherein when the processor reads a computer program stored in the storage medium, the computer executes the method described thereon.

[0017] Based on the same inventive concept, the present invention also provides a computer program product, which, when executed, implements the method described.

[0018] Compared with the prior art, the advantages of the technical solution provided by the present invention are as follows: This invention achieves parallel computation of Boolean logic relations by mapping fault tree logic to an equivalent neural network structure. Traditional methods typically expand logic gates layer by layer through recursion or depth-first traversal, and computational efficiency is limited by the serial structure. This invention, however, utilizes the tensor computation characteristics of neural network forward propagation to complete all logical operations in one go using matrix multiplication and nonlinear activation. This approach significantly reduces the depth of logical judgments, enabling large-scale parallel reasoning for fault tree top event determination on GPUs, thereby increasing computational speed by tens of times without sacrificing accuracy.

[0019] This invention employs a fixed-order 0-1 vectorized representation to standardize and matrix the relationship between cut sets and basic events. Compared to traditional text-based or linked-list storage structures, this structure offers advantages such as continuous memory access and concise index calculation, allowing for batch computations to be performed directly in GPU memory. Furthermore, this approach enables the calculation of cut set order, sorting, and grouping to be completed through parallel counting operations, avoiding the high-latency access issues inherent in traditional algorithms during cut set traversal and multiple indexing, thereby improving data read / write efficiency and computational throughput.

[0020] This invention replaces the traditional method of iteratively generating subsets step-by-step with a vectorized subset generation mechanism. In existing methods, the "order minus one" subset of each cut set needs to be generated and determined separately, leading to numerous repetitive computational steps. This invention, however, achieves batch subset generation on GPU architecture by constructing the subset basis matrix all at once and combining it with index mask operations. This approach allows subsets of all candidate cut sets to be generated in a single tensor operation, significantly reducing control flow overhead and avoiding the efficiency losses inherent in loop control in traditional algorithms.

[0021] This invention introduces a batch slicing decision mechanism in the simplification and judgment stage, processing the Boolean decision results of candidate cut sets and all their subsets as corresponding slices. Compared to the O(N²) complexity scheme of performing "subset inclusion" judgment on each cut set individually in the prior art, this method only requires one tensor operation to complete the judgment of all candidate cut sets. Through vectorized logical operations on the GPU, the minimumity judgment of each cut set is transformed into a parallel reduction operation of logical OR, reducing the overall complexity to a linear relationship with the total order of the cut sets, thus avoiding the combinatorial explosion problem.

[0022] This invention employs a neural network structure built with deterministic weights, rather than a learning model that relies on training data. Existing AI-based reliability analysis methods typically require a large number of historical samples for training, making it difficult to guarantee generalization and consistency. This invention directly uses fault tree logic gates as the topological foundation, constructing a neural network model through manually defined fixed connections and logical activation functions, ensuring that the output results are completely consistent with Boolean logic. This approach guarantees the logical rigor and reproducibility of cut-set simplification, enabling the algorithm to possess both the high parallelism of neural networks and retain the determinism of traditional logic analysis.

[0023] The overall computational process of this invention, from preprocessing, subset generation, Boolean decision-making to final selection, uses tensor computation as its core operation, achieving end-to-end parallelization. Unlike traditional staged serial solutions, this scheme can complete all steps in batch execution on a GPU at once, significantly reducing data transmission and synchronization overhead. Experiments show that in solving large fault trees (containing millions of cut sets), the computation time can be reduced to less than 1 / 50 of traditional methods, achieving real-time fault tree cut set simplification capabilities.

[0024] The implementation method of this invention outperforms existing research in terms of algorithm complexity, execution efficiency, and versatility. Compared with structure-dependent algorithms such as BDD and Petri net expansion, this method has no special restrictions on the fault tree structure, can be applied to complex systems with arbitrary logical topologies, and does not require modification of the logical modeling process, thus possessing good versatility and portability.

[0025] It is applicable to reliability analysis and safety assessment of large and complex systems such as aerospace, nuclear power, rail transportation, and petrochemical plants. Attached Figure Description

[0026] Figure 1 The overall process of the method; Figure 2 A diagram illustrating the ascending order sorting of cut sets; Figure 3 To construct the basis matrix of the subset. Detailed Implementation

[0027] To make the advantages and benefits of the technical solution provided by the present invention clearer, the technical solution provided by the present invention will now be described in further detail with reference to the accompanying drawings, specifically: Implementation Method 1: This implementation method provides a parallel cut-set simplification method based on fault tree logic embedded neural network, including: The steps involve preprocessing the initial set of cut sets, converting each cut set into a corresponding 0-1 vector under a fixed basic event order, calculating the order of each cut set and sorting them in ascending order, arranging cut sets of the same order consecutively to form groups of the same order, and outputting the structured cut set matrix and the number of cut sets at each order. Based on the structured cut set matrix and the number of cut sets at each order, for each candidate cut set, any basic event is removed from the candidate cut set in parallel to generate all "order minus one" subsets of the cut set. That is, the steps are to generate all subset vectors after changing "1" to "0" at a certain position of all candidate cut set vectors in batches, and to generate a matrix composed of the "order minus one" subset vectors of all candidate cut sets. The subset matrix is ​​input into a neural network structure equivalent to fault tree logic, parallel Boolean decision is performed, and a result vector is output, in which each element corresponds one-to-one with the subsets in the input matrix, and the value indicates whether the subset triggers the top event. Based on the result vector and the number of pre-recorded cut sets of each order, the result vector is divided into continuous slices with the same number of cut sets. If there is a result with the value "1" in the slice, the corresponding cut set is determined to be a non-minimum cut set and is removed. Otherwise, it is retained and identified as the minimum cut set, and the final set of minimum cut sets is output.

[0028] The basic event sequence is determined based on the fault tree topology and a globally unique index is established using the event number.

[0029] The row vectors of each candidate cut set are copied in batches according to their order, and a stacking operation is performed in the GPU parallel computing architecture to keep the rows of the generated basic matrix continuously arranged in the storage space.

[0030] By using row coordinates and index vectors that are incremented in row order, the positions of the elements that need to be modified in the matrix are located, and the values ​​of all marked positions are changed from "1" to "0" in a single tensor assignment operation on the GPU.

[0031] The fault tree Boolean function module equivalent to the neural network is a feedforward neural network without training. It uses logic gate operations that map fault trees with fixed weights and activation functions, and can perform a one-time forward propagation of the input tensor on a graphics processor or other parallel acceleration hardware, thereby outputting the judgment results of all subsets in parallel.

[0032] The output of the equivalent module of the neural network is a one-dimensional result vector. This result vector maintains the correspondence of the input order, thereby ensuring the consistency of the index mapping between subsequent slices and candidate cut set groups. Implementation Method Two: This implementation method further describes the technical solution provided in Implementation Method One in detail. Specifically: With the goal of achieving efficient simplification of minimal cut sets, this method leverages the structured nature of fault tree Boolean logic and the parallel computing capabilities of neural networks to transform the traditional pairwise comparison process of cut sets into a tensor decision and filtering process that can be completed in one go on a GPU. The entire method includes steps such as preprocessing, subset generation, Boolean decision, result slicing, and filtering.

[0033] First, the initial set of cut sets is preprocessed. In traditional fault tree analysis, a set of initial cut sets containing redundant items is usually obtained through other logical decomposition methods of the MOCUS algorithm. These cut sets consist of different basic events, with complex logical relationships and a large number of events. To facilitate unified processing, a fixed index order of basic events needs to be established. This order can be determined based on the logical hierarchy or topological relationship of the events, such as defining E1 as the failure of high-pressure safety injection pump A to start, E2 as the failure of the containment sprinkler system to start, and E3 as the failure of the emergency diesel generator, etc. After determining the order, each cut set is mapped to a 0-1 vector of length equal to the total number of basic events. The position of "1" in the vector indicates that the event is included in the cut set, and the position of "0" indicates that it is not included. All cut sets are arranged into a binary matrix by rows, with the number of rows equal to the number of cut sets and the number of columns equal to the number of basic events. Then, the order of each cut set is calculated, that is, the number of "1"s in the row vector, which represents the number of basic events contained in the cut set. To ensure the orderliness of subsequent parallel processing, all cut sets are sorted in ascending order according to their order, and cut sets with the same order are arranged consecutively to form groups. The system simultaneously records the number of cut sets and their grouping indices at each order, for fast access and result slicing in subsequent steps. The output of this step is a set of standardized cut set matrices and their corresponding order information, providing a data foundation for subsequent subset generation.

[0034] Next, based on the definition of a minimal cut set, all subsets of each candidate cut set with an order minus one are generated. If the order of a cut set is k, any basic event can be removed to form a new subset, thus generating k subsets. This invention completes the subset generation process of all candidate cut sets in one go through batch tensor operations on the GPU. Specifically, first, a parallel index extraction operation is performed, using the GPU's parallel scanning function to quickly locate the positions of all elements with a value of 1 in the cut set matrix, and their column indices are recorded as a one-dimensional vector in traversal order. This index order strictly corresponds to the row and column order of the cut set matrix, ensuring the accuracy of subsequent row and column positioning. Second, a subset basis matrix is ​​constructed based on the order information of each cut set. For each row vector with an order of k in the cut set matrix, the row is copied k times to form a local block containing k rows; all copied blocks of cut sets are stacked along the row direction to form an expanded basis matrix, the number of which is equal to the sum of the orders of all cut sets. Finally, a batch assignment operation is performed using the index vectors obtained in the previous step and the basis matrix. By uniformly changing the "1" at the specified index position to "0", all subsets of each cut set with an order minus one can be generated. This operation is performed on the GPU as a single tensor computation, generating the subset set of all candidate cut sets at once. The result is a batch input tensor containing all subsets, which will be used as input for the next Boolean decision.

[0035] Subsequently, the subset tensors obtained in step two are input into the fault tree Boolean function module, which is equivalent to a neural network, for parallel logic determination. This module is based on the fault tree Boolean logic structure and implements logic gate functions through a predefined network topology and fixed weights. Unlike artificial intelligence models that require training, this module does not rely on any data learning process; instead, it completely reproduces the truth relationships of fault tree logic operations through statically defined weight matrices and activation functions. For example, a node corresponding to a gate outputs 1 only when all inputs are 1, or a node corresponding to a gate outputs 1 when any input is 1; the NOT gate achieves logical inversion through a reversal operation. All these logic gates are connected in a hierarchical structure of a neural network, forming a Boolean function mapping equivalent to a fault tree. The batch input subset vectors are processed on the GPU through a forward propagation process, using matrix multiplication and non-linear activation. The logic determination results of all input subsets are obtained in parallel during a single propagation. The output is a one-dimensional vector equal to the number of input subsets, where each element takes a value of 1 to indicate that the subset can trigger the top event, and a value of 0 to indicate that it cannot trigger the top event. In this way, millions of subsets can be determined in a single calculation, greatly improving the efficiency of logical judgment. This result vector will be used as input for the next step, for the final selection of the minimum cut set.

[0036] Next, based on the order distribution information recorded in the first preprocessing stage, the output vector from step three is sliced. Since the number of subsets generated by each cut set in step two is equal to its order, the result vector can be precisely divided into multiple consecutive slices according to the order distribution, with each slice corresponding to a candidate cut set. For each slice, a logical OR operation is performed to statistically analyze its internal results. If any result in a slice is 1, it indicates that a subset of the candidate cut set is sufficient to trigger the top event, and the cut set no longer satisfies the minimumity condition and should be eliminated; conversely, if all results in a slice are 0, it indicates that none of the subsets of the cut set can trigger the top event, and the cut set is the minimum cut set and should be retained. This logical operation is performed on the GPU in a parallel reduction manner, and the minimumity determination of all cut sets can be performed simultaneously. The computational complexity is only linearly related to the total order of the cut sets. After the determination is completed, the system generates a final Boolean vector, where a value of 1 represents a non-minimum cut set to be eliminated, and a value of 0 represents a minimum cut set to be retained. By performing a parallel filtering operation on the original cut set matrix using this Boolean vector, the final minimal cut set set can be obtained.

[0037] After the filtering process, the output set of minimal cut sets is saved in the form of a standard 0-1 matrix or a list of event combinations, which can be directly used for subsequent work such as system reliability assessment, vulnerability identification, and risk optimization design. Since the entire computation process is based on matrix and tensor operations, the data is processed entirely within the GPU, eliminating the need for frequent main memory and video memory interactions, thus significantly reducing data transfer overhead and improving overall computational efficiency. The method of this invention has demonstrated significant performance improvements in multiple typical tests. When dealing with complex systems containing millions of cut sets, its simplification time can be reduced from hours in traditional algorithms to minutes or even seconds, ensuring the real-time reliability analysis needs of high-safety fields such as aerospace, nuclear power plants, rail transportation, and petrochemical plants.

[0038] The technical solution of this invention achieves deterministic and reproducible efficient simplification of minimal cut sets by organically combining logical modeling, data structure optimization, and parallel computing architecture, without relying on training data. The dependencies between its steps are clear: the standardized output of the cut set matrix provides input for subset generation; the generated subset tensor serves as input for Boolean decision; the Boolean decision result serves as the basis for selecting slices; and finally, the minimal cut set is output, forming a complete closed-loop automated computation process. This invention not only overcomes the performance bottleneck of the cut set simplification stage in traditional fault tree analysis but also provides a scalable parallel computing solution for the security analysis of complex systems.

[0039] Implementation Method 3: Combination Figure 1-3 This embodiment describes the technical solution provided above in further detail through specific examples. Specifically: A parallel cutset simplification method based on fault tree logic embedded neural network includes the following steps: Step 1: Preprocess the initial set of cutsets. Under a fixed order of basic events, organize the cutset set into a binary matrix, where each row of the matrix corresponds to a cutset, and each column corresponds to a basic event. A value of "1" indicates that the basic event is included in the cutset, and a value of "0" indicates that the basic event is not included in the cutset. For example, a cutset containing "high-pressure safety pump A failed to start" and "emergency diesel engine failure" will be mapped to a vector of the form [0...1...1...0]. All these vectors are organized into a matrix and sorted in ascending order according to the number of failures they contain (i.e., the number of "1"s in the vector, called the "order"). Based on this representation, each cutset is uniquely determined by a 0-1 vector, and its order is defined as the number of elements with a value of "1" in the vector, i.e., the number of basic events contained in the cutset. Subsequently, all cutsets are sorted in ascending order according to their order, the number of cutsets at each order is recorded, and cutsets of the same order are consecutively arranged in the storage structure to form groups of the same order. Step 2: Based on the definition of a minimal cut set, for each candidate cut set, generate all subsets of that cut set whose order is reduced by one. These subsets are obtained by removing any one basic event from the candidate cut set. All subsets corresponding to all candidate cut sets are collected and represented as 0-1 vectors in a fixed order of basic events. These vectors are then aggregated into a single batch input tensor for subsequent parallel decision-making. For example, suppose the system needs to determine a 3rd-order fault combination: {high-pressure safety pump A fault, 480V bus power failure, emergency diesel engine not started}. To determine if it is a "minimum" combination, this implementation will instantly generate all possible sub-scenarios of "reduced by one" through a single parallel tensor operation. Sub-scenario 1: {480V busbar power failure, emergency diesel engine not started} ("High-pressure safety pump A failure" removed) Sub-scenario 2: {High-pressure safety pump A malfunctions, emergency diesel engine fails to start} ("480V busbar power failure" removed) Sub-scenario 3: {High-pressure safety pump A malfunctions, 480V busbar loses power} ("Emergency diesel engine not started" has been removed) This generation process is performed simultaneously on all the cut sets to be simplified. Ultimately, all these sub-scenes to be verified are collected together to form a huge batch processing task containing tens of thousands or even millions of entries, ready for a one-time judgment in the next step.

[0040] Step 3: Input the batch processing input tensor into the fault tree Boolean function module, which is equivalent to a neural network. The module is a computational unit that uses a neural network with a specific structure to perform equivalent modeling of the fault tree Boolean logic relationship. Its input is a batch processing tensor composed of multiple 0-1 vectors, each of which corresponds to a cut subset to be decided. This module performs logical operations equivalent to the fault tree Boolean function and performs parallel decision-making on all input vectors simultaneously. Its output is a one-dimensional result vector, where each element corresponds one-to-one with the corresponding subset in the input tensor, and the value indicates whether the subset triggers the top event. Step 4: Based on the number of cut sets of each order recorded in Step 1, slice the one-dimensional result vector obtained in Step 3 so that the decision results of all subsets corresponding to each candidate cut set form a continuous small slice in the result vector; then perform statistics within each small slice. If there is a result with a value of "1" in the small slice, it means that a subset of the candidate cut set has triggered the top event, thus determining that the candidate cut set is not the minimum cut set and removing it; if all results in the small slice are "0", then retain the candidate cut set and identify it as the minimum cut set. If any sub-scenario derived from a cut set (such as {high-pressure safety pump A failure, 480V bus power failure, emergency diesel engine not started}) is determined to be "1" in Step 3 (i.e., {high-pressure safety pump A failure, 480V bus power failure} itself is sufficient to cause system failure), then the original cut set is obviously not minimum. Through a single parallel filtering operation, all such non-minimum combinations will be eliminated at once, leaving behind the exact, non-redundant set of minimum cut sets.

[0041] To further understand this embodiment, the parallel cut set simplification method based on fault tree logic embedded neural network provided in this embodiment will be described in detail below with reference to the embodiments. The scope of protection of this embodiment is not limited by the following embodiments.

[0042] Example 1 This implementation takes a simplified "loss-of-coolant accident (LOCA) emergency core cooling system failure" scenario in a pressurized water reactor nuclear power plant as an example. It presents a parallel cut-set simplification method based on a fault tree logic embedded neural network. The overall process is as follows: Figure 1 As shown, it includes the following steps: Step 1: First, preprocess the initial cut set of input.

[0043] First, to ensure data processing consistency and traceability, a fixed sequence needs to be established for all relevant basic events (i.e., the smallest unit of failure) in the system. In this nuclear safety analysis case, the top event (i.e., the least desirable failure) is "the emergency core cooling system failing to mitigate the consequences of LOCA". Through preliminary fault tree modeling analysis (such as the MOCUS algorithm), this implementation obtains an initial cut set that may contain redundant items. Each cut set in this set represents a combination of underlying device failures or system failures that could lead to ECCS malfunction.

[0044] These cut sets contain three basic events and are globally uniquely indexed in the following order: E1: High-pressure safety pump failed to start. E2: Containment spray system failed to activate. E3: Emergency diesel generator malfunction Based on this fixed order (E1, E2, E3, E4, E5), this implementation can transform each cut set (i.e., a combination of multiple basic events) into a 0-1 vector. The length of this vector is equal to the total number of basic events (5 in this example). A value of "1" at a specific position in the vector indicates that the corresponding basic event is a member of the fault combination; a value of "0" indicates that it is not included. Assume that the initial cut set contains the following fault modes: C1 = {E1, E2}: (Both high-pressure safety pumps failed to start and the containment sprinkler system failed to start) C2 = {E3}: (Emergency diesel generator malfunction) C3 = {E1, E3}: (High-pressure safety injection pump failure and emergency diesel generator malfunction) C4 = {E2, E3}: (Containment sprinkler system failed to start and emergency diesel generator malfunctioned) C5 = {E1, E2, E3}: (Both high-pressure safety injection pumps and the containment spray system have failed, and the emergency diesel engine has also malfunctioned.) To ensure data processing consistency, a fixed order for all basic events is predetermined, such as by event number or topological sorting. Then, each cutset is transformed into a 0-1 vector corresponding to this fixed order, where the vector's length equals the total number of basic events, a value of "1" indicates that the corresponding basic event is included in the cutset, and a value of "0" indicates that it is not included. The 0-1 vectors of all cutsets are combined to form a binary matrix, where the number of rows equals the number of cutsets, and the number of columns equals the number of basic events. This matrix representation enables efficient data storage and retrieval on parallel computing platforms.

[0045] The binary matrix corresponding to the initial set of cut sets is as follows: After obtaining such a binary matrix, the order of each cut set is calculated. The order is the number of basic events contained in the cut set, corresponding to the number of "1"s in its vector. To speed up preprocessing, a parallel counting method is used to batch calculate the order of all cut sets, and the cut set set is sorted in ascending order according to the order.

[0046] After sorting, cut sets of the same order are arranged consecutively in the storage structure to form same-order groups. The number of cut sets contained in each order group is recorded during the preprocessing stage to facilitate fast indexing and slicing operations in subsequent steps. Figure 2 Taking the cut set in the example, Figure 2 The image shows the cut set set matrix after the reordering described above, where each row is a 0-1 cut set vector. The cut sets are arranged from top to bottom in order from k1 to kn. The reordered partitioned binary matrix obtained using the above method is: In the above manner, step 1 realizes the transformation from the original cut set to the structured matrix, and completes the batch calculation, sorting and grouping of the cut set order, so that the subsequent subset generation and determination can be executed efficiently on the parallel computing platform in the form of tensor operations.

[0047] Step 2: Based on the definition of a minimal cut set, generate all subsets of order less than one for each candidate cut set. Specifically, for any cut set vector in the cut set matrix obtained in Step 1, mask each position where the value is "1" by changing the "1" at that position to "0" to obtain a new subset vector. By performing this masking operation on all positions where the value is "1" in turn, a complete set of subsets of order less than one can be generated.

[0048] For example, if the cut set [1,0,1,0,1] contains three basic events, then the corresponding 0-1 vector has three positions with a "1". When generating a subset of "order minus one", each "1" is sequentially deleted, resulting in three new subsets: [0,0,1,0,1], [1,0,0,0,1], and [1,0,1,0,0]. Each subset has one fewer basic event than the original cut set. Performing the same operation on all candidate cut sets allows for the batch generation of subsets covering the entire candidate set.

[0049] To efficiently complete the above steps, an efficient parallel subset generation method is used to replace the traditional method of generating subsets by iteratively cutting sets. This method is based on batch tensor operations, and the specific steps are as follows: Step 2-1: Obtain the masking location index in parallel: For the unsimplified segment set matrix A after being sorted in ascending order of order, a parallel indexing operation (e.g., the WHERE function in a CUDA environment) is used to find and locate the column indices of all elements in matrix A with a value of "1" in parallel. This operation is performed on parallel computing devices such as GPUs, and can instantly obtain a one-dimensional index vector that completely records the position information of all basic events (values ​​of "1") in all segment sets. Crucially, this indexing process maintains a relative order consistent with the top-to-bottom and left-to-right traversal order of matrix A, ensuring a structured correspondence for subsequent operations.

[0050] This implementation takes the simplified cut set matrix A obtained in step 1, which has been sorted in ascending order of order, as an example. For the above matrix A, the obtained index vector is: [2, 0, 1, 0, 2, 1, 2, 0, 1, 2]. The length (10) of this vector is equal to the sum of the orders of all cut sets in matrix A (1+2+2+2+3), and their strict order correspondence is the basis for the accurate generation of subsets in subsequent steps.

[0051] Step 2-2: Construct the subset fundamental matrix based on the order: A unified foundation matrix B for generating subsets is constructed for all candidate cut sets. This step is accomplished using vectorized copying operations (e.g., the repeat function). Based on the number of cut sets of each order recorded in step 1 and their corresponding order values, each row of matrix A is copied in batches. Specifically, if the order of a row in matrix A (representing a candidate cut set) is k, then that row will be copied k times consecutively to form a k-row block, such as... Figure 3 As shown. Region of order k1. a The vector is copied k1 times and stacked along the row direction, and so on. This operation applies to all candidate cut sets simultaneously, for example, Figure 2 The first *a* rows of cut sets of order *k1* are each copied *k1* times; the next *b* rows of cut sets of order *k2* are each copied *k2* times, and so on. This ultimately generates an expanded subset base matrix *B*. The characteristic of this matrix is ​​that each block of *k* rows reserves space for generating all *k* subsets of order less than one for that candidate cut set.

[0052] Continuing with matrix A as an example, a base matrix B for generating subsets is constructed uniformly for all candidate cut sets. This step involves batch copying each row of matrix A based on the number of cut sets of each order and their order values ​​recorded in step 1. In this implementation example: The first row of A (order 1) is copied once.

[0053] The second, third, and fourth rows of A (all of order 2) are each copied twice.

[0054] The fifth row of A (order 3) is copied 3 times.

[0055] These copied row vectors are stacked along the row direction to generate an expanded subset fundamental matrix B. The generated subset fundamental matrix B is as follows: Steps 2-3: Parallel batch modifications to generate exact subsets: Perform a one-step, efficient, parallel in-place modification operation. Using the column index vector obtained in step 2-1, which maintains a strict order, perform batch index assignment with the subset base matrix B generated in step 2-2. Since the index vector and the row blocks of matrix B have a strict sequential correspondence during generation, this index vector can be directly used as column coordinates, along with a row coordinate vector incrementing from 0, to locate specific elements in matrix B. Through a single parallel assignment operation, these located element values ​​are batch-modified from "1" to "0".

[0056] Here, we take a simple cut set matrix containing only two cut sets as an example. The set contains the following two cut sets: C4 = {E2, E3}: (Containment sprinkler system failed to start and emergency diesel generator malfunctioned) C5 = {E1, E2, E3}: (Both high-pressure safety injection pumps and the containment spray system have failed, and the emergency diesel engine has also malfunctioned.) The simplified cut set matrix A, after being sorted in ascending order of order in steps 1 and 2-1, is shown below: The first cut set [0, 1, 1] means that the containment sprinkler system (E2) and the emergency diesel generator (E3) both fail simultaneously, while the high-pressure safety injection pump A (E1) is functioning normally. The second cut set [1, 1, 1] means that all three core components—the high-pressure safety injection pump (E1), the containment sprinkler system (E2), and the emergency diesel generator (E3)—fail simultaneously.

[0057] The one-dimensional index vector obtained in step 2-1 is then... After processing matrix A in step 2, matrix B should look like the following: For matrix B, strictly following the index element order, change the 1s to 0s at the corresponding index positions in the row of matrix B. For example, if the element at the third index is 0, it means changing the 1 in the third row and the 0th column of matrix B to 0. After the above processing, the final matrix input to the neural network is: Each row in the matrix represents a cut set of events that is "exactly one less device failure than the original failure set".

[0058] Step 3: Input the batch input tensor generated in Step 2-3 into the fault tree Boolean function module equivalent to the neural network for parallel decision-making.

[0059] The fault tree Boolean function module, equivalent to a neural network, is a computational unit that models the Boolean logic relationships of a fault tree. This module requires no training; instead, it uses pre-defined weights and activation functions to fix the logic gate operations of the fault tree. Essentially equivalent to a Boolean function computation unit, it leverages the parallel forward propagation mechanism of neural networks to perform large-scale batch computations.

[0060] During execution, all subset vectors in the batch input tensor are input into this module at once. Through parallelized forward propagation, Boolean logic judgment results are output line by line. The output is a one-dimensional vector with the same length as the number of input subsets. Each element corresponds one-to-one with the corresponding subset in the input tensor. A value of "1" indicates that the subset can trigger the fault tree top event, and a value of "0" indicates that the subset cannot trigger the top event.

[0061] Through the above method, step 3 achieves unified Boolean logic determination of subset sets, avoiding the inefficient method of calling Boolean functions for each subset individually. This fully leverages the vectorization processing capabilities of neural network structures on parallel computing platforms such as GPUs, providing batch output results for subsequent steps of result slicing and minimum cut set determination. We still use a simple cut set matrix containing only two cut sets. For example.

[0062] The processed matrix is ​​input into the neural network and the output is [0,0,1,0,0].

[0063] Step 4: Based on the one-dimensional result vector output in Step 3, perform parallel final judgment and screening on all candidate cut sets to efficiently extract all minimum cut sets.

[0064] First, using the number and order information of each cut set pre-recorded in step 1, the one-dimensional flattened result vector output in step 3 is divided into multiple consecutive slices. [0,0,1,0,0] is divided into [[0,0],[1,0,0]]. This division ensures that each slice forms a strict one-to-one correspondence with an original candidate cut set in matrix A, that is, each slice contains the judgment results of all "order minus one" subsets of that candidate cut set. For example, the [0,0] slice corresponds to the judgment results of all [0,1,1] vectors "after deleting one event", and the [1,0,0] slice corresponds to the judgment results of all [1,1,1] vectors "after deleting one event".

[0065] Next, on parallel computing platforms such as GPUs, the decision operation is performed simultaneously on all result slices. For each slice, all decision results (0 or 1) within it are subjected to a logical "OR" operation. The core logic of this operation is: if at least one result in the slice is "1", it means that a subset of the candidate cut set has been able to trigger the top event, and the final result of the logical "OR" operation of the candidate cut set is "1"; otherwise, if all results in the slice are "0", the final result is "0".

[0066] This parallel decision process generates a final Boolean decision vector for all candidate cut sets in one step. Finally, based on this decision vector, the initial candidate cut set matrix A is filtered in parallel. In this decision vector, the index of the item with a result of "1" directly corresponds to the row in candidate cut set matrix A where the non-minimum cut sets need to be removed. Through this one-step parallel filtering operation, all non-minimum cut sets are removed, and the final result is the desired set of minimum cut sets. For example, The final judgment result is [0,1], so the second row should be deleted because it is not a minimal cut set. Therefore, the final judgment result is that C5 = {E1, E2, E3} is not a minimal cut set, and C4 = {E2, E3} is a minimal cut set.

[0067] This implementation transforms the complex process of one-to-one comparison into an efficient batch data processing flow through structured slice mapping and parallel logical OR decision, significantly improving the screening efficiency of minimum cut sets.

[0068] The above description of several specific embodiments further details the technical solution provided by the present invention in order to highlight the advantages and benefits of the technical solution provided by the present invention. However, the above-described specific embodiments are not intended to limit the present invention. Any reasonable modifications and improvements to the present invention, combinations of embodiments, and equivalent substitutions based on the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A parallel cut-set simplification method based on fault tree logic embedded neural network, characterized in that, include: The steps involve preprocessing the initial set of cut sets, converting each cut set into a corresponding 0-1 vector under a fixed basic event order, calculating the order of each cut set and sorting them in ascending order, arranging cut sets of the same order consecutively to form groups of the same order, and outputting the structured cut set matrix and the number of cut sets at each order. Based on the structured cut set matrix and the number of cut sets at each order, for each candidate cut set, any basic event is removed from the candidate cut set in parallel to generate all "order minus one" subsets of the cut set. That is, the steps are to generate all subset vectors after changing "1" to "0" at a certain position of all candidate cut set vectors in batches, and to generate a matrix composed of the "order minus one" subset vectors of all candidate cut sets. The subset matrix is ​​input into a neural network structure equivalent to fault tree logic, parallel Boolean decision is performed, and a result vector is output, in which each element corresponds one-to-one with the subsets in the input matrix, and the value indicates whether the subset triggers the top event. Based on the result vector and the number of pre-recorded cut sets of each order, the result vector is divided into continuous slices with the same number of cut sets. If there is a result with the value "1" in the slice, the corresponding cut set is determined to be a non-minimum cut set and is removed. Otherwise, it is retained and identified as the minimum cut set, and the final set of minimum cut sets is output.

2. The parallel cut-set simplification method based on fault tree logic embedded neural network according to claim 1, characterized in that, Based on the order of each candidate cut set, the row vectors of the cut set are copied in batches according to the order number of times. The copied vectors are then stacked in the GPU parallel computing architecture to ensure that the rows of the generated basic matrix are arranged continuously in the storage space.

3. The parallel cut-set simplification method based on fault tree logic embedded neural network according to claim 1, characterized in that, By using row coordinates and index vectors that are incremented in row order, the position of the element to be modified in the matrix is ​​located, and on the GPU, the value of all marked positions is changed from "1" to "0" in a single tensor assignment operation.

4. The parallel cut-set simplification method based on fault tree logic embedded neural network according to claim 1, characterized in that, The fault tree Boolean function module equivalent to the neural network is a feedforward neural network without training. It uses logic gate operations that map fault trees with fixed weights and activation functions, and can perform a one-time forward propagation of the input tensor on a graphics processor or other parallel acceleration hardware, thereby outputting the judgment results of all subsets in parallel.

5. The parallel cut-set simplification method based on fault tree logic embedded neural network according to claim 1, characterized in that, The output of the equivalent module of the neural network is a one-dimensional result vector. This result vector maintains the correspondence of the input order, thereby ensuring the consistency of the index mapping between subsequent slices and candidate cut set groups.

6. A parallel cut-set simplification device based on fault tree logic embedded neural network, characterized in that, include: The module preprocesses the initial set of cut sets, converts each cut set into a corresponding 0-1 vector under a fixed basic event order, calculates the order of each cut set and sorts them in ascending order of order, arranges cut sets of the same order consecutively to form same-order groups, and outputs a structured cut set matrix and order information. Based on the structured cut set matrix and order information, for each candidate cut set, any basic event is removed from the candidate cut set in parallel to generate all "order minus one" subsets of the cut set, that is, batch generating all subset vectors after changing "1" to "0" at a certain position of all candidate cut set vectors, and generating a matrix composed of the "order minus one" subset vectors of all candidate cut sets. The subset matrix is ​​input into the neural network structure equivalent to the fault tree logic. Parallel Boolean decision is performed based on the connection relationship of the fault tree logic gates and the preset activation function. The output module is a result vector in which each element corresponds one-to-one with the subset in the input matrix and the value represents whether the subset triggers the top event. Based on the result vector and the pre-recorded order grouping information, the result vector is divided into multiple continuous slices and a logical OR operation is performed. If any slice contains a result with the value "1", the corresponding cut set is determined to be a non-minimum cut set and is removed. Otherwise, it is retained and identified as a minimum cut set, and the module that outputs the final set of minimum cut sets is generated.

7. A computer storage medium for storing computer programs, characterized in that, When the computer program is read by the computer, the computer executes the method of claim 1.

8. A computer, comprising a processor and a storage medium, characterized in that, When the processor reads the computer program stored in the storage medium, the computer executes the method of claim 1.

9. A computer program product, as a computer program, is characterized by: When the computer program is executed, it implements the method of claim 1.

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