Radio frequency (RF) matching network and tuning techniques

Abstract

Embodiments provided herein generally include apparatus, plasma processing systems, and tuning methods for improving substrate processing metrics in radio frequency (RF) plasma processing systems. Some embodiments are directed to a method for processing a substrate in a plasma processing system. The method generally includes sensing, by one or more sensors, one or more intermodulation or harmonic components of a signal at a node coupled to a plasma chamber; and controlling one or more signal processing devices of the plasma processing system to process the substrate based on the one or more intermodulation or harmonic components and according to a frequency domain configuration identified by analyzing one or more substrate processing metrics.

Description

Technical Field

[0001] Embodiments of the present invention generally relate to systems and methods for use in the manufacture of semiconductor devices. More specifically, embodiments of the present invention relate to plasma processing systems for processing substrates. Background Technology

[0002] Reliably manufacturing high aspect ratio features is one of the key technological challenges for next-generation semiconductor devices. One method for forming high aspect ratio features uses plasma-assisted etching processes, such as reactive ion etching (RIE) plasma processes, to form high aspect ratio openings in a material layer (such as a dielectric layer) of a substrate. In a typical RIE plasma process, plasma is formed in a processing chamber, and ions from the plasma are accelerated toward the surface of the substrate to form openings in a material layer disposed beneath a mask layer formed on the surface of the substrate.

[0003] A typical RIE plasma processing chamber includes a radio frequency (RF) bias generator that supplies RF voltage to the power electrodes. In capacitively coupled gas discharge, plasma is generated using an RF generator coupled to power electrodes located within an electrostatic chuck (ESC) assembly or another part of the processing chamber. Typically, an RF matching network (“RF matching”) tunes the RF waveform supplied from the RF generator to deliver RF power to a 50Ω apparent load, minimizing reflected power and maximizing power delivery efficiency. If the load impedance is not properly matched to the impedance of the source (e.g., the RF generator), a portion of the forward-delivered RF waveform can be reflected back in the opposite direction along the same transmission line.

[0004] Therefore, there is a need for an apparatus and method for processing substrates in a plasma processing system to solve the above problems. Summary of the Invention

[0005] The embodiments provided herein generally include apparatus, plasma processing systems, and tuning methods for improving substrate processing metrics in radio frequency (RF) plasma processing systems.

[0006] Some embodiments are directed to a method for processing a substrate in a plasma processing system. The method typically includes: sensing one or more intermodulation or harmonic components of a signal at a node coupled to a plasma chamber via one or more sensors; and controlling one or more signal processing devices of the plasma processing system to process the substrate based on the one or more intermodulation or harmonic components and according to a frequency domain configuration identified by analyzing one or more substrate processing metrics.

[0007] Some embodiments are directed to an apparatus for processing a substrate in a plasma processing system. The apparatus typically includes: one or more sensors configured to sense one or more intermodulation or harmonic components of a signal at a node coupled to a plasma chamber; one or more signal processing devices coupled to the plasma chamber; and a controller configured to control the one or more signal processing devices of the plasma processing system to process the substrate based on the one or more intermodulation or harmonic components and according to a frequency domain configuration identified by analyzing one or more substrate processing metrics.

[0008] Some embodiments are directed to a plasma processing system, comprising: a plasma chamber; one or more sensors configured to sense one or more intermodulation or harmonic components of a signal at a node coupled to the plasma chamber; one or more signal processing devices coupled to the plasma chamber; and a controller configured to control the one or more signal processing devices of the plasma processing system to process the substrate based on the one or more intermodulation or harmonic components and according to a frequency domain configuration identified by analyzing one or more substrate processing metrics. Attached Figure Description

[0009] To gain a more detailed understanding of the above-described features of the invention, a more specific description of the invention, which has been briefly summarized above, can be obtained by referring to embodiments, some of which are illustrated in the accompanying drawings. However, it should be noted that the drawings are merely illustrative and should not be construed as limiting the scope of the invention, and other equally effective embodiments are permissible.

[0010] Figure 1A This is a schematic diagram of a plasma processing system according to certain embodiments of the present invention.

[0011] Figure 1B This is a detailed cross-sectional schematic diagram of a plasma processing system according to certain embodiments of the present invention.

[0012] Figure 2 This illustrates a voltage waveform established on a substrate due to a voltage waveform applied to an electrode in a processing chamber, according to certain embodiments of the present invention.

[0013] Figure 3 This is a schematic diagram of a radio frequency (RF) matching network according to certain embodiments of the present invention.

[0014] Figure 4 This is a schematic diagram of a plasma processing system having an RF generator and individual RF matching circuits according to certain embodiments of the present invention.

[0015] Figure 5It is a diagram illustrating the fundamental frequency, intermodulation, and harmonic components of a signal in the frequency domain.

[0016] Figure 6 This is a schematic diagram of a plasma processing system having a sensor coupled to the output of a pulse voltage (PV) waveform generator according to certain embodiments of the present invention.

[0017] Figure 7 This is a process flow diagram illustrating a method for processing a substrate in a plasma processing system according to certain embodiments of the present invention.

[0018] For ease of understanding, the same reference numerals are used where possible to denote the same elements used in the figures. It is anticipated that the elements and features of one implementation can be advantageously incorporated into other implementations without further description. Detailed Implementation

[0019] Embodiments of the present invention generally relate to systems for semiconductor device manufacturing processes. More specifically, the embodiments provided herein generally include apparatus and methods for tuning radio frequency (RF) plasma processing systems to provide, modify, and / or control the delivery, generation, and / or application of intermodulation and harmonic components generated during plasma processing. For example, a frequency domain configuration (e.g., magnitudes or phases associated with one or more intermodulation and harmonic components) can be identified to conform to certain substrate processing metrics (e.g., improved etch rate, reduced process variation, and / or uniformity). The processing system can be implemented using sensors that measure the intermodulation and harmonic components of a signal during substrate processing. Based on the measured intermodulation and harmonic components, one or more processing components (e.g., one or more matching circuits, pulse voltage (PV) waveform generators, and / or radio frequency (RF) generators) can be controlled according to the identified frequency domain configuration. For example, the frequency domain configuration may include ratios between signal magnitude values ​​at selected frequencies (e.g., selected intermodulation or harmonic components) that improve substrate processing metrics (also referred to herein as "wafer results"). The one or more processing components used to process the substrate can be controlled to generate signal transmission to drive the processing chamber according to the ratio between the signal values ​​at the selected frequency.

[0020] Examples of plasma processing systems

[0021] Figure 1AThis is a schematic diagram of a plasma processing system. The plasma processing system 10 is configured for plasma-assisted etching processes, such as reactive ion etching (RIE) plasma processing. The plasma processing system 10 can also be used for other plasma-assisted processes, such as plasma-enhanced deposition processes (e.g., plasma-enhanced chemical vapor deposition (PECVD), plasma-enhanced physical vapor deposition (PEPVD), plasma-enhanced atomic layer deposition (PEALD), plasma processing, plasma-based ion implantation processing, or plasma doping (PLAD) processing. In one configuration, such as... Figure 1A As shown, the plasma processing system 10 is configured to form capacitively coupled plasma (CPP). However, in some embodiments, the plasma can be alternately generated by an inductively coupled source disposed above the processing area of ​​the plasma processing system 10.

[0022] The plasma processing system 10 includes a processing chamber 100, a substrate support assembly 136, a gas delivery system 182, a high DC voltage supply 173, a radio frequency (RF) generator 171, and an RF matching 172 (e.g., an RF impedance matching network). The chamber cover 123 includes one or more sidewalls and a chamber base, configured to withstand the pressures and energy applied to it during plasma 101 generation within the vacuum environment maintained in the processing volume 129 of the processing chamber 100 during processing.

[0023] The gas delivery system 182, coupled to the processing volume 129 of the processing chamber 100, is configured to deliver at least one processing gas from at least one gas processing source 119 to the processing volume 129 of the processing chamber 100. The gas delivery system 182 includes the processing gas source 119 and one or more gas inlets 128 positioned through the chamber cover 123. These gas inlets 128 are configured to deliver one or more processing gases to the processing volume 129 of the processing chamber 100.

[0024] The processing chamber 100 includes an upper electrode (e.g., the chamber cover 123) and a lower electrode (e.g., the substrate support assembly 136) positioned within the processing volume 129 of the processing chamber 100. The upper electrode and the lower electrode face each other. In one embodiment, the RF generator 171 is electrically coupled to the lower electrode. The RF generator 171 is configured to deliver an RF signal to ignite and sustain the plasma 101 between the upper and lower electrodes. In some alternative configurations, the RF generator 171 may also be electrically coupled to the upper electrode. For example, the RF generator 171 may deliver RF source power to an RF base plate within a cathode assembly (e.g., in the substrate support assembly 136) for plasma generation, while the upper electrode is grounded. The center frequency of the RF source power can range from 13.56 MHz to very high frequency bands, such as 40 MHz, 60 MHz, 120 MHz, or 162 MHz. In some instances, the RF source power can also be delivered through the upper electrode. The RF source power can operate in continuous or pulsed mode. The pulse frequency of the RF power is from 100 to 10 kHz, and the duty cycle ranges from 5% to 95%. The RF generator 171 has frequency tuning capability and can adjust its RF power frequency within, for example, ±5% or ±10%. In some embodiments, the RF generator 171 switches the RF power frequency at a predetermined rate (e.g., two nanoseconds, fifty nanoseconds, etc.).

[0025] The substrate support assembly 136 is coupled to a high-voltage DC supply 173 that supplies it a clamping voltage. The high-voltage DC supply 173 is coupled to a filter assembly 178, which is disposed between the high-voltage DC supply 173 and the substrate support assembly 136.

[0026] The filter assembly 178 is configured to electronically isolate the high-voltage DC supply 173 during plasma processing. In one configuration, the static DV voltage is between approximately -5000V and approximately 5000V and is delivered using a conductor such as a coaxial power transmission line. The filter assembly 178 may include multiple filter components or a single common filter.

[0027] The substrate support assembly 136 is coupled to a pulse voltage (PV) waveform generator 175, which is configured to supply PV to bias the substrate support assembly 136. The PV waveform generator 175 is coupled to a filter assembly 178. The filter assembly 178 is disposed between the PV waveform generator 175 and the substrate support assembly 136. The filter assembly 178 is configured to electronically isolate the PV waveform generator 175 during plasma processing.

[0028] The substrate support assembly 136 is coupled to the RF generator 171, which is configured to deliver RF signals to the processing volume 129 of the processing chamber 100. The RF generator 171 is electronically coupled to an RF match 172 disposed between the RF generator 171 and the processing volume 129 of the processing chamber 100. For example, the RF match 172 is a circuit used between the RF generator 171 and the plasma reactor (e.g., the processing volume 129 of the processing chamber 100) to optimize power delivery efficiency. One or more RF filters (e.g., within the RF match 172) are designed to allow power only within a selected frequency range and to isolate the RF power supply from each other. In some cases, the bandwidth of the RF filters must be greater than the frequency tuning range of the RF generator 171.

[0029] During the plasma processing, the RF generator 171 transmits an RF signal to the substrate support assembly 136 via the RF match 172. For example, the RF signal may be a load (e.g., gas) applied to the processing volume 129 of the processing chamber 100. If the impedance of the load is not properly matched to the impedance of the source (e.g., the RF generator 171), a portion of the waveform may be reflected back in the opposite direction. Therefore, to prevent most of the waveform from being reflected back, some implementations find a matching impedance (e.g., a matching point) by adjusting one or more components of the RF match 172 as the source and load impedances change.

[0030] The RF match 172 is electrically coupled to the RF generator 171, the substrate support assembly 136, and the PV waveform generator 175. The RF match 172 is configured to receive synchronization signals from either or both of the RF generator 171 and the PV waveform generator 175.

[0031] The RF generator 171 and the PV waveform generator 175 are each directly coupled to the system controller 126. The system controller 126 synchronizes the RF signals generated by each generator with the PV waveform.

[0032] Voltage and current sensors can be placed at the inputs and / or outputs of the RF match 172 to measure impedance and other parameters. These sensors can be synchronized using external transistor-transistor logic (TTL) synchronization signals from an advanced waveform generator and / or RF generator, or by internally determining timing using the measured voltage and current data. For example, output sensor 117 is configured to measure the impedance and other characteristics of the plasma processing chamber 100, such as voltage, current, harmonics, phase, and / or the like. Input sensor 116 is configured to measure the impedance and other characteristics of the RF generator 171, such as voltage, current, harmonics, phase, and / or the like. Based on either these synchronization signals or these characteristics of the plasma processing chamber 100, the RF match 172 can capture rapid impedance changes and optimize impedance matching.

[0033] The PV waveform generator 175 is used to supply a PV waveform and / or a custom voltage waveform, which is the sum of the harmonic frequencies of the waveform. The PV waveform generator 175 can output a synchronous TTL signal to the RF match 172. The voltage waveform is coupled to a bias electrode (e.g., through the filter assembly 178). Figure 1B The bias electrode 104 shown is used. During the process for thermal control, a high DC voltage supply 173 is applied to hold the substrate in place. In some cases, a third electrode may be present at the edge of the cathode assembly for edge uniformity control.

[0034] Figure 1B This is a detailed cross-sectional schematic diagram of the plasma processing system 10. (See attached diagram.) Figure 1B As shown, the plasma processing system 10 is configured to form capacitively coupled plasma (CCP). However, in some embodiments, the plasma 101 can be alternately generated by an inductively coupled source disposed above the processing area of ​​the plasma processing system 10. In this configuration, the coil can be placed on top of the ceramic cover of the plasma processing chamber 100 (e.g., the vacuum boundary).

[0035] The plasma processing system 10 includes a processing chamber 100, a substrate support assembly 136, a gas delivery system 182, a DC power system 183, an RF power system 189, and a system controller 126. The processing chamber 100 includes a chamber body 113, which includes a chamber cover 123, one or more sidewalls 122, and a chamber base 124. The chamber cover 123, the one or more sidewalls 122, and the chamber base 124 collectively define the processing volume 129 of the processing chamber 100. The one or more sidewalls 122 and the chamber base 124 include materials (such as aluminum, aluminum alloys, or stainless steel alloys) sized and shaped to form structural supports for the elements of the processing chamber 100, and configured to withstand the pressure and energy applied to the processing chamber 101 when it is generated within the vacuum environment maintained in the processing volume 129 of the processing chamber 100 during processing. The substrate 103 is loaded into or removed from the processing volume 129 of the processing chamber 100 through an opening (not shown) in one of the sidewalls 122. During plasma processing of the substrate 103, the opening is sealed with a slit valve (not shown).

[0036] The gas delivery system 182 coupled to the processing volume 129 of the processing chamber 100 includes the processing gas source 119 and the gas inlet 128 disposed through the chamber cover 123. The gas inlet 128 is configured to deliver one or more processing gases from the processing gas source 119 to the processing volume 129 of the processing chamber 100.

[0037] As mentioned above, the processing chamber 100 includes an upper electrode (e.g., the chamber cover 123) and a lower electrode (e.g., the substrate support assembly 136) disposed within the processing volume 129 of the processing chamber 100. The upper electrode and the lower electrode are positioned to face each other. Figure 1B As shown, the RF generator 171 is electrically coupled to the lower electrode. The RF generator 171 is configured to deliver an RF signal to ignite and sustain the plasma 101 between the upper and lower electrodes. In some alternative configurations, the RF generator 171 may also be electrically coupled to the upper electrode.

[0038] The substrate support assembly 136 includes a substrate support 105, a substrate support base 107, an insulator plate 111, a ground plane 112, a plurality of lifting rods 186, one or more substrate potential sensing assemblies 184 (e.g., including a signal detection assembly 188), and a bias electrode 104. Each of the lifting rods 186 is provided with a through-hole 185 formed in the substrate support assembly 136 to facilitate the transfer of the substrate 103 to and from the substrate receiving surface 105A of the substrate support 105. The substrate support 105 is formed of a dielectric material. The dielectric material may include bulk sintered ceramic materials, corrosion-resistant metal oxides (e.g., alumina (Al2O3), titanium oxide (TiO), yttrium oxide (Y2O3), metal nitride materials (e.g., aluminum nitride (AlN), titanium nitride (TiN)), mixtures thereof, or combinations thereof.

[0039] The substrate support base 107 is formed of a conductive material (e.g., aluminum, aluminum alloy, or stainless steel alloy). The substrate support base 107 is electrically isolated from the chamber base 124 by the insulator plate 111, and the ground plane 112 is inserted between the insulator plate 111 and the chamber base 124. The substrate support base 107 is configured to regulate the temperature of both the substrate support 105 and the substrate 103 disposed on the substrate support 105 during substrate processing. The substrate support base 107 includes one or more cooling channels (not shown) disposed therein, which are fluidly coupled to and in fluid communication with a coolant source (not shown) (such as a refrigerant source or substrate source with relatively high resistance). The substrate support 105 includes a heater (not shown) to heat the substrate support 105 and the substrate 103 disposed on the substrate support 105.

[0040] The bias electrode 104 is embedded in the dielectric material of the substrate support 105. The bias electrode 104 is formed of one or more conductive components. These conductive components include meshes, foils, plates, or combinations thereof. The bias electrode 104 acts as a holding electrode (i.e., an electrostatic holding electrode) for securing (e.g., electrostatically holding) the substrate 103 to the substrate receiving surface 105A of the substrate support 105. The parallel plate-like structure is formed by the bias electrode 104 and a layer of dielectric material disposed between the bias electrode 104 and the substrate receiving surface 105A. The dielectric material may have an effective capacitance C between about 5 nF and about 50 nF. EThe dielectric material layer (e.g., aluminum nitride (AlN), aluminum oxide (Al2O3), etc.) has a thickness between about 0.3 mm and about 5 mm, such as between about 0.1 mm and about 3 mm, such as between about 0.1 mm and about 1 mm, or even between about 0.1 mm and 0.5 mm. The bias electrode 104 is electrically coupled to a clamping network that provides a clamping voltage to the bias electrode 104. The clamping network includes a DC voltage supply 173 (e.g., a high-voltage DC supply) coupled to a filter 178A of the filter assembly 178, which is disposed between the DC voltage supply 173 and the bias electrode 104. The filter 178A is a low-pass filter configured to block RF frequency and PV waveform signals provided by other bias components found within the processing chamber 100 from reaching the DC voltage supply 173 during the plasma processing. The static DV voltage is between approximately -5000V and approximately 5000V, and is delivered using a conductor (such as coaxial power delivery line 106). The bias electrode 104 can bias the substrate 103 relative to the plasma 101 using one or more of the PV bias schemes.

[0041] The substrate support assembly 136 includes an edge control electrode 115. The edge control electrode 115 is formed of one or more conductive components. These conductive components include grids, foils, plates, or combinations thereof. The edge control electrode 115 is positioned below the edge ring 114 and surrounds the bias electrode 104, and / or is disposed at a distance from the center of the bias electrode 104. For the processing chamber 100 configured to process a circular substrate, the edge control electrode 115 is annular in shape, made of a conductive material, and configured to surround at least a portion of the bias electrode 104. Figure 1B As shown, the edge control electrode 115 is located within the region of the substrate support 105 and is biased using a PV waveform generator 175. The edge control electrode 115 is biased using a different PV waveform generator than the one used for the bias electrode 104. The edge control electrode 115 is biased by splitting a portion of the signal provided from the PV waveform generator 175 to the bias electrode 104.

[0042] The DC power system 183 includes a DC voltage supply 173, a PV waveform generator 175, and a current source 177. The RF power system 189 includes an RF waveform generator 171, an RF matching circuit 172, and an RF filter 174. Figure 1BAs shown, power delivery line 163 electrically connects the output of RF generator 171 to RF matching circuit 172, RF filter 174, and substrate support base 107. As previously mentioned, during the plasma processing, DC voltage supply 173 provides a constant holding voltage, while RF generator 171 delivers the RF signal to the processing area, and PV waveform generator 175 establishes the PV waveform at bias electrode 104. For example, sufficient RF power is applied to the RF bias voltage signal (also referred to herein as the RF waveform), and the RF waveform is provided to the electrode (e.g., substrate support base 107) to form plasma 101 in the processing volume 129 of the processing chamber 100. The RF waveform has a frequency range between about 1 MHz and about 200 MHz, such as between 2 MHz and 40 MHz.

[0043] The DC power system 183 includes the filter assembly 178 to electrically isolate one or more of the components contained within the DC power system 183. Power delivery line 160 electrically connects the output of the DC voltage supply 173 to the filter assembly 178. Power delivery line 161 electrically connects the output of the PV waveform generator 175 to the filter assembly 178. Power delivery line 162 connects the output of the current source 177 to the filter assembly 178.

[0044] The current source 177 is selectively coupled to the bias electrode 104 by using a switch (not shown) disposed in the power delivery line 162, so that the current source 177 can deliver the desired current to the bias electrode 104 during one or more phases (e.g., ion current phase) of the voltage waveform generated by the PV waveform generator 175.

[0045] The filter assembly 178 includes multiple separate filter components (i.e., discrete filters 178A-178C), each electrically coupled to the output node via power delivery lines 164. The filter assembly 178 may include a common filter electrically coupled to the output node via the power delivery lines 164. The power delivery lines 160-164 include conductors comprising combinations of coaxial cables (such as flexible coaxial cables connected in series with rigid coaxial cables), insulated high-voltage corona-resistant connecting wires, bare wires, metal rods, electrical connectors, or any combination thereof.

[0046] The system controller 126, also referred to herein as a processing chamber controller, includes a central processing unit (CPU) 133, memory 134, and support circuitry 135. The system controller 126 is used to control the process sequence for processing the substrate 103. The CPU is a computer processor configured for use in an industrial setup for controlling the processing chamber and its associated subprocessors. The memory 134 described herein is generally non-volatile memory and may include random access memory, read-only memory, hard disk drives, or other suitable forms of digital storage (local or remote). The support circuitry 135 is coupled to the CPU 133 and includes cache, frequency circuitry, input / output subsystems, supplied power, and combinations thereof. Software instructions (programs) and data are coded and stored in the memory 134 to instruct the processor within the CPU 133. The software program (or computer instructions) readable by the CPU 133 in the system controller 126 determines the tasks that can be performed by the components in the plasma processing system 10.

[0047] The program, readable by the CPU 133 in the system controller 126, includes program code that, when executed by the CPU 133, performs tasks related to the plasma processing schemes described herein. The program may include instructions for controlling various hardware and electrical components within the plasma processing system 10 to perform various process tasks and for implementing various process sequences described herein. The program includes instructions for performing one or more of the operations described herein.

[0048] Figure 2 The illustration shows two separate voltage waveforms established at the substrate 103 on the substrate receiving surface 105A of the substrate support assembly 136 of the processing chamber 100 due to the delivery of a PV waveform to the bias electrode 104 of the processing chamber 100. The first waveform (e.g., waveform 225) is an example of an uncompensated PV waveform established at the substrate 103 during the plasma processing. The second waveform (e.g., waveform 230) is an example of a compensated PV waveform established at the substrate 103 by applying a negative slope waveform to the bias electrode 104 of the processing chamber 100 using the current source 177 during the "ion current phase" portion of the PV waveform cycle. This compensated PV waveform can alternatively be established by applying a negative voltage ramp during the ion current phase of the PV waveform generated by the PV waveform generator 175. Each of the PV waveform cycles of waveforms 225 and 230 has a period T. p These durations, for example, are typically between 2 microseconds (μs) and 10 μs, such as 2.5 μs. This ion current phase of the PV waveform cycle will typically occupy the period T. p Between approximately 50% and 95%, such as period T pThe percentage is approximately 80% to approximately 90%.

[0049] The waveforms 225 and 230 comprise two main phases: an ion current phase and a sheath collapse phase. The two portions of waveforms 225 and 230 (e.g., the ion current phase and the sheath collapse phase) can be alternately and / or separately established at the substrate 103 during the plasma treatment. At the start of the ion current phase, a drop in voltage is established at the substrate 103 due to the delivery of the negative portion of the PV waveform (e.g., the ion current portion) supplied to the bias electrode 104 via the PV waveform generator 175, which establishes a high-voltage sheath over the substrate 103. This high-voltage sheath allows the positive ions generated by the plasma to accelerate toward the biased substrate 103 during the ion current phase, thus controlling the amount and characteristics of the etching process occurring on the surface of the substrate 103 during the RIE process. In some embodiments, it is desirable that the ion current phase include a region where the PV waveform achieves a stable or minimally varied voltage at the substrate 103 throughout the phase, such as... Figure 2 The waveform 230 is shown. It will be noted that the significant change in voltage established at substrate 103 during this ion current phase (as shown by the positive slope in waveform 225) will unintentionally cause a change in ion energy distribution (IED), thus resulting in the formation of unintentional etch features in substrate 103 during the RIE process.

[0050] The plasma sheath impedance varies with the supplied PV waveform voltage. The RF match 172 can use any or both of these synchronization signals and / or its internal sensors to sample impedance at different processing stages. In one example, the synchronization signal or characteristic determined by the input sensor 116 or the output sensor 117 is used to trigger the RF match 172 to determine at least two different impedances at different processing stages. The RF match 172 then updates its matching point based on these at least two different impedances.

[0051] Figure 3 This is a schematic diagram of RF matching 172. RF matching 172 includes a controller 302, an input sensor 116, an output sensor 117, a first RF filter 308, a second RF filter 310, a tuning circuit 312, an interlock 314, and memory 316. The two RF filter circuits (e.g., the first RF filter 308 and the second RF filter 310) are located close to both the input and output of RF matching 172. In some cases, only one RF filter may be used near the output of RF matching 172.

[0052] The RF match 172 is connected to the RF generator 171 via a 50Ω transmission line. The RF generator 171 can supply power at frequencies between 100 kHz and 200 MHz. The RF generator 171 has frequency tuning capability and can adjust its RF power frequency within, for example, ±5% or ±10%. The RF generator 171 directly sends TTL signals to the input sensor 116 and the output sensor 117 for fast response and better synchronization. The RF match 172 is configurable to receive the RF waveform from the RF generator 171, tune the RF waveform to minimize reflected power and maximize power delivery efficiency, and in some embodiments, deliver the tuned RF waveform to the plasma chamber 100. Meanwhile, as mentioned above, the PV waveform generator 175 is configured to provide the PV waveform to the processing chamber 100. Both the RF generator 171 and the PV waveform generator 175 are coupled to and synchronized with the controller 302.

[0053] The controller 302 can operate with various communication protocols, such as RS-232, RS-485, USB, Ethernet, or Ethernet Control Automation Technology (ECAT). The controller 302 can act as a local EtherCAT master. Other components (e.g., the input sensor 116, the output sensor 117, and the motor) are EtherCAT slave devices controlled by the controller 302.

[0054] The controller 302 is coupled to interlock 314, memory 316, tuning circuit 312, input sensor 116, output sensor 117, and system controller 126. The controller 302 includes a CPU. The controller 302 is configured to control the tuning circuit 312 to change the impedance parameters of the RF match 172. In one example, the tuning circuit 312 is a T-type network tuning circuit. In another example, the tuning circuit 312 is a pi-type network tuning circuit. In yet another example, the tuning circuit 312 is an L-type network tuning circuit. The tuning circuit 312 may include one or more capacitors and inductors, which can be adjusted by the controller 302 to change the impedance of the RF waveform delivered to the processing chamber 100.

[0055] System controller 126 can communicate with RF match 172, RF generator 171, and / or other room components. Controller 302 can communicate with system controller 126 using EtherCAT. Controller 302 is capable of master-slave switching, allowing communication with the system controller 126 as an EtherCAT master. Controller 302 receives requests from system controller 126 and provides feedback. Furthermore, system controller 126 receives forward and reflected power information from the RF generator 171 and obtains data from all internal devices of the RF match 172. The RF generator 171 can also be controlled by system controller 126 for coordinated intelligent real-time control and tuning.

[0056] The memory 316 is programmable for long-term or short-term memory storage. The memory 316 described herein is typically non-volatile memory and may include random access memory, read-only memory, hard disk drives, or other suitable forms of digital storage (local or remote). Software instructions (programs) and data may be encoded and stored within the memory 316 to instruct the processor within the controller 302. The software program (or computer instructions) readable by the controller 302 determines which tasks can be performed by the components in the plasma processing system 10. The program readable by the controller 302 includes program code that, upon execution, performs tasks related to the plasma processing schemes described herein. The program may include instructions for controlling the RF match 172 using the methods described herein. The program includes instructions for performing one or more of the operations described herein.

[0057] Interlock 314 is implemented for safety purposes to control temperature switches, cable positioning switches, and matching positioning switches, etc. In the event of a fault, interlock 314 opens, and an interlock signal is sent from the local microcontroller to both the user's portable computer and the system controller 126 to shut down the system.

[0058] The RF match 172 may include a sequence control port for algorithm uploading and external matching control (e.g., through the use of external software and application programming interfaces (APIs)). Automatic impedance tuning algorithms and default variable capacitor positions are stored in memory 316. Sensor data and tuning algorithms can be accessed from an external user's portable computer, providing the RF match 172 with great flexibility. Furthermore, advanced process-related control algorithms can be deployed in real time. The RF match 172 can operate fully autonomously, coordinate with the system controller 126, or be manually controlled by an external user's portable computer.

[0059] The output sensor 117 may include a voltage sensor and / or a current sensor configured to measure the impedance or characteristics of the plasma processing system 10 as explained above. The input sensor 116 may include a voltage sensor and / or a current sensor configured to measure characteristics of the RF waveform, such as voltage, current, phase, or harmonics. In some cases, only one sensor may be used at the input of the RF match 172. Sensor readings can be used in feedback and feedforward algorithms for impedance matching.

[0060] Output sensor 117 is configured to sample a first set of impedances of the plasma processing system 10 during a first time period and report it to the controller 302. Output sensor 117 is also configured to sample a second set of impedances of the plasma processing system 10 during a second time period and report it to the controller 302. The first time period may begin after a first delay, which is triggered (i.e., measured) after a first portion of the waveform pulse of the synchronization signal or internally triggered (i.e., measured) by detecting changes in the characteristics of the PV waveform or the RF waveform by the sensors. The second time period may begin after a second delay that triggers simultaneously with the first delay. The second delay is longer than the first delay.

[0061] The controller 302 uses two sets of impedances to determine a first impedance and a second impedance, and combines them into a combined impedance. Then, based on this combined impedance parameter, the controller 302 adjusts one or more capacitors of the tuning circuit 312 to change the matching point of the RF match 172, so that the impedance of the generated RF waveform matches the impedance of the plasma processing system 10. After adjusting the tuning circuit 312 based on the combined impedance parameter, the controller 302 can further fine-tune the tuning circuit 312 based on the impedance of the RF waveform sampled by the input sensor 116.

[0062] Example technologies for substrate processing and tuning

[0063] Such as about Figure 3 As described, some implementations use RF matching to reduce (e.g., minimize) reflected power at the design frequency. The input and output sensors (e.g., if available) (such as sensors 116, 117) can be calibrated to measure voltage and current waveforms at the design frequency (e.g., the fundamental frequency) and can be operated to reduce reflected power. Certain embodiments of the invention are directed to processing systems having one or more sensors that measure not only the fundamental frequency but also the harmonics and intermodulation products to be used, thereby adjusting and improving various processing metrics.

[0064] While reducing the reflected power of the RF generator could be considered, some embodiments of the present invention take into account other criteria used for tuning during substrate processing. For example, some embodiments provide tuning algorithms that can be developed using at least a combination of the fundamental frequency, harmonic frequencies, and intermodulation frequencies to achieve improved substrate results and more precise process control. As used herein, substrate results (also referred to as “wafer processing metrics”) can refer to one or more quality parameters associated with processing the substrate, such as the degree of process variation, etch rate, and / or uniformity.

[0065] In some embodiments, RF matching tuning in the frequency domain can be performed using the voltage, current, phase, and / or intermodulation components of selected harmonics. This RF matching can be tuned to a configuration with certain frequency domain fingerprint patterns associated with fewer process variations, faster etching rates, and / or better uniformity. In some embodiments of the invention, waveforms can be reconstructed from harmonic components and reported to a controller for real-time plotting and tuning, as described in more detail herein.

[0066] Figure 4 This is a schematic diagram of a plasma processing system having two RF generators 408 and 410 (labeled "RF1" and "RF2") and respective RF matches 404 (labeled "RF match 1") and RF match 406 (labeled "RF match 2"). Each of the RF generators 408 and 410 can be implemented in a manner similar to that of the RF generator 171 described with respect to FIG. 1. Each of the RF matches 404 and 406 can be implemented in a manner similar to that of the RF match 172 described herein. As shown, sensor 402 can be coupled to... Figure 4 The outputs RF matching 404 and RF matching 406 are included. Therefore, sensor 402 can be used to measure the intermodulation and harmonic components of the combined outputs of the RF matching 404 and RF matching 406.

[0067] RF generators 408 and 410 can generate two or more frequencies that can be synchronized with phase control. In some cases, these RF generators may operate in-phase or out-of-phase depending on calibration to meet certain processing metrics. In some embodiments, another RF signal can be applied from the top electrode (e.g., the chamber cover 123) in a capacitively coupled plasma reactor or the top coil in an inductively coupled plasma reactor. As shown, the sensor 402 is positioned at the RF matched output for measuring a selected range of harmonics and intermodulation components. In some embodiments, the sensor is coupled to an RF rod used to couple the RF generators 408 and 410 to electrodes (e.g., on a substrate support assembly 136 disposed within the processing area of ​​the processing chamber) that are located on the substrate support assembly 136 within the processing area of ​​the processing chamber. Figure 1B (Bias electrode 104 in the middle).

[0068] Figure 5 Figure 500 illustrates the fundamental, intermodulation, and harmonic components of a signal in the frequency domain. In some embodiments, during the calibration phase, signals with different harmonic and intermodulation components are available for processing various test substrates to identify components that provide optimal substrate processing results or metrics (e.g., or at least wafer processing metrics that meet certain thresholds). For example, a specific ratio of at least two intermodulation or harmonic components can be identified as providing optimal substrate processing metrics. When processing the substrate, sensors (e.g., sensor 402) can be used to measure the intermodulation and harmonic components and adjust the matching 172 (and / or other processing devices, such as...) according to the ratios identified during calibration. Figure 1B The configuration of the PV waveform generator 175 or RF generator 171. In some cases, the RF match 172 is one or more sensors (e.g., Figure 3 The sensor 117 can be used to measure intermodulation and harmonic components, or one or more sensors (e.g., sensor 402) outside the RF match 172 can be used alternately or additionally.

[0069] Figure 6 This is a schematic diagram of a plasma processing system according to certain embodiments of the present invention, having a sensor 602 coupled to the output of a PV waveform generator 175. The sensor 602 can be coupled to a power delivery line 164. The sensor 602 can measure intermodulation and harmonic components at the power delivery line 164, thereby controlling the PV waveform generator 175 and / or the RF generator 171. For example, based on the measured harmonic and / or intermodulation components, a PV waveform (e.g., regarding...) can be reconstructed. Figure 2 The waveform 230 described is used to generate a reconstructed waveform. In some cases, the reconstructed waveform may be stored in memory. The reconstructed waveform may be reported to the controller for real-time plotting and control of the PV waveform generator 175 and / or the RF generator 171. For example, the PV waveform generator 175 may generate a PV waveform, which may be a rectangular wave with certain on / off times (e.g., where the on time corresponds to...). Figure 2 The ion current phases shown and the corresponding turn-off times are as follows: Figure 2 The sheath collapse stage shown) and / or voltage pulse characteristics, such as voltage waveform shape (e.g., dV / dt). However, the signal at the power delivery line 164 and / or at the substrate may have different on- and off-times than the rectangular wave generated by the PV waveform generator 175 (e.g., due to parasitic and capacitive coupling). Based on the reconstructed waveform, the output of the PV waveform generator 175 can be controlled to adjust the on- and off-times or shape of the PV waveform generated by the PV waveform generator 175 to improve the measurements and substrate processing results observed on the substrate.

[0070] Such as about Figure 3 As described, the RF matching sensor (e.g., sensor 116) at the input of the RF match 172 measures the fundamental frequency of the RF generator 171, which can be used to tune (e.g., reduce or minimize) the reflected power at the input of the RF match 172. In some embodiments of the invention, the output sensor (e.g., sensor 117) measures the fundamental frequency, selected harmonics, and intermodulation components, and uses two or more of these measured components for matching tuning (e.g., RF matching tuning in the frequency domain). The adjusted matching tuning value may differ from the original matching tuning value used to reduce the reflected power provided at the fundamental frequency. For example, as described herein, it is a ratio of at least two selected harmonics or intermodulation components that can be identified during calibration to provide optimal measurement, as described herein. The matching tuning (e.g., the capacitance of the tuning circuit 312) may be adjusted based on the identified ratio (e.g., such that the measured ratio is approximately equal to the identified ratio during calibration). Although the sensor used to measure these intermodulation and / or harmonic components is located within the RF match 172, it can be located anywhere along the transmission line. The measured frequency domain plots can be used for advanced process control, plasma property analysis, etch rate and uniformity improvement.

[0071] In some implementations, the magnitudes and / or phases of one or more selected frequency and / or intermodulation / harmonic components can be used for RF matching tuning. The capacitance of one or more capacitive elements of the RF match 172 can be adjusted based on the selected frequency components and / or the ratios between them. Therefore, the RF match can be tuned to identified frequency component values ​​based on a specific frequency domain fingerprint pattern less correlated with process variations, improved plasma processing and / or etching process results, faster etching rates, and / or better uniformity. Typically, the identified frequency component values ​​differ from the fundamental frequency provided by one or more RF sources.

[0072] Figure 7 This is a process flow diagram illustrating a method 700 for processing a substrate in a plasma processing system according to certain embodiments of the present invention. Method 700 can be performed using a plasma processing system, such as those described above. Figure 3 , Figure 4 and Figure 6 The plasma processing system described.

[0073] In operation 710, the plasma processing system senses the generated frequency components during the execution of a plasma processing recipe on a calibration substrate. The plasma processing system senses (e.g., via one or more sensors) one or more intermodulation or harmonic components of the signal at a node coupled to the plasma chamber.

[0074] In operation 720, the plasma processing system identifies a frequency domain configuration to conform to one or more substrate processing metrics. For example, plasma processing properties achieved on the calibrated substrate can be measured at operation 710, and the collected frequency domain data and process recipe data can be used to control subsequent substrate processes and / or stored in memory. For example, such properties may include one or more substrate processing metrics, such as etch rate, etch profile distortion, or etch rate uniformity associated with the calibrated substrate. During operation 720, the collected process results and process data may be correlated with one or more intermodulation or harmonic component data (which includes one or more measurement points in the frequency domain measured during the execution of operation 710), such that changes in process results or process metrics are correlated with the one or more intermodulation or harmonic component data measured during the execution of operation 710.

[0075] In operation 730, the plasma processing system senses (e.g., via one or more sensors) one or more intermodulation or harmonic components of a signal at a node coupled to the plasma chamber. For example, the one or more signal processing devices may include matching circuitry (e.g., Figure 3 Match 172 or Figure 4 The matching circuit (404) is used, and the node coupled to the plasma chamber can be the output of the matching circuit. In some embodiments, the node coupled to the plasma chamber can be external to the matching circuit.

[0076] In operation 740, the plasma processing system uses associated data collected during or as a result of operations 710 and 720 to control one or more signal processing devices of the plasma processing system to adjust the RF matching tuning parameters and / or PVT waveform characteristics used to process the substrate based on one or more intermodulation or harmonic components determined to achieve improved substrate process results. The RF matching tuning parameters are adjusted according to a frequency domain configuration identified during operation 720 by analyzing one or more substrate processing metrics collected on the calibration substrate. This frequency domain configuration may be a ratio between the magnitudes of at least two intermodulation or harmonic components. The one or more processing metrics may include process variations, etching rates, or uniformity related to substrate processing.

[0077] In some embodiments, the plasma processing system may construct a PV waveform based on one or more sensed intermodulation or harmonic components. The one or more signal processing devices may be controlled based on the constructed PV waveform. These signal processing devices may include at least one of a PV waveform generator (e.g., PV waveform generator 175) or an RF generator (e.g., RF generator 171), which may be controlled based on the constructed PV waveform.

[0078] In some embodiments, controlling the one or more signal processing devices may include controlling at least one of the magnitudes or phases of one or more output signals of the one or more signal processing devices. The one or more signal processing devices may include a first matching circuit (e.g., Figure 4 Matching circuit 404) and second matching circuit (e.g., Figure 4 Matching 406). The one or more sensors may include sensors (e.g., Figure 4 The sensor 402 is coupled to the outputs of the first matching circuit and the second matching circuit. In some aspects, the sensor output signal from the sensor 402 can be fed back to at least one of the RF generator 408 or the RF generator 410, and used to adjust the output power level, output frequency and / or phase difference of the RF signal.

[0079] Although the foregoing describes embodiments of the present invention, other and further embodiments of the present invention may be devised without departing from the basic scope of the present invention, and the scope of the present invention is defined by the appended claims.

Claims

1. A method for processing a substrate in a plasma processing system, the method comprising: Sensing one or more intermodulation or harmonic components of a signal at a node coupled to the plasma chamber using one or more sensors; and Control one or more signal processing devices of the plasma processing system to process the substrate based on the one or more intermodulation or harmonic components and according to a frequency domain configuration identified by analyzing one or more substrate processing metrics.

2. The method of claim 1, further comprising sensing a frequency component of another substrate to identify the frequency domain configuration to conform to the one or more substrate processing metrics, wherein the one or more intermodulation or harmonic components correspond to the frequency component.

3. The method of claim 1, wherein the frequency domain configuration comprises a ratio between the magnitudes of at least two intermodulation or harmonic components.

4. The method of claim 1, wherein the one or more substrate processing metrics include process variations, etching rates, or uniformity related to substrate processing.

5. The method of claim 1, further comprising constructing a pulse voltage (PV) waveform based on the sensed one or more intermodulation or harmonic components, wherein the one or more signal processing devices are controlled based on the constructed PV waveform.

6. The method of claim 5, wherein the one or more signal processing devices comprise at least one of a PV waveform generator or a radio frequency (RF) generator controlled based on the constructed PV waveform.

7. The method of claim 1, wherein the one or more signal processing devices include a matching circuit, and wherein the node coupled to the plasma chamber includes the output of the matching circuit.

8. The method of claim 7, wherein the node coupled to the plasma chamber is outside the matching circuit.

9. The method of claim 1, wherein controlling the one or more signal processing devices includes controlling at least one of the magnitude or phase of one or more output signals of the one or more signal processing devices.

10. The method of claim 1, wherein the one or more signal processing devices comprise: First matching circuit; and A second matching circuit, wherein the one or more sensors include sensors coupled to the outputs of the first matching circuit and the second matching circuit.

11. The method of claim 10, wherein the one or more signal processing devices comprise: A first generator, the first generator having an output coupled to the first matching circuit; and A second generator having an output coupled to a second matching circuit, wherein the sensor is configured to provide a feedback signal to at least one of the first generator or the second generator.

12. An apparatus for processing a substrate in a plasma processing system, the apparatus comprising: One or more sensors configured to sense one or more intermodulation or harmonic components of a signal at a node coupled to the plasma chamber; One or more signal processing devices, said one or more signal processing devices being coupled to the plasma chamber; and A controller configured to control one or more signal processing devices of the plasma processing system to process the substrate based on the one or more intermodulation or harmonic components and according to a frequency domain configuration identified by analyzing one or more substrate processing metrics.

13. The device of claim 12, wherein the frequency domain configuration comprises a ratio between the magnitudes of at least two intermodulation or harmonic components.

14. The apparatus of claim 12, wherein the one or more substrate processing metrics include process variations, etching rates, or uniformity related to substrate processing.

15. The device of claim 12, wherein the controller is further configured to construct a pulse voltage (PV) waveform based on the sensed one or more intermodulation or harmonic components, wherein the one or more signal processing devices are controlled based on the constructed PV waveform.

16. The apparatus of claim 15, wherein the one or more signal processing means comprises at least one of a PV waveform generator or a radio frequency (RF) generator configured to be controlled based on the constructed PV waveform.

17. The apparatus of claim 12, wherein the one or more signal processing means comprises a matching circuit, and wherein the node coupled to the plasma chamber comprises the output of the matching circuit.

18. The device of claim 17, wherein the node coupled to the plasma chamber is external to the matching circuit.

19. The device of claim 12, wherein, in order to control the one or more signal processing devices, the controller is configured to control at least one of the magnitude or phase of one or more output signals of the one or more signal processing devices.

20. The apparatus of claim 12, wherein the one or more signal processing means comprises: First matching circuit; and A second matching circuit, wherein the one or more sensors include sensors coupled to the outputs of the first matching circuit and the second matching circuit.

21. A plasma processing system, the plasma processing system comprising: Plasma chamber; One or more sensors configured to sense one or more intermodulation or harmonic components of a signal at a node coupled to the plasma chamber; One or more signal processing devices, said one or more signal processing devices being coupled to the plasma chamber; and A controller configured to control one or more signal processing devices of the plasma processing system to process the substrate based on the one or more intermodulation or harmonic components and according to a frequency domain configuration identified by analyzing one or more substrate processing metrics.

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