Substrate with built-in capacitor

Abstract

A capacitor-embedded substrate (1) is provided with: a core layer (10) including at least one layer of a core material (11) having a cavity (11X) in the thickness direction; a capacitor element (20) housed in the cavity (11X) of the core material (11); and a through conductor (30) provided so as to penetrate the core layer (10) in the thickness direction. The through conductor (30) includes: a first through conductor (31) provided so as to penetrate the capacitor element (20) in the core layer (10) and electrically connected to a load (50) and a power source (55); and a second through conductor (32) that is provided so as to penetrate the capacitor element (20) in the core layer (10) at a position separated from the first through conductor (31), and that is electrically connected to a load (50) and a power source (55). The first through conductor (31) is electrically connected to the first electrode (21) of the capacitor element (20). The second through conductor (32) is electrically connected to a second electrode (22) of the capacitor element (20), the second electrode (22) having a polarity different from that of the first electrode (21).

Description

Technical Field

[0001] This invention relates to a capacitor-embedded substrate. Background Technology

[0002] Patent Document 1 discloses a chip-embedded printed circuit board, characterized in that the chip-embedded printed circuit board comprises: a central layer having through holes and voids, consisting of a chip inserted into the voids and fixed by plating, and circuit patterns formed on both sides; an insulating layer stacked on one or both sides of the central layer, including through holes filled with conductive ink; and a circuit layer stacked on the insulating layer, having circuit patterns and through holes electrically connected to the plating of the central layer through the through holes.

[0003] In Patent Document 1, a chip-embedded printed circuit board is defined as follows: in a form where a chip (e.g., a capacitor) is embedded in the inner or outer layer of the board itself, regardless of the size of the board itself, if the chip and the printed circuit board are partially integrated, it is called a "chip-embedded type", and such a board is called a chip-embedded printed circuit board.

[0004] Existing technical documents

[0005] Patent documents

[0006] Patent Document 1: Japanese Patent No. 4061318 Summary of the Invention

[0007] The problem the invention aims to solve

[0008] For example, in the case of the chip-embedded printed circuit board described in Patent Document 1, if the power supply to an arithmetic device, which serves as a load, is increased when the board with built-in capacitors is applied to a semiconductor packaging board, signal quality degradation may occur due to power supply noise. In order to suppress such signal quality degradation caused by power supply noise, it is necessary to reduce the loop impedance between the load and the power supply.

[0009] The present invention was made to solve the above-mentioned problems, and its purpose is to provide a capacitor-embedded substrate that can reduce the loop impedance between the load and the power supply and suppress the degradation of signal quality caused by power supply noise.

[0010] Solution for solving the problem

[0011] The capacitor-embedded substrate of the present invention includes: a core layer comprising at least one core material having a cavity in the thickness direction; a capacitor element embedded in the cavity of the core material; and a through conductor disposed through the core layer in the thickness direction. The through conductor includes: a first through conductor disposed through the capacitor element within the core layer for electrical connection to a load and a power source; and a second through conductor disposed through the capacitor element within the core layer at a location separate from the first through conductor, for electrical connection to the load and the power source. The first through conductor is electrically connected to a first electrode of the capacitor element. The second through conductor is electrically connected to a second electrode of the capacitor element with a polarity different from the first electrode.

[0012] The effects of the invention

[0013] According to the present invention, a capacitor-embedded substrate is provided that can reduce the loop impedance between the load and the power supply and suppress signal quality degradation caused by power supply noise. Attached Figure Description

[0014] Figure 1 This is a cross-sectional view schematically illustrating an example of a capacitor-embedded substrate according to the first embodiment of the present invention.

[0015] Figure 2 yes Figure 1 An example of an equivalent circuit block diagram of a capacitor-embedded substrate is shown.

[0016] Figure 3 It means Figure 1 A partial cross-sectional view of the capacitor's built-in substrate is shown.

[0017] Figure 4 It is along Figure 3 An example of a top view of line AA.

[0018] Figure 5 This is a cross-sectional view schematically illustrating another example of the capacitor-embedded substrate according to the first embodiment of the present invention.

[0019] Figure 6 It is along Figure 5 An example of a top view of line AA.

[0020] Figure 7 It is magnification Figure 3 An example of a sectional view of part C.

[0021] Figure 8 This is a cross-sectional view schematically illustrating an example of a capacitor-embedded substrate according to the second embodiment of the present invention.

[0022] Figure 9 yes Figure 8 An example of an equivalent circuit block diagram of a capacitor-embedded substrate is shown.

[0023] Figure 10 yes Figure 8 Another example of the equivalent circuit block diagram of the capacitor-embedded substrate shown.

[0024] Figure 11 This is a cross-sectional view schematically illustrating an example of a capacitor-embedded substrate according to the third embodiment of the present invention.

[0025] Figure 12 yes Figure 11 An example of an equivalent circuit block diagram of a capacitor-embedded substrate is shown.

[0026] Figure 13 This is a cross-sectional view schematically illustrating an example of a capacitor-embedded substrate according to the fourth embodiment of the present invention.

[0027] Figure 14 yes Figure 13 An example of an equivalent circuit block diagram of a capacitor-embedded substrate is shown.

[0028] Figure 15 A is a schematic diagram illustrating an example of the relationship between frequency f and impedance |Z| when only the first capacitor element C1 is included. Figure 15 B is a schematic diagram illustrating an example of the relationship between frequency f and impedance |Z| in the case of a first capacitor element C1 and a second capacitor element C2 connected in parallel. Figure 15 C is a schematic diagram illustrating another example of the relationship between frequency f and impedance |Z| in the case of a first capacitor element C1 and a second capacitor element C2 connected in parallel.

[0029] Figure 16 This is a cross-sectional view schematically illustrating an example of a capacitor-embedded substrate according to the fifth embodiment of the present invention.

[0030] Figure 17 yes Figure 16 An example of an equivalent circuit block diagram of a capacitor-embedded substrate is shown.

[0031] Figure 18 This is a cross-sectional view schematically illustrating an example of a capacitor-embedded substrate according to the sixth embodiment of the present invention.

[0032] Figure 19 It is a schematic representation of something used in manufacturing. Figure 18 A cross-sectional view of an example of a capacitor element stack with a built-in capacitor substrate shown.

[0033] Figure 20 This is a cross-sectional view schematically illustrating an example of the process of forming the first wiring layer in the core material.

[0034] Figure 21 This is a cross-sectional view schematically illustrating an example of the process of forming a cavity in the core material.

[0035] Figure 22 This is a cross-sectional view schematically illustrating an example of the process of arranging capacitor elements in the cavity of the core material.

[0036] Figure 23 This is a cross-sectional view schematically illustrating an example of the process of performing the first resin sealing.

[0037] Figure 24 This is a cross-sectional view schematically illustrating an example of the process of making the core.

[0038] Figure 25 This is a cross-sectional view schematically illustrating an example of the process of stacking cores.

[0039] Figure 26 This is a cross-sectional view schematically illustrating an example of the process of forming the core layer.

[0040] Figure 27 This is a cross-sectional view schematically illustrating an example of the process of forming a through hole in the core layer.

[0041] Figure 28 This is a cross-sectional view schematically illustrating an example of the process of forming a through conductor.

[0042] Figure 29 This is a cross-sectional view schematically illustrating an example of the process of performing the second resin sealing.

[0043] Figure 30 This is a cross-sectional view schematically illustrating an example of the process of forming conductive paths and wiring. Detailed Implementation

[0044] The capacitor-embedded substrate of the present invention will now be described. Furthermore, the present invention is not limited to the embodiments described below, and appropriate modifications may be made without departing from the spirit of the invention. In addition, structures combining multiple preferred structures described in the following embodiments are also part of the present invention.

[0045] In the capacitor-embedded substrate of the present invention, the through conductor includes a first through conductor and a second through conductor for electrical connection with a load and a power source as a necessary structure, but the load and power source are not necessary structures in the capacitor-embedded substrate of the present invention, but are arbitrary structures. Similarly, when the through conductor includes a third through conductor for electrical connection with an interface and a load, the interface and load are not necessary structures in the capacitor-embedded substrate of the present invention, but are arbitrary structures.

[0046] The embodiments shown below are examples, and it is self-evident that parts of the structures shown in different embodiments can be replaced or combined. From the second embodiment onwards, descriptions of matters common to the first embodiment are omitted, and the differences are mainly explained. In particular, the same effects achieved by the same structure are not mentioned repeatedly in each embodiment.

[0047] In the following description, without specifically distinguishing between different embodiments, it is simply referred to as "the capacitor-embedded substrate of the present invention".

[0048] In this specification, terms indicating relationships between elements (such as "perpendicular," "parallel," "orthogonal," etc.) and terms indicating the shape of elements are not merely strict expressions, but rather expressions indicating substantially equal ranges, including, for example, expressions indicating differences of several percentage points. Furthermore, in this specification, "equal" or "identical" are not merely expressions indicating completely equal or identical situations, but rather expressions indicating substantially equal or identical situations, including, for example, expressions indicating differences of several percentage points.

[0049] The accompanying drawings are schematic diagrams and may differ from the actual product in dimensions, aspect ratio, scale, etc. The same reference numerals are used for identical or equivalent parts in the drawings. Furthermore, the same reference numerals are used for identical elements across different drawings, and redundant descriptions are omitted.

[0050] [First Embodiment]

[0051] In the capacitor-embedded substrate of the first embodiment of the present invention, the core layer comprises a core material.

[0052] Figure 1 This is a cross-sectional view schematically illustrating an example of a capacitor-embedded substrate according to the first embodiment of the present invention. Figure 2 yes Figure 1 An example of the equivalent circuit block diagram of the capacitor-embedded substrate is shown. Figure 2 In the equivalent circuit block diagram, GND refers to ground. Figure 2 The same applies to the equivalent circuit block diagrams outside of this.

[0053] Figure 1 The capacitor-embedded substrate 1 shown includes a core layer 10, a capacitor element 20, and a through conductor 30.

[0054] The core layer 10 has a thickness direction (in Figure 1 The first principal plane 10a and the second principal plane 10b are opposite each other in the vertical direction.

[0055] The core layer 10 includes a core material 11 having a chamber 11X. A capacitor element 20 is embedded within the chamber 11X of the core material 11. Figure 1 In the example shown, the core layer 10 includes a core material 11 in the thickness direction. The core material 11 is made of an insulating material.

[0056] Preferably, the core layer 10 further includes an adhesive layer 12 disposed in a manner that covers the core material 11 and the capacitor element 20. The adhesive layer 12 may be disposed on both main surfaces of the core material 11 or on either main surface. The adhesive layer 12 is made of an insulating material.

[0057] Preferably, such as Figure 1 As shown, the cavity 11X (i.e., the part between the core material 11 and the capacitor element 20) in which the capacitor element 20 is not built is filled with an insulating material such as an adhesive layer 12.

[0058] Preferably, such as Figure 1 As shown, a first wiring layer 41 is provided on at least one main surface of the core material 11. Furthermore, when the core layer 10 includes an adhesive layer 12, it is preferable that a second wiring layer 42 is provided on at least one main surface of the adhesive layer 12.

[0059] Alternatively, a rewiring layer 13 may be provided on at least one main surface of the core layer 10. The rewiring layer 13 may be provided on either of the two main surfaces of the core layer 10 or on any one of the main surfaces.

[0060] The rewiring layer 13 is a multilayer wiring layer. The rewiring layer 13 includes, for example, an insulation layer 14 and wiring 15. A through conductor 16 is provided inside the insulation layer 14. The through conductor 16 electrically connects the wiring 15 between different layers within the rewiring layer 13.

[0061] The through conductor 30 is arranged to penetrate the core layer 10 in the thickness direction.

[0062] The through conductor 30 may be disposed at least on the inner wall surface of the through hole that penetrates the core layer 10 in the thickness direction. That is, the through conductor 30 may be disposed only on the inner wall surface of the through hole, or it may be disposed entirely inside the through hole.

[0063] It could also be, such as Figure 1 As shown, a resin-filled portion 45, made of resin material, is provided inside the through conductor 30. In this case, the resin-filled portion 45 is provided in the space surrounded by the through conductor 30 within the through hole penetrating the core layer 10 in the thickness direction. By providing the resin-filled portion 45 to eliminate the space within the through hole, delamination of the through conductor 30 is suppressed. Furthermore, the resin-filled portion 45 can be either a conductor or an insulator.

[0064] Preferably, when viewed from the thickness direction, the through conductor 30 is arranged over the entire circumference of the through hole that penetrates the core layer 10 in the thickness direction.

[0065] The through conductor 30 includes a first through conductor 31 and a second through conductor 32.

[0066] The first through conductor 31 is a through conductor provided in such a way as to pass through the capacitor element 20 in the core layer 10 for electrical connection with the load 50 and the power supply 55.

[0067] The first through conductor 31 is electrically connected to the first electrode 21 (e.g., the anode) of the capacitor element 20.

[0068] The second through conductor 32 is a through conductor provided in a manner that passes through the capacitor element 20 within the core layer 10 at a position separate from the first through conductor 31, and is used for electrical connection with the load 50 and the power supply 55.

[0069] The second through conductor 32 is electrically connected to the second electrode 22 (e.g., cathode) of the capacitor element 20, which has a polarity different from that of the first electrode 21.

[0070] exist Figure 1 In the capacitor-embedded substrate 1 shown, the wiring path between the load 50 and the power supply 55 can be shortened by using the first through conductor 31 and the second through conductor 32, thereby reducing the loop impedance between the load 50 and the power supply 55. As a result, signal quality degradation caused by power supply noise can be suppressed.

[0071] Preferably, such as Figure 1 As shown, in addition to the portion connected to the first electrode 21 of the capacitor element 20, insulating material is also filled between the first through conductor 31 and the capacitor element 20.

[0072] The number of conductors 31 is not particularly limited; it can be one or more.

[0073] The cross-sectional shape of the first through conductor 31 perpendicular to the thickness direction is not particularly limited, for example, it is a circular shape.

[0074] The diameter of the first through conductor 31 can be constant or different in the thickness direction. Furthermore, the diameter of the through conductor refers to the diameter when the planar shape is circular, and to the equivalent circular diameter when the planar shape is not circular.

[0075] Preferably, such as Figure 1 As shown, in addition to the portion connected to the second electrode 22 of the capacitor element 20, insulating material is also filled between the second through conductor 32 and the capacitor element 20.

[0076] There is no particular limitation on the number of the second through conductor 32; it can be one or more. The number of the second through conductor 32 can be the same as, more than, or less than the number of the first through conductor 31.

[0077] The cross-sectional shape of the second through conductor 32 perpendicular to the thickness direction is not particularly limited; for example, it can be circular. The cross-sectional shape of the second through conductor 32 can be the same as or different from that of the first through conductor 31.

[0078] The diameter of the second through conductor 32 can be constant or different in the thickness direction. The diameter of the second through conductor 32 can be the same as or different from the diameter of the first through conductor 31.

[0079] A load of 50 can be exemplified by computing devices containing semiconductor integrated circuits, etc.

[0080] Power supply 55 supplies DC voltage, for example, to a voltage regulator (not shown). The voltage regulator includes active elements such as semiconductor switching elements, and by controlling the load of these active elements, adjusts the DC voltage supplied from power supply 55 to a voltage level suitable for load 50.

[0081] Preferably, such as Figure 1 As shown, the first through conductor 31 and the second through conductor 32 are on the first main surface 10a (in Figure 1 The end on the upper surface (in the middle) is electrically connected to the load 50, and on the second main surface 10b (in Figure 1 The end on the lower surface side is electrically connected to power supply 55.

[0082] In addition, preferably, such as Figure 1 As shown, the first through conductor 31 and the second through conductor 32 are electrically connected to the load 50 directly below the load 50.

[0083] Preferably, the through conductor 30 further includes a third through conductor 33.

[0084] The third through conductor 33 is a through conductor provided in a manner that does not penetrate the capacitor element 20 within the core layer 10 but penetrates the core material 11, and is used for electrical connection with the interface 60 and the load 50.

[0085] The number of the third through conductor 33 is not particularly limited; it can be one or more. The number of the third through conductor 33 can be the same as, more than, or less than the number of the first through conductor 31. Furthermore, the number of the third through conductor 33 can be the same as, more than, or less than the number of the second through conductor 32.

[0086] The cross-sectional shape of the third through conductor 33 perpendicular to the thickness direction is not particularly limited; for example, it can be circular. The cross-sectional shape of the third through conductor 33 may be the same as or different from that of the first through conductor 31. Furthermore, the cross-sectional shape of the third through conductor 33 may be the same as or different from that of the second through conductor 32.

[0087] The diameter of the third through conductor 33 can be constant or different in the thickness direction. The diameter of the third through conductor 33 can be the same as or different from the diameter of the first through conductor 31. In addition, the diameter of the third through conductor 33 can be the same as or different from the diameter of the second through conductor 32.

[0088] Preferably, such as Figure 1 As shown, the third through conductor 33 is on the first main surface 10a (in Figure 1 The end on the upper surface (in the middle) is electrically connected to the load 50, and on the second main surface 10b (in Figure 1 The end on the lower surface side is electrically connected to the interface 60.

[0089] Figure 3 It means Figure 1 This is a partial cross-sectional view of the capacitor's built-in substrate. Figure 3 From Figure 1 The redistribution layer 13, load 50, power supply 55, and interface 60 are omitted. Figure 4 It is along Figure 3 An example of a top view of line AA. Furthermore, Figure 3 Also along Figure 4 A cross-sectional view of the BB line.

[0090] Preferably, such as Figure 4 As shown, when viewed from above in the thickness direction, the third through conductor 33 is positioned on the outer periphery side compared to the first through conductor 31 and the second through conductor 32.

[0091] Furthermore, the first through conductor 31 and the second through conductor 32 may have the same or different shape, density, and configuration compared to the third through conductor 33.

[0092] Preferably, the first through conductor 31 and the second through conductor 32 are arranged at equal intervals as a whole. In other words, it is preferable that the center-to-center distance between the through conductors is equal. When the first through conductor 31 and the second through conductor 32 are arranged at equal intervals as a whole, the first through conductor 31 can be arranged at equal intervals or unequal intervals. Similarly, the second through conductor 32 can be arranged at equal intervals or unequal intervals.

[0093] In this specification, the center of a through conductor refers to the center of the smallest circle enclosing the through conductor when viewed from above in the thickness direction. Therefore, the distance between the centers of the through conductors is the length of the line segment connecting their centers, as determined by the method described above. The same applies to the distance between the centers of the first through conductor, the second through conductor, and the center-to-center distance between the first and second through conductors.

[0094] For example, it could also be, such as Figure 4 As shown, the first through conductor 31 and the second through conductor 32 are configured as a whole hexagon. In the hexagonal configuration, the first through conductor 31 or the second through conductor 32 is disposed at each vertex of the regular hexagon and at the center of the regular hexagon.

[0095] Alternatively, the first through conductor 31 and the second through conductor 32 can be arranged as a whole in a square configuration. In the square configuration, the first through conductor 31 or the second through conductor 32 is positioned at each vertex of the square.

[0096] Similarly, it is preferable that the third through conductor 33 is arranged at equal intervals as a whole.

[0097] For example, it could also be, such as Figure 4 As shown, the third through conductor 33 is configured as a whole hexagon. In the hexagonal configuration, the third through conductor 33 is disposed at each vertex of the regular hexagon and at the center of the regular hexagon.

[0098] Alternatively, the third through conductor 33 can be arranged as a whole in a square configuration. In the square configuration, the third through conductor 33 is positioned at each vertex of the square.

[0099] For example, the first through conductor 31 and the second through conductor 32 can be used as through conductors for power supply (Power / GND), and the third through conductor 33 can be used as a through conductor for signal transmission (Signal).

[0100] Furthermore, the current capacity of the power supply (Power / GND) line is required to be higher than that of the signal transmission (Signal) line, thus necessitating a larger conductor area. Therefore, it is preferable that... Figure 4In the top view shown, when the conductor area of ​​the power supply conductor (Power / GND) is defined as Vp, the conductor area of ​​the GND conductor (GND) conductor (Vd), and the conductor area of ​​the signal transmission conductor (Signal) conductor (Vs), Vp is greater than Vs and Vd is greater than Vs. That is, preferably, the relationship Vs < Vp and Vs < Vd is satisfied. In this case, it is more preferable that Vp and Vd are equal.

[0101] The conductor area of ​​a through conductor can be adjusted, for example, by changing (1) the diameter of the through conductor, (2) the conductor thickness of the through conductor, and (3) both the diameter and the conductor thickness of the through conductor.

[0102] Figure 5 This is a cross-sectional view schematically illustrating another example of the capacitor-embedded substrate according to the first embodiment of the present invention. Figure 5 In, with Figure 3 Compared to simplification. Figure 6 It is along Figure 5 An example of a top view of line AA. Furthermore, Figure 5 It is along Figure 6 A cross-sectional view of the BB line.

[0103] exist Figure 5 In the capacitor built-in substrate 1A shown, as Figure 5 and Figure 6 As shown, the through conductor 30PD for power supply (Power / GND) is not disposed inside the capacitor element 20, but outside the capacitor element 20. Preferably, the through conductor 30S for signal transmission is disposed at a position on the outer periphery of the through conductor 30PD for power supply (Power / GND).

[0104] Preferably, in Figure 6 In the top view shown, if the conductor area of ​​the power supply (Power / GND) through conductor 30PD is set as Vp, the conductor area of ​​the power supply (GND) through conductor 30PD is set as Vd, and the conductor area of ​​the signal transmission (Signal) through conductor 30S is set as Vs, then Vp is greater than Vs and Vd is greater than Vs. That is, preferably, the relationship Vs < Vp and Vs < Vd is satisfied. In this case, it is more preferable that Vp and Vd are equal. Thus, it is also possible that when the power supply (GND) through conductor 30PD is disposed outside the capacitor element 20, the conductor area of ​​this part of the through conductor is larger.

[0105] exist Figure 5 and Figure 6 In the example shown, the conductor area is increased by increasing both the diameter and thickness of the through conductor.

[0106] Figure 7 It is magnification Figure 3 An example of a sectional view of part C.

[0107] like Figure 7 As shown, the capacitor element 20 includes, for example, a capacitor portion 70 and a sealing layer 80 disposed in such a way as to cover at least one main surface of the capacitor portion 70.

[0108] The capacitor section 70 includes: an anode plate 71 having a porous portion 71B on at least one main surface of a core portion 71A; a dielectric layer 73 disposed on the surface of the porous portion 71B; and a cathode layer 72 disposed on the surface of the dielectric layer 73. Thus, the capacitor section 70 constitutes an electrolytic capacitor. Figure 7 In the example shown, the anode plate 71 has a porous portion 71B on both main surfaces of the core 71A, but it is also possible that the porous portion 71B is only on either main surface of the core 71A.

[0109] The cathode layer 72 may include, for example, a solid electrolyte layer disposed on the surface of the dielectric layer 73. Preferably, the cathode layer 72 may also include a conductive layer disposed on the surface of the solid electrolyte layer. When the cathode layer 72 includes a solid electrolyte layer, the capacitor section 70 constitutes a solid electrolytic capacitor.

[0110] Alternatively, an insulating shielding layer 74 may be provided around the first through conductor 31 or the second through conductor 32 in at least one main surface of the anode plate 71.

[0111] Alternatively, an insulating shielding layer 75 may be provided on at least one main surface of the anode plate 71 in a manner that surrounds the cathode layer 72. By using the insulating shielding layer 75 to surround the cathode layer 72, insulation between the anode plate 71 and the cathode layer 72 is ensured, preventing short circuits between them.

[0112] Alternatively, the sealing layer 80 may cover any one of the main surfaces of the capacitor section 70 (in... Figure 7 It can be set in a way that is either the upper or lower surface, but preferably, as shown below. Figure 7 As shown, to cover the two main surfaces of the capacitor section 70 (in Figure 7 The capacitor section 70 is configured in a manner that includes both the upper and lower surfaces. A sealing layer 80 protects the capacitor section 70.

[0113] The sealing layer 80 may consist of a single layer or two or more layers. When the sealing layer 80 consists of two or more layers, the materials constituting each layer may be the same or different.

[0114] The sealing layer 80 is formed, for example, by hot-pressing an insulating resin sheet or by heat-curing an insulating resin slurry after coating it, in order to seal the capacitor portion 70.

[0115] When the first electrode 21 of the capacitor element 20 is electrically connected to the anode plate 71, the anode plate 71 is electrically connected to the first electrode 21, for example, via an anode through conductor 81 that passes through the capacitor element 20. On the other hand, when the second electrode 22 of the capacitor element 20 is electrically connected to the cathode layer 72, the cathode layer 72 is electrically connected to the second electrode 22, for example, via a cathode through conductor 82 that passes through the sealing layer 80.

[0116] Preferably, such as Figure 7 As shown, the core material 11 included in the core layer 10 is composed of an insulating material containing glass cloth 10c. By including glass cloth 10c in the core material 11, the overall rigidity of the substrate can be improved. The glass cloth 10c is made of glass fibers, for example, woven in a grid pattern.

[0117] The core material 11 containing glass cloth 10c is formed, for example, by using a prepreg made by pre-impregnating glass cloth with an insulating resin.

[0118] Similarly, when the core layer 10 includes an adhesive layer 12, it is preferable that the adhesive layer 12 is made of an insulating material containing glass cloth 10c. By including glass cloth 10c in the adhesive layer 12, the overall rigidity of the substrate can be improved.

[0119] The adhesive layer 12 containing glass cloth 10c is formed, for example, using a prepreg made by pre-impregnating glass cloth with an insulating resin.

[0120] In addition, when both the core material 11 and the adhesive layer 12 are made of an insulating material containing glass cloth 10c, the boundary between the core material 11 and the adhesive layer 12 may not be clearly visible.

[0121] Alternatively, electronic devices such as decoupling capacitors for noise mitigation, choke inductors, diodes for surge protection, and resistors for voltage division can be mounted on the capacitor's built-in substrate 1.

[0122] Furthermore, the technique of using the through conductor of the capacitor embedded substrate of the present invention is not limited to the electrolytic capacitor described herein, but can also be applied to other capacitors. For example, in a multilayer ceramic capacitor having a first electrode and a second electrode, the effects of the present invention can also be provided in a structure in which the first electrode and the second electrode are embedded in the interior of the substrate in a manner opposite in the thickness direction. Similarly, in the following embodiments, the type of capacitor is not limited to an electrolytic capacitor.

[0123] [Second Embodiment]

[0124] In the capacitor-embedded substrate of the second embodiment of the present invention, the same core material has multiple chambers, and capacitor elements are respectively built into the chambers.

[0125] Figure 8 This is a cross-sectional view schematically illustrating an example of a capacitor-embedded substrate according to the second embodiment of the present invention. Figure 3 Similarly, in Figure 8 In the diagram, the redistribution layer 13, load 50, power supply 55, and interface 60 are omitted. Figure 9 yes Figure 8 An example of an equivalent circuit block diagram of a capacitor-embedded substrate is shown. Figure 10 yes Figure 8 Another example of the equivalent circuit block diagram of the capacitor-embedded substrate shown.

[0126] exist Figure 8 In the capacitor-embedded substrate 2 shown, the same core material 11 has multiple chambers 11X, and capacitor elements 20 are respectively built into the chambers 11X.

[0127] exist Figure 8 In the capacitor built-in substrate 2 shown, as Figure 9 As shown, it can handle multi-phase power supplies. Alternatively, it can also be, as... Figure 10 As shown, a single substrate is used to supply power to multiple loads 50 (chips, etc.) mounted on the same substrate.

[0128] There is no particular limitation on the number of chambers 11X that the same core material 11 has, as long as there are two or more. The size, shape, etc. of the chambers 11X can be all the same, or partially or completely different.

[0129] The structures of the capacitor elements 20 built into each chamber 11X can be all the same or partially or completely different.

[0130] [Third Embodiment]

[0131] In the capacitor-embedded substrate of the third embodiment of the present invention, the core layer comprises multiple core materials in the thickness direction, and at least one core material has a cavity.

[0132] Figure 11 This is a cross-sectional view schematically illustrating an example of a capacitor-embedded substrate according to the third embodiment of the present invention. Figure 3 Similarly, in Figure 11 In the diagram, the redistribution layer 13, load 50, power supply 55, and interface 60 are omitted. Figure 12 yes Figure 11 An example of an equivalent circuit block diagram of a capacitor-embedded substrate is shown. Figure 12 The equivalent circuit block diagram shown is the same as Figure 2 The equivalent circuit block diagram shown is the same.

[0133] exist Figure 11 In the capacitor-embedded substrate 3 shown, the core layer 10 includes multiple core materials 11 in the thickness direction, and at least one core material 11 has a cavity 11X.

[0134] exist Figure 11 In the capacitor-embedded substrate 3 shown, compared to the case where a core material is included in the core layer 10, the overall rigidity of the substrate can be improved. In addition, substrate warping can be suppressed.

[0135] Furthermore, in Figure 11 The capacitor-embedded substrate 3 shown can suppress defects such as broken wires, short circuits, and solder cracks caused by pattern defects in the wiring of the rewiring layer 13.

[0136] The number of core material 11 layers included in the core layer 10 is not particularly limited as long as there are two or more layers. In addition, the number of core material 11 layers having the cavity 11X can be one or two or more layers. Preferably, an adhesive layer 12 is provided between the core material 11 layers.

[0137] In the case where two or more layers of core material 11 in a multilayer core material 11 have a cavity 11X, a capacitor element 20 is respectively built into the cavity 11X.

[0138] Alternatively, as in the second embodiment, the same core material 11 may have multiple chambers 11X. When there are two or more core material layers 11 having chambers 11X, the number of chambers 11X in each core material layer 11 may be all the same, or may be partially or completely different.

[0139] The structures of the capacitor elements 20 built into each chamber 11X can be all the same or partially or completely different.

[0140] [Fourth Embodiment]

[0141] In the capacitor-embedded substrate of the fourth embodiment of the present invention, a first capacitor element and a second capacitor element, which are respectively embedded in the chambers of core materials in different layers, are connected in parallel.

[0142] Figure 13 This is a cross-sectional view schematically illustrating an example of a capacitor-embedded substrate according to the fourth embodiment of the present invention. Figure 3 Similarly, in Figure 13 In the diagram, the redistribution layer 13, load 50, power supply 55, and interface 60 are omitted. Figure 14 yes Figure 13 An example of an equivalent circuit block diagram of a capacitor-embedded substrate is shown.

[0143] exist Figure 13In the capacitor-embedded substrate 4 shown, the capacitor element 20 includes a first capacitor element 20A and a second capacitor element 20B, which are respectively embedded in the chambers 11X of the core material 11 in different layers.

[0144] The first through conductor 31 is provided in a manner that passes through the first capacitor element 20A and is electrically connected to the first electrode 21 of the first capacitor element 20A, and is provided in a manner that passes through the second capacitor element 20B and is electrically connected to the first electrode 21 of the second capacitor element 20B, which has the same polarity as the first electrode 21 of the first capacitor element 20A.

[0145] The second through conductor 32 is provided in a manner that passes through the first capacitor element 20A and is electrically connected to the second electrode 22 of the first capacitor element 20A, and is provided in a manner that passes through the second capacitor element 20B and is electrically connected to the second electrode 22 of the second capacitor element 20B, which has the same polarity as the second electrode 22 of the first capacitor element 20A.

[0146] Based on the above structure, the first capacitor element 20A and the second capacitor element 20B are connected in parallel. The structures of the first capacitor element 20A and the second capacitor element 20B can be the same or different.

[0147] Figure 15 A is a schematic diagram illustrating an example of the relationship between frequency f and impedance |Z| when only the first capacitor element C1 is included. Figure 15 B is a schematic diagram illustrating an example of the relationship between frequency f and impedance |Z| in the case of a first capacitor element C1 and a second capacitor element C2 connected in parallel. Figure 15 C is a schematic diagram illustrating another example of the relationship between frequency f and impedance |Z| in the case of a first capacitor element C1 and a second capacitor element C2 connected in parallel.

[0148] exist Figure 13 In the capacitor built-in substrate 4 shown, as Figure 15 As shown in Figure B, when the resonant frequencies fr of the first capacitor element 20A and the second capacitor element 20B are the same or close, i.e., fr C1 ≒fr C2 In the case of, with Figure 15 Compared to A, it can further attenuate the impedance |Z| in this frequency band.

[0149] Or, such as Figure 15 As shown in Figure C, when the resonant frequencies fr of the first capacitor element 20A and the second capacitor element 20B are different (do not overlap), i.e., fr C1 ≠fr C2 In the case of, with Figure 15Compared to A, it can attenuate the impedance |Z| over a wider frequency band.

[0150] exist Figure 13 Although not shown, it is preferable that the capacitor element 20 with the higher resonant frequency fr of the first capacitor element 20A and the second capacitor element 20B is positioned closer to the load 50. In this case, the inductance L can be reduced.

[0151] It could also be, in Figure 13 The capacitor-embedded substrate 4 shown includes capacitor elements 20 other than the first capacitor element 20A and the second capacitor element 20B.

[0152] [Fifth Embodiment]

[0153] In the capacitor-embedded substrate of the fifth embodiment of the present invention, a first capacitor element and a second capacitor element, which are respectively embedded in the chambers of core materials in different layers, are connected in series.

[0154] Figure 16 This is a cross-sectional view schematically illustrating an example of a capacitor-embedded substrate according to the fifth embodiment of the present invention. Figure 3 Similarly, in Figure 16 In the diagram, the redistribution layer 13, load 50, power supply 55, and interface 60 are omitted. Figure 17 yes Figure 16 An example of an equivalent circuit block diagram of a capacitor-embedded substrate is shown.

[0155] exist Figure 16 In the capacitor-embedded substrate 5 shown, the capacitor element 20 includes a first capacitor element 20A and a second capacitor element 20B, which are respectively embedded in the chambers 11X of the core material 11 in different layers.

[0156] The through conductor 30 also includes a fourth through conductor 34 disposed in such a manner that it penetrates the capacitor element 20 within the core layer 10 at a position separate from the first through conductor 31 and the second through conductor 32.

[0157] The first through conductor 31 is arranged to pass through the first capacitor element 20A and is electrically connected to the first electrode 21 of the first capacitor element 20A. It is also arranged to pass through the second capacitor element 20B and is neither electrically connected to the first electrode 21 of the second capacitor element 20B, whose polarity is the same as that of the first electrode 21 of the first capacitor element 20A, nor to the second electrode 22 of the second capacitor element 20B, whose polarity is the same as that of the second electrode 22 of the first capacitor element 20A.

[0158] The second through conductor 32 is provided to pass through the first capacitor element 20A and is electrically connected to the second electrode 22 of the first capacitor element 20A, and is provided to pass through the second capacitor element 20B and is electrically connected to the first electrode 21 of the second capacitor element 20B.

[0159] The fourth through conductor 34 is arranged to pass through the first capacitor element 20A and is neither electrically connected to the first electrode 21 of the first capacitor element 20A nor to the second electrode 22 of the first capacitor element 20A, and is arranged to pass through the second capacitor element 20B and is electrically connected to the second electrode 22 of the second capacitor element 20B.

[0160] Based on the above structure, the first capacitor element 20A and the second capacitor element 20B are connected in series. The structures of the first capacitor element 20A and the second capacitor element 20B can be the same or different from each other.

[0161] exist Figure 16 In the capacitor-embedded substrate 5 shown, the capacitor element 20A and the capacitor element 20B are connected in series, which can increase the voltage withstand capability of the capacitor element 20.

[0162] It could also be, in Figure 16 The capacitor-embedded substrate 5 shown includes capacitor elements 20 other than the first capacitor element 20A and the second capacitor element 20B.

[0163] [Sixth Implementation]

[0164] In the capacitor-embedded substrate of the sixth embodiment of the present invention, a plurality of capacitor elements are embedded in the same core material cavity in the thickness direction.

[0165] Figure 18 This is a cross-sectional view schematically illustrating an example of a capacitor-embedded substrate according to the sixth embodiment of the present invention. Figure 3 Similarly, in Figure 18 In the diagram, the redistribution layer 13, load 50, power supply 55, and interface 60 are omitted.

[0166] exist Figure 18 In the capacitor-embedded substrate 6 shown, multiple capacitor elements 20 are embedded in the cavity 11X of the same core material 11 in the thickness direction.

[0167] There is no particular limitation on the number of capacitor elements 20 built into the chamber 11X of the same core material 11, as long as there are two or more.

[0168] The structure of the capacitor element 20 built into the chamber 11X can be entirely the same or partially or entirely different.

[0169] Figure 19 It is a schematic representation of something used in manufacturing. Figure 18 A cross-sectional view of an example of a capacitor element stack with a built-in capacitor substrate shown.

[0170] like Figure 19 As shown, a capacitor element laminate 120, formed by integrally stacking multiple capacitor elements 20 with an adhesive layer 110 in between, is disposed in the chamber 11X, enabling the manufacture of... Figure 18 The capacitor's built-in substrate 6 is shown.

[0171] In use Figure 19 In the method of the capacitor element stack 120 shown, it is not necessary to divide the core material 11, so it is possible to manufacture a capacitor-embedded substrate 6 with high overall rigidity of the substrate. In addition, by using the capacitor element stack 120, the process of placing one capacitor element 20 in each of the chambers 11X can be reduced.

[0172] Preferably, the capacitor-embedded substrate of the present invention is manufactured by the following method.

[0173] Figure 20 This is a cross-sectional view schematically illustrating an example of the process of forming the first wiring layer in the core material.

[0174] exist Figure 20 In the middle, a first wiring layer 41 is formed in a predetermined area of ​​the core material 11.

[0175] For example, by patterning the conductor foil, such as copper foil, which is pasted on both sides of the core material 11 into a predetermined shape, the first wiring layer 41 can be formed.

[0176] Figure 21 This is a cross-sectional view schematically illustrating an example of the process of forming a cavity in the core material.

[0177] exist Figure 21 In the middle, a cavity 11X is formed that penetrates the part of the core material 11 that has not yet formed the first wiring layer 41.

[0178] Figure 22 This is a cross-sectional view schematically illustrating an example of the process of arranging capacitor elements in the cavity of the core material.

[0179] exist Figure 22 In this case, a capacitor element 20 is disposed on the support substrate 130 in the cavity 11X of the core material 11.

[0180] Figure 23 This is a cross-sectional view schematically illustrating an example of the process of performing the first resin sealing.

[0181] exist Figure 23 In this process, an adhesive layer 12 is formed by sealing the core material 11 and the capacitor element 20 with resin.

[0182] For example, an adhesive layer 12 can be formed by laminating prepreg on one main surface of the core material 11 from the side opposite to the support substrate 130. Then, a conductor foil 140, such as a copper foil, is laminated on the surface of the adhesive layer 12.

[0183] Figure 24 This is a cross-sectional view schematically illustrating an example of the process of making the core.

[0184] exist Figure 24 In the middle, the support substrate 130 is removed. Thus, the core 210 is manufactured.

[0185] Figure 25 This is a cross-sectional view schematically illustrating an example of the process of stacking cores.

[0186] For example, in forming a core layer 10 comprising multiple core materials 11 (refer to...) Figure 26 In the case of ), such as Figure 25 As shown, the core 210 is stacked with the main surfaces of the side without conductor foil 140 facing each other.

[0187] On the other hand, when forming a core layer 10 that includes a core material 11, a prepreg is laminated on the main surface of the side where the conductor foil 140 is not provided to form an adhesive layer, and then a conductor foil such as a copper foil is laminated.

[0188] Figure 26 This is a cross-sectional view schematically illustrating an example of the process of forming the core layer.

[0189] exist Figure 26 For example, the core 210 is bonded together with a prepreg to form a core layer 10.

[0190] Figure 27 This is a cross-sectional view schematically illustrating an example of the process of forming a through hole in the core layer.

[0191] exist Figure 27 In the middle, a through hole 230 is formed that penetrates the core layer 10.

[0192] For example, through-holes 230 are formed in the thickness direction by drilling or other processing. Figure 27 As shown, it is assumed that there is an insulating material between the inner wall surface of the through hole 230 of the capacitor element 20 and the capacitor element 20.

[0193] Figure 28 This is a cross-sectional view schematically illustrating an example of the process of forming a through conductor.

[0194] exist Figure 28In the process, a through conductor 30 is formed on the inner wall surface of the through hole 230.

[0195] For example, a through-hole conductor 30 can be formed by metallizing the inner wall surface of the through-hole 230 with a low-resistivity metal such as copper, gold, or silver. When forming the through-hole conductor 30, processing becomes easier by metallizing the inner wall surface of the through-hole 230, for example, using electroless copper plating or electrolytic copper plating. Furthermore, regarding the method of forming the through-hole conductor 30, in addition to metallizing the inner wall surface of the through-hole 230, it is also possible to fill the through-hole 230 with a metal or a metal-resin composite material.

[0196] like Figure 28 As shown, a resin-filled portion 45 can also be formed inside the conductor 30 by filling with resin material. Alternatively, it is preferable to use a conductor foil 140 (see reference 140) to fill the inner side of the conductor 30. Figure 27 Patterned into a predetermined shape to form the second wiring layer 42.

[0197] Figure 29 This is a cross-sectional view schematically illustrating an example of the process of performing the second resin sealing.

[0198] exist Figure 29 In this process, an insulating layer 14 is formed on at least one main surface of the core layer 10 by sealing it with resin in a manner that covers the core layer 10.

[0199] Figure 30 This is a cross-sectional view schematically illustrating an example of the process of forming conductive paths and wiring.

[0200] exist Figure 30 In the insulating layer 14, a conductive conductor 16 and a wiring 15 are formed. Thus, a rewiring layer 13 is formed.

[0201] Based on the above method, a capacitor-embedded substrate 100 is fabricated.

[0202] exist Figure 30 In the capacitor-embedded substrate 100 shown, the portion indicated by II corresponds to the capacitor-embedded substrate 2, the portion indicated by IV corresponds to the capacitor-embedded substrate 4, and the portion indicated by V corresponds to the capacitor-embedded substrate 5.

[0203] Furthermore, either the capacitor-embedded substrate 1 or the capacitor-embedded substrate 3 can be manufactured using the same method as the portion indicated by IV. Additionally, the capacitor-embedded substrate 6 can be used... Figure 19 The capacitor element stack 120 shown is manufactured using the same method as described above.

[0204] The capacitor-embedded substrate of the present invention is not limited to the above-described embodiments. Various applications and modifications can be applied within the scope of the present invention, including the structure of the capacitor element or wiring substrate and the manufacturing conditions of the capacitor-embedded substrate.

[0205] For example, multiple capacitor elements can be built into a chamber in the planar direction.

[0206] The detailed structure of capacitor element 20 will be described below.

[0207] Inside the sealing layer 80, either one capacitor section 70 or multiple capacitor sections 70 can be disposed. When multiple capacitor sections 70 are disposed inside the sealing layer 80, it is preferable that adjacent capacitor sections 70 are separated from each other by a through groove extending through the capacitor section 70 in the thickness direction. In this case, it is preferable that the through groove is filled with an insulating material such as the sealing layer 80.

[0208] When adjacent capacitor sections 70 are disconnected from each other by through slots, the adjacent capacitor sections 70 can be physically disconnected from each other by through slots. Therefore, adjacent capacitor sections 70 can be electrically disconnected or electrically connected to each other. The width of the through slot, i.e., the spacing between adjacent capacitor sections 70, can be constant in the thickness direction or decrease in the thickness direction.

[0209] When multiple capacitor sections 70 are arranged inside the sealing layer 80, the multiple capacitor sections 70 can be arranged in a plane direction orthogonal to the thickness direction, stacked in the thickness direction, or a combination of both. The multiple capacitor sections 70 can be arranged regularly or irregularly. The size and shape of the capacitor sections 70 can be the same or partially or completely different. Preferably, the capacitor sections 70 have the same structure, but it is also possible to include capacitor sections 70 with different structures.

[0210] The planar shape of the capacitor section 70 when viewed from the thickness direction can be, for example, a rectangle (square or rectangular), a quadrilateral other than a rectangle, a triangle, a pentagon, a hexagon or other polygon, a circle, an ellipse, or a combination of these shapes. In addition, the planar shape of the capacitor section 70 can also be L-shaped, C-shaped, or stepped.

[0211] Preferably, the anode plate 71 is made of a valve-acting metal that performs a valve function. Examples of valve-acting metals include individual metals such as aluminum, tantalum, niobium, titanium, and zirconium, or alloys containing at least one of these metals. Among these, aluminum or an aluminum alloy is preferred.

[0212] The anode plate 71 is preferably flat, and more preferably foil-shaped. Thus, in this specification, "plate-shaped" also includes "foil-shaped".

[0213] The anode plate 71 only needs to have a porous portion 71B on at least one main surface of the core 71A. That is, the anode plate 71 may have a porous portion 71B on only one main surface of the core 71A, or it may have a porous portion 71B on both main surfaces of the core 71A. The porous portion 71B is preferably a porous layer formed on the surface of the core 71A, and more preferably an etched layer.

[0214] The thickness of the anode plate 71 before etching is preferably 60 μm or more and 200 μm or less. The thickness of the unetched core 71A after etching is preferably 15 μm or more and 70 μm or less. The thickness of the porous portion 71B is designed to match the required voltage withstand and electrostatic capacitance, but preferably, the total thickness of the porous portions 71B on both sides of the core 71A is 10 μm or more and 180 μm or less.

[0215] The pore size of the porous portion 71B is preferably 10 nm or more and 600 nm or less. Furthermore, the pore size of the porous portion 71B refers to the median diameter D50 measured using a mercury porosimeter. The pore size of the porous portion 71B can be controlled, for example, by adjusting various etching conditions.

[0216] The dielectric layer 73 provided on the surface of the porous portion 71B reflects the surface state of the porous portion 71B and becomes porous, having a finely textured surface shape. Preferably, the dielectric layer 73 is composed of an oxide film of the aforementioned valve-acting metal. For example, when using aluminum foil as the anode plate 71, the dielectric layer 73 composed of an oxide film can be formed by anodizing the surface of the aluminum foil in an aqueous solution containing ammonium adipate or the like (also known as a chemical formation process).

[0217] The thickness of dielectric layer 73 is designed to match the required voltage withstand and electrostatic capacitance, but preferably is above 10 nm and below 100 nm.

[0218] When the cathode layer 72 includes a solid electrolyte layer, conductive polymers such as polypyrrole, polythiophene, and polyaniline can be used as materials constituting the solid electrolyte layer. Among these, polythiophene is preferred, and poly(3,4-ethylenedioxythiophene) known as PEDOT is particularly preferred. Furthermore, the aforementioned conductive polymers may also contain dopants such as polystyrene sulfonic acid (PSS). Moreover, it is preferable that the solid electrolyte layer includes an inner layer filling the pores (recesses) of the dielectric layer 73 and an outer layer covering the dielectric layer 73.

[0219] The thickness of the solid electrolyte layer from the surface of the porous portion 71B is preferably 2 μm or more and 20 μm or less.

[0220] The solid electrolyte layer can be formed, for example, by forming a polymer film such as poly(3,4-ethylenedioxythiophene) on the surface of the dielectric layer 73 using a treatment solution containing monomers such as 3,4-ethylenedioxythiophene, or by coating a dispersion of polymers such as poly(3,4-ethylenedioxythiophene) onto the surface of the dielectric layer 73 and drying it.

[0221] The solid electrolyte layer can be formed in a predetermined area by applying the above-mentioned treatment liquid or dispersion to the surface of the dielectric layer 73 using methods such as sponge transfer, screen printing, distributor coating, inkjet printing, etc.

[0222] When the cathode layer 72 includes a conductive layer, the conductive layer comprises at least one of a conductive resin layer and a metal layer. The conductive layer may be either a conductive resin layer or a metal layer. Preferably, the conductive layer covers the entire surface of the solid electrolyte layer.

[0223] Examples of conductive resin layers include conductive adhesive layers comprising at least one conductive filler selected from the group consisting of silver filler, copper filler, nickel filler, and carbon filler.

[0224] Examples of metal layers include metal coatings and metal foils. Preferably, the metal layer is composed of at least one metal selected from the group consisting of nickel, copper, silver, and alloys of these metals as the main components. Furthermore, "main component" refers to the element with the largest weight percentage.

[0225] The conductive layer may include, for example, a carbon layer disposed on the surface of the solid electrolyte layer and a copper layer disposed on the surface of the carbon layer.

[0226] The carbon layer is provided to enable electrical and mechanical connection between the solid electrolyte layer and the copper layer. The carbon layer can be formed in a predetermined area by applying carbon paste to the surface of the solid electrolyte layer using methods such as sponge transfer, screen printing, dispenser coating, or inkjet printing. The thickness of the carbon layer is preferably 2µm or more and 20µm or less.

[0227] The copper layer can be formed in a predetermined area by applying copper paste to the surface of the carbon layer using methods such as sponge transfer, screen printing, spray coating, dispenser coating, and inkjet printing. The thickness of the copper layer is preferably 2µm or more and 20µm or less.

[0228] The insulating shielding layer 74 and the insulating shielding layer 75 are made of insulating material. In this case, it is preferable that the insulating shielding layer 74 and the insulating shielding layer 75 contain insulating resin.

[0229] Insulating resins contained in insulating shielding layers 74 and 75 include, for example, polyphenylene sulfone resin, polyether sulfone resin, cyanate ester resin, fluoropolymer (tetrafluoroethylene, tetrafluoroethylene-perfluoroalkyl vinyl ether copolymer, etc.), polyimide resin, polyamide-imide resin, epoxy resin, and their derivatives or precursors.

[0230] The insulating shielding layer 74 and the insulating shielding layer 75 may also be made of the same resin as the sealing layer 80. If the insulating shielding layer 74 and the insulating shielding layer 75 contain inorganic fillers different from the sealing layer 80, it may have an adverse effect on the effective capacitance of the capacitor section 70. Therefore, it is preferable that the insulating shielding layer 74 and the insulating shielding layer 75 are made of a separate type of resin.

[0231] Insulating shielding layer 74 and insulating shielding layer 75 can be formed in a predetermined area by applying a shielding material such as a composition containing insulating resin to the surface of porous part 71B using methods such as sponge transfer, screen printing, dispenser coating, inkjet printing, etc.

[0232] The insulating shielding layer 74 and the insulating shielding layer 75 can be formed in the porous portion 71B either before or after the dielectric layer 73.

[0233] The sealing layer 80 is made of an insulating material. In this case, it is preferable that the sealing layer 80 contains an insulating resin.

[0234] Insulating resins contained in the sealing layer 80 include, for example, epoxy resin and phenolic resin.

[0235] Preferably, the sealing layer 80 also contains fillers such as inorganic fillers.

[0236] Inorganic fillers contained in the sealing layer 80 include, for example, silica particles and alumina particles.

[0237] Alternatively, a stress-relieving layer, a moisture-proof film, or other layer may be provided between the capacitor section 70 and the sealing layer 80.

[0238] Preferably, the anode through conductor 81 is electrically connected to the wall surface of the anode plate 71 exposed in the through hole where the anode through conductor 81 is provided. In other words, preferably, the anode through conductor 81 is electrically connected to the anode plate 71 on the inner wall surface of the through hole where the anode through conductor 81 is provided.

[0239] Alternatively, the anode through conductor 81 can be electrically connected to the wall of the anode plate 71 via the anode connecting layer. In this case, the anode connecting layer functions as a barrier layer against the anode plate 71, and more specifically, as a barrier layer against the core 71A and the porous portion 71B. If the anode connecting layer functions as a barrier layer against the anode plate 71, the dissolution of the anode plate 71 during the chemical treatment used to form the wiring layer is suppressed, and the penetration of the chemical solution into the capacitor portion 70 is suppressed, thus improving reliability.

[0240] Preferably, the anode bonding layer comprises a metal layer with nickel as the main component. In this case, damage to the metal constituting the anode plate 71 (e.g., aluminum) is reduced, and thus the barrier properties of the anode bonding layer against the anode plate 71 are easily improved.

[0241] For example, after zincate treatment of the wall surface of the anode plate 71 made of aluminum or aluminum alloy, electroless nickel plating can be performed to form an anode bonding layer containing a metal layer with nickel as the main component. Alternatively, the anode bonding layer may sequentially contain a metal layer with zinc as the main component and a metal layer with nickel as the main component, starting from the anode plate 71.

[0242] In addition, the anode through conductor 81 can also be directly connected to the wall of the anode plate 71 without passing through the anode connection layer.

[0243] As a constituent material of the cathode conductor 82, examples include metallic materials containing low-resistance metals such as silver, gold, and copper.

[0244] The cathode conductor 82 is formed, for example, by plating the inner wall surface with the aforementioned metal material through a through hole penetrating the sealing layer 80 in the thickness direction, or by heat treatment after filling with a conductive paste.

[0245] The following information is disclosed in this specification.

[0246] <1>

[0247] A capacitor-embedded substrate includes: a core layer comprising at least one core material having a cavity in the thickness direction; a capacitor element embedded in the cavity of the core material; and a through conductor disposed in the thickness direction through the core layer, the through conductor comprising: a first through conductor disposed in the core layer through the capacitor element for electrical connection to a load and a power source; and a second through conductor disposed in the core layer through the capacitor element at a position separate from the first through conductor for electrical connection to the load and the power source, the first through conductor being electrically connected to a first electrode of the capacitor element, and the second through conductor being electrically connected to a second electrode of the capacitor element with a polarity different from the first electrode.

[0248] <2>

[0249] According to the capacitor built-in substrate described in <1>, the through conductor further includes a third through conductor, which is arranged in such a way that it does not penetrate the capacitor element in the core layer but penetrates the core material, and is used for electrical connection with the interface and the load.

[0250] <3>

[0251] According to the capacitor-embedded substrate described in <2>, the core layer has a first main surface and a second main surface opposite to each other in the thickness direction. The ends of the first through conductor and the second through conductor on the first main surface side are electrically connected to the load, and the ends on the second main surface side are electrically connected to the power supply. The end of the third through conductor on the first main surface side is electrically connected to the load, and the end on the second main surface side is electrically connected to the interface.

[0252] <4>

[0253] According to the capacitor built-in substrate described in <3>, when viewed from above in the thickness direction, the third through conductor is positioned on the outer periphery side of the first through conductor and the second through conductor.

[0254] <5>

[0255] According to <1>, the capacitor-embedded substrate has a first main surface and a second main surface opposite to each other in the thickness direction. The ends of the first through conductor and the second through conductor on the first main surface side are electrically connected to the load, and the ends on the second main surface side are electrically connected to the power supply.

[0256] <6>

[0257] According to any one of <3> to <5>, the capacitor built-in substrate is wherein the first through conductor and the second through conductor are electrically connected to the load directly below the load.

[0258] <7>

[0259] According to any one of <1> to <6>, the capacitor-embedded substrate has a plurality of the aforementioned chambers in the same core material layer, and the aforementioned capacitor element is embedded in each of the aforementioned chambers.

[0260] <8>

[0261] According to any one of <1> to <7>, the capacitor built-in substrate comprises multiple layers of the core material in the thickness direction, and at least one layer of the core material has the cavity.

[0262] <9>

[0263] According to <8>, in the capacitor built-in substrate, two or more of the aforementioned multilayer core materials have the aforementioned chambers, and the aforementioned capacitor elements are respectively built into the aforementioned chambers.

[0264] <10>

[0265] According to the capacitor-embedded substrate described in <9>, the capacitor element includes a first capacitor element and a second capacitor element, which are respectively embedded in the chambers of the core material in different layers. The first through conductor is provided to penetrate the first capacitor element and is electrically connected to the first electrode of the first capacitor element. It is also provided to penetrate the second capacitor element and is electrically connected to the first electrode of the second capacitor element, which has the same polarity as the first electrode of the first capacitor element. The second through conductor is provided to penetrate the first capacitor element and is electrically connected to the second electrode of the first capacitor element. It is also provided to penetrate the second capacitor element and is electrically connected to the second electrode of the second capacitor element, which has the same polarity as the second electrode of the first capacitor element.

[0266] <11>

[0267] According to the capacitor-embedded substrate described in <9>, the capacitor element comprises a first capacitor element and a second capacitor element respectively embedded in the chambers of the core material in different layers. The through conductor further comprises a fourth through conductor, which is arranged to penetrate the capacitor element in the core layer at a position separate from the first and second through conductors. The first through conductor is arranged to penetrate the first capacitor element and is electrically connected to the first electrode of the first capacitor element, and is arranged to penetrate the second capacitor element but is not electrically connected to the first electrode of the second capacitor element whose polarity is the same as that of the first electrode of the first capacitor element. The second through conductor is not electrically connected to the second electrode of the first capacitor element, which has the same polarity as the second electrode of the first capacitor element. The second through conductor is provided in a manner that passes through the first capacitor element and is electrically connected to the second electrode of the first capacitor element, and is also provided in a manner that passes through the second capacitor element and is electrically connected to the first electrode of the second capacitor element. The fourth through conductor is provided in a manner that passes through the first capacitor element and is neither electrically connected to the first electrode of the first capacitor element nor to the second electrode of the first capacitor element, and is also provided in a manner that passes through the second capacitor element and is electrically connected to the second electrode of the second capacitor element.

[0268] <12>

[0269] According to any one of <1> to <11>, a capacitor-embedded substrate is provided, wherein a plurality of the capacitor elements are embedded in the cavity of the same core material in the thickness direction.

[0270] <13>

[0271] According to any one of <1> to <12>, the capacitor built-in substrate includes a capacitor portion and a sealing layer disposed in such a way as to cover at least one main surface of the capacitor portion. The capacitor portion includes: an anode plate having a porous portion on at least one main surface of the core; a dielectric layer disposed on the surface of the porous portion; and a cathode layer disposed on the surface of the dielectric layer.

[0272] Explanation of reference numerals in the attached figures

[0273] 1, 1A, 2, 3, 4, 5, 6, Capacitor embedded substrate; 10, Core layer; 10a, First main surface; 10b, Second main surface; 10c, Glass cloth; 11, Core material; 11X, Chamber; 12, Adhesive layer; 13, Rewiring layer; 14, Insulating layer; 15, Wiring; 16, Conductor; 20, Capacitor element; 20A, First capacitor element; 20B, Second capacitor element; 21, First electrode; 22, First electrode; 30, 30PD, 30S, Through conductor; 31, First through conductor; 32, Second through conductor; 33, Third through conductor; 34 41. 41. 42. 43. 44. 45. 46. 47. 48. 49. 40. 51. 52. 53. 54. 55. 60. 61. 62. 63. 74. 75. 66. 70. 71. 72. 73. 74. 75. 76. 77. 78. 79. 70. 71. 72. 73. 74. 75. 76 ...9. 70. 71. 72. 79. 70. 71. 71. 72. 79. 70. 71. 71. 72. 79. 70. 71. 71. 72. 79

Claims

1. A capacitor-embedded substrate, wherein, The capacitor's built-in substrate includes: A core layer comprising at least one core material having a cavity in the thickness direction; A capacitor element, which is embedded in the cavity of the core material; and A through conductor, which is arranged to penetrate the core layer in the thickness direction. The through conductor includes: a first through conductor disposed through the capacitor element within the core layer for electrical connection to a load and a power source; and a second through conductor disposed at a location separate from the first through conductor for electrical connection to the capacitor element within the core layer for electrical connection to the load and the power source. The first through conductor is electrically connected to the first electrode of the capacitor element. The second through conductor is electrically connected to the second electrode of the capacitor element, which has a polarity different from that of the first electrode.

2. The capacitor-embedded substrate according to claim 1, wherein, The through conductor further includes a third through conductor, which is arranged in such a way that it does not penetrate the capacitor element within the core layer but penetrates the core material, for electrical connection with the interface and the load.

3. The capacitor-embedded substrate according to claim 2, wherein, The core layer has a first principal surface and a second principal surface opposite each other in the thickness direction. The first through conductor and the second through conductor are electrically connected to the load at their ends on the first main surface side, and electrically connected to the power supply at their ends on the second main surface side. The third through conductor is electrically connected to the load at its end on the first main surface side and to the interface at its end on the second main surface side.

4. The capacitor-embedded substrate according to claim 3, wherein, When viewed from above in the thickness direction, the third through conductor is positioned on the outer periphery side compared to the first through conductor and the second through conductor.

5. The capacitor-embedded substrate according to claim 1, wherein, The core layer has a first main surface and a second main surface opposite each other in the thickness direction. The first through conductor and the second through conductor are electrically connected to the load at their ends on the first main surface side and to the power supply at their ends on the second main surface side.

6. The capacitor-embedded substrate according to any one of claims 3 to 5, wherein, The first through conductor and the second through conductor are electrically connected to the load directly below the load.

7. The capacitor-embedded substrate according to any one of claims 1 to 6, wherein, The core material in the same layer has multiple chambers. The capacitor elements are respectively built into the chambers.

8. The capacitor-embedded substrate according to any one of claims 1 to 7, wherein, The core layer comprises multiple layers of the core material in the thickness direction. At least one layer of the core material has the cavity.

9. The capacitor-embedded substrate according to claim 8, wherein, Two or more of the multilayer core materials have the cavity. The capacitor elements are respectively built into the chambers.

10. The capacitor-embedded substrate according to claim 9, wherein, The capacitor element comprises a first capacitor element and a second capacitor element, respectively embedded in the chambers of the core material in different layers. The first through conductor is disposed through the first capacitor element and electrically connected to the first electrode of the first capacitor element, and is disposed through the second capacitor element and electrically connected to the first electrode of the second capacitor element whose polarity is the same as that of the first electrode of the first capacitor element. The second through conductor is disposed through the first capacitor element and electrically connected to the second electrode of the first capacitor element, and is disposed through the second capacitor element and electrically connected to the second electrode of the second capacitor element, the polarity of which is the same as that of the second electrode of the first capacitor element.

11. The capacitor-embedded substrate according to claim 9, wherein, The capacitor element comprises a first capacitor element and a second capacitor element, respectively embedded in the chambers of the core material in different layers. The through conductor further includes a fourth through conductor, which is arranged to penetrate the capacitor element within the core layer at a location separate from the first and second through conductors. The first through conductor is disposed through the first capacitor element and electrically connected to the first electrode of the first capacitor element, and is disposed through the second capacitor element but is neither electrically connected to the first electrode of the second capacitor element (whose polarity is the same as that of the first electrode of the first capacitor element) nor to the second electrode of the second capacitor element (whose polarity is the same as that of the second electrode of the first capacitor element). The second through conductor is disposed through the first capacitor element and electrically connected to the second electrode of the first capacitor element, and is disposed through the second capacitor element and electrically connected to the first electrode of the second capacitor element. The fourth through conductor is arranged to pass through the first capacitor element and is neither electrically connected to the first electrode of the first capacitor element nor to the second electrode of the first capacitor element, and is arranged to pass through the second capacitor element and is electrically connected to the second electrode of the second capacitor element.

12. The capacitor-embedded substrate according to any one of claims 1 to 11, wherein, In the thickness direction, a plurality of capacitor elements are embedded in the cavity of the same layer of core material.

13. The capacitor-embedded substrate according to any one of claims 1 to 12, wherein, The capacitor element includes a capacitor portion and a sealing layer disposed in such a manner as to cover at least one main surface of the capacitor portion. The capacitor section includes: an anode plate having a porous portion on at least one main surface of the core; a dielectric layer disposed on the surface of the porous portion; and a cathode layer disposed on the surface of the dielectric layer.

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