Surge protection system of intelligent power module

Abstract

The invention relates to the technical field of integrated chip surge protection, in particular to a surge protection system of an intelligent power module, and the intelligent power module is integrated with an IGBT, an IC-SBD, an inverter bridge unit and a bypass diode D1. The positive output end of the rectifier bridge is electrically connected with the collector electrode of the IGBT through an inductor L, the collector electrode of the IGBT is electrically connected with the anode of the IC-SBD, the cathode of the IC-SBD is electrically connected with the power supply end of the inverter bridge unit, the negative output end of the rectifier bridge is electrically connected with the ground end of the inverter bridge unit through a resistor R, and at least one capacitor C1 is connected in parallel between the power supply end and the ground end of the inverter bridge unit; the common connection point of the positive output end of the rectifier bridge and the inductor L is electrically connected with the anode of the bypass diode D1. The cathode of the bypass diode D1 is electrically connected with the power supply end of the inverter bridge unit. The problem that an intelligent power module cannot adapt to a high-carrier-frequency application environment due to the fact that an SIC-FRD cannot bear surge impact is solved.

Description

Technical Field

[0001] This invention relates to the field of integrated chip surge protection technology, and in particular to a surge protection system for an intelligent power module. Background Technology

[0002] For variable frequency electrical appliance power supply systems, a single-phase rectifier bridge is commonly used to rectify the DC voltage. A power factor correction (PFC) circuit then synchronizes the phase of the grid-side voltage and current, while simultaneously boosting the voltage to meet the demands of the downstream loads. Finally, an inverter bridge IPM module inverts the DC voltage to obtain an output voltage with adjustable amplitude and frequency to control downstream loads (such as compressors and fans). For example, household appliances require smaller size and higher power density; therefore, the frequency converters used are increasingly employing more integrated intelligent power integrated modules (the intelligent power module integrates the IGBT / SiC-FRD of the PFC section, the inverter bridge IPM module, and the driver ICs for power devices), and the PFC module is being extended towards higher carrier frequencies.

[0003] However, after the PFC module increases the carrier frequency, the surge generated by the connection circuit between the intelligent power module and the rectifier bridge will also increase (the surge direction is as follows). Figure 1 As shown by the middle arrow, the SiC-FRD (silicon carbide-based fast recovery diode) integrated in the intelligent power module is a single-carrier device with poor surge resistance and cannot withstand larger surge impacts, thus making the intelligent power module unsuitable for high carrier frequency application environments. Summary of the Invention

[0004] To address the aforementioned shortcomings, the present invention aims to propose a surge protection system for intelligent power modules, which solves the problem that intelligent power modules cannot adapt to high carrier frequency application environments because their SiC-FRD cannot withstand surge impacts.

[0005] To achieve this objective, the present invention adopts the following technical solution: A surge protection system for an intelligent power module includes a rectifier bridge, a resistor R, an inductor L, an intelligent power module, and a capacitor C1. The intelligent power module integrates an IGBT, a SiC-SBD, an inverter bridge unit, and a bypass diode D1. The positive output terminal of the rectifier bridge is electrically connected to the collector of the IGBT via the inductor L. The collector of the IGBT is electrically connected to the anode of the SiC-SBD. The cathode of the SiC-SBD is electrically connected to the power supply terminal of the inverter bridge unit. The negative output terminal of the rectifier bridge is electrically connected to the ground terminal of the inverter bridge unit via the resistor R. At least one capacitor C1 is connected in parallel between the power supply terminal and the ground terminal of the inverter bridge unit. The positive output terminal of the rectifier bridge and the common junction of the inductor L are electrically connected to the anode of the bypass diode D1, and the cathode of the bypass diode D1 is electrically connected to the power supply terminal of the inverter bridge unit.

[0006] Furthermore, it also includes a PFC control unit, a current sampling unit, and an inverter bridge drive unit; the drive terminal of the inverter bridge drive unit is electrically connected to the inverter bridge unit. The power supply terminal of the inverter bridge unit is electrically connected to the first input terminal of the PFC control unit via a resistor voltage divider detection circuit, and is also electrically connected to the feedback terminal of the inverter bridge drive unit, for transmitting the actual bus voltage Vdc to the PFC control unit and the inverter bridge drive unit respectively; the feedback terminal of the inverter bridge drive unit is electrically connected to the second input terminal of the PFC control unit, for transmitting the target bus voltage Vdc_ref to the PFC control unit. The input terminal of the current sampling unit is electrically connected to the common junction of the negative output terminal of the rectifier bridge and the resistor R, and the output terminal of the current sampling unit is electrically connected to the third input terminal of the PFC control unit. The current sampling unit is used to sample the output current I of the rectifier bridge. bd Transmitted to the PFC control unit; The output terminal of the PFC control unit is electrically connected to the gate of the IGBT; The PFC control unit calculates the actual bus voltage Vdc, the target bus voltage Vdc_ref, and the rectifier bridge output current I. bd The control signal PFCIN of the IGBT is obtained.

[0007] Furthermore, the duty cycle value (Duty) of the control signal PECIN is: Duty = 1 - I bd / (I bd_ave ×Ka); Among them, I bd_ave The output current I of the rectifier bridge bd The average value; Ka is the difference between the actual bus voltage Vdc and the target bus voltage Vdc_ref, and the boost ratio obtained by the PI regulator; The PFC control unit compares the duty cycle value Duty with a preset carrier signal; when the duty cycle value Duty is greater than the carrier signal, the control signal PFCIN is set to low level; when the duty cycle value Duty is less than or equal to the carrier signal, the control signal PFCIN is set to high level.

[0008] Furthermore, the current sampling unit includes a sampling trigger K1 and a logic circuit 41; the input and output terminals of the sampling trigger K1 are respectively used as the input and output terminals of the current sampling unit; the first feedback terminal and the second feedback terminal of the PFC control unit are electrically connected to the first input terminal and the second input terminal of the logic circuit, respectively, for transmitting the duty cycle value Duty and the carrier signal to the logic circuit. The output terminal of the logic circuit is electrically connected to the control terminal of the sampling trigger K1; the logic circuit is used to control the sampling trigger K1 to trigger sampling at the midpoint of the time when the control signal PFCIN is high, and to control the sampling trigger K1 to trigger sampling at the midpoint of the time when the control signal PFCIN is low, according to the duty cycle value Duty and the carrier signal.

[0009] Furthermore, the logic circuit includes an OR gate (OR1), an AND gate (AND1), an AND gate (AND2), a NOT gate (N1), a comparator (U1), a comparator (U2), a comparator (U3), a 1 / 2 proportional amplifier (U4), and an adder (U5); the negative input terminal of the comparator (U1) is used as the first input terminal of the logic circuit, the positive input terminal of the comparator (U2) is used as the second input terminal of the logic circuit, and the output terminal of the OR gate (OR1) is used as the output terminal of the logic circuit. The positive input terminal of the comparator U1 is connected to a half-level signal. The negative input terminal of the comparator U1 is electrically connected to the input terminal of the 1 / 2 proportional amplifier U4. The input terminal of the NOT gate N1 and the first input terminal of the AND gate AND1 are both electrically connected to the output terminal of the comparator U1. The output terminal of the NOT gate N1 is electrically connected to the first input terminal of the AND gate AND2. The first input terminal of adder U5 is connected to a half-level signal. The positive input terminals of comparator U2 and comparator U3 are electrically connected. The negative input terminal of comparator U2 and the second input terminal of adder U5 are both electrically connected to the output terminal of 1 / 2 proportional amplifier U4. The output terminal of adder U5 is electrically connected to the negative input terminal of comparator U3. The output terminal of comparator U2 is electrically connected to the second input terminal of AND gate AND2. The output terminal of comparator U3 is electrically connected to the second input terminal of AND gate AND1. The output terminals of AND gate AND1 and AND gate AND2 are electrically connected to the first and second input terminals of OR gate OR1, respectively.

[0010] Furthermore, the PFC control unit includes a filter U6, a multiplier U7, a divider U8, a subtractor U9, a limiter U10, a limiter U11, a PI regulator U12, a subtractor U13, a comparator U14, and a carrier source U15; the subtrahend terminal and the minuend terminal of the subtractor U13 are respectively used as the first input terminal and the second input terminal of the PFC control unit; the negative input terminal and the positive input terminal of the comparator U14 are respectively used as the first feedback terminal and the second feedback terminal of the PFC control unit; the input terminal of the filter U6 is used as the third input terminal of the PFC control unit; and the output terminal of the comparator U14 is used as the output terminal of the PFC control unit. The output of subtractor U13 is electrically connected to the input of PI regulator U12. The output of PI regulator U12 is electrically connected to the input of limiter U10. The output of limiter U10 is electrically connected to the first input of multiplier U7. The output of filter U6 is electrically connected to the second input of multiplier U7. The output of multiplier U7 is electrically connected to the divisor of divider U8. The input of filter U6 is electrically connected to the dividend of divider U8. The output of divider U8 is electrically connected to the subtrahend of subtractor U9. The minuend of subtractor U9 is connected to a high-level signal. The output of subtractor U9 is electrically connected to the input of limiter U11. The output of limiter U11 is electrically connected to the negative input of comparator U14. The output of carrier source U15 is electrically connected to the positive input of comparator U14.

[0011] Furthermore, it also includes a protection unit and an AND gate AND3; the output terminal of the current sampling unit and the first input terminal of the protection unit are electrically connected for transmitting the rectifier bridge output current I to the protection unit. bd ; The common connection point of the positive output terminal of the rectifier bridge and the inductor L is electrically connected to the second input terminal of the protection unit via a resistor voltage divider detection circuit, for sampling the output voltage V of the rectifier bridge. bd Transmitted to the protection unit; The output terminal of the protection unit is electrically connected to the first input terminal of the AND gate AND3, the output terminal of the PFC control unit is electrically connected to the second input terminal of the AND gate AND3, the output terminal of the AND gate AND3 is electrically connected to the gate of the IGBT, and the interaction terminal of the protection unit is electrically connected to the interaction terminal of the inverter bridge drive unit. The protection unit is used to determine the output current I of the rectifier bridge. bd The output voltage V of the rectifier bridge bd The PFC control unit 3 controls the output of the inverter bridge drive unit and the start / stop of the inverter bridge drive unit.

[0012] Furthermore, when the inverter bridge drive unit is turned off, the protection unit also turns off the output of the PFC control unit.

[0013] Furthermore, when the inverter bridge drive unit is turned on, the protection unit controls the following: When I bd When <I1, the protection unit shuts down the output of the PFC control unit; When I1≤I bd When <I2, the protection unit activates the output of the PFC control unit; When I2≤I bd When <I3, the protection unit shuts down the output of the PFC control unit; When I bd When I3 is greater than or equal to 3, the protection unit simultaneously shuts down the outputs of the inverter bridge drive unit and the PFC control unit. Where I1 is the peak value of PFC turn-on current, I2 is the IGBT current protection threshold, and I3 is the SIC-SBD current protection threshold, and I1 < I2 < I3.

[0014] Furthermore, the protection unit is equipped with a voltage zero-crossing detection function; when the inverter bridge drive unit is started, the protection unit outputs voltage V through the rectifier bridge. bd Voltage zero-crossing detection is performed; when the inverter bridge drive unit stops, the protection unit outputs current I through the rectifier bridge. bd Perform voltage zero-crossing detection; When I1≤I bd When the protection unit detects a voltage zero-crossing point, it activates the output of the PFC control unit.

[0015] The technical solution provided by this invention can include the following beneficial effects: First, the SiC-FRD in the intelligent power module is replaced with SiC-SBD (a Schottky barrier diode based on silicon carbide). SiC-SBD is a dual-carrier device with conductivity modulation effect and a withstand voltage of over 600V (SiC can obtain a high withstand voltage diode of over 600V with the SBD structure of a high-frequency device structure, while the withstand voltage of SiC-RFD can only reach about 200V at most), thus being able to withstand greater surge impact.

[0016] Furthermore, considering that only SiC-SBD is used to resist surges, the SiC-SBD specification needs to be upgraded (e.g., from 15A to 20A). This would increase the device size, making integration difficult, and the increased current capacity would also introduce a series of incompatibility issues, resulting in excessive costs. Therefore, a bypass diode D1 is added between the positive output terminal of the rectifier bridge and the common junction of inductor L to the power supply terminal of the inverter bridge unit. When a surge occurs, this diode diverts part of the surge current in the surge circuit to the power supply terminal of the inverter bridge unit, thereby reducing the impact of surges on the SiC-SBD and enabling the intelligent power module to adapt to high carrier frequency application environments. Attached Figure Description

[0017] Figure 1 It is the connection circuit between the intelligent power module and the rectifier bridge.

[0018] Figure 2 This is the principle of a surge protection system for an intelligent power module according to one embodiment of the present invention. Figure 1 .

[0019] Figure 3 Is it like this? Figure 2 The following diagram illustrates the principle of a surge protection system for an intelligent power module. Figure 2 .

[0020] Figure 4 Is it like this? Figure 3 The signal relationship diagram of the current sampling unit is shown.

[0021] Figure 5 Is it like this? Figure 2 The diagram shows the signal relationship of a surge protection system for an intelligent power module.

[0022] The components include: rectifier bridge 1, resistor R, inductor L, intelligent power module 2, capacitor C1, inverter bridge unit 21, bypass diode D1, PFC control unit 3, current sampling unit 4, inverter bridge drive unit 5, sampling trigger K1, logic circuit 41, OR gate OR1, AND gate AND1, AND gate AND2, NOT gate N1, comparator U1, comparator U2, comparator U3, 1 / 2 proportional amplifier U4, adder U5, filter U6, multiplier U7, divider U8, subtractor U9, limiter U10, limiter U11, PI regulator U12, subtractor U13, comparator U14, carrier source U15, protection unit 6, and AND gate AND3. Detailed Implementation

[0023] Embodiments of the present invention are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and should not be construed as limiting the present invention.

[0024] In the description of embodiments of the present invention, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of indicated technical features. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the stated features. In the description of embodiments of the present invention, "a plurality of" means two or more, unless otherwise explicitly specified.

[0025] In the description of the embodiments of the present invention, it should be noted that, unless otherwise explicitly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; they can refer to a direct connection or an indirect connection through an intermediate medium; they can refer to the internal communication of two components or the interaction between two components. Those skilled in the art can understand the specific meaning of the above terms in the embodiments of the present invention according to the specific circumstances.

[0026] The following is combined with Figures 1 to 5 This invention describes a surge protection system for an intelligent power module according to an embodiment of the present invention.

[0027] A surge protection system for an intelligent power module includes a rectifier bridge 1, a resistor R, an inductor L, an intelligent power module 2, and a capacitor C1. The intelligent power module 2 integrates an IGBT, a SiC-SBD, an inverter bridge unit 21, and a bypass diode D1. The positive output terminal of the rectifier bridge 1 is electrically connected to the collector of the IGBT via the inductor L. The collector of the IGBT is electrically connected to the anode of the SiC-SBD. The cathode of the SiC-SBD is electrically connected to the power supply terminal of the inverter bridge unit 21. The negative output terminal of the rectifier bridge 1 is electrically connected to the ground terminal of the inverter bridge unit 21 via the resistor R. At least one capacitor C1 is connected in parallel between the power supply terminal and the ground terminal of the inverter bridge unit 21. The positive output terminal of rectifier bridge 1 and the common junction of inductor L are electrically connected to the anode of bypass diode D1, and the cathode of bypass diode D1 is electrically connected to the power supply terminal of inverter bridge unit 21.

[0028] In a preferred embodiment of the surge protection system for an intelligent power module proposed in this invention, such as... Figure 2As shown, the SIC-FRD in the intelligent power module 2 is first replaced with SIC-SBD (a silicon carbide Schottky barrier diode). SIC-SBD is a dual-carrier device with conductivity modulation effect and a withstand voltage of over 600V (SiC can achieve a high withstand voltage of over 600V with the SBD structure of a high-frequency device, while the withstand voltage of SIC-RFD can only reach about 200V at most), thus being able to withstand greater surge impacts.

[0029] Furthermore, considering that only SiC-SBD is used to resist surges, the SiC-SBD specification needs to be upgraded (for example, if the original specification was 15A, now a 20A specification is required). This would increase the device size, making integration difficult, and the increased current capacity would also bring a series of incompatibility issues, resulting in excessive costs. Therefore, a bypass diode D1 is added between the positive output terminal of rectifier bridge 1 and the common junction of inductor L and the power supply terminal of inverter bridge unit 21 (i.e., between P3 and P2). This bypass diode D1 is used to divert part of the surge current (i.e., I) in the surge circuit when a surge occurs. passDiod The current is diverted to the power supply terminal of the inverter bridge unit 21, thereby reducing the impact of surges on the SIC-SBD and enabling the intelligent power module to adapt to high carrier frequency application environments.

[0030] Furthermore, it also includes a PFC control unit 3, a current sampling unit 4, and an inverter bridge drive unit 5; the drive end of the inverter bridge drive unit 5 is electrically connected to the inverter bridge unit 21. The power supply terminal of inverter bridge unit 21 is electrically connected to the first input terminal of PFC control unit 3 via a resistor voltage divider detection circuit, and is also electrically connected to the feedback terminal of inverter bridge drive unit 5, for transmitting the actual bus voltage Vdc to PFC control unit 3 and inverter bridge drive unit 5 respectively; the feedback terminal of inverter bridge drive unit 5 is electrically connected to the second input terminal of PFC control unit 3, for transmitting the target bus voltage Vdc_ref to PFC control unit 3. The input terminal of the current sampling unit 4 is electrically connected to the common junction of the negative output terminal of the rectifier bridge 1 and the resistor R. The output terminal of the current sampling unit 4 is electrically connected to the third input terminal of the PFC control unit 3. The current sampling unit 4 is used to sample the output current I of the rectifier bridge. bd Transmitted to PFC control unit 3; The output terminal of PFC control unit 3 is electrically connected to the gate of IGBT; The PFC control unit 3 calculates the actual bus voltage Vdc, the target bus voltage Vdc_ref, and the rectifier bridge output current I. bd The control signal PFCIN of the IGBT is obtained.

[0031] In this embodiment, as Figure 3As shown, to coordinate with the inverter bridge drive unit 5 to achieve high carrier frequency control of the IGBT, the generation of the control signal PFCIN of the PFC control unit 3 should be combined with the target bus voltage Vdc_ref of the inverter bridge drive unit 5 and the peripheral circuit environment of the intelligent power module 2 (i.e., the actual bus voltage Vdc and the rectifier bridge output current I). bd ).

[0032] Furthermore, the duty cycle value (Duty) of the control signal PECIN is: Duty = 1 - I bd / (I bd_ave ×Ka); Among them, I bd_ave The output current I of the rectifier bridge bd The average value; Ka is the difference between the actual bus voltage Vdc and the target bus voltage Vdc_ref, and the boost ratio obtained by the PI regulator; The PFC control unit 3 compares the duty cycle value Duty with the preset carrier signal; when the duty cycle value Duty is greater than the carrier signal, the control signal PFCIN is set to low level; when the duty cycle value Duty is less than or equal to the carrier signal, the control signal PFCIN is set to high level.

[0033] In this embodiment, a boost circuit is used as an example. The duty cycle is the ratio of the switching on time to the entire switching cycle, which directly determines the voltage boost ratio. Its core principle is volt-second balance, meaning the product of the voltage and time experienced by the inductor during the on and off phases is equal. According to the model of an ideal boost circuit (ignoring losses such as diode voltage drop and switching transistor voltage drop), the duty cycle value and the rectifier bridge output current I... bd The relationship is: Duty = 1 - I bd / (I bd_ave ×Ka). The duty cycle value (Duty) is then compared with the carrier signal to form a PWM signal, thereby achieving high carrier frequency control of the IGBT.

[0034] Furthermore, the current sampling unit 4 includes a sampling trigger K1 and a logic circuit 41; the input and output terminals of the sampling trigger K1 are used as the input and output terminals of the current sampling unit 4, respectively; the first feedback terminal and the second feedback terminal of the PFC control unit 3 are electrically connected to the first input terminal and the second input terminal of the logic circuit 41, respectively, for transmitting the duty cycle value Duty and the carrier signal to the logic circuit 41, respectively. The output terminal of logic circuit 41 is electrically connected to the control terminal of sampling trigger K1. Logic circuit 41 is used to control sampling trigger K1 to trigger sampling at the midpoint of the time when the control signal PFCIN is high, and to control sampling trigger K1 to trigger sampling at the midpoint of the time when the control signal PFCIN is low, based on the duty cycle value Duty and the carrier signal.

[0035] In this embodiment, during high-frequency sampling, the current sampling unit 4 samples the rectifier bridge output current I at the high and low levels of the corresponding control signal PFCIN. bd To avoid sampling the rectifier bridge output current I at the edges of high and low levels. bd This causes the sampled rectifier bridge output current I to... bd Inaccurate (because the switching of power devices between on and off, i.e., at the edge moments, will cause current oscillations, such as...) Figure 4 As shown), it is preferable to sample at the midpoint between the high and low levels, and for this purpose, logic circuit 41 is set up for selecting the midpoint between the high and low levels.

[0036] It should be noted that the flip-flop K1 can be an AD conversion chip, for example, which triggers the AD sampling conversion of the chip on the falling edge, converting the analog signal into a digital signal for subsequent logic operations in the circuit.

[0037] Furthermore, the logic circuit 41 includes an OR gate OR1, an AND gate AND1, an AND gate AND2, a NOT gate N1, a comparator U1, a comparator U2, a comparator U3, a 1 / 2 proportional amplifier U4, and an adder U5; the negative input terminal of the comparator U1 is used as the first input terminal of the logic circuit 41, the positive input terminal of the comparator U2 is used as the second input terminal of the logic circuit 41, and the output terminal of the OR gate OR1 is used as the output terminal of the logic circuit 41. The positive input terminal of comparator U1 is connected to a half-level signal. The negative input terminal of comparator U1 is electrically connected to the input terminal of 1 / 2 proportional amplifier U4. The input terminal of NOT gate N1 and the first input terminal of AND gate AND1 are both electrically connected to the output terminal of comparator U1. The output terminal of NOT gate N1 is electrically connected to the first input terminal of AND gate AND2. The first input terminal of adder U5 is connected to a half-level signal. The positive input terminals of comparator U2 and comparator U3 are electrically connected. The negative input terminal of comparator U2 and the second input terminal of adder U5 are both electrically connected to the output terminal of 1 / 2 proportional amplifier U4. The output terminal of adder U5 is electrically connected to the negative input terminal of comparator U3. The output terminal of comparator U2 is electrically connected to the second input terminal of AND gate AND2. The output terminal of comparator U3 is electrically connected to the second input terminal of AND gate AND1. The outputs of AND gate AND1 and AND gate AND2 are electrically connected to the first and second inputs of OR gate OR1, respectively.

[0038] In this embodiment, combined with Figure 3 and 4 The principle of logic circuit 41 in selecting the midpoint between high and low levels is as follows: (1) Duty is divided by 2 by 1 / 2 proportional amplifier U4 and enters comparator U2 to compare with the carrier signal to obtain sampling trigger signal ADEN2.

[0039] (2) Duty is divided by 2 by 1 / 2 proportional amplifier U4, and then 0.5 (i.e. half level signal, the same applies) is added by adder U5, and then compared with carrier signal by comparator U3 to obtain sampling trigger signal ADEN1.

[0040] (3) Duty enters comparator U1 and is compared with 0.5 to obtain the selection signal: When Duty is greater than or equal to 0.5 (or Duty ≥ 50%), the selection signal is 0. The trigger signal ADEN1 is shielded through AND gate AND1, and the inverted signal of its NOT gate N1 is passed through AND gate AND2 to obtain the ADEN2 signal. This means that when Duty is in the last 50% of the cycle, the ADEN trigger time is set at the midpoint of the IGBT conduction time, that is, the midpoint when the PFCIN signal is high. The trigger point of the comparator U2 is Duty / 2.

[0041] When Duty is less than 0.5 (or Duty < 50%), the selection signal is 1, and the trigger signal ADEN1 is obtained through AND gate AND1. The inverted signal of its NOT gate N1 is shielded by AND gate AND2 to mask the ADEN2 signal. This means that when Duty is in the first 50% of the cycle, the ADEN trigger time is set at the midpoint of the IGBT off time, that is, the midpoint when the PFCIN signal is low. The corresponding trigger point of comparator U3 is (1 + Duty) / 2.

[0042] The trigger signals of AND gates AND1 and AND2 are passed through OR gate OR1 to obtain the final sampling trigger signal ADEN. Its falling edge triggers sampling flip-flop K1 for sampling.

[0043] It should be noted that a half-level signal is the midpoint between a high level and a low level. For example, if a high level signal is 1 and a low level signal is 0, then a half-level signal is 0.5.

[0044] Furthermore, the PFC control unit 3 includes a filter U6, a multiplier U7, a divider U8, a subtractor U9, a limiter U10, a limiter U11, a PI regulator U12, a subtractor U13, a comparator U14, and a carrier source U15; the subtrahend terminal and the minuend terminal of the subtractor U13 are used as the first input terminal and the second input terminal of the PFC control unit 3, respectively; the negative input terminal and the positive input terminal of the comparator U14 are used as the first feedback terminal and the second feedback terminal of the PFC control unit 3, respectively; the input terminal of the filter U6 is used as the third input terminal of the PFC control unit 3; and the output terminal of the comparator U14 is used as the output terminal of the PFC control unit 3. The output of subtractor U13 is electrically connected to the input of PI regulator U12. The output of PI regulator U12 is electrically connected to the input of limiter U10. The output of limiter U10 is electrically connected to the first input of multiplier U7. The output of filter U6 is electrically connected to the second input of multiplier U7. The output of multiplier U7 is electrically connected to the divisor of divider U8. The input of filter U6 is electrically connected to the dividend of divider U8. The output of divider U8 is electrically connected to the subtractor of subtractor U9. The minuend of subtractor U9 is connected to a high-level signal. The output of subtractor U9 is electrically connected to the input of limiter U11. The output of limiter U11 is electrically connected to the negative input of comparator U14. The output of carrier source U15 is electrically connected to the positive input of comparator U14.

[0045] In this embodiment, the PFC control unit 3 implements the formula Duty=1-I from the circuit. bd / (I bd_ave ×Ka), the formula logic is composed of filter U6, multiplier U7, divider U8, subtractor U9, limiter U10, limiter U11, PI regulator U12, subtractor U13, comparator U14, and carrier source U15, where: Filter U6: Rectifier bridge output current I bd The rectifier bridge output current I is obtained after passing through filter U6. bd The average value I bd_ave .

[0046] Subtractor U13: Used for the difference dVdc = Vdc_ref - Vdc.

[0047] PI Regulator U12: The difference dVdc is used by PI regulator U12 to obtain the boost ratio Ka. The boost ratio Ka represents the ratio of the actual bus voltage Vdc to the average value of the rectifier bridge output voltage Vbd. That is, the larger the DC bus voltage obtained by boosting, the larger the boost ratio Ka.

[0048] Limiter U10: Used to limit the boost ratio Ka, generally within the range of 1 to 3.

[0049] Multiplier U7: Used for I bd_ave ×Ka.

[0050] Divider U8: Used for I bd / (I bd_ave ×Ka).

[0051] Subtractor U9: Used for 1-1 bd / (I bd_ave ×Ka).

[0052] Limiter U11: Used to limit the range of the duty cycle value Duty according to the carrier source U15, so as to avoid being unable to compare with the carrier signal and form a PWM signal.

[0053] Comparator U14: Used to compare the duty cycle value (Duty) with the carrier signal to form the control signal PFCIN.

[0054] Furthermore, it also includes protection unit 6 and AND gate AND3; the output terminal of current sampling unit 4 is electrically connected to the first input terminal of protection unit 6, for transmitting the rectifier bridge output current I to protection unit 6. bd ; The common connection point of the positive output terminal of rectifier bridge 1 and inductor L is electrically connected to the second input terminal of protection unit 6 via a resistor voltage divider detection circuit, which is used to sample the output voltage V of the rectifier bridge. bd Transmitted to protection unit 6; The output terminal of protection unit 6 is electrically connected to the first input terminal of AND gate AND3, the output terminal of PFC control unit 3 is electrically connected to the second input terminal of AND gate AND3, the output terminal of AND gate AND3 is electrically connected to the gate of IGBT; the interactive terminal of protection unit 6 is electrically connected to the interactive terminal of inverter bridge drive unit 5. Protection unit 6 is used to adjust the output current I of the rectifier bridge. bd 1. Rectifier bridge output voltage V bd The start and stop of the inverter bridge drive unit 5, and the start and stop of the PFC control unit 3 and the inverter bridge drive unit 5 are controlled.

[0055] In this embodiment, considering that in extreme cases (such as sudden mains power failures causing surges much larger than normal surges), the inherent characteristics of the SIC-SBD and the bypass diode D1 alone are still insufficient to eliminate the impact of surges on the intelligent power module, a protection unit 6 and an AND gate AND3 are added to detect the external circuit environment of the intelligent power module and the start / stop status of the inverter bridge drive unit 5. This enables control of the output of the PFC control unit 3 and the start / stop of the inverter bridge drive unit 5 as backup surge protection to cope with various sudden surge conditions and prevent IGBTs, SIC-SBDs and other devices from being burned out.

[0056] It should be noted that the interaction terminals of protection unit 6 and inverter bridge drive unit 5 are as follows: Figure 3 As shown in the MTREN diagram, it includes multiple ports, and there are various connection methods available in the existing technology, which will not be elaborated here.

[0057] Specifically, the preferred control method for protection unit 6 is as follows: When the inverter bridge drive unit 5 is turned off, the protection unit 6 will shut down the output of the PFC control unit 3 in conjunction with it.

[0058] In this embodiment, the PFC control unit 3 is the main working unit, and it is necessary to ensure that the PFC control unit 3 can be shut down simultaneously with the inverter bridge drive unit 5 (i.e., MTREN=0, and PFCEN is also forced to be 0). At the instant the PFC control unit 3 shuts down, I... bd The distortion generates a surge, which is mainly diverted by the bypass diode D1.

[0059] When inverter bridge drive unit 5 is turned on: When I bd When <I1, the protection unit 6 shuts down the output of the PFC control unit 3; When I1≤I bd When <I2, the protection unit 6 activates the output of the PFC control unit 3; When I2≤I bd When <I3, the protection unit 6 shuts down the output of the PFC control unit 3; When I bd When I3 is greater than or equal to 3, the protection unit 6 simultaneously shuts down the outputs of the inverter bridge drive unit 5 and the PFC control unit 3. Where I1 is the peak value of PFC turn-on current, I2 is the IGBT current protection threshold, and I3 is the SIC-SBD current protection threshold, and I1 < I2 < I3.

[0060] In this embodiment, when the inverter bridge drive unit 5 is turned on (i.e., MTREN=1), it is easily affected by sudden disturbances in the mains power (or power grid), causing surges to exceed the withstand range of the bypass diode D1 and the SiC-SBD. Therefore, the protection unit 6 is set with a PFC turn-on current peak value I1, an IGBT current protection threshold I2, and a SiC-SBD current protection threshold I3, where I1 < I2 < I3, to monitor the overall operation of the intelligent power module and handle different situations as follows: When I bd When <I1, PFC cannot start, PFCEN=0, and protection unit 6 shuts down the output of PFC control unit 3.

[0061] When I1≤I bd When <I2, it is in normal operation, and the protection unit 6 turns on the output of the PFC control unit 3.

[0062] When I2≤I bd When the value is less than I3, a surge occurs, requiring protection unit 6 to shut down the output of PFC control unit 3 to protect the IGBT. At the same time, bypass diode D1 is used for shunt protection, ensuring that the entire load can continue to operate without shutting down the machine.

[0063] When I bdWhen I3 is greater than or equal to 3, it is proven that relying solely on the bypass diode D1 to shunt the current is no longer sufficient to meet the surge protection requirements. The surge still exceeds the tolerance range of the SIC-SBD, and the protection unit 6 needs to simultaneously shut down the outputs of the inverter bridge drive unit 5 and the PFC control unit 3, i.e., shut down the entire machine, in order to protect the entire machine (equivalent to overcurrent protection).

[0064] Furthermore, the protection unit 6 is equipped with a voltage zero-crossing detection function; when the inverter bridge drive unit 5 is started, the protection unit 6 outputs voltage V through the rectifier bridge. bd Voltage zero-crossing detection is performed; when the inverter bridge drive unit 5 stops, the protection unit 6 outputs current I through the rectifier bridge. bd Perform voltage zero-crossing detection; When I1≤I bd When the voltage is less than I2 and the protection unit 6 detects a zero-crossing point, the protection unit 6 activates the output of the PFC control unit 3.

[0065] In this embodiment, when I1≤I bd <I2 and I2≤I bd In the states <I3, the entire machine is not powered off. When I2≤I is triggered... bd <I3 causes PFC to turn off, when I bd Returning to I1≤I bd When I1 ≤ I2, the PFC should resume operation, possessing a self-recovery function. Therefore, protection unit 6 needs to be equipped with a voltage zero-crossing detection function to cooperate with I1 ≤ I bd <I2 confirms surge elimination.

[0066] It should be noted that, based on the rectifier bridge output voltage V bd and rectifier bridge output current I bd There are several methods to determine whether a voltage has crossed zero, which will not be limited here. For example: When PFC is fully enabled, such as Figure 5 As shown in (1), it can be achieved through V bd Detect the zero-crossing signal of the mains voltage; when PFC is off, such as Figure 5 As shown in (2), due to V bd No zero crossing point, I is required. bd To detect the zero-crossing point of the mains voltage. First, select the signal (V) used to detect the zero-crossing point of the voltage. bd Or I bd Then, the fundamental frequency signal (100Hz) of the signal is extracted. Specifically, a bandpass filter (BPF) can be used, with a center cutoff frequency of 100Hz and a pass frequency of 10Hz to obtain the fundamental frequency detection signal. Finally, the fundamental frequency detection signal is passed through a PLL to obtain phase information. When the phase information is zero, it represents the zero-crossing point.

[0067] Other components and operations of a surge protection system for an intelligent power module according to an embodiment of the present invention are known to those skilled in the art and will not be described in detail here.

[0068] In the description of this specification, references to terms such as "embodiment," "example," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0069] Although embodiments of the invention have been shown and described, those skilled in the art will understand that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of the invention, the scope of which is defined by the claims and their equivalents.

Claims

1. A surge protection system for an intelligent power module, characterized in that: The system includes a rectifier bridge, a resistor R, an inductor L, a smart power module, and a capacitor C1. The smart power module integrates an IGBT, a SiC-SBD, an inverter bridge unit, and a bypass diode D1. The positive output terminal of the rectifier bridge is electrically connected to the collector of the IGBT via the inductor L. The collector of the IGBT is electrically connected to the anode of the SiC-SBD. The cathode of the SiC-SBD is electrically connected to the power supply terminal of the inverter bridge unit. The negative output terminal of the rectifier bridge is electrically connected to the ground terminal of the inverter bridge unit via the resistor R. At least one capacitor C1 is connected in parallel between the power supply terminal and the ground terminal of the inverter bridge unit. The positive output terminal of the rectifier bridge and the common junction of the inductor L are electrically connected to the anode of the bypass diode D1, and the cathode of the bypass diode D1 is electrically connected to the power supply terminal of the inverter bridge unit.

2. The surge protection system for an intelligent power module according to claim 1, characterized in that: It also includes a PFC control unit, a current sampling unit, and an inverter bridge drive unit; the drive terminal of the inverter bridge drive unit is electrically connected to the inverter bridge unit. The power supply terminal of the inverter bridge unit is electrically connected to the first input terminal of the PFC control unit via a resistor voltage divider detection circuit, and is also electrically connected to the feedback terminal of the inverter bridge drive unit, for transmitting the actual bus voltage Vdc to the PFC control unit and the inverter bridge drive unit respectively; the feedback terminal of the inverter bridge drive unit is electrically connected to the second input terminal of the PFC control unit, for transmitting the target bus voltage Vdc_ref to the PFC control unit. The input terminal of the current sampling unit is electrically connected to the common junction of the negative output terminal of the rectifier bridge and the resistor R, and the output terminal of the current sampling unit is electrically connected to the third input terminal of the PFC control unit. The current sampling unit is used to sample the output current I of the rectifier bridge. bd Transmitted to the PFC control unit; The output terminal of the PFC control unit is electrically connected to the gate of the IGBT; The PFC control unit calculates the actual bus voltage Vdc, the target bus voltage Vdc_ref, and the rectifier bridge output current I. bd The control signal PFCIN of the IGBT is obtained.

3. The surge protection system for an intelligent power module according to claim 1, characterized in that: The duty cycle value (Duty) of the control signal PECIN is: Duty = 1 - I bd / (I bd_ave ×Ka); Among them, I bd_ave The output current I of the rectifier bridge bd The average value; Ka is the difference between the actual bus voltage Vdc and the target bus voltage Vdc_ref, and the boost ratio obtained by the PI regulator; The PFC control unit compares the duty cycle value Duty with a preset carrier signal; when the duty cycle value Duty is greater than the carrier signal, the control signal PFCIN is set to low level; when the duty cycle value Duty is less than or equal to the carrier signal, the control signal PFCIN is set to high level.

4. The surge protection system for an intelligent power module according to claim 3, characterized in that: The current sampling unit includes a sampling flip-flop K1 and a logic circuit 41; the input and output terminals of the sampling flip-flop K1 are respectively used as the input and output terminals of the current sampling unit. The first feedback terminal and the second feedback terminal of the PFC control unit are electrically connected to the first input terminal and the second input terminal of the logic circuit, respectively, for transmitting the duty cycle value (Duty) and the carrier signal to the logic circuit, respectively. The output terminal of the logic circuit is electrically connected to the control terminal of the sampling trigger K1; the logic circuit is used to control the sampling trigger K1 to trigger sampling at the midpoint of the time when the control signal PFCIN is high, and to control the sampling trigger K1 to trigger sampling at the midpoint of the time when the control signal PFCIN is low, according to the duty cycle value Duty and the carrier signal.

5. The surge protection system for an intelligent power module according to claim 4, characterized in that: The logic circuit includes an OR gate (OR1), an AND gate (AND1), an AND gate (AND2), a NOT gate (N1), a comparator (U1), a comparator (U2), a comparator (U3), a 1 / 2 proportional amplifier (U4), and an adder (U5); the negative input terminal of the comparator (U1) is used as the first input terminal of the logic circuit, the positive input terminal of the comparator (U2) is used as the second input terminal of the logic circuit, and the output terminal of the OR gate (OR1) is used as the output terminal of the logic circuit. The positive input terminal of the comparator U1 is connected to a half-level signal. The negative input terminal of the comparator U1 is electrically connected to the input terminal of the 1 / 2 proportional amplifier U4. The input terminal of the NOT gate N1 and the first input terminal of the AND gate AND1 are both electrically connected to the output terminal of the comparator U1. The output terminal of the NOT gate N1 is electrically connected to the first input terminal of the AND gate AND2. The first input terminal of adder U5 is connected to a half-level signal. The positive input terminals of comparator U2 and comparator U3 are electrically connected. The negative input terminal of comparator U2 and the second input terminal of adder U5 are both electrically connected to the output terminal of 1 / 2 proportional amplifier U4. The output terminal of adder U5 is electrically connected to the negative input terminal of comparator U3. The output terminal of comparator U2 is electrically connected to the second input terminal of AND gate AND2. The output terminal of comparator U3 is electrically connected to the second input terminal of AND gate AND1. The output terminals of AND gate AND1 and AND gate AND2 are electrically connected to the first and second input terminals of OR gate OR1, respectively.

6. The surge protection system for an intelligent power module according to claim 4, characterized in that: The PFC control unit includes a filter U6, a multiplier U7, a divider U8, a subtractor U9, a limiter U10, a limiter U11, a PI regulator U12, a subtractor U13, a comparator U14, and a carrier source U15. The subtrahend and minuend terminals of the subtractor U13 are used as the first and second input terminals of the PFC control unit, respectively. The negative and positive input terminals of the comparator U14 are used as the first and second feedback terminals of the PFC control unit, respectively. The input terminal of the filter U6 is used as the third input terminal of the PFC control unit, and the output terminal of the comparator U14 is used as the output terminal of the PFC control unit. The output of subtractor U13 is electrically connected to the input of PI regulator U12. The output of PI regulator U12 is electrically connected to the input of limiter U10. The output of limiter U10 is electrically connected to the first input of multiplier U7. The output of filter U6 is electrically connected to the second input of multiplier U7. The output of multiplier U7 is electrically connected to the divisor of divider U8. The input of filter U6 is electrically connected to the dividend of divider U8. The output of divider U8 is electrically connected to the subtrahend of subtractor U9. The minuend of subtractor U9 is connected to a high-level signal. The output of subtractor U9 is electrically connected to the input of limiter U11. The output of limiter U11 is electrically connected to the negative input of comparator U14. The output of carrier source U15 is electrically connected to the positive input of comparator U14.

7. The surge protection system for an intelligent power module according to claim 2, characterized in that: It also includes a protection unit and an AND gate AND3; the output terminal of the current sampling unit and the first input terminal of the protection unit are electrically connected for transmitting the rectifier bridge output current I to the protection unit. bd ; The common connection point of the positive output terminal of the rectifier bridge and the inductor L is electrically connected to the second input terminal of the protection unit via a resistor voltage divider detection circuit, for sampling the output voltage V of the rectifier bridge. bd Transmitted to the protection unit; The output terminal of the protection unit is electrically connected to the first input terminal of the AND gate AND3, the output terminal of the PFC control unit is electrically connected to the second input terminal of the AND gate AND3, the output terminal of the AND gate AND3 is electrically connected to the gate of the IGBT, and the interaction terminal of the protection unit is electrically connected to the interaction terminal of the inverter bridge drive unit. The protection unit is used to determine the output current I of the rectifier bridge. bd The output voltage V of the rectifier bridge bd The PFC control unit 3 controls the output of the inverter bridge drive unit and the start / stop of the inverter bridge drive unit.

8. The surge protection system for an intelligent power module according to claim 7, characterized in that: When the inverter bridge drive unit is turned off, the protection unit will also turn off the output of the PFC control unit.

9. The surge protection system for an intelligent power module according to claim 8, characterized in that: When the inverter bridge drive unit is turned on, the protection unit controls the following: When I bd When <I1, the protection unit shuts down the output of the PFC control unit; When I1≤I bd When <I2, the protection unit activates the output of the PFC control unit; When I2≤I bd When <I3, the protection unit shuts down the output of the PFC control unit; When I bd When I3 is greater than or equal to 3, the protection unit simultaneously shuts down the outputs of the inverter bridge drive unit and the PFC control unit. Where I1 is the peak value of PFC turn-on current, I2 is the IGBT current protection threshold, and I3 is the SIC-SBD current protection threshold, and I1 < I2 < I3.

10. A surge protection system for an intelligent power module according to claim 9, characterized in that: The protection unit is equipped with a voltage zero-crossing detection function; when the inverter bridge drive unit starts, the protection unit outputs voltage V through the rectifier bridge. bd Voltage zero-crossing detection is performed; when the inverter bridge drive unit stops, the protection unit outputs current I through the rectifier bridge. bd Perform voltage zero-crossing detection; When I1≤I bd When the protection unit detects a voltage zero-crossing point, it activates the output of the PFC control unit.

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