Controller for switching converter

Abstract

A controller for a switching converter is provided. The switching converter includes one or more power switches and an inductor. The controller is configured to drive a switching operation of the one or more power switches to provide a magnetization phase in which an inductor current flowing through the inductor increases to a peak current value dependent on the load current and a demagnetization phase in which the inductor current decreases from the peak current value. The controller includes a switch drive circuit configured to provide one or more switch drive signals, and a load current determination circuit configured to receive a first signal dependent on a load current, and adjust the one or more switch drive signals using the first signal to provide a peak current value dependent on the load current.

Description

field

[0001] This disclosure relates to a controller for a switch converter. background

[0002] Switch-mode DC / DC converters regulate output voltage by controlling the duty cycle of the power stage. Many output voltage regulation schemes are available, and these can be selected based on system requirements.

[0003] One possible regulation scheme is a direct control scheme. In this control scheme, the output voltage is directly sensed by a comparator, and then switching activity occurs once the output voltage drops below a set target.

[0004] Typically, direct control regulators operate only in discontinuous conduction mode (DCM), but there are also known techniques to achieve continuous conduction mode (CCM) (e.g., by adding a generated ramp signal).

[0005] In DCM, the inductor current is always limited to a positive value, and each switching cycle ends when the inductor current reaches zero, after which the next switching cycle can occur.

[0006] Figure 1 This is a schematic diagram of a known direct-control DC / DC boost converter 100.

[0007] like Figure 1 As shown, the output voltage V OUT The main comparator 102 passes through resistor R fb1 R fb2 The feedback voltage divider is used for direct sensing. The feedback voltage divider is typically used to adjust the sensing bias point.

[0008] The main comparator 102 will sense the output voltage V OUT With target reference V ref Compare, and if the output voltage V OUT Dropped below reference V ref If so, comparator 102 is triggered.

[0009] Main comparator output signal V comp This is then processed by logic block 104, which controls the switching of the power stage. In this example, the power stage includes a low-side M... LS Power FET and high-side M HS Power FET. The power FET is operated by the corresponding gate drivers 106 and 108.

[0010] Figure 1 The power FET M is shown. LS Power FET MHS All are N-type; however, the high-side is typically implemented as a P-type device. The Ton timer 110 can be used to set the duration of the magnetization phase of the inductor L, while the zero comparator 112 senses the inductor current during the demagnetization phase and triggers when the current reaches zero.

[0011] Figure 2 It is shown that it is used for, for example Figure 1 Timing diagram 200 of an example waveform of an actual implementation of the direct control converter 100 shown.

[0012] Inductor current pulses I with different amplitudes were presented. coil A typical switching cycle begins from the output voltage V. out Declined below the target reference V ref Initially, this caused the comparator 102 flag to go high (V). comp The comparator 102 flag triggers the magnetization phase of the inductor L, which occurs during the on-time t. on It occurs during the duration of the event and is triggered by the on-timer. ton The process ends when the inductor current reaches its peak value.

[0013] During the demagnetization phase, at the off-time t off The demagnetizing phase occurs over a period of time and ends when the inductor current reaches zero. The zero current is detected by the zero-current comparator 112. The zero-current detection event is denoted as V. zero .

[0014] In the case of a boost converter, energy is transferred to the output during the demagnetization phase. The amount of energy transferred depends on the amplitude of the inductor peak current (assuming the inductor current slope is constant). That is, the larger the peak current, the more energy is transferred. The amount of energy transferred to the output translates into output voltage ripple; that is, for a higher peak current, the output voltage ripple is greater than the output voltage ripple for a lower peak current. Overview

[0015] The goal is to provide an improved controller for switching converters.

[0016] According to a first aspect of this disclosure, a controller for a switching converter is provided, the switching converter being used to receive an input voltage, generate an output voltage, and provide a load current to an electrical load. The switching converter includes one or more power switches and an inductor, wherein the controller is configured to drive switching operations of the one or more power switches to provide i) a magnetization phase and ii) a demagnetization phase, in which the inductor current flowing through the inductor increases to a peak current value dependent on the load current, and in the demagnetization phase, the inductor current decreases from the peak current value. The controller includes a switch drive circuit and a load current determination circuit, the switch drive circuit being configured to provide one or more switch drive signals, each of the one or more switch drive signals being configured to control the switching state of one of the one or more power switches, thereby driving the switching operation of the one or more power switches. The load current determination circuit is configured to receive a first signal dependent on the load current and adjust the one or more switch drive signals using the first signal to provide a peak current value dependent on the load current.

[0017] Optionally, the peak current value is proportional to the load current.

[0018] Optionally, the first signal is one of the switch drive signals, and the load current determination circuit includes a high-pass filter and a current modulator. The high-pass filter is configured to filter the first signal, and the current modulator is configured to receive the filtered first signal, convert the first signal from frequency information to current information proportional to the load current, and use the converted first signal to adjust one or more switch drive signals.

[0019] Optionally, the switch drive circuit includes an on-time circuit configured to set the duration of the magnetization phase, wherein the load current determination circuit is configured to control the duration of the magnetization phase set by the on-time circuit according to a first signal, thereby using the first signal to adjust one or more switch drive signals to provide a peak current value dependent on the load current.

[0020] Optionally, the switch drive circuit includes logic circuitry configured to provide one or more switch drive signals, and the on-time circuitry is configured to set the duration of the magnetization phase by providing an on-time signal to the logic circuitry.

[0021] Optionally, the controller includes a zero comparator configured to detect when the inductor current is approximately zero and to provide a signal to the logic circuit indicating the end of the demagnetization phase.

[0022] Optionally, the controller includes a comparator configured to receive a feedback voltage dependent on the output voltage, receive a reference voltage, compare the feedback voltage with the reference voltage, and provide a comparator output signal dependent on the comparison between the feedback voltage and the reference voltage, wherein logic circuitry is configured to receive the comparator output signal and provide one or more switch drive signals, each switch drive signal depending on the comparator output signal.

[0023] Optionally, the first signal is one of the switch drive signals, and the load current determination circuit includes a high-pass filter and a current modulator. The high-pass filter is configured to filter the first signal, and the current modulator is configured to receive the filtered first signal, convert the first signal from frequency information to current information proportional to the load current, and use the converted first signal to adjust one or more switch drive signals.

[0024] Optionally, the current modulator is configured to apply the first signal as a variable bias current to the comparator to reduce the propagation delay of the comparator.

[0025] Optionally, the switch drive circuit includes a peak current sensing circuit configured to sense the inductor current, compare the inductor current with a reference peak current value, and switch the switch operation from a magnetization phase to a demagnetization phase when the inductor current is approximately equal to the reference peak current value. The load current determination circuit is configured to adjust the reference peak current value according to a first signal, thereby using the first signal to adjust one or more switch drive signals to provide a peak current value dependent on the load current.

[0026] Optionally, the switch drive circuit includes logic circuitry configured to provide one or more switch drive signals, and the peak current sensing circuitry is configured to adjust a reference peak current value by providing a peak current reference adjustment signal to the logic circuitry.

[0027] Optionally, the controller includes a zero comparator configured to detect when the inductor current is approximately zero and to provide a signal to the logic circuit indicating the end of the demagnetization phase.

[0028] Optionally, the controller includes a comparator configured to receive a feedback voltage dependent on the output voltage, receive a reference voltage, compare the feedback voltage with the reference voltage, and provide a comparator output signal dependent on the comparison between the feedback voltage and the reference voltage, wherein logic circuitry is configured to receive the comparator output signal and provide one or more switch drive signals, each switch drive signal depending on the comparator output signal.

[0029] Alternatively, the switching converter is a buck converter, a boost converter, or a buck-boost converter.

[0030] Optionally, the switching converter is a boost converter, and the power switch includes a high-side switch and a low-side switch.

[0031] Optionally, the controller includes a switch drive circuit configured to provide a high-side switch drive signal to the high-side switch and a low-side switch drive signal to the low-side switch, wherein the high-side switch drive signal and the low-side switch drive signal are configured to control the switching state of their respective power switches, thereby driving the switching operation of the power switches.

[0032] Optionally, the high-pass filter includes a first resistor coupled to a first capacitor via a first switch and a second resistor coupled to a filter output node via a second switch. The first capacitor is coupled to the first switch at the filter output node. The first switch is configured to be driven by a first digital signal that is high when the switch-converter operates in a three-state phase and low otherwise. The second switch is configured to be driven by a second digital signal that is high during a demagnetization phase and low otherwise. The high-pass filter is configured to provide a filtered first signal to a current modulator at the filter output node.

[0033] Optionally, the current modulator includes: a source degeneration resistor coupled to a first transistor via a first low-resistance switch, the gate of which is coupled to a filter output node; a current mirror including a second transistor, a third transistor, a fourth transistor coupled to the first transistor via a first node, and a third low-resistance switch coupled to the first node, the gate of which is coupled to the gate of the second transistor at a second node and configured to provide a first modulation current at the current modulator output node; the fourth transistor having a first terminal coupled to the second low-resistance switch, a second terminal coupled to a bias resistor at the second node, and a gate coupled to the first node; wherein the first low-resistance switch and the second low-resistance switch are each configured to be driven by a first signal, and the third low-resistance switch is configured to be driven by an inverted first signal, and the current modulator is configured to use the first modulation current to adjust one or more switch drive signals, thereby using the converted first signal to adjust one or more switch drive signals.

[0034] Optionally, the switch drive circuit includes an on-time circuit configured to set the duration of the magnetization phase, wherein the load current determination circuit is configured to use a first modulation current to control the duration of the magnetization phase set by the on-time circuit according to a first signal, thereby using the first signal to adjust one or more switch drive signals to provide a peak current value dependent on the load current.

[0035] Optionally, the switch drive circuit includes logic circuitry configured to provide one or more switch drive signals, the on-time circuitry is configured to set the duration of the magnetization phase by providing an on-time signal to the logic circuitry, and the controller includes a comparator configured to receive a feedback voltage dependent on the output voltage, receive a reference voltage, compare the feedback voltage with the reference voltage, and provide a comparator output signal dependent on the comparison between the feedback voltage and the reference voltage, wherein the logic circuitry is configured to receive the comparator output signal and provide one or more switch drive signals, each switch drive signal depending on the comparator output signal.

[0036] Optionally, the current modulator includes a fifth transistor and a third resistor, the gate of the fifth transistor being coupled to the gate of the first transistor, and the third resistor being coupled in series with the fifth transistor, wherein the third resistor and the fifth transistor are configured to generate a variable bias current, and wherein the current modulator is configured to apply the first signal as a variable bias current to the comparator to reduce the propagation delay of the comparator.

[0037] Optionally, the switch drive circuit includes a peak current sensing circuit configured to sense the inductor current, compare the inductor current with a reference peak current value, and switch the switch operation from a magnetization phase to a demagnetization phase when the inductor current is approximately equal to the reference peak current value. The load current determination circuit is configured to use a first modulation current to adjust the reference peak current value according to a first signal, thereby using the first signal to adjust one or more switch drive signals to provide a peak current value dependent on the load current.

[0038] According to a second aspect of this disclosure, a power converter system is provided, comprising a switching converter for receiving an input voltage, generating an output voltage, and providing a load current to an electrical load. The switching converter includes one or more power switches, an inductor, and a controller configured to drive switching operations of the one or more power switches to provide i) a magnetization phase and ii) a demagnetization phase, wherein in the magnetization phase, an inductor current flowing through the inductor increases to a peak current value dependent on the load current, and in the demagnetization phase, the inductor current decreases from the peak current value. The controller includes: a switch drive circuit configured to provide one or more switch drive signals, each of the one or more switch drive signals being configured to control a switching state of one of the one or more power switches, thereby driving switching operations of the one or more power switches; and a load current determination circuit configured to receive a first signal dependent on the load current and adjust the one or more switch drive signals using the first signal to provide a peak current value dependent on the load current.

[0039] It will be appreciated that, as understood by those skilled in the art, the power converter of the second aspect may include the features set forth with respect to the first aspect, and may include other features as described herein.

[0040] According to a third aspect of this disclosure, a method for controlling a switching converter is provided, the switching converter being used to receive an input voltage, generate an output voltage, and provide a load current to an electrical load, the switching converter including one or more power switches and an inductor, wherein the method includes: using a controller to drive switching operations of one or more power switches to provide: i) a magnetization phase in which an inductor current flowing through an inductor increases to a peak current value dependent on the load current; and ii) a demagnetization phase in which the inductor current decreases from the peak current value; providing one or more switching drive signals using a switching drive circuit, each of the one or more switching drive signals being configured to control a switching state of one of the one or more power switches, thereby driving switching operations of one or more power switches; and receiving a first signal dependent on the load current at a load current determination circuit, and using the load current determination circuit to use the first signal to adjust one or more switching drive signals to provide a peak current value dependent on the load current.

[0041] It will be understood that, as understood by those skilled in the art, the method of the third aspect may include providing and / or using the features of the first and / or second aspects, and may include other features as described herein. Brief description of the attached diagram

[0042] The present disclosure is described in more detail below by way of example and with reference to the accompanying drawings, in which:

[0043] Figure 1 This is a schematic diagram of a known direct-control DC / DC boost converter;

[0044] Figure 2 It is shown that it is used for, for example Figure 1 The timing diagram shows an example waveform of an actual implementation of the direct control converter;

[0045] Figure 3 It is shown that it is used for Figure 1 Timing diagram of the inductor current in the actual implementation of the converter;

[0046] Figure 4A This is a schematic diagram of a controller for a switch converter according to a first embodiment of the present disclosure. Figure 4B This is a timing diagram showing the inductor current during operation in an actual implementation of a switching converter. Figure 4C This is a timing diagram illustrating the relationship between peak current and load current for a specific embodiment of this disclosure. Figure 4D This is a schematic diagram of a specific embodiment of a controller according to a second embodiment of the present disclosure;

[0047] Figure 5 This is a schematic diagram of a specific embodiment of the controller and switch converter according to the third embodiment of the present disclosure;

[0048] Figure 6 This is a schematic diagram of a specific embodiment of the controller and switch converter according to the fourth embodiment of the present disclosure;

[0049] Figure 7 It is shown that it is used for, for example Figure 6 The graphs present the load transient simulation results of the actual implementation of the controller and switching converter.

[0050] Figure 8 It is shown that it is used for, for example Figure 6 Another graph showing the load transient simulation results of the actual implementation of the controller and switching converter;

[0051] Figure 9A This is a schematic diagram of a specific embodiment of the conduction time circuit. Figure 9B It shows the use of Figure 9A A specific embodiment of the conduction time circuit is used for Figure 5 Simulation results of the actual implementation of the controller and switching converter;

[0052] Figure 10 It is possible Figure 5The schematic diagrams of specific embodiments of the load current determination circuit and the on-time circuit implemented in the examples presented herein;

[0053] Figure 11 The use of, as shown Figure 10 The present embodiment of the conduction time circuit and load current determination circuit is used for... Figure 5 Simulation results of the actual implementation of the controller and switching converter; and

[0054] Figure 12 This is a schematic diagram of a specific embodiment of the controller and switch converter according to the fifth embodiment of the present disclosure;

[0055] Figure 13 This is a schematic diagram of a specific embodiment of a load current determination circuit; and

[0056] Figure 14 The use of, as shown Figure 13 The specific embodiment of the load current determination circuit presented herein is used for Figure 12 Simulation results of the actual implementation of the controller and switching converter. Detailed description

[0057] Figure 3 It is shown that it is used for Figure 1 Timing diagram 300 of the actual implementation of the inductor current of the converter 100 is shown. Specifically, example converter inductor current modes with different peak current amplitudes and corresponding delivered output load currents are shown.

[0058] Typically, a small output voltage ripple is desired, which translates to a regulated output voltage with lower noise. This requires inductor current pulses with smaller peak currents to achieve a smaller output voltage ripple.

[0059] The output load current that can be delivered by converter 100 is proportional to the peak current amplitude of the inductor for each pulse.

[0060] Figure 3 The diagram illustrates two scenarios for the peak inductor current amplitude of a converter 100 operating in DCM mode (I...). PK,lo and I PK,hi In both cases, the switching frequency and the inductor current slope (the same operating point) are the same. Assuming a boost converter configuration, this means that energy is only delivered to the output during the demagnetizing phase.

[0061] Output load current I OUT,hi For the peak current amplitude I PK,hi The output load current, and the output load current I OUT,lo For the peak current amplitude I PK,loThe output load current is high. For scenarios where the inductor's peak current is high, the output load current is also high.

[0062] Therefore, in the case of a direct-control converter operating in DCM mode, there is a trade-off between having low output voltage ripple and high output current capability. DCM operation is desirable in direct-control converters because this operating mode offers superior transient performance, allowing for extremely fast output voltage recovery from system disturbances (i.e., load and line transients). However, due to the aforementioned trade-offs related to output voltage ripple, the output load capability in DCM is typically limited.

[0063] Therefore, an output voltage regulation system is desired that operates with a high inductor peak current only at high output loads and a small inductor peak current under other conditions to achieve low output voltage ripple. Known systems typically employ compensation schemes, which slow down the system's transient response and require a certain die area. Furthermore, compensation schemes consume quiescent current, thus affecting the converter's light-load efficiency.

[0064] Figure 4A This is a schematic diagram of a controller 400 for a switching converter 402 according to a first embodiment of the present disclosure. During operation, the switching converter 402 receives an input voltage Vin, generates an output voltage Vout, and provides a load current Iload to an electrical load 404.

[0065] The switching converter 402 includes one or more power switches 406 and inductors 408.

[0066] Figure 4B This is a timing diagram showing the inductor current IL (trace 401) flowing through inductor 408 during operation in an actual implementation of the switching converter 402.

[0067] Controller 400 is configured to drive the switching operation of one or more power switches 406 to provide:

[0068] ● Magnetization phase (labeled 403): During the magnetization phase, the inductor current IL flowing through inductor 408 increases to a peak current value Ipeak that depends on the load current Iload; and

[0069] ● Demagnetization phase (marked as 405): During the demagnetization phase, the inductor current IL decreases from the peak current value Ipeak.

[0070] The inductor 408 is driven by one or more power switches 406 to alternate between magnetization and demagnetization phases, and the input voltage Vin is used to generate the output voltage Vout.

[0071] The duration of the magnetization phase can be a time period known as the "conduction time" (Ton).

[0072] The switching converter 402 may be, for example, a buck converter, a boost converter, or a buck-boost converter.

[0073] The controller 400 includes a switch drive circuit 410 configured to provide one or more switch drive signals 412, each of which is configured to control the switching state of one or more power switches 406, thereby driving the switching operation of one or more power switches 406.

[0074] In this example, a single switch drive signal 412 is shown provided to a single power switch 406. A “switch state” refers to the conductive state of switch 406. For example, in an “on state,” switch 406 may allow current to flow, while in an “off state,” switch 406 may prevent current from flowing.

[0075] The controller 400 also includes a load current determination circuit 414 configured to receive a first signal 416 depending on the load current Iload, and to use the first signal 416 to adjust one or more switch drive signals 412 to provide a peak current value Ipeak depending on the load current Iload.

[0076] In a particular embodiment, the first signal 416 may be one of the switch drive signals 412. In another embodiment, the first signal 416 may be derived from or depend on at least one of the switch drive signals 412.

[0077] It should be understood that the load current determination circuit 414 does not need to extract the value of the load current Iload from the first signal 416. The function of the load current determination circuit 414 is to receive the first signal 416, which depends on the load current Iload, and then use the first signal 416 to adjust the switch drive signal 412 to provide a peak current value Ipeak that depends on the load current Iload. Since there is a relationship between the load current Iload and the first signal 416, it is sufficient to use the first signal 416 itself for adjustment; there is no need to extract the load current value from the first signal 416 for adjustment.

[0078] Figure 4CThis is a timing diagram illustrating the relationship between the peak current Ipeak (trace 417) and the load current Iload (trace 419) according to a specific embodiment of this disclosure. The peak current value Ipeak may, for example, be proportional to the load current Iload.

[0079] Figure 4D This is a schematic diagram of a specific embodiment of a controller 400 according to a second embodiment of the present disclosure. In this embodiment, the first signal 416 is one of the switch drive signals 412. In another embodiment, the first signal 416 may depend on at least one of the switch drive signals 412, or may be otherwise derived from at least one of the switch drive signals 412.

[0080] In this embodiment, the load current determination circuit 414 includes a high-pass filter 420 and a current modulator 422. The high-pass filter 420 is configured to filter the first signal 416, and the current modulator 422 is configured to receive the filtered first signal 416 and convert the first signal 416 from frequency information into current information Imod proportional to the load current Iload. The current modulator 422 is also configured to use the first signal 416 to adjust one or more switch drive signals 412 after the first signal 416 has been converted into current information Imod.

[0081] Figure 5 This is a schematic diagram of a specific embodiment of the controller 400 and switch converter 402 according to a third embodiment of the present disclosure. In this embodiment, the switch converter 402 is a boost converter. The switch converter 402 may include an input capacitor C. IN .

[0082] The power switch 406 includes a high-side switch 406a and a low-side switch 406b. During operation, the switch drive circuit 410 provides a switch drive signal 412, which includes a high-side drive signal 412a to the high-side switch 406a and a low-side drive signal 412b to the low-side switch 406b.

[0083] In this example, power FETs 406a and 406b are shown as N-type power FETs. However, in other embodiments, one or both of switches 406a and 406b may be implemented using P-type transistors.

[0084] In this embodiment, the switch drive circuit 410 includes an on-time circuit 500 configured to set the duration Ton of the magnetization phase. During operation, the load current determination unit 414 controls the duration Ton of the magnetization phase set by the on-time circuit 500 according to a first signal 416. This results in adjusting one or both of the switch drive signals 412a and 412b using the first signal 416 to provide a peak current value Ipeak that depends on the load current Iload.

[0085] The switch drive circuit 410 may include logic circuit 502 configured to provide one or both of switch drive signals 412a and 412b. The on-time circuit 500 may set the duration Ton of the magnetization phase by providing an on-time signal 504 to the logic circuit 502.

[0086] In this embodiment, the switch drive signal 412a is provided to the gate driver 506a, and the gate driver 506a sets the voltage level of the switch drive signal 412a to a level sufficient to drive the switching operation of the high-side switch 406a.

[0087] In this embodiment, the switch drive signal 412b is provided to the gate driver 506b, and the gate driver 506b sets the voltage level of the switch drive signal 412b to a level sufficient to drive the switching operation of the low-side switch 406b.

[0088] The controller 400 may include a zero comparator 510 configured to detect when the inductor current IL is approximately zero and to provide a signal Vzero to the logic circuit 502 indicating the end of the demagnetization phase.

[0089] The controller 400 may further include a comparator 512, which is configured to receive a feedback voltage Vfb dependent on the output voltage Vout, receive a reference voltage Vref, and compare the feedback voltage Vfb with the reference voltage Vref. The comparator 512 is also configured to provide a comparator output signal 514 dependent on the comparison between the feedback voltage Vfb and the reference voltage Vref. In this embodiment, by feeding a resistor R... fb1 R fb2 The resistor divider provides the output voltage Vout to generate the feedback voltage Vfb.

[0090] During operation, logic circuit 502 can receive comparator output signal 514 and provide switch drive signals 412a and 412b according to comparator output signal 514.

[0091] In this embodiment, the switching converter 402 is used as a direct-control DC / DC boost converter with output current proportional modulation provided by the Ton timer 500 provided by the controller 400.

[0092] During operation, the controller 400 generates output current ratio information. This is achieved using a high-pass filter (HPF) 420. During operation, the high-pass filter 420 receives digital information about the converter's switching activity.

[0093] As shown in this example, such digital information can be provided by the low-side switch control signal 412b.

[0094] In another embodiment, as those skilled in the art will understand, this information may be provided by the high-side switch control signal 412a or any other suitable signal.

[0095] In this embodiment, the first signal 416 is provided by the low-side switch drive signal 412b. If the converter 402 needs to deliver a higher output load current Iload, the converter 402 switches more frequently, and the low-side control signal 412b toggles at a higher frequency. Alternatively, if there is no load Iload at the output, the converter 402 needs to switch less frequently, and the low-side control signal 412b toggles at a lower frequency. In this way, the switching activity of the converter 402 translates into information about the current Iload at its output.

[0096] As a next step, the frequency domain information about the converter load current Iload provided by the high-pass filter 420 is converted into a more practical signal (voltage or current) that can be directly applied to the relevant sub-blocks inside the controller 400.

[0097] In this embodiment, the current modulator 422 converts frequency information into proportional current information Imod. In summary, higher converter switching activity corresponds to a higher modulation current, and vice versa.

[0098] A modulation current Imod is applied to the on-time circuit 500. As previously described, the on-time circuit 500 sets the duration Ton of the magnetization phase of the switching converter 402. By applying the modulation current Imod, the duration of the magnetization phase can be extended, resulting in a larger inductor peak current Ipeak. Since the modulation current Imod is proportional to the converter load current Iload, the result is that as the output current Iload increases, the converter 402 operates with a larger peak current Ipeak.

[0099] Figure 6This is a schematic diagram of a specific embodiment of the controller 400 and switch converter 402 according to the fourth embodiment of this disclosure. In this embodiment, with Figure 5 Compared to the embodiment presented, the on-time circuit 500 is omitted, and the switch drive circuit 410 includes a peak current sensing circuit 600. During operation, the peak current sensing circuit 600 senses the inductor current IL, compares the inductor current IL with a reference peak current value, and switches the switching operation from the magnetization phase to the demagnetization phase when the inductor current IL is approximately equal to the reference peak current value.

[0100] The load current determination circuit 414 can be configured to adjust a reference peak current value according to a first signal 416, thereby using the first signal 416 to adjust the switch drive signals 412a, 412b to provide a peak current value Ipeak that depends on the load current Iload.

[0101] The peak current sensing circuit 600 can be configured to adjust the reference peak current value by providing a peak current reference adjustment signal 602 to the logic circuit 502.

[0102] In this embodiment, the switching converter 402 is used as a direct-control DC / DC boost converter with output current proportional modulation of the peak current value provided by the peak current sensing circuit 600 of the controller 400.

[0103] If the modulation current Imod is applied to Figure 5 Similar to the case of the on-time circuit 500 in the embodiment presented, this modulation current Imod can also be applied to the peak current sensing block 600 of this embodiment. In this case, the peak current Ipeak of the converter 402 is directly sensed and compared with a predefined reference. The peak current sensing block 600 is triggered when the inductor current value IL reaches the reference. The peak current sensing event ends the magnetization phase of the converter 402. The modulation current Imod can be added to or subtracted from the reference peak current value, for example, to modulate the inductor current point at which the peak current sensing block 600 is triggered.

[0104] The effect obtained and by Figure 5 The Ton timer modulation provided in the presented embodiment has the same effect: for higher converter load currents Iload, the magnetization phase is extended. Therefore, the generated modulation current Imod can be applied to the Ton timer (on-time circuit 500) and the peak current sensing block (peak current sensing block 600), thereby introducing a dependence of the converter peak current on the output load current Iload.

[0105] Figure 7 It is shown that it is used for, for example Figure 6 The graphs present are simulation results of the actual implementation of the controller 400 and the switching converter 402 under load transient conditions. The graphs show: output voltage VOUT (trace 700), inductor current IL (trace 702), and load current Iload (trace 704).

[0106] The parameters used for simulation are as follows: V IN =3.8V, V OUT =7.9V, L=2.2μH, C OUT,eff =12μF, I OUT =0.5mA->100mA.

[0107] It should be understood that Figure 5 Simulation results of the actual implementation of the controller 400 and the switch converter 402 will be presented with... Figure 7 The waveform-like outline is presented in the image.

[0108] In this example, a relatively slow output load transient is performed, where 100mA (within 1ms) is slowly applied to the output of the switching converter 402. The switching converter 402 itself regulates the 7.9V output voltage Vout, while its input voltage Vin is 3.8V. Initially, when the load current Iload is low, the switching converter 402 switches with a constant peak current Ipeak of approximately 300mA. As the load current Iload begins to increase, the peak current Ipeak increases proportionally, reaching 750mA at a load current of 100mA. It should be understood that the exact value of the inductor peak current is arbitrary, and in this example, it is only used to illustrate the principle behind the proposed implementation, where the converter peak current Ipeak is proportional to its output load current Iload.

[0109] The result of the peak current increasing with the load current is a greater converter output current capability—if the peak current remained constant (as is the case in the known system), the converter would not be able to support the maximum load current in the example presented.

[0110] like Figure 7 As shown, the proportionality of the peak current of the proposed DC / DC converter to the output load current Iload results in an increase in the output voltage Vout ripple because converter 402 generates a larger inductor current pulse. This can be mitigated by introducing a larger output capacitor (electrical load 404, also labeled C). OUT This reduces the output voltage Vout ripple.

[0111] Figure 8 It is shown that it is used for, for example Figure 6Another load transient simulation result graph is presented for the actual implementation of controller 400 and switching converter 402. It shows: output voltage VOUT (trace 800), inductor current IL (trace 802), and load current Iload (trace 804).

[0112] The parameters used for simulation are as follows: V IN =3.8V, V OUT =7.9V, L=2.2μH, C OUT,eff =12μF, I OUT =0.5mA->100mA.

[0113] It should be understood that Figure 5 Simulation results of the actual implementation of the controller 400 and the switch converter 402 will be presented with... Figure 8 The waveform-like outline is presented in the image.

[0114] The advantage of making the output load capability of the switching converter 402 proportional to the output load itself and making its inductor peak current Ipeak adaptive based on the load current Iload is that the converter 402 can remain in discontinuous conduction mode (DCM) operation even under high loads. It is well known that DC / DC converters respond significantly better to transients (e.g., line or load) in DCM operation compared to continuous conduction mode (CCM) operation.

[0115] exist Figure 8 An example simulation of a relatively fast load transient is depicted. In the current case, a load step of 100mA is applied within 10μs. (As shown from...) Figure 8 As can be seen, converter 402 responds instantaneously to transients by increasing its inductor peak current Ipeak proportionally to the load current Iload, in which way, no undershoot of the output voltage VOUT is observed. When the load current Iload is removed from the output, the inductor peak current Ipeak returns to its low value to ensure small output voltage VOUT ripple during light-load operation of converter 402.

[0116] Figure 9A This is a schematic diagram of a specific embodiment of the on-time circuit 500. In this embodiment, the on-time circuit 500 includes a comparator 901 and a reference capacitor C. ref During operation, the reference capacitor C ref Through the reference resistor R ref Charging is performed. Outside of the magnetization phase (e.g., during the demagnetization phase), the reference capacitor C... ref By resetting switch s rst Discharge is initiated. Reference capacitor C. refThe charging process generates a ramp signal at its two ends: v ramp Time constant R ref C ref The first-order slope of the ramp is defined. Once the ramp signal v... ramp Reaching a certain reference voltage V ref The comparator is then triggered, changing V. ramp The logical state of the signal, which in turn indicates the end of the magnetization phase of the converter.

[0117] Figure 9B It shows the use of Figure 9A A specific embodiment of the conduction time circuit 500 is used for Figure 5 Simulation results of the actual implementation of the controller 400 and the switching converter 402 are shown. The output voltage VOUT (trace 900), inductor current IL (trace 902), reset signal (trace 904), and ramp signal v are also shown. ramp (Trace 906) and comparator output signal V comp (Trace 908).

[0118] When the output voltage VOUT of converter 402 drops below the desired target, a new switching cycle is triggered. The switching cycle begins with the magnetization phase, during which the current IL in the inductor increases. Simultaneously, the switch s... rst The reset signal goes low, releasing the reference capacitor C. ref The top plate, and allows the reference capacitor C ref Initiate charging. Once the ramp signal v ramp Reaching the reference voltage V ref When comparator 901 is triggered, it indicates that the magnetization phase must stop and converter 402 needs to enter the demagnetization phase. The duration of the conduction time sets the peak current value of inductor 408.

[0119] Figure 10 It is possible Figure 5 The diagram shows a specific embodiment of the load current determination circuit 414 and the on-time circuit 500 implemented in the embodiments presented herein.

[0120] The high-pass filter 420 includes a resistor R1 coupled to a capacitor C1 via a switch S1, with the capacitor C1 coupled to the switch S1 at the filter output node. The high-pass filter 420 also includes a resistor R2 coupled to the filter output node N0 via a switch S2. Switch S1 is configured to be driven by a digital signal Φ1, which is high when the switch-converter 402 operates in a tri-state phase, and low otherwise. A second switch S2 is configured to be driven by a digital signal Φ2, which is high during the demagnetization phase and low otherwise.

[0121] One or both of the digital signals Φ1 and Φ2 can be the first signal 416. In another embodiment, one or both of the digital signals Φ1 and Φ2 can be derived from or depend on the first signal 416. In a particular embodiment, the first signal 416 can be derived from or depend on at least one of the switch drive signals 412.

[0122] The high-pass filter 420 is configured to provide a filtered first signal to the current modulator at the filter output node N0.

[0123] The current modulator 422 includes a transistor M coupled via a low-resistance switch S0. P Source degradation resistor R S transistor M P The gate is coupled to the filter output node N0. The current modulator 422 includes a current mirror, which includes transistor M. n3 and transistor M n2 transistor M n3 Coupled to the first transistor M via the first node N1 P transistor M n2 The gate is coupled to transistor M at the second node N2. n3 The gate, and transistor M n2 It is configured to provide a modulation current Imod at the output node N3 of the current modulator.

[0124] The current modulator 422 also includes: transistor M n1 The transistor M n1 It has a first terminal coupled to a low-resistance switch S4 and a bias resistor R at the second node N2. B The second terminal and the gate coupled to the first node N1; and the low-resistance switch S3 coupled to the first node N1.

[0125] Low-resistance switches S0 and S4 are each configured to be driven by the first signal 416, and low-resistance switch S3 is configured to be driven by the inverted first signal. Current modulator 422 is configured to use a modulated current Imod to adjust one or more switch drive signals 412a and 412b, thereby using the first signal 416 to adjust one or more switch drive signals 412a and 412b after the frequency information has been converted to current information. In this embodiment, the first signal 416 is the high-side switch drive signal 412a.

[0126] In this embodiment, a modulation current related to the converter output load is generated and applied to the on-time circuit 500. The components of this embodiment can be summarized as follows:

[0127] ■R1 - Filter resistor

[0128] ■C1 - Filter capacitor

[0129] ■R2 - Resistor used to set the discharge rate of capacitor C1

[0130] ■R S - Source degradation resistor used to set transconductance

[0131] ■R B - Bias resistor

[0132] ■M P - PMOS devices used for voltage-to-current conversion

[0133] ■M n1 - Provides NMOS devices for fast node startup

[0134] ■M n2 M n3 -NMOS current mirror structure

[0135] ■S0 to S4 - Low resistance switches.

[0136] Devices R1, R2, and C1, along with switches S1 and S2, form a high-pass filter 420. The structure of the high-pass filter 420 generates the node voltage v. gp Then the node voltage is controlled by the PMOS device M. P Converted to current. The transconductance used for voltage-to-current conversion is provided by the source-degraded resistor R. S Limited. Then, current flows through the NMOS mirror structure M. n2 M n3 It is mirrored to generate the modulation current Imod.

[0137] The circuit, except for the high-pass filter, can remain disabled until the start of the switching cycle, thus not introducing additional current consumption or affecting converter efficiency due to the included circuit.

[0138] For this reason, a very fast wake-up is required. This wake-up is achieved by the NMOS device M. n1 and bias resistor R B This ensures performance. In addition to modulating the converter peak current proportional to the output load, the modulation current can be applied to various system sub-blocks to improve performance.

[0139] Figure 11 The use of, as shown Figure 10 The specific embodiments of the on-time circuit 500 and load current determination circuit 414 presented herein are for use with Figure 5 Simulation results of the actual implementation of the controller 400 and the switching converter 402 are shown. The output voltage (trace 1100), inductor current IL (trace 1102), first signal 416 (trace 1104), digital signal Φ1 (trace 1106), digital signal Φ2 (trace 1108), node voltage v_gp (trace 1110), modulation current Imod (trace 1112), ramp voltage v_ramp (trace 1114), and comparator output v_comp (trace 1116) are shown.

[0140] The operation of this embodiment can be summarized as follows:

[0141] ■ When the converter's output voltage drops below the desired target, a new switching cycle is triggered.

[0142] The switching cycle begins with the magnetization phase, during which the current in the inductor increases. The duration of the magnetization phase is defined by the Ton timer.

[0143] ■ The digital signal Φ1 goes low, causing the high-pass filter signal v to... gp The signal remains constant. Furthermore, the "en" signal goes high to achieve voltage-to-current conversion and a fast wake-up mechanism. Here, the signals controlling switches S3 and S4 are complementary ("en" and "en-bar").

[0144] ■ The modulation current begins to flow and is applied to the Ton timer.

[0145] ■ Due to the modulation current, the capacitor of the Ton timer charges at a reduced rate. Once the ramp signal reaches the reference voltage, the comparator triggers, indicating that the magnetization phase must stop and the converter needs to enter the demagnetization phase. The duration of the on-time sets the peak current value of the inductor. In this case, the peak current is higher due to the Ton timer modulation.

[0146] ■ When the converter enters the demagnetization stage, the digital signal Φ2 goes high, causing capacitor C1, which is part of the high-pass filter, to discharge through R2.

[0147] ■ The demagnetization phase continues until the inductor current reaches zero. At this point, the converter enters a three-state, in which both the low-side and high-side switches are open.

[0148] ■ During the tri-state period, the digital signal Φ1 goes high, causing capacitor C1, which is part of the high-pass filter, to charge through R1. Charging continues until the next switching cycle, and the entire process is repeated in the next switching cycle.

[0149] In this example, modulation of the on-time circuit 500 is implemented. For example... Figure 10 As shown, the modulation current Imod is applied to the reference capacitor C. ref The top plate of the ramp "steals" the charging current. If the modulation current Imod is high, the charging rate of the ramp is low, and the Ton time is therefore prolonged.

[0150] Figure 12 This is a schematic diagram of a specific embodiment of the controller 400 and switch converter 402 according to a fifth embodiment of the present disclosure. In this embodiment, the current modulator 422 is configured to apply a first signal 416 as a variable bias current ivar to the comparator 512 to reduce the propagation delay of the comparator 512.

[0151] Figure 13 This is a schematic diagram of a specific embodiment of the load current determination circuit 414. This embodiment includes a transistor 1300 and a resistor 1302 configured to generate a variable bias current ivar.

[0152] Figure 14 The use of, as shown Figure 13 The specific embodiment of the load current determination circuit 414 presented in the figure is used for... Figure 12 Simulation results of the actual implementation of the controller 400 and the switching converter 402 are shown. The output voltage (trace 1400), inductor current (trace 1402), variable bias current i_var (trace 1404), and load current IL (trace 1406) are shown.

[0153] The proposed implementation allows the output load-dependent modulation current to be applied simultaneously to various regulation subblocks of the DC / DC converter to improve performance. Figure 5 and Figure 6 The modulation currents applied to the Ton timer and the peak current sensor are shown respectively. In addition, the modulation current can also be applied to the main comparator block as a variable bias current, such as... Figure 12As shown. This variable bias current can significantly reduce the propagation delay of comparator 512, resulting in a much more accurate input signal cross-detection capability. The application of the modulation current is not limited to the system sub-blocks mentioned so far and can be used more broadly to improve performance. As previously stated, the modulation current is proportional to the output load, meaning it does not contribute to the converter's quiescent current (no light load efficiency degradation) and only increases when load current is applied to the converter's output.

[0154] Figure 13 The circuit implementation examples demonstrate that the proposed implementation is very simple to implement on silicon, and since it does not contain large structures, it can be a very area-saving overall solution.

[0155] refer to Figure 13 Capacitor C1 charges during the three-state phase of the converter and discharges during the demagnetization phase. This means that as the load current of the converter increases, the three-state phase becomes shorter, and therefore the voltage node VGP becomes lower. Since the voltage node VGP is also the gate terminal of the PMOS device Mp, a lower voltage value causes the device to conduct more and have a larger current flowing through its channel. The current flowing through device Mp can be directly used as the modulation current. This is achieved by adding a modulation current to the PMOS device Mp. Figure 10 The illustrated embodiment is used to illustrate an additional device that generates a current ivar.

[0156] like Figure 14 As shown, this variable current increases proportionally to the converter load current. The waveform illustrates a slow load transient applied to the DC / DC converter. Initially, due to the low load current, the three-state phase lasts a long time, and no variable current flows. However, as the load current increases, the three-state phase becomes shorter, and the variable current begins to flow. The resulting variable current, ivar, is therefore proportional to the output load current.

[0157] Embodiments of this disclosure can provide a simple, zero-IQ, and area-saving solution for load-dependent (adaptive) inductor peak current in the context of direct control of a DC / DC converter, thereby mitigating or overcoming the problems of known systems.

[0158] Embodiments of this disclosure generate output load ratio information within the DC / DC converter, which can then be used to adjust various control parameters.

[0159] The embodiments of this disclosure can be advantageous in DC / DC converter environments with DCM operation (e.g., boost or buck). In particular, the proposed scheme allows for the efficient generation of output load ratio information, which can be used to adjust various control parameters, thereby significantly improving regulator performance.

[0160] Common reference numerals among the figures indicate common features.

[0161] Various improvements and modifications can be made to the above content without departing from the scope of this disclosure.

[0162] This disclosure includes, but is not limited to, the following terms.

[0163] 1. A controller for a switching converter, the switching converter being configured to receive an input voltage, generate an output voltage, and provide load current to an electrical load, the switching converter comprising:

[0164] One or more power switches; and

[0165] Inductor;

[0166] The controller is configured to drive the switching operation of the one or more power switches to provide:

[0167] During the magnetization phase, the inductor current flowing through the inductor increases to a peak current value dependent on the load current; and

[0168] During the demagnetization phase, the inductor current decreases from the peak current value.

[0169] The controller includes:

[0170] A switch driving circuit configured to provide one or more switch driving signals, each of the one or more switch driving signals being configured to control the switching state of one of the one or more power switches, thereby driving the switching operation of the one or more power switches; and

[0171] Load current determination circuit, the load current determination circuit being configured to:

[0172] Receive a first signal depending on the load current; and

[0173] The first signal is used to adjust the one or more switch drive signals to provide the peak current value that depends on the load current.

[0174] Clause 2. The controller according to Clause 1, wherein the peak current value is proportional to the load current.

[0175] Clause 3. The controller as described in Clause 1, wherein:

[0176] The first signal is one of the switch drive signals; and

[0177] The load current determination circuit includes:

[0178] A high-pass filter, configured to filter the first signal; and

[0179] A current modulator, configured as follows:

[0180] Receive the first signal after filtering;

[0181] Convert the first signal from frequency information into current information proportional to the load current; and

[0182] The first signal after conversion is used to adjust the one or more switch drive signals.

[0183] Clause 4. The controller according to Clause 1, wherein the switch drive circuit comprises:

[0184] An on-time circuit, configured to set the duration of the magnetization phase;

[0185] The load current determination circuit is configured to control the duration of the magnetization phase set by the conduction time circuit according to the first signal, thereby using the first signal to adjust the one or more switch drive signals to provide the peak current value depending on the load current.

[0186] Clause 5. The controller as described in Clause 4, wherein:

[0187] The switch driving circuit includes logic circuitry configured to provide the one or more switch driving signals; and

[0188] The on-time circuit is configured to set the duration of the magnetization phase by providing an on-time signal to the logic circuit.

[0189] Clause 6. The controller according to Clause 5 further includes a zero comparator, said zero comparator being configured to:

[0190] Detecting when the inductor current is approximately zero; and

[0191] The logic circuit is provided with a signal indicating the end of the demagnetization phase.

[0192] Clause 7. The controller according to Clause 5 further includes a comparator configured to:

[0193] Receive a feedback voltage that depends on the output voltage;

[0194] Receive reference voltage;

[0195] Compare the feedback voltage with the reference voltage; and

[0196] A comparator output signal is provided that depends on the comparison between the feedback voltage and the reference voltage;

[0197] The logic circuit is configured to receive the comparator output signal and provide one or more switch drive signals, each switch drive signal depending on the comparator output signal.

[0198] Clause 8. The controller as described in Clause 7, wherein:

[0199] The first signal is one of the switch drive signals; and

[0200] The load current determination circuit includes:

[0201] A high-pass filter, configured to filter the first signal; and

[0202] A current modulator, configured as follows:

[0203] Receive the first signal after filtering;

[0204] Convert the first signal from frequency information into current information proportional to the load current; and

[0205] The first signal after conversion is used to adjust the one or more switch drive signals.

[0206] Clause 9. The controller according to Clause 8, wherein the current modulator is configured to apply the first signal as a variable bias current to the comparator to reduce the propagation delay of the comparator.

[0207] Clause 10. The controller according to Clause 1, wherein the switch drive circuit includes a peak current sensing circuit, the peak current sensing circuit being configured to:

[0208] Sensing the current in the inductor;

[0209] Compare the inductor current with a reference peak current value; and

[0210] When the inductor current is approximately equal to the reference peak current value, the switching operation is switched from the magnetization stage to the demagnetization stage;

[0211] The load current determination circuit is configured to adjust the reference peak current value according to the first signal, thereby using the first signal to adjust the one or more switch drive signals to provide the peak current value depending on the load current.

[0212] Clause 11. The controller as described in Clause 10, wherein:

[0213] The switch driving circuit includes logic circuitry configured to provide the one or more switch driving signals; and

[0214] The peak current sensing circuit is configured to adjust the reference peak current value by providing a peak current reference adjustment signal to the logic circuit.

[0215] Clause 12. The controller pursuant to Clause 11 includes a zero comparator, said zero comparator being configured to:

[0216] Detecting when the inductor current is approximately zero; and

[0217] The logic circuit is provided with a signal indicating the end of the demagnetization phase.

[0218] Clause 13. The controller according to Clause 11 further includes a comparator configured to:

[0219] Receive a feedback voltage that depends on the output voltage;

[0220] Receive reference voltage;

[0221] Compare the feedback voltage with the reference voltage; and

[0222] A comparator output signal is provided that depends on the comparison between the feedback voltage and the reference voltage;

[0223] The logic circuit is configured to receive the comparator output signal and provide one or more switch drive signals, each switch drive signal depending on the comparator output signal.

[0224] Clause 14. The controller according to Clause 1, wherein the switching converter is a buck converter, a boost converter, or a buck-boost converter.

[0225] Clause 15. The controller as described in Clause 14, wherein:

[0226] The switching converter is a boost converter; and

[0227] The power switch includes a high-side switch and a low-side switch.

[0228] Clause 16. The controller according to Clause 15 further includes a switch drive circuit, the switch drive circuit being configured to:

[0229] Provide a high-side switch drive signal to the high-side switch; and

[0230] Provide a low-side switch drive signal to the low-side switch;

[0231] The high-side switch drive signal and the low-side switch drive signal are configured to control the switching state of their respective power switches, thereby driving the switching operation of the power switches.

[0232] Clause 17. The controller according to Clause 5, wherein the high-pass filter comprises:

[0233] A first resistor is coupled to a first capacitor via a first switch, and the first capacitor is coupled to the first switch at the filter output node;

[0234] A second resistor is coupled to the filter output node via a second switch;

[0235] in:

[0236] The first switch is configured to be driven by a first digital signal, which is high when the switch converter operates in a three-state phase and low under other conditions.

[0237] The second switch is configured to be driven by a second digital signal, which is high during the demagnetization phase and low under other conditions; and

[0238] The high-pass filter is configured to provide a filtered first signal to the current modulator at the filter output node.

[0239] Clause 18. The controller according to Clause 17, wherein the current modulator comprises:

[0240] A source degradation resistor, the source degradation resistor being coupled to a first transistor via a first low-resistance switch, the gate of the first transistor being coupled to the filter output node;

[0241] A current mirror, the current mirror comprising:

[0242] A second transistor, which is coupled to the first transistor via a first node;

[0243] A third transistor, the gate of which is coupled to the gate of the second transistor at the second node, and the third transistor is configured to provide a first modulation current at the output node of the current modulator;

[0244] A fourth transistor having a first terminal coupled to a second low-resistance switch, a second terminal coupled to a bias resistor at the second node, and a gate coupled to the first node; and

[0245] A third low-resistance switch, the third low-resistance switch being coupled to the first node;

[0246] in:

[0247] The first low-resistance switch and the second low-resistance switch are each configured to be driven by the first signal, and the third low-resistance switch is configured to be driven by the inverted first signal; and

[0248] The current modulator is configured to use the first modulated current to adjust the one or more switch drive signals, thereby using the converted first signal to adjust the one or more switch drive signals.

[0249] Clause 19. The controller as described in Clause 18, wherein:

[0250] The switch drive circuit includes an on-time circuit configured to set the duration of the magnetization phase; and

[0251] The load current determination circuit is configured to use the first modulation current to control the duration of the magnetization phase set by the conduction time circuit according to the first signal, thereby using the first signal to adjust the one or more switch drive signals to provide the peak current value depending on the load current.

[0252] Clause 20. The controller as described in Clause 19, wherein:

[0253] The switch driving circuit includes logic circuitry configured to provide the one or more switch driving signals;

[0254] The on-time circuit is configured to set the duration of the magnetization phase by providing an on-time signal to the logic circuit; and

[0255] The controller includes a comparator, which is configured to:

[0256] Receive a feedback voltage that depends on the output voltage;

[0257] Receive reference voltage;

[0258] The feedback voltage is compared with the reference voltage; and

[0259] A comparator output signal is provided that depends on the comparison between the feedback voltage and the reference voltage;

[0260] The logic circuit is configured to receive the comparator output signal and provide one or more switch drive signals, each switch drive signal depending on the comparator output signal.

[0261] Clause 21. The controller according to Clause 20, wherein the current modulator comprises:

[0262] A fifth transistor, the gate of which is coupled to the gate of the first transistor; and

[0263] A third resistor, which is coupled in series with the fifth transistor;

[0264] in:

[0265] The third resistor and the fifth transistor are configured to generate a variable bias current; and

[0266] The current modulator is configured to apply the first signal as the variable bias current to the comparator to reduce the propagation delay of the comparator.

[0267] Clause 22. The controller according to Clause 18, wherein the switch drive circuit includes a peak current sensing circuit, the peak current sensing circuit being configured to:

[0268] Sensing the current in the inductor;

[0269] The inductor current is compared with a reference peak current value; and

[0270] When the inductor current is approximately equal to the reference peak current value, the switching operation is switched from the magnetization stage to the demagnetization stage;

[0271] The load current determination circuit is configured to use the first modulation current to adjust the reference peak current value according to the first signal, thereby using the first signal to adjust the one or more switch drive signals to provide the peak current value depending on the load current.

[0272] Clause 23. A power converter system comprising a switching converter for receiving an input voltage, generating an output voltage, and providing a load current to an electrical load, the switching converter comprising:

[0273] One or more power switches;

[0274] Inductors; and

[0275] A controller, configured to drive the switching operation of the one or more power switches to provide:

[0276] During the magnetization phase, the inductor current flowing through the inductor increases to a peak current value dependent on the load current; and

[0277] During the demagnetization phase, the inductor current decreases from the peak current value.

[0278] The controller includes:

[0279] A switch driving circuit configured to provide one or more switch driving signals, each of the one or more switch driving signals being configured to control the switching state of one of the one or more power switches, thereby driving the switching operation of the one or more power switches; and

[0280] Load current determination circuit, the load current determination circuit being configured to:

[0281] Receive a first signal depending on the load current; and

[0282] The first signal is used to adjust the one or more switch drive signals to provide the peak current value that depends on the load current.

[0283] Clause 24. A method for controlling a switching converter, the switching converter being configured to receive an input voltage, generate an output voltage, and provide load current to an electrical load.

[0284] The switching converter includes:

[0285] One or more power switches; and

[0286] Inductor;

[0287] The method includes:

[0288] Using a controller to drive the switching operation of one or more power switches to provide:

[0289] During the magnetization phase, the inductor current flowing through the inductor increases to a peak current value dependent on the load current; and

[0290] During the demagnetization phase, the inductor current decreases from the peak current value.

[0291] A switch drive circuit is used to provide one or more switch drive signals, each of the one or more switch drive signals being configured to control the switching state of one of the one or more power switches, thereby driving the switching operation of the one or more power switches.

[0292] Receive a first signal dependent on the load current at the load current determination circuit; and

[0293] The load current determination circuit uses the first signal to adjust the one or more switch drive signals to provide the peak current value that depends on the load current.

Claims

1. A controller for a switching converter, the switching converter being configured to receive an input voltage, generate an output voltage, and provide load current to an electrical load, the switching converter comprising: One or more power switches; and Inductor; The controller is configured to drive the switching operation of the one or more power switches to provide: During the magnetization phase, the inductor current flowing through the inductor increases to a peak current value dependent on the load current; and During the demagnetization phase, the inductor current decreases from the peak current value. The controller includes: A switch driving circuit configured to provide one or more switch driving signals, each of the one or more switch driving signals being configured to control the switching state of one of the one or more power switches, thereby driving the switching operation of the one or more power switches; and Load current determination circuit, the load current determination circuit being configured to: Receive a first signal depending on the load current; and The first signal is used to adjust the one or more switch drive signals to provide the peak current value that depends on the load current.

2. The controller according to claim 1, wherein: The first signal is one of the switch drive signals; and The load current determination circuit includes: A high-pass filter configured to filter the first signal; and A current modulator, configured as follows: Receive the first signal after filtering; Convert the first signal from frequency information into current information proportional to the load current; and The first signal after conversion is used to adjust the one or more switch drive signals.

3. The controller according to claim 1, wherein, The switch driving circuit includes: An on-time circuit, configured to set the duration of the magnetization phase; The load current determination circuit is configured to control the duration of the magnetization phase set by the conduction time circuit according to the first signal, thereby using the first signal to adjust the one or more switch drive signals to provide the peak current value depending on the load current.

4. The controller according to claim 3, wherein: The switch driving circuit includes logic circuitry configured to provide the one or more switch driving signals; and The on-time circuit is configured to set the duration of the magnetization phase by providing an on-time signal to the logic circuit.

5. The controller of claim 4, further comprising a comparator configured to: Receive a feedback voltage that depends on the output voltage; Receive reference voltage; The feedback voltage is compared with the reference voltage; as well as A comparator output signal is provided that depends on the comparison between the feedback voltage and the reference voltage; The logic circuit is configured to receive the comparator output signal and provide one or more switch drive signals, each switch drive signal depending on the comparator output signal.

6. The controller according to claim 5, wherein: The first signal is one of the switch drive signals; and The load current determination circuit includes: A high-pass filter configured to filter the first signal; and A current modulator, configured as follows: Receive the first signal after filtering; Convert the first signal from frequency information into current information proportional to the load current; and The first signal after conversion is used to adjust the one or more switch drive signals.

7. The controller according to claim 1, wherein, The switch driving circuit includes a peak current sensing circuit, which is configured to: Sensing the current in the inductor; The inductor current is compared with a reference peak current value; as well as When the inductor current is approximately equal to the reference peak current value, the switching operation is switched from the magnetization stage to the demagnetization stage; The load current determination circuit is configured to adjust the reference peak current value according to the first signal, thereby using the first signal to adjust the one or more switch drive signals to provide the peak current value depending on the load current.

8. The controller according to claim 7, wherein: The switch driving circuit includes logic circuitry configured to provide the one or more switch driving signals; and The peak current sensing circuit is configured to adjust the reference peak current value by providing a peak current reference adjustment signal to the logic circuit.

9. The controller of claim 8, further comprising a comparator configured to: Receive a feedback voltage that depends on the output voltage; Receive reference voltage; The feedback voltage is compared with the reference voltage; as well as A comparator output signal is provided that depends on the comparison between the feedback voltage and the reference voltage; The logic circuit is configured to receive the comparator output signal and provide one or more switch drive signals, each switch drive signal depending on the comparator output signal.

10. A power converter system comprising a switching converter for receiving an input voltage, generating an output voltage, and providing a load current to an electrical load, the switching converter comprising: One or more power switches; Inductor; and A controller, configured to drive the switching operation of the one or more power switches to provide: During the magnetization phase, the inductor current flowing through the inductor increases to a peak current value that depends on the load current. and During the demagnetization phase, the inductor current decreases from the peak current value. The controller includes: A switch driving circuit configured to provide one or more switch driving signals, each of the one or more switch driving signals being configured to control the switching state of one of the one or more power switches, thereby driving the switching operation of the one or more power switches; and Load current determination circuit, the load current determination circuit being configured to: Receive a first signal depending on the load current; and The first signal is used to adjust the one or more switch drive signals to provide the peak current value that depends on the load current.

11. A method for controlling a switching converter, the switching converter being configured to receive an input voltage, generate an output voltage, and provide load current to an electrical load. The switching converter includes: One or more power switches; and Inductor; The method includes: Using a controller to drive the switching operation of one or more power switches to provide: During the magnetization phase, the inductor current flowing through the inductor increases to a peak current value dependent on the load current; and During the demagnetization phase, the inductor current decreases from the peak current value. A switch drive circuit is used to provide one or more switch drive signals, each of the one or more switch drive signals being configured to control the switching state of one of the one or more power switches, thereby driving the switching operation of the one or more power switches. Receive a first signal dependent on the load current at the load current determination circuit; and The load current determination circuit uses the first signal to adjust the one or more switch drive signals to provide the peak current value that depends on the load current.

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