Image sensor and manufacturing method thereof

Abstract

The invention discloses an image sensor and a manufacturing method thereof, and belongs to the technical field of semiconductors. The image sensor comprises a plurality of pixel unit structures, each pixel unit structure comprises a substrate, a photodiode arranged in the substrate, a transmission grid electrode and an interlayer dielectric layer covering the substrate, and a metal interconnection layer is arranged in the interlayer dielectric layer. The metal interconnection layer is located in an area above the substrate between the photodiodes of any two adjacent pixel unit structures; the light guide layer is arranged on the interlayer dielectric layers and the photodiode between the interlayer dielectric layers, and the surface of the light guide layer on the photodiode is arranged in an arc shape or a plane shape. According to the image sensor and the manufacturing method thereof provided by the invention, the quantum efficiency can be improved, the parasitic light effect can be reduced, and the chip performance can be improved.

Description

Technical Field

[0001] This invention belongs to the field of semiconductor technology, and specifically relates to an image sensor and its manufacturing method. Background Technology

[0002] CMOS image sensors (Complementary Metal Oxide Semiconductor Image Sensors, CIS) offer advantages such as high integration, low power supply voltage, and low technological barriers, leading to their widespread application in consumer electronics, autonomous driving, biometrics, and security. CMOS image sensors can employ two exposure methods: Global Shutter (GS) mode and Rolling Shutter (RS) mode. Global Shutter pixels can be categorized into charge domain and voltage domain types based on the type of storage node. Compared to voltage domain pixels, charge domain pixels offer advantages such as scalability, low readout noise, and low dark current. In charge domain global exposure image sensors, a metal interconnect layer is placed between adjacent photodiodes to form an optical path above the photodiodes. The thickness of this metal interconnect layer is a crucial factor affecting parasitic light response and quantum efficiency. If the metal interconnect layer is too thick or too thin, light may not reach the photodiode surface or may be scattered before reaching it, resulting in low quantum efficiency, high parasitic light effects, and negatively impacting chip performance. Summary of the Invention

[0003] The purpose of this invention is to provide an image sensor and its manufacturing method. The image sensor and its manufacturing method provided by this invention can focus light on the surface of a photodiode, thereby improving quantum efficiency, reducing parasitic light effects, and improving chip performance.

[0004] To address the aforementioned technical problems, the present invention provides an image sensor comprising multiple pixel unit structures, wherein the pixel unit structure includes:

[0005] The substrate, a photodiode disposed within the substrate, a transmission gate, and an interlayer dielectric layer covering the substrate, wherein a metal interconnect layer is provided in the interlayer dielectric layer and the metal interconnect layer is located in the region above the substrate between any two adjacent photodiodes of the pixel unit structure;

[0006] A light guide layer is disposed on the photodiode on the interlayer dielectric layer and between the interlayer dielectric layers, wherein the surface of the light guide layer on the photodiode is arc-shaped or planar.

[0007] In one embodiment of the present invention, the pixel unit structure further includes a first light-shielding structure, which is disposed on the top and sidewall of the transmission gate.

[0008] In one embodiment of the present invention, when the surface of the photoconductor layer on the photodiode is concave or convex, the maximum size of the concave or convex is d, then d = k(m-0.5x), where m is the total thickness of the interlayer dielectric layer on the first light-shielding structure, x is the size of the pixel unit structure, and k is the correlation coefficient; when d is positive, the surface of the photoconductor layer is concave, when d is negative, the surface of the photoconductor layer is convex; when d is zero, the surface of the photoconductor layer is planar.

[0009] In one embodiment of the present invention, the photoconductive layer is titanium-doped silicon dioxide, and the number of titanium atoms accounts for 3% to 5% of the total number of atoms.

[0010] In one embodiment of the present invention, the pixel unit structure includes a center pixel and an edge pixel. In the edge pixel, the midpoint of the arc of the light guide layer is offset towards the center pixel. The closer the edge pixel is to the edge of the pixel array, the greater the displacement.

[0011] In one embodiment of the present invention, the pixel unit structure further includes a second light-shielding structure, which is disposed between the light guide layer and the interlayer dielectric layer; in the central pixel, the width of the second light-shielding structure is equal around the light guide layer, and in the edge pixels, the width of the second light-shielding structure on the side away from the central pixel is greater than the width on the side closer to the central pixel.

[0012] In one embodiment of the present invention, in the center pixel, a second light-shielding structure is provided between the light guide layer and the interlayer dielectric layer, and the width of the second light-shielding structure is equal around the light guide layer; in the edge pixel, a second light-shielding structure is provided between the light guide layer and the interlayer dielectric layer near the edge, and an air gap is provided near the center pixel.

[0013] The present invention also provides a method for manufacturing an image sensor, for forming the image sensor described above, comprising the following steps:

[0014] A substrate is provided in which a plurality of photodiodes are formed for forming a plurality of pixel unit structures;

[0015] A transmission gate is formed on the substrate on the side of the photodiode;

[0016] An interlayer dielectric layer is formed on the substrate between two adjacent photodiodes of the pixel unit structure, and a metal interconnect layer is formed in the interlayer dielectric layer;

[0017] A light guide layer is formed on the interlayer dielectric layer and on the photodiode between the interlayer dielectric layers, and the surface of the light guide layer on the photodiode is arranged in an arc shape or a plane.

[0018] In one embodiment of the present invention, the manufacturing method further includes:

[0019] After the interlayer dielectric layer is formed, the interlayer dielectric layer on the photodiode is etched to form a trench; in the center pixel, the thickness of the interlayer dielectric layer around the trench is equal; in the edge pixel, the distance between the interlayer dielectric layer on the edge side and the edge of the adjacent photodiode is greater than the distance between the interlayer dielectric layer on the layer on the edge side of the center pixel and the edge of the adjacent photodiode.

[0020] A light guide layer is formed in the trench by spin coating, and the surface of the light guide layer is recessed.

[0021] In one embodiment of the present invention, the manufacturing method further includes:

[0022] A photoresist layer is formed on the surface of the photoconductor layer, and the side of the photoresist layer away from the photoconductor layer is a plane.

[0023] The photoresist layer and a portion of the photoconductive layer are etched to form a raised photoconductive layer on the photodiode.

[0024] In one embodiment of the present invention, the manufacturing method further includes:

[0025] After forming the interlayer dielectric layer, the interlayer dielectric layer on the photodiode is etched to form a trench;

[0026] A compensation layer is formed within the trench;

[0027] Etch a portion of the compensation layer at the center of the trench to form an opening;

[0028] A light guide layer is formed on the compensation layer by spin coating, and the surface of the light guide layer is recessed.

[0029] In one embodiment of the present invention, the manufacturing method further includes:

[0030] After forming the interlayer dielectric layer, a portion of the interlayer dielectric layer is etched to form an annular groove on the photodiode; in the center pixel, the width of the annular groove is equal around its perimeter, and in the edge pixels, the width of the annular groove near the edge is greater than the width near the center pixel.

[0031] A light-shielding material is deposited within the annular groove to form a second light-shielding structure;

[0032] Remove the interlayer dielectric layer within the second light-shielding structure to form a trench;

[0033] A light guide layer is formed in the trench by spin coating, and the surface of the light guide layer is recessed.

[0034] In one embodiment of the present invention, the manufacturing method further includes:

[0035] After forming the interlayer dielectric layer, a portion of the interlayer dielectric layer is etched to form an annular groove in the center pixel, the width of which is equal around the perimeter; and in the edge pixels, a groove is formed on the side furthest from the center pixel.

[0036] A light-shielding material is deposited in the annular groove and within the groove to form a second light-shielding structure;

[0037] Remove the interlayer dielectric layer within the second light-shielding structure of the center pixel to form a trench;

[0038] Remove a portion of the interlayer dielectric layer from the edge pixels to form trenches and air gaps;

[0039] A light guide layer is formed in the trench by spin coating, and the surface of the light guide layer is recessed.

[0040] In summary, this invention provides an image sensor and its fabrication method. In a global shutter image sensor, by setting the surface shape of the photoconductor layer on the photodiode through the pixel unit structure size and the total thickness of the interlayer dielectric layer on the first light-shielding structure, light can be focused onto the photodiode surface, thereby improving quantum efficiency, reducing parasitic light effects, and enhancing chip performance. Furthermore, in both the central and edge regions of the image sensor, light can be better focused onto the pixel center, improving the image quality. By setting a second light-shielding structure or a second light-shielding structure and an aperture gap, quantum efficiency can be further increased, parasitic light effects reduced, and optical crosstalk between different pixel units can be mitigated.

[0041] Of course, any product implementing this invention does not necessarily need to achieve all of the advantages described above at the same time. Attached Figure Description

[0042] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0043] Figure 1This is a cross-sectional view of one embodiment after forming a photodiode, a transmission gate, a front dielectric layer, a first light-shielding structure, an interlayer dielectric layer, and a metal interconnect layer.

[0044] Figure 2 This is a cross-sectional view of a trench formed in an interlayer dielectric layer in one embodiment.

[0045] Figure 3 This is a cross-sectional view of the formation of the light guide layer in one embodiment.

[0046] Figure 4 This is a cross-sectional view of a planar layer formed in one embodiment.

[0047] Figure 5 This is a cross-sectional view of an image sensor in one embodiment.

[0048] Figure 6 This is a cross-sectional view of a photoresist layer formed on a photoconductor layer in another embodiment.

[0049] Figure 7 This is a cross-sectional view of the formation of the light guide layer in another embodiment.

[0050] Figure 8 This is a cross-sectional view of an image sensor in another embodiment.

[0051] Figure 9 This is a cross-sectional view of a compensation layer formed in a trench in another embodiment.

[0052] Figure 10 This is a cross-sectional view of the etched compensation layer forming an opening in another embodiment.

[0053] Figure 11 This is a cross-sectional view of the formation of the light guide layer in another embodiment.

[0054] Figure 12 This is a cross-sectional view of an image sensor in another embodiment.

[0055] Figure 13 This is a cross-sectional view of an annular groove formed within an interlayer dielectric layer in another embodiment.

[0056] Figure 14 This is a cross-sectional view of the second light-shielding structure in another embodiment.

[0057] Figure 15 This is a cross-sectional view showing the formation of a trench in another embodiment.

[0058] Figure 16 This is a cross-sectional view of an image sensor in another embodiment.

[0059] Figure 17 A cross-sectional view of the second light-shielding structure in another embodiment.

[0060] Figure 18 This is a cross-sectional view showing the formation of grooves and air gaps in another embodiment.

[0061] Figure 19 This is a cross-sectional view of an image sensor in another embodiment.

[0062] Label Explanation:

[0063] 10. Substrate; 11. Photodiode; 12. Transmission gate; 13. Front dielectric layer; 14. First light-shielding structure; 15. Interlayer dielectric layer; 16. Metal interconnect layer; 17. Trench; 18. Photoconductive layer; 19. Planarization layer; 20. Microlens; 100. Center pixel; 101. First edge pixel; 102. Second edge pixel; 110. Photoresist layer; 120. Compensation layer; 121. Opening; 130. Second light-shielding structure; 131. Annular groove; 140. Air gap. Detailed Implementation

[0064] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0065] It should be noted that the illustrations provided in this embodiment are only schematic representations of the basic concept of the present invention. Therefore, the drawings only show the components related to the present invention and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0066] In this invention, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are used only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application. Furthermore, the terms "first" and "second" are used only for descriptive and distinguishing purposes and should not be construed as indicating or implying relative importance.

[0067] Please see Figure 5 , Figure 8 , Figure 12 , Figure 16 and Figure 18As shown, this invention does not limit the type of image sensor. For the purpose of illustrating this application, the image (Photo Diode, PD) sensor provided in this embodiment is, for example, a front-illuminated global shutter CMOS image sensor. The image sensor includes multiple pixel unit structures, each pixel unit structure including: a substrate 10, a photodiode 11 disposed within the substrate 10, a transmission gate 12, and an interlayer dielectric layer 15 covering the substrate 10. The interlayer dielectric layer 15 has a metal interconnect layer 16, and the metal interconnect layer 16 is located in the region above the substrate 10 between any two adjacent photodiodes 11 of the pixel unit structures. A light guide layer 18 is disposed on the interlayer dielectric layer 15 and on the photodiodes 11 between the interlayer dielectric layers 15. The surface of the light guide layer 18 on the photodiode 11 is arc-shaped or planar. The image sensor provided by this invention can concentrate light near the surface of the photodiode, increasing quantum efficiency and reducing parasitic light effects.

[0068] Please see Figure 5 , Figure 8 , Figure 12 , Figure 16 and Figure 18 As shown, in one embodiment of the present invention, the substrate 10 can be any applicable semiconductor material, such as silicon carbide (SiC), gallium nitride (GaN), aluminum nitride (AlN), indium nitride (InN), silicon germanium (GeSi), sapphire, or silicon wafers, etc., and also includes stacked structures composed of these semiconductors, or silicon-on-insulator, silicon-on-insulator stacked, silicon-on-insulator stacked, silicon-on-insulator, and germanium-on-insulator, etc., which can be selected according to the fabrication requirements of the image sensor. In this embodiment, the substrate 10 is, for example, a silicon wafer semiconductor substrate, or a P-type substrate. Based on the position of the substrate 10, the pixel unit structure is divided into a center pixel 100, a first edge pixel 101, and a second edge pixel 102, for example, located on both sides of the center pixel 100.

[0069] Please see Figure 5 , Figure 8 , Figure 12 , Figure 16 and Figure 18As shown, in one embodiment of the present invention, a photodiode 11 is disposed within a substrate 10, and a transmission gate 12 is disposed on the substrate 10 to the side of the photodiode 11. A gate dielectric layer (not shown) is disposed between the transmission gate 12 and the substrate 10. A front dielectric layer 13 is disposed on the transmission gate 12 and the substrate 10. The front dielectric layer 13 includes, for example, a sidewall dielectric layer, a metal silicide barrier layer, and a via etching stop layer. A first light-shielding structure 14 is disposed on the top and sidewall of the transmission gate 12, covering the front dielectric layer 13 to improve the parasitic light response of the charge domain global image sensor.

[0070] Please see Figure 5 , Figure 8 , Figure 12 , Figure 16 and Figure 18 As shown, in one embodiment of the present invention, an interlayer dielectric layer 15 is disposed on a substrate 10 between adjacent photodiodes 11, covering the transmission gate 12 and part of the photodiodes 11. A metal interconnect layer 16 is disposed within the interlayer dielectric layer 15, and the metal interconnect layer 16 may be a multilayer structure. Trenches are formed between the interlayer dielectric layers 15, and a distance is provided between the metal interconnect layer 16 and the trenches. A light guide layer 18 is formed within the trenches and on the interlayer dielectric layer 15. The light guide layer 18 may be formed by filling with organic or inorganic materials with high light transmittance. The surface of the light guide layer 18 on the photodiode 11 is arranged in an arc shape.

[0071] Please see Figure 3 , Figure 5 , Figure 7 , Figure 8 , Figure 12 , Figure 16 and Figure 18As shown, in one embodiment of the present invention, the surface shape of the light guide layer 18 on the photodiode 11 is determined according to the pixel unit structure size and the total thickness of the interlayer dielectric layer 15 on the first light-shielding structure 14. Specifically, when the thickness of the interlayer dielectric layer 15 on the first light-shielding structure 14 is greater than 0.5 times the pixel unit structure size, the surface of the light guide layer 18 is designed to be concave, and the thicker the interlayer dielectric layer 15, the larger the concavity; when the thickness of the interlayer dielectric layer 15 on the first light-shielding structure 14 is equal to 0.5 times the pixel unit structure size, the surface of the light guide layer 18 is designed to be planar; when the thickness of the interlayer dielectric layer 15 on the first light-shielding structure 14 is less than 0.5 times the pixel unit structure size, the surface of the light guide layer 18 is designed to be convex. The maximum size of the depression or protrusion on the surface of the light guide layer 18 is d, then d = k(m - 0.5x), where m is the total thickness of the interlayer dielectric layer 15 on the first light-shielding structure 14, x is the pixel unit structure size, and k is the correlation coefficient. In one embodiment of the present invention, k takes a value of 0.1 to 0.3. A positive d indicates a depression on the surface of the light guide layer 18, a negative d indicates a protrusion on the surface of the light guide layer 18, and d being zero indicates that the surface of the light guide layer 18 is planar.

[0072] Please see Figure 5 , Figure 8 , Figure 12 , Figure 16 and Figure 18 As shown, in one embodiment of the present invention, a planarization layer 19 and a microlens 20 are disposed on the light guide layer 18. The side of the planarization layer 19 away from the light guide layer 18 is planar to facilitate subsequent processing. The microlens 20 is disposed on the planarization layer 19 to improve light collection efficiency and enhance image quality. By setting the surface shape of the light guide layer on the photodiode according to the pixel unit structure size and the total thickness of the interlayer dielectric layer on the first light-shielding structure, light can be focused on the surface of the photodiode, thereby improving quantum efficiency, reducing parasitic light effects, and improving chip performance.

[0073] Please see Figure 3 , Figure 5 , Figure 8 , Figure 12 , Figure 16 and Figure 18As shown, in one embodiment of the present invention, the principal ray angle on the center pixel 100 is close to 0 degrees. The further away from the center pixel 100, the larger the ray angle of the edge pixels. Therefore, within the edge pixels, the center of the concave or convex arc of the light guide layer 18 is shifted towards the center pixel 100. The closer the edge pixel is to the edge of the pixel array, the greater the displacement, thereby allowing the light to converge better at the pixel center, increasing quantum efficiency and reducing parasitic light effects. That is, in the first edge pixel 101 and the second edge pixel 102, the midpoint A of the concave or convex arc of the light guide layer 18 is shifted towards the center pixel 100 relative to the midpoint of the photodiode 11, and the farther away from the center pixel 100, the greater the offset S. This allows the light to converge better at the pixel center, increasing quantum efficiency, reducing parasitic light effects, and improving the imaging quality of the image sensor.

[0074] Please see Figure 16 As shown, in another embodiment of the present invention, a second light-shielding structure 130 is provided around the light guide layer 18, that is, the second light-shielding structure 130 is disposed between the light guide layer 18 and the interlayer dielectric layer 15. In the center pixel 100, the width of the second light-shielding structure 130 around the light guide layer 18 is equal. In the first edge pixel 101 and the second edge pixel 102, the width of the second light-shielding structure 130 around the light guide layer 18 is inconsistent, with the width near the edge being greater than the width near the center pixel 100. This further increases quantum efficiency, reduces parasitic light effects, and also helps to improve the optical crosstalk problem between different pixel units.

[0075] Please see Figure 18 As shown, in another embodiment of the present invention, in the central pixel 100, a second light-shielding structure 130 is provided around the light guide layer 18, that is, the second light-shielding structure 130 is disposed between the light guide layer 18 and the interlayer dielectric layer 15, and the width of the second light-shielding structure 130 around the light guide layer 18 is equal. In the first edge pixel 101 and the second edge pixel 102, a second light-shielding structure 130 is provided between the light guide layer 18 and the interlayer dielectric layer 15 near the edge, and an air gap 140 is provided near the central pixel 100, which further increases quantum efficiency, reduces parasitic light effects, and also helps to improve the optical crosstalk problem between different pixel units.

[0076] This invention also provides a method for fabricating an image sensor, combined with... Figures 1 to 18 The fabrication method of the image sensor is explained.

[0077] Please see Figure 1 As shown, in one embodiment of the present invention, Figure 1The cross-sectional view of the photodiode 11, transmission gate 12, front dielectric layer 13, first light-shielding structure 14, interlayer dielectric layer 15 and metal interconnect layer 16 after the fabrication process can be completed, and each can be fabricated using any fabrication method in the art. The present invention does not impose any specific limitations.

[0078] Please see Figures 1 to 2 As shown, in one embodiment of the present invention, after forming the interlayer dielectric layer 15 and the metal interconnect layer 16, the interlayer dielectric layer 15 on the photodiode 11 is etched to form a trench 17. The trench 17 is obtained through photolithography and etching. In the center pixel 100, the interlayer dielectric layer 15 around the trench 17 has an equal thickness. In the first edge pixel 101 and the second edge pixel 102, the distance L1 between the interlayer dielectric layer 15 near the edge and the edge of the adjacent photodiode 11 is greater than the distance L2 between the interlayer dielectric layer 15 near the center pixel 100 and the edge of the adjacent photodiode 11. Furthermore, as the distance from the edge pixel to the center pixel increases, the difference between L1 and L2 increases in the edge pixels.

[0079] Please see Figures 2 to 3 As shown, in one embodiment of the present invention, after forming the trench 17, a photoconductive layer 18 is formed on the trench 17 and the interlayer dielectric layer 15. In this embodiment, the photoconductive layer 18 is, for example, titanium-doped silicon dioxide, and the number of titanium atoms accounts for, for example, 3% to 5% of the total number of atoms. Refractive index modulation and spectral response broadening are achieved through titanium doping, and carrier transport capability is enhanced by the heterostructure, while also considering insulation, stability, and semiconductor process compatibility, ultimately significantly improving the imaging quality, response speed, and environmental adaptability of the image sensor. The photoconductive layer 18 is obtained, for example, by spin-coating a titanate-silicate slurry and then drying it. The titanate-silicate slurry system includes a titanium source, a silicon source, a solvent, and additives. The titanium source can be, for example, tetrabutyl titanate or tetraisopropyl titanate; the silicon source can be, for example, tetraethyl orthosilicate; the solvent can be, for example, anhydrous ethanol or isopropanol; and the additives can include catalysts such as acetylacetone, glacial acetic acid, hydrochloric acid, or nitric acid to control the hydrolysis rate and improve film density. The atomic percentage of titanium can be precisely controlled by adjusting the molar ratio of the titanium source to the silicon source. After film formation, annealing at 120℃ to 500℃ converts the slurry into a stable titanium-doped silicon dioxide film.

[0080] Please see Figures 2 to 3As shown, in one embodiment of the present invention, the photoconductor layer 18 is formed, for example, by spin coating, and the spin coating speed is, for example, 1000 rpm to 4000 rpm. Due to the presence of the trench 17, the photoconductor layer 18 forms a depression on the trench 17. In the first edge pixel 101 and the second edge pixel 102, since L1 and L2 are not equal, the midpoint of the depression is offset relative to the midpoint of the photodiode 11 towards the center pixel 100. The greater the difference between L1 and L2, the greater the offset S. In this way, the light is better focused at the center of the pixel in the edge pixel, increasing the quantum efficiency and reducing the parasitic light effect.

[0081] Please see Figures 3 to 4 As shown, in one embodiment of the present invention, when spin-coating the photoconductor layer 18, if the size of the recess on the photoconductor layer 18 just satisfies d = k(m - 0.5x), then no further processing of the photoconductor layer 18 is required. A planarization layer 19 is formed on the photoconductor layer 18. The planarization layer 19 is, for example, an organic compound layer, or, for example, a polycyclic olefin polymer, a transparent resin, or a photoresist. The planarization layer 19 is obtained, for example, by spin-coating, and the spin-coating speed is, for example, 3000 rpm to 6000 rpm. After spin-coating, it is thermo-cured at 150°C to 250°C to ensure that the side of the planarization layer 19 away from the photoconductor layer 18 is planar.

[0082] Please see Figures 4 to 5 As shown, in one embodiment of the present invention, after forming the planarization layer 19, a microlens 20 is formed on the planarization layer 19. The structure and fabrication method of the microlens 20 can be fabricated using any method in the art, and the present invention does not impose specific limitations. By providing a recessed light-guiding layer 18 on the photodiode 11, when the thickness of the interlayer dielectric layer 15 is greater than 0.5 times the pixel unit structure size, light can be focused to the vicinity of the surface of the photodiode 11, increasing quantum efficiency and reducing parasitic light effects.

[0083] Please see Figure 3 As shown, in one embodiment of the present invention, after the formation of the light guide layer 18, if the light guide layer 18 needs to be designed as a plane, the light guide layer 18 is treated with a planarization process such as chemical mechanical polishing (CMP) to make the surface of the light guide layer 18 planar. The fabrication of the planarization layer 19 can be omitted, and the subsequent fabrication of the microlens 20 can be performed on the light guide layer 18.

[0084] Please see Figure 3 , Figure 6 and Figure 7As shown, in one embodiment of the present invention, after forming the photoconductor layer 18, if the photoconductor layer 18 requires a raised design according to d = k(m - 0.5x), a photoresist layer 110 is spin-coated onto the photoconductor layer 18, with the side of the photoresist layer 110 away from the photoconductor layer 18 being planar. After forming the photoresist, the photoresist layer 110 and part of the photoconductor layer 18 are removed, for example, by dry etching, wherein the etching gas includes, for example, at least one of carbon tetrafluoride (CF4), trifluoromethane (CHF3), or difluoromethane (CH2F2), or a mixture thereof with oxygen. During the etching process, since the thickness of the photoresist layer 110 is different at different locations, after the photoresist layer 110 on the interlayer dielectric layer 15 is etched, the photoconductor layer 18 on the photodiode 11 still has the photoresist layer 110. The exposed photoconductor layer 18 and photoresist layer 110 are etched. As the etching proceeds, a raised photoconductor layer 18 is formed on the photodiode 11.

[0085] Please see Figure 7 and Figure 8 As shown, in one embodiment of the present invention, after etching to form the raised photoconductor layer 18, if the size of the raised portion on the photoconductor layer 18 exactly satisfies d = k(m - 0.5x), no further processing of the photoconductor layer 18 is required. A planarization layer 19 and a microlens 20 are formed on the photoconductor layer 18. The formation method and materials of the planarization layer 19 and the microlens 20 are the same as in the previous embodiment and will not be described in detail here. If the size of the raised photoconductor layer 18 after etching does not satisfy d = k(m - 0.5x), a patterned photoresist layer is formed at the raised portion or the planar portion of the photoconductor layer 18 using photolithography, dry etching, or other processes to etch the planar portion or the raised portion of the photoconductor layer 18 to adjust the size of the raised portion of the photoconductor layer 18. The photolithography, dry etching, and other processes can be fabricated using any method in the art, and the present invention does not impose specific limitations. By providing a raised light-guiding layer 18 on the photodiode 11, when the thickness of the interlayer dielectric layer 15 is less than 0.5 times the pixel unit structure size, light can be focused near the surface of the photodiode 11, increasing quantum efficiency and reducing parasitic light effects.

[0086] Please see Figure 2 and Figure 9As shown, in another embodiment of the present invention, in order to ensure that the recess of the photoconductor layer 18 after spin coating meets the requirements, a compensation layer 120 is formed in the trench 17 after the trench 17 is formed. The compensation layer 120 is made of the same material as the subsequently formed photoconductor layer, for example, titanium-doped silicon dioxide. In this embodiment, after the trench 17 is formed, a patterned photoresist layer (not shown in the figure) is formed on the interlayer dielectric layer 15 by spin coating photoresist and exposure and development using the mask used to form the trench 17, exposing the trench 17. The compensation layer 120 is formed in the trench 17 by chemical vapor deposition (CVD) or physical vapor deposition (PVD). After the compensation layer 120 is formed, the patterned photoresist layer is removed.

[0087] Please see Figures 9 to 10 As shown, in another embodiment of the present invention, after forming the compensation layer 120, a new patterned photoresist layer (not shown in the figure) is formed by spin-coating photoresist and exposure and development. The patterned photoresist layer exposes a portion of the compensation layer 120 at the center of the trench 17. At least a portion of the thickness of the compensation layer 120 is removed by dry etching, wet etching, or a combination of dry and wet etching, forming an opening 121 within the compensation layer 120. The patterned photoresist layer is then removed. By forming and etching the compensation layer 120, the height difference between the inner edge and the center of the trench 17 can be controlled, thereby controlling the recess size of the photoconductor layer during its formation to meet fabrication requirements.

[0088] Please see Figures 10 to 12 As shown, in another embodiment of the present invention, after forming an opening 121 in the compensation layer 120, a light guide layer 18 is formed by spin coating. Due to the presence of the trench 17, the compensation layer 120, and the opening 121, the light guide layer 18 forms a depression in the trench 17, and the depression satisfies d = k(m - 0.5x). Meanwhile, in the first edge pixel 101 and the second edge pixel 102, since L1 and L2 are not equal, the midpoint of the depression is offset relative to the midpoint of the photodiode 11 towards the center pixel 100, and the larger the difference between L1 and L2, the larger the offset. By forming the compensation layer 120 and the opening 121 in advance, no further processing of the light guide layer 18 is required. Then, a planarization layer 19 and a microlens 20 are formed on the light guide layer 18. The materials and preparation methods of the planarization layer 19 and the microlens 20 are the same as described above and will not be elaborated further here. Similarly, in this embodiment, if a protruding light guide layer 18 needs to be formed, after forming the light guide layer 18, a method can be used... Figures 6 to 7 The protruding light guide layer is formed in the fabrication direction, and the recess size of the light guide layer 18 is controlled by controlling the compensation layer 120 and the opening 121. After photolithography and etching, the protruding light guide layer formed does not need to be further processed.

[0089] Please see Figure 1 and Figure 13 As shown, in another embodiment of the present invention, after forming the interlayer dielectric layer 15 and the metal interconnect layer 16, a portion of the interlayer dielectric layer 15 is etched to form an annular groove 131 on the photodiode 11, and the annular groove 131 is close to the transmission gate 12. In the center pixel 100, the width of the annular groove 131 is equal around its perimeter. In the first edge pixel 101 and the second edge pixel 102, the width of the annular groove 131 is inconsistent around its perimeter, with the width near the edge being greater than the width near the center pixel 100.

[0090] Please see Figure 13 and Figure 14 As shown, in another embodiment of the present invention, after forming the annular groove 131, a light-shielding material is deposited within the annular groove 131 to form a second light-shielding structure 130. The material of the second light-shielding structure 130 is, for example, at least one of the following opaque metal materials: tungsten, aluminum, copper, cobalt, titanium, titanium nitride, or nickel. The metal material is formed, for example, by plasma-enhanced chemical vapor deposition (PECVD), atomic layer deposition (ALD), metal-organic chemical vapor deposition (MOCVD), or physical vapor deposition. Specifically, after depositing the metal material within the annular groove 131 and the interlayer dielectric layer 15, the metal material on the interlayer dielectric layer 15 is removed by etching, leaving only the metal material within the annular groove 131, with the top of the metal material flush with the interlayer dielectric layer 15. By forming the second light-shielding structure, the quantum efficiency is further increased, greatly improving the parasitic light response of the charge domain global image sensor.

[0091] Please see Figure 14 and Figure 16 As shown, in another embodiment of the present invention, after forming the second light-shielding structure 130, the interlayer dielectric layer 15 within the second light-shielding structure 130 is removed to form a trench 17. After forming the trench 17, a light guide layer 18, a planarization layer 19, and a microlens 20 are fabricated. When forming the light guide layer 18, in the edge pixels, due to the unequal width of the second light-shielding structure 130, the midpoint of the recess in the light guide layer 18 is offset relative to the midpoint of the photodiode 11 towards the center pixel 100, and the offset is greater the farther the edge pixel is from the center pixel 100. After forming the second light-shielding structure 130 and the trench 17, a compensation layer may be deposited and etched within the trench 17 according to the required size of the recess or protrusion; the present invention does not impose any limitations.

[0092] Please see Figure 1 and Figure 17 As shown, in another embodiment of the present invention, after forming the interlayer dielectric layer 15 and the metal interconnect layer 16, a portion of the interlayer dielectric layer 15 is etched. In the central pixel 100, an annular groove 131 is formed on the photodiode 11, and the annular groove 131 is close to the transmission gate 12. The width of the annular groove 131 is equal around its perimeter. In the first edge pixel 101 and the second edge pixel 102, a groove is formed only on the side away from the central pixel 100 (not shown in the figure), and no groove is formed on the side closer to the central pixel 100. The farther the edge pixel is from the central pixel 100, the wider the groove becomes. Subsequently, a light-shielding material is deposited in the annular groove 131 and within the groove to form a second light-shielding structure 130.

[0093] Please see Figures 17 to 19 As shown, in another embodiment of the present invention, after forming the second light-shielding structure 130, the interlayer dielectric layer 15 within the second light-shielding structure 130 in the center pixel 100 is removed, and a portion of the interlayer dielectric layer 15 in the first edge pixel 101 and the second edge pixel 102 is removed, forming a trench 17 and an air gap 140. The air gap 140 is disposed close to the center pixel 100, and the width of the air gap 140 is smaller than the width of the second light-shielding structure 130 in the edge pixel. After forming the trench 17, a light guide layer 18, a planarization layer 19, and a microlens 20 are fabricated. When forming the light guide layer 18, in the edge pixel, since the second light-shielding structure 130 is disposed on the side away from the center pixel 100, the midpoint of the recess in the light guide layer 18 is offset relative to the midpoint of the photodiode 11 towards the center pixel 100, and the offset is greater the farther the edge pixel is from the center pixel 100. After forming the trench 17 and the air gap 140, a compensation layer can be deposited and etched within the trench 17 according to the required size of the recess or protrusion; this invention is not limited in this respect. By providing the second light-shielding structure 130 and the air gap 140, the quantum efficiency can be further increased and the parasitic light effect reduced.

[0094] In summary, this invention provides an image sensor and its fabrication method. In a global shutter image sensor, by setting the surface shape of the photoconductor layer on the photodiode through the pixel unit structure size and the total thickness of the interlayer dielectric layer on the first light-shielding structure, light can be focused onto the photodiode surface, thereby improving quantum efficiency, reducing parasitic light effects, and enhancing chip performance. Furthermore, in both the central and edge regions of the image sensor, light can be better focused onto the pixel center, improving the image quality. By setting a second light-shielding structure or a second light-shielding structure and an aperture gap, quantum efficiency can be further increased, parasitic light effects reduced, and optical crosstalk between different pixel units can be mitigated.

[0095] The embodiments of the present invention disclosed above are merely illustrative of the invention. The embodiments do not exhaustively describe all details, nor do they limit the invention to the specific implementations described. Clearly, many modifications and variations can be made based on the content of this specification. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of the invention, thereby enabling those skilled in the art to better understand and utilize the invention. The invention is limited only by the claims and their full scope and equivalents.

Claims

1. An image sensor comprising a plurality of pixel unit structures, characterized in that, The pixel unit structure includes: The substrate, a photodiode disposed within the substrate, a transmission gate, and an interlayer dielectric layer covering the substrate, wherein a metal interconnect layer is provided in the interlayer dielectric layer and the metal interconnect layer is located in the region above the substrate between any two adjacent photodiodes of the pixel unit structure; A light guide layer is disposed on the photodiode on the interlayer dielectric layer and between the interlayer dielectric layers, wherein the surface of the light guide layer on the photodiode is arc-shaped or planar.

2. The image sensor according to claim 1, characterized in that, The pixel unit structure further includes a first light-shielding structure, which is disposed on the top and sidewall of the transmission gate.

3. The image sensor according to claim 2, characterized in that, When the surface of the photoconductor layer on the photodiode is concave or convex, the maximum size of the concave or convex is d, then d = k(m - 0.5x), where m is the total thickness of the interlayer dielectric layer on the first light-shielding structure, x is the size of the pixel unit structure, and k is the correlation coefficient; when d is positive, the surface of the photoconductor layer is concave, when d is negative, the surface of the photoconductor layer is convex; when d is zero, the surface of the photoconductor layer is planar.

4. The image sensor according to claim 1, characterized in that, The photoconductive layer is titanium-doped silicon dioxide, and the number of titanium atoms accounts for 3% to 5% of the total number of atoms.

5. The image sensor according to claim 1, characterized in that, The pixel unit structure includes a center pixel and edge pixels. In the edge pixels, the midpoint of the arc of the light guide layer is offset towards the center pixel. The closer the edge pixel is to the edge of the pixel array, the greater the displacement.

6. The image sensor according to claim 5, characterized in that, The pixel unit structure further includes a second light-shielding structure, which is disposed between the light guide layer and the interlayer dielectric layer. In the central pixel, the width of the second light-shielding structure is equal around the light guide layer, and in the edge pixels, the width of the second light-shielding structure on the side away from the central pixel is greater than the width on the side closer to the central pixel.

7. The image sensor according to claim 5, characterized in that, In the center pixel, a second light-shielding structure is provided between the light guide layer and the interlayer dielectric layer, and the width of the second light-shielding structure is equal around the light guide layer; in the edge pixel, a second light-shielding structure is provided between the light guide layer and the interlayer dielectric layer near the edge, and an air gap is provided near the center pixel.

8. A method for manufacturing an image sensor, used to form the image sensor according to any one of claims 1-7, characterized in that, Includes the following steps: A substrate is provided in which a plurality of photodiodes are formed for forming a plurality of pixel unit structures; A transmission gate is formed on the substrate on the side of the photodiode; An interlayer dielectric layer is formed on the substrate between two adjacent photodiodes of the pixel unit structure, and a metal interconnect layer is formed in the interlayer dielectric layer; A light guide layer is formed on the interlayer dielectric layer and on the photodiode between the interlayer dielectric layers, and the surface of the light guide layer on the photodiode is arranged in an arc shape or a plane.

9. The method for manufacturing an image sensor according to claim 8, characterized in that, The manufacturing method further includes: After the interlayer dielectric layer is formed, the interlayer dielectric layer on the photodiode is etched to form a trench; in the center pixel, the thickness of the interlayer dielectric layer around the trench is equal; in the edge pixel, the distance between the interlayer dielectric layer on the edge side and the edge of the adjacent photodiode is greater than the distance between the interlayer dielectric layer on the layer on the edge side of the center pixel and the edge of the adjacent photodiode. A light guide layer is formed in the trench by spin coating, and the surface of the light guide layer is recessed.

10. The method for manufacturing an image sensor according to claim 9, characterized in that, The manufacturing method further includes: A photoresist layer is formed on the surface of the photoconductor layer, and the side of the photoresist layer away from the photoconductor layer is a plane. The photoresist layer and a portion of the photoconductive layer are etched to form a raised photoconductive layer on the photodiode.

11. The method for manufacturing an image sensor according to claim 8, characterized in that, The manufacturing method further includes: After forming the interlayer dielectric layer, the interlayer dielectric layer on the photodiode is etched to form a trench; A compensation layer is formed within the trench; Etch a portion of the compensation layer at the center of the trench to form an opening; A light guide layer is formed on the compensation layer by spin coating, and the surface of the light guide layer is recessed.

12. The method for manufacturing an image sensor according to claim 8, characterized in that, The manufacturing method further includes: After forming the interlayer dielectric layer, a portion of the interlayer dielectric layer is etched to form an annular groove on the photodiode; in the center pixel, the width of the annular groove is equal around its perimeter, and in the edge pixels, the width of the annular groove near the edge is greater than the width near the center pixel. A light-shielding material is deposited within the annular groove to form a second light-shielding structure; Remove the interlayer dielectric layer within the second light-shielding structure to form a trench; A light guide layer is formed in the trench by spin coating, and the surface of the light guide layer is recessed.

13. The method for manufacturing an image sensor according to claim 8, characterized in that, The manufacturing method further includes: After forming the interlayer dielectric layer, a portion of the interlayer dielectric layer is etched to form an annular groove in the center pixel, the width of which is equal around the perimeter; and in the edge pixels, a groove is formed on the side furthest from the center pixel. A light-shielding material is deposited in the annular groove and within the groove to form a second light-shielding structure; Remove the interlayer dielectric layer within the second light-shielding structure of the center pixel to form a trench; Remove a portion of the interlayer dielectric layer from the edge pixels to form trenches and air gaps; A light guide layer is formed in the trench by spin coating, and the surface of the light guide layer is recessed.

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