Power supply module

Abstract

According to the power module, on one hand, the magnetic assembly is arranged above the semiconductor switching device, and the common end of the semiconductor switching device is arranged on the upper surface of the switching device and is connected with the winding of the magnetic assembly, so that the upward thermal resistance of the switching device is reduced; and on the other hand, laminated wiring is adopted in the support plate, input capacitors are integrated, and the input capacitors are connected in parallel with the semiconductor switching devices which are electrically connected in series, so that an input loop is reduced, and parasitic inductance in the input loop is reduced.

Description

Technical Field

[0001] This invention belongs to the field of high-frequency power supply technology, and particularly relates to a power supply module. Background Technology

[0002] In recent years, with the increasing demand for artificial intelligence and data processing, global computing power energy consumption has experienced explosive growth. Moreover, as the power consumption of these computing units increases and size constraints become more stringent, increasingly stringent requirements are being placed on the power supply modules that directly power the computing chips, including their footprint, height, efficiency, heat dissipation, and electromagnetic interference. These power supply modules typically include magnetic components, input capacitors, output capacitors, and power chips. How to efficiently integrate these components while meeting numerous system requirements for power supply, such as reducing conduction impedance, minimizing module size, reducing thermal resistance, effectively reducing the loop inductance of the Vin-GND circuit, and avoiding interference from switching points like SW to external signals, is a crucial challenge in this field. Summary of the Invention

[0003] In view of this, one of the objectives of the present invention is to provide a power module, including a carrier board, a magnetic component, and a component layer; the component layer includes an insulator, at least one power chip, a capacitor, a conductor, and opposing upper and lower surfaces; the carrier board includes opposing upper and lower surfaces, and the carrier board includes a metal wiring layer disposed on the upper and lower surfaces; the magnetic component is disposed on the upper surface of the carrier board, and the pins of the magnetic component are electrically connected to the metal wiring layer on the upper surface of the carrier board;

[0004] The power chip includes a functional surface, on which at least two planar power devices are integrated in series, with the series node being a common terminal; the functional surface of the power chip is provided with chip pins; the power chip is disposed on the lower surface of the carrier board, and the chip pins are electrically connected to the metal wiring layer on the lower surface of the carrier board; the pins of the magnetic component are electrically connected to the common terminal.

[0005] The pins of the magnetic component and the projection of the power chip on the same horizontal plane at least partially overlap.

[0006] The capacitor is disposed on the lower surface of the carrier plate, and the capacitor is connected in parallel with two planar power devices connected in series.

[0007] The insulator covers at least a portion of the lower surface of the carrier board, the power chip, and the capacitor; the upper surface of the component layer is adjacent to the lower surface of the carrier board, and the lower surface of the component layer is provided with a surface metal wiring layer; the connector electrically connects the metal wiring layer of the carrier board and the metal wiring layer on the lower surface of the component layer.

[0008] Preferably, the conductor penetrates the upper and lower surfaces of the component layer, and the conductor is a via or a copper pillar.

[0009] Preferably, the guide member has a blind hole structure.

[0010] Preferably, the sides of the carrier plate and the sides of the component layer are metallized to form a guide, and the guide covers part of the upper surface of the carrier plate, part of the sides of the carrier plate and the component layer, and part of the lower surface of the component layer.

[0011] Preferably, the magnetic component is smaller in the horizontal direction than the carrier plate; other elements are disposed in the area of ​​the magnetic component that does not cover the carrier plate.

[0012] Preferably, the pins of the magnetic component protrude from the lower surface of the magnetic component; there is an accommodating space between the lower surface of the magnetic component, the upper surface of the carrier plate, and the pins of the magnetic component for accommodating the input capacitor and / or the output capacitor.

[0013] Preferably, an input capacitor and an output capacitor are disposed within the accommodating space, and the electrodes of the input capacitor and the output capacitor with the same name are disposed on the same layer of copper plating.

[0014] Preferably, the upper surface of the carrier board is provided with one of an input capacitor and an output capacitor, and the lower surface of the carrier board is provided with the other of an input capacitor and an output capacitor; the corresponding electrodes of the input capacitor and the output capacitor are on the copper pours on the upper and lower surfaces of the carrier board, and the projections of the copper pours on the upper and lower surfaces on the same horizontal plane at least partially overlap, and are connected by vias.

[0015] Preferably, a thermal via or heat sink is provided between the non-functional surface of the power chip and the lower surface of the component layer.

[0016] Preferably, the windings of the magnetic component are at least partially exposed on the upper surface of the magnetic component.

[0017] Preferably, it further includes a dielectric layer and an outer wiring layer, wherein the dielectric layer is disposed between the upper surface of the carrier board and the lower surface of the magnetic component, and the outer wiring layer is disposed between the dielectric layer and the magnetic component; the outer wiring layer is electrically connected to the metal wiring layer on the upper surface of the carrier board through vias.

[0018] Preferably, the outer wiring layer and the surface metal wiring layer on the lower surface of the component layer are completed in the same process.

[0019] Preferably, a dielectric layer and an outer wiring layer are disposed on the lower surface of the component layer, and the outer wiring layer is disposed on the lower surface of the dielectric layer; the outer wiring layer is electrically connected to the surface metal wiring layer on the lower surface of the component layer through vias.

[0020] The beneficial effects of this invention are:

[0021] (1) The present invention proposes a power module with high heat dissipation and low parasitic inductance. On the one hand, the magnetic component is placed above the semiconductor switching device, and the common terminal of the semiconductor switching device is placed on the upper surface of the switching device and connected to the winding of the magnetic component, thereby reducing the upward thermal resistance of the switching device.

[0022] (2) On the other hand, the substrate uses stacked wiring to integrate the input capacitor. The input capacitor is connected in parallel with the semiconductor switching device connected in series, thereby reducing the input circuit and reducing the parasitic inductance in the input circuit. Attached Figure Description

[0023] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0024] Figure 1 The Buck circuit topology is applicable to the power module shown in this invention;

[0025] Figures 2A to 2F This is one embodiment of a power module;

[0026] Figures 3A to 3G This is an extended embodiment of the power module. Detailed Implementation

[0027] One of the core aspects of this invention is to provide a power module with high heat dissipation and low parasitic inductance. On the one hand, a magnetic component is placed above a semiconductor switching device, and the common terminal of the semiconductor switching device is placed on the upper surface of the switching device and connected to the winding of the magnetic component, thereby reducing the upward thermal resistance of the switching device. On the other hand, a multilayer wiring is used inside the carrier board to integrate an input capacitor, which is connected in parallel with the series-connected semiconductor switching device, thereby reducing the input circuit and lowering the parasitic inductance in the input circuit.

[0028] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0029] The high-heat dissipation, low-parasitic-inductance power module (hereinafter referred to as the power module) disclosed in this invention is applicable to circuit topologies including magnetic components, semiconductor switching devices, input capacitors, and output capacitors, and is not limited to Buck circuits; it can also be a proportional converter circuit. In this invention, a Buck circuit is used as an example for illustration, such as... Figure 1 As shown. The power module disclosed in this invention is as follows. Figures 2A to 2D As shown, where Figure 2A This is a side sectional view of the power module. Figure 2B This is a 3D schematic diagram of the power module. Figure 2C This is an exploded view of the power module. Figure 2D This is a partial structural diagram of the power module. (Example) Figure 2A As shown, the power module includes a magnetic component 10, a carrier board 20, and a component layer 30. The carrier board 20 includes an opposing upper surface 201 and a lower surface 202, an internal wiring layer, and conductive vias. Both the upper surface 201 and the lower surface 202 of the carrier board 20 are provided with metal wiring layers, which are electrically connected through the internal wiring layer and conductive vias. The component layer 30 includes opposing upper surfaces 301 and 302, wherein the lower surface 202 of the carrier board 20 and the upper surface 301 of the component layer 30 are disposed adjacent to each other. The pins of the magnetic component 10 are fixed to and electrically connected to the metal wiring layer disposed on the upper surface 201 of the carrier board 20. The component layer 30 also includes an insulator 303, power chips 311 and 312 (i.e., Figure 1The semiconductor switching devices, capacitors 313 and conductors 321, 322 and 323 are included. Power chips 311 and 312 and capacitor 313 are disposed adjacent to the upper surface 301 of the component layer 30, and the pins of power chips 311 and 312 and capacitor 313 are fixed and electrically connected to the metal wiring layer on the lower surface 201 of the carrier board. A surface metal wiring layer is provided on the lower surface 302 of the component layer 30. The connection between the carrier board wiring and the surface metal wiring layer can be achieved by using conductors. Both conductors 321 and 322 penetrate the upper surface 301 and the lower surface 302 of the component layer 30. Conductor 321 is implemented through a via, and conductor 322 is provided by setting a pre-fabricated copper block and is connected to the lower surface 202 of the carrier board 20 by bonding material, and is electrically connected to the metal wiring layer by a metallization process. Conductor 323 adopts a board edge metallization layer and is provided on the side of the component layer 30 and the carrier board 20, covering part of the upper surface 201 of the carrier board 20, part of the side of the component layer 30, part of the side of the carrier board 20, and part of the lower surface 302 of the component layer 30. These conductors are used to realize the electrical connection between the metal wiring layer on the lower surface 302 and the metal wiring layer on the lower surface 202 or the upper surface 201. The conductor 322 uses a prefabricated copper block, which has the characteristic of low impedance; the vias of the conductor 321 have the characteristic of flexible setting; the metallization of the board edge of the conductor 323 has the characteristic of saving horizontal space. Therefore, in the power module, the conductors can use any combination of one, two or three of 321, 322 and 323, depending on the requirements.

[0030] In this embodiment, power chips 311 and 312 are planar power devices. In each power chip, two planar power devices are connected in series, and the series connection point is an electrical common terminal 331. This electrical common terminal 331 is disposed on the lower surface 202 of the carrier plate 20. Similarly, an electrical common terminal 332 is also disposed on the upper surface 201 of the carrier plate 20. The electrical common terminals 331 and 332 are electrically connected through an internal wiring layer and conductive holes disposed within the carrier plate 20. One pin 112 of the magnetic component 10 is fixed and electrically connected to the electrical common terminal 332. The projections of the pin 112 of the magnetic component and the power chip 312 on the same horizontal plane at least partially overlap. Each power chip includes a functional surface 310, and the chip pins of the power chip are disposed on the functional surface 310. Since the electrical common terminal 331 on the surface of the power chip and one pin 112 of the magnetic component are vertically interconnected nearby through an internal wiring layer and conductive holes disposed within the carrier plate 20, and the connection material is a high thermal conductivity material such as copper, the power chip has excellent upward thermal resistance. In this embodiment, capacitor 313 is the input capacitor Cin, which is electrically connected in parallel with two planar power devices connected in series.

[0031] Simultaneously refer to Figures 2B to 2DA surface metal wiring layer 304 is provided on the lower surface 302 of the component layer 30 for fixing and electrically connecting to external components or system boards; conductive members 323 are provided on the side of the carrier board 20 and the side of the component layer. The lower surface 102 of the magnetic component 10 is provided with the pins 111, 112, 113 and 114 of the magnetic component.

[0032] This implementation method can adopt the following production process:

[0033] Step 1: Prepare carrier board 20;

[0034] Step 2: Mount components (such as power chips 311, 312, capacitors 313 or copper blocks 321) on the second side 202 of the carrier board 20.

[0035] Step 3: Plastic encapsulate the second surface 202 of the carrier plate 20 and the components disposed on the second surface 202 to form an insulator 303;

[0036] Step 4: Set a surface metal wiring layer 304 on the surface of the insulator 303.

[0037] Preferably, between Step 3 and Step 4, when drilling and electroplating are used to form the conductor 322 or metallization of the board edge is used to form the conductor 323, a corresponding drilling or grooving step needs to be added; or when copper blocks are used to form the conductor 321, windows are made in the prefabricated copper blocks; and then Step 4 is performed.

[0038] Connector 321 can be any one or more of the following: positive input connector, positive output connector, and ground connector, used for transmitting power signals. Some connectors 323 are used for transmitting control signals, sampling signals, or monitoring signals, etc.

[0039] In this embodiment, the common terminal of the power chip is positioned adjacent to the magnetic component and connected to the pins of the magnetic component. This allows the power chip to dissipate heat through the magnetic component and windings, and provides good thermal resistance towards the magnetic component. Furthermore, the common terminal of the power chip is a switching signal, and it is positioned on the upper surface 301 of the component layer 30, away from the system board, to avoid the switching signal affecting or interfering with the system board. Moreover, compared to traditional embedded chip technology, the number of wiring layers on this substrate is unrestricted, the selection of power chips is more flexible (no copper terminal capacitors are required), and the number of power chips is unlimited. This structure can be used for one to hundreds of chips, achieving the same technical effect. The heights of the power chip, capacitors, etc., do not need to be matched; devices of different heights can be manufactured using the same process flow, achieving the same technical effect.

[0040] Reference Figure 2EAs shown by the dashed lines, in this embodiment, the carrier board 20 uses stacked traces, and the two ends of the integrated capacitor 313 (i.e., the input capacitor Cin) are electrically connected to the conductor 321 and the power chip 311 through the stacked traces, so that the input circuit is as follows: Figure 2E As shown by the dashed line, this further reduces the loop inductance in the input circuit. For example... Figure 2E In this embodiment, the capacitor 313 and the conductor 321 are arranged horizontally. In other embodiments, the capacitor 313 and the conductor 321 can also be arranged in a direction perpendicular to the paper to further reduce the horizontal width of the power module. Figure 2F Another embodiment of the connector is shown; for example, connector 321 is a blind hole structure, and connector 324 is a blind hole structure filled with a leveling medium. The processing technology of connector 324 includes the following steps: first, drilling a hole in the component layer, performing electroplating on the hole edges, then filling the hole with adhesive, smoothing the adhesive after curing, and then performing surface metallization treatment to form a surface wiring layer; the method of filling the blind hole with a leveling medium is suitable for applications where the component layer thickness is too large and the hole depth is too large to plate solid holes; compared with the method of setting metal pillars, this embodiment is more flexible in application, occupies less space, and has a simpler process.

[0041] Figures 3A to 3G An extended embodiment is shown. Figure 3A In the embodiment shown, the size of the magnetic component 10 is smaller than the size of the carrier plate 20. Therefore, other components 314 can be set in the area not covered by the magnetic component 10 on the carrier plate to further improve the integration of the power module.

[0042] exist Figures 3B to 3D In the illustrated embodiment, the height by which the pins of the magnetic component protrude beyond the lower surface of the magnetic component is increased. Figure 3B In this design, an accommodating space is formed between the lower surface 102 of the magnetic component 10 and the upper surface 201 of the carrier plate 20. Therefore, more components can be placed on the upper surface 201 of the carrier plate 20, such as the input capacitor Cin and / or the output capacitor Co, or resistors, capacitors, controllers, etc., required by other peripheral circuits. Figure 3C In this embodiment, an input capacitor Cin and an output capacitor Co are disposed on the upper surface 201 of the carrier board 20. The corresponding electrodes (i.e., negative terminals) GND of the input capacitor Cin and the output capacitor Co are disposed on the same physically connected copper pavement. By minimizing the distance between the negative terminals GND of the input capacitor Cin and the output capacitor Co, externally conducted interference at the switching point can be effectively isolated. Figure 3DIn the illustrated embodiment, an output capacitor Co is disposed on the upper surface 201 of the carrier board 20, and an input capacitor Cin is disposed on the lower surface 202 of the carrier board 20 (in other embodiments, the upper surface 201 may also be disposed on the input capacitor Cin, and the lower surface 202 on the output capacitor Co). The projections of the corresponding electrodes (i.e. negative terminals) GND of the input capacitor Cin and the output capacitor Co on the GND copper pours on the upper or lower surface of the carrier board 20 at least partially overlap on the same horizontal plane, and the GND copper pours on the upper or lower surface of the carrier board 20 are vertically connected to each other by vias to achieve the minimum interconnection distance of the ground lines, which can effectively isolate the external conduction interference of the switching signal.

[0043] Figure 3E In the illustrated embodiment, a thermal via or heat sink 305 is provided between the non-functional surfaces of power chips 311 and 312 and the surface metal wiring layer of the lower surface 302 of the component layer 30. The thermal via or heat sink 305 is made of copper plating or other materials with extremely high thermal conductivity, or it can be made of high thermal conductivity paste, thereby providing the power chip with a small downward thermal resistance. The winding 11 of the magnetic component can pass through the upper surface of the magnetic core and be exposed on the upper surface of the magnetic core, providing the power chip with a small upward thermal resistance and further enhancing the heat dissipation capability of the power module.

[0044] Figure 3F and Figure 3G In the illustrated embodiment, a dielectric layer 40 is laminated. Figure 3F In this process, besides the pre-fabricated portion (i.e., carrier 20 and its internal wiring layer), a dielectric layer 40 can also be laminated on the upper surface 201 of the carrier 20 after the insulator is formed. An outer wiring layer is formed on the upper surface 401 of the dielectric layer 40, and the outer wiring layer and the surface layer of the pre-fabricated portion of the carrier 20 are connected through vias 403, etc. This allows for more complex wiring. Furthermore, the outer wiring layer on the upper surface 401 of the dielectric layer 40 can undergo pattern definition and other processes simultaneously with the surface metal wiring layer on the lower surface 302 of the insulator 303, simplifying the overall process. Figure 3G In the embodiment shown, a dielectric layer 40 is laminated on the lower surface 302 of the component layer 30. An outer wiring layer is provided on the lower surface 402 of the dielectric layer 40. The surface metal wiring layer on the lower surface 302 of the component layer 30 and the outer wiring layer are connected by vias 403, etc. The dielectric layer can also be a multilayer wiring layer to increase current carrying capacity and to redistribute electrode lead-out positions.

[0045] The technical features shown in the embodiments and extended embodiments of the present invention can be selected and combined for application in the same power module according to actual needs, and all have the technical effects corresponding to the original embodiments.

[0046] The switching transistor disclosed in this invention can be a Si MOSFET, SiC MOSFET, GaN device, or IGBT, etc., all of which can realize the switching function disclosed in this invention.

[0047] The power module described in the above embodiments can also be part of an electronic device, as long as it meets the technical features and benefits disclosed in this invention.

[0048] The terms "equal to," "identical to," or "equal to" disclosed in this invention must take into account the parameter distribution of the engineering process, with an error distribution within ±30%. "Parallel" is defined as the angle between two line segments or lines being less than or equal to 45 degrees. "Perpendicular" is defined as the angle between two line segments or lines being within the range of [60, 120] degrees. The definition of "phase misalignment" also needs to consider the parameter distribution of the engineering process, with an error distribution of the phase misalignment degree within ±30%.

[0049] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0050] The above description of the disclosed embodiments enables those skilled in the art to make or use the invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the invention. Therefore, the invention is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A power module, characterized in that, The device includes a carrier board, a magnetic component, and a component layer. The component layer includes an insulator, at least one power chip, a capacitor, a conductor, and opposing upper and lower surfaces. The carrier board includes opposing upper and lower surfaces and includes a metal wiring layer disposed on the upper and lower surfaces. The magnetic component is disposed on the upper surface of the carrier board, and the pins of the magnetic component are electrically connected to the metal wiring layer on the upper surface of the carrier board. The power chip includes a functional surface, on which at least two planar power devices are integrated in series, with the series node being a common terminal; the functional surface of the power chip is provided with chip pins; the power chip is disposed on the lower surface of the carrier board, and the chip pins are electrically connected to the metal wiring layer on the lower surface of the carrier board; the pins of the magnetic component are electrically connected to the common terminal. The pins of the magnetic component and the projection of the power chip on the same horizontal plane at least partially overlap; The capacitor is disposed on the lower surface of the carrier plate, and the capacitor is connected in parallel with two planar power devices connected in series. The insulator covers at least a portion of the lower surface of the carrier board, the power chip, and the capacitor; the upper surface of the component layer is adjacent to the lower surface of the carrier board, and the lower surface of the component layer is provided with a surface metal wiring layer; the connector electrically connects the metal wiring layer of the carrier board and the metal wiring layer on the lower surface of the component layer.

2. The power module according to claim 1, characterized in that, The conductive element penetrates the upper and lower surfaces of the component layer, and the conductive element is a via or a copper pillar.

3. The power module according to claim 1, characterized in that, The sides of the carrier plate and the sides of the component layer are metallized to form a guide, and the guide covers part of the upper surface of the carrier plate, part of the sides of the carrier plate and the component layer, and part of the lower surface of the component layer.

4. The power module according to claim 1, characterized in that, The conductor has a blind hole structure.

5. The power module according to claim 1, characterized in that, The magnetic component is smaller in the horizontal direction than the carrier plate; other elements are disposed in the area of ​​the magnetic component that does not cover the carrier plate.

6. The power module according to claim 1, characterized in that, The pins of the magnetic component protrude from the lower surface of the magnetic component; there is a accommodating space between the lower surface of the magnetic component, the upper surface of the carrier plate and the pins of the magnetic component for accommodating the input capacitor and / or the output capacitor.

7. The power module according to claim 6, characterized in that, An input capacitor and an output capacitor are disposed within the accommodating space, and the electrodes of the input capacitor and the output capacitor with the same name are disposed on the same layer of copper plating.

8. The power module according to claim 6, characterized in that, The upper surface of the carrier board is provided with one of an input capacitor and an output capacitor, and the lower surface of the carrier board is provided with the other of an input capacitor and an output capacitor; the corresponding electrodes of the input capacitor and the output capacitor are on the copper pours on the upper and lower surfaces of the carrier board, and the projections of the copper pours on the upper and lower surfaces on the same horizontal plane at least partially overlap, and are connected by vias.

9. The power module according to claim 1, characterized in that, A thermal via or heat sink is provided between the non-functional surface of the power chip and the lower surface of the component layer.

10. The power module according to claim 1, characterized in that, The windings of the magnetic component are at least partially exposed on the upper surface of the magnetic component.

11. The power module according to claim 1, characterized in that, It also includes a dielectric layer and an outer wiring layer. The dielectric layer is disposed between the upper surface of the carrier board and the lower surface of the magnetic component, and the outer wiring layer is disposed between the dielectric layer and the magnetic component. The outer wiring layer is electrically connected to the metal wiring layer on the upper surface of the carrier board through vias.

12. The power module according to claim 11, characterized in that, The outer wiring layer and the surface metal wiring layer on the lower surface of the component layer are completed in the same process.

13. The power module according to claim 1, characterized in that, A dielectric layer and an outer wiring layer are disposed on the lower surface of the component layer, and the outer wiring layer is disposed on the lower surface of the dielectric layer; the outer wiring layer is electrically connected to the surface metal wiring layer on the lower surface of the component layer through vias.

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