A half-bridge power module and a manufacturing process

Abstract

This invention relates to the field of semiconductor technology, specifically disclosing a half-bridge power module and its fabrication process. The fabrication process includes the following steps: Assembly prefabrication and interlayer bonding: For the upper half-bridge power chip, a first solder pad is used to bond it to a molybdenum sheet to form a first assembly; for the lower half-bridge power chip, a first solder pad is used to bond it to an AMB sheet to form a second assembly; using a second solder pad and a third solder pad with melting points lower than the first solder pad, the first and second assemblies are respectively welded and fixed onto a thermoelectric separation substrate; Electrical interconnection and terminal bonding: Electrical interconnection is achieved between the front pads of the power chip and the surface of the thermoelectric separation substrate using bonding wires; using solder paste with melting points lower than the second and third solder pads, power terminals and signal terminals are respectively soldered to preset positions on the thermoelectric separation substrate. The technical solution of this invention can achieve low stray parameters, high heat dissipation efficiency, and strong current sharing performance in high power density scenarios.

Description

Technical Field

[0001] This invention relates to the field of semiconductor technology, and in particular to a half-bridge power module and its fabrication process. Background Technology

[0002] As power electronics technology advances towards higher frequencies, higher power densities, and higher reliability, the performance requirements for power modules are becoming increasingly stringent. As a core topology for inverters and converters, the modular packaging technology of the half-bridge structure is crucial. An ideal half-bridge power module must simultaneously possess: low stray parameters (to suppress switching overvoltage and electromagnetic interference), excellent heat dissipation (to improve output current and lifespan), perfect current sharing characteristics (especially when multiple chips are connected in parallel), and high power density.

[0003] However, traditional packaging technologies face numerous inherent challenges in these areas, becoming bottlenecks that restrict system performance improvement: While traditional standard soldered modules are structurally mature and low-cost, they suffer from inherent defects such as high stray inductance, easy failure of aluminum wire bonding, and poor current sharing among multiple chips. To overcome the bonding wire bottleneck, improved modules using planar interconnects significantly reduce parasitic inductance and improve heat dissipation through planar conductors such as copper foil, but introduce new challenges of process complexity and thermomechanical stress. Double-sided heat dissipation modules, pursuing ultimate heat dissipation, minimize thermal resistance, but their packaging process is extremely complex and costly, and reliability assurance faces severe challenges. While press-fit packaging, mainly used in ultra-high power scenarios, offers solderless operation and highly reliable safe failure modes, it suffers from low power density and difficulty in controlling stray parameters. Overall, all technical solutions require difficult trade-offs between electrical performance, thermal management, process complexity, and cost.

[0004] Therefore, there is a need for a half-bridge power module and its fabrication process that can achieve low stray parameters, high heat dissipation efficiency and strong current sharing performance in high power density scenarios. Summary of the Invention

[0005] One of the objectives of this invention is to provide a half-bridge power module fabrication process that can achieve low stray parameters, high heat dissipation efficiency, and strong current sharing performance in high power density scenarios.

[0006] To solve the above-mentioned technical problems, this application provides the following technical solution:

[0007] A fabrication process for a half-bridge power module includes the following steps:

[0008] Assembly prefabrication and interlayer welding: For the upper half-bridge power chip, the first solder pad is used to weld it to the molybdenum sheet to form the first assembly; for the lower half-bridge power chip, the first solder pad is used to weld it to the AMB to form the second assembly; the first assembly and the second assembly are welded and fixed to the thermoelectric separation substrate by the second solder pad and the third solder pad, which have a lower melting point than the first solder pad.

[0009] Electrical interconnection and terminal bonding: Electrical interconnection between the front pads of the power chip and the surface of the thermoelectric separation substrate is achieved through bonding wires; Power terminals and signal terminals are soldered to preset positions on the thermoelectric separation substrate using solder paste with a melting point lower than that of the second and third solder pads.

[0010] Furthermore, it also includes overall encapsulation: the outer shell is attached and fixed to the thermoelectric separation substrate with sealant, and silicone gel is filled into the interior through the pre-set holes of the outer shell.

[0011] Furthermore, the prefabrication and interlayer welding of the assembly specifically include:

[0012] S1. The first solder pad is used as the intermediate connection layer between the upper half-bridge power chip and the molybdenum sheet. In the formic acid reduction furnace, the first solder pad is melted by high temperature to form a solder layer, thereby realizing the welding interconnection between the upper half-bridge power chip and the molybdenum sheet, and obtaining the first assembly.

[0013] S2. The first solder pad is used as the intermediate connection layer between the lower half-bridge power chip and the AMB. In the formic acid reduction furnace, the first solder pad is melted by high temperature to form a solder layer, thereby realizing the welding interconnection between the lower half-bridge power chip and the AMB.

[0014] S3. Using a second solder pad as an intermediate solder layer between the first assembly and the thermoelectric separation substrate, and using a third solder pad as an intermediate solder layer between the second assembly and the thermoelectric separation substrate, interlayer welding interconnection of the first assembly, the second assembly and the thermoelectric separation substrate is achieved to obtain the third assembly.

[0015] The planar dimensions of the second solder pad match the connection surface area of ​​the molybdenum sheet, while the planar dimensions of the third solder pad correspond to the connection surface area of ​​the copper layer on the back of the AMB sheet. The melting points of the second and third solder pads are lower than those of the first solder pad.

[0016] Furthermore, the electrical interconnection and terminal fixing specifically include:

[0017] S4. Using aluminum wire as the conductive interconnect medium, the electrical interconnection between the gate pad and source pad on the front side of the power chip and the copper layer on the surface of the thermoelectric separation substrate is realized to obtain the fourth assembly.

[0018] S5. Select a suitable solder paste as the interconnect medium and solder the preset pads of the signal terminals and power terminals to the preset positions of the fourth assembly.

[0019] The melting point of the solder paste is lower than that of the first and second solder pads.

[0020] Furthermore, the overall packaging specifically includes:

[0021] S6. Apply sealant along the mating surface between the outer shell and the thermoelectric separation substrate, and precisely align and press the outer shell and thermoelectric separation substrate together.

[0022] S7. Align the pre-set circular hole on the outer shell and pour in the silicone gel to fill the internal gaps. After the encapsulation is completed, allow the silicone gel to fully solidify and form.

[0023] The second objective of this invention is to provide a half-bridge power module, fabricated using the above-described process, comprising: a thermoelectric separation substrate, an AMB, a power chip, and a molybdenum sheet;

[0024] The power chip includes an upper-bridge power chip and a lower-bridge power chip;

[0025] The upper half-bridge power chip is welded to the molybdenum sheet via a first solder pad to form a first assembly, and several first assemblies are welded onto the thermoelectric separation substrate via a second solder pad.

[0026] Several lower half-bridge power chips are soldered to the AMB via a first solder pad to form a second assembly, which is then soldered onto a thermoelectric separation substrate via a third solder pad.

[0027] Furthermore, it also includes two sets of power terminals and two sets of signal terminals; the two sets of power terminals are respectively disposed on the left and right sides of the thermoelectric separation substrate, and the first assembly and the second assembly are located between the two sets of power terminals; the two sets of signal terminals are respectively disposed on the rear side of the corresponding power terminals.

[0028] Furthermore, it also includes two sets of power terminals and two sets of signal terminals; the two sets of power terminals are disposed on opposite sides of the thermoelectric separation substrate, and the first assembly and the second assembly are located between the two sets of power terminals; each set of signal terminals is disposed adjacent to one set of power terminals in the same end region of the thermoelectric separation substrate.

[0029] Furthermore, the gate pads and source pads on the front sides of the upper and lower half-bridge power chips are electrically interconnected with the copper layer on the surface of the thermoelectric separation substrate through bonding wires.

[0030] Furthermore, it also includes a housing that encapsulates and covers the thermoelectric separation substrate and all components thereon.

[0031] Furthermore, the molybdenum sheet has dimensions of 5mm in length, 6mm in width, and 0.3mm in thickness.

[0032] The half-bridge power module of this solution constructs a first assembly consisting of an upper half-bridge power chip and a molybdenum sheet, and a second assembly consisting of a lower half-bridge power chip and an AMB on a thermoelectric separation substrate. By utilizing the excellent thermal expansion matching characteristics of the molybdenum sheet and the high thermal conductivity of the AMB, combined with the structural advantages of the thermoelectric separation substrate, the thermal resistance path from the chip heat source to the heat dissipation base plate is effectively reduced. This can alleviate the mechanical stress of the power chip in frequent thermal cycling, prevent solder layer cracking, and improve the thermal stability and structural reliability of the module in high power density operating environments through physical-level thermal and electrical isolation optimization.

[0033] This solution also constructs a compact three-dimensional current path by setting the bottom plate of the thermoelectric separation substrate as the power positive electrode and arranging the negative terminals on the front side in a polarity arrangement. This breaks the limitations of the traditional planar layout and greatly compresses the enclosing area of ​​the main power circuit by utilizing the cancellation effect of the current flow direction, thereby significantly reducing the stray inductance of the circuit.

[0034] Furthermore, the fabrication process of this solution, which involves prefabricating the assembly and then performing secondary welding, achieves precise control over the welding quality between the chip, molybdenum wafer, and AMB. Combined with subsequent steps such as shell packaging and testing, flexible connections, and silicone gel encapsulation, the integrity of the module's internal structure is further enhanced. This solution's comprehensive optimization, from material selection and spatial topology to packaging technology, enables the half-bridge power module to achieve high power output while possessing extremely low parasitic parameters and excellent current sharing characteristics, providing a solid hardware foundation for high-frequency, miniaturized power electronic conversion systems. Attached Figure Description

[0035] Figure 1 This is an exploded view of a half-bridge power module according to Embodiment 1.

[0036] Figure 2 This is a schematic diagram comparing chip stress under molybdenum wafers of different areas and thicknesses during the fabrication process of a half-bridge power module in Example 1.

[0037] Figure 3 This is a schematic diagram comparing the chip junction temperature under molybdenum wafers of different areas and thicknesses during the fabrication process of a half-bridge power module in Example 1.

[0038] Figure 4 This is a schematic diagram of the current path under a side cross-sectional view in the fabrication process of a half-bridge power module according to Embodiment 1;

[0039] Figure 5 This is a schematic diagram of the current path of each chip branch in the fabrication process of a half-bridge power module in Example 1.

[0040] Figure 6This is a schematic diagram of the current distribution of each branch in the fabrication process of a half-bridge power module in Example 1. Detailed Implementation

[0041] The following detailed description illustrates the specific implementation method:

[0042] The markings in the accompanying drawings include: housing 1, power terminal 2, signal terminal 3, molybdenum sheet 4, thermoelectric separation substrate 5, AMB 6, power chip 7, bonding wire 8.

[0043] Example 1

[0044] like Figure 1 As shown, a half-bridge power module of this embodiment includes: a housing 1, power terminals 2, signal terminals 3, a molybdenum sheet 4, a thermoelectric separation substrate 5, an AMB 6, a power chip 7, and bonding wires 8.

[0045] Power chip 7 includes an upper half-bridge power chip and a lower half-bridge power chip;

[0046] The upper half-bridge power chip is welded to the molybdenum sheet 4 via a first solder pad to form a first assembly. Several first assemblies are welded onto the thermoelectric separation substrate 5 via a second solder pad. In this embodiment, there are three first assemblies.

[0047] Several lower-half-bridge power chips are soldered to AMB 6 via first solder pads to form a second assembly, and the second assembly is soldered to the thermoelectric separation substrate 5 via third solder pads; in this embodiment, three lower-half-bridge power chips are soldered to an AMB 6 via corresponding first solder pads to form a second assembly.

[0048] The second assembly is located to the right of the first assembly;

[0049] Two sets of power terminals 2 are respectively welded to the left and right sides of the thermoelectric separation substrate 5, and the first assembly and the second assembly are located between the two sets of power terminals 2.

[0050] The two sets of signal terminals 3 are soldered to the rear side of the corresponding power terminals 2.

[0051] The gate pads and source pads on the front side of the power chip are electrically interconnected with the copper layer on the surface of the thermoelectric separation substrate 5 via bonding wires 8.

[0052] The outer casing 1 encapsulates and covers the thermoelectric separation substrate 5 and all components thereon.

[0053] In this embodiment, the outer shell 1 is used to provide mechanical protection, ensure the safety of the internal components of the module, and prevent external environmental factors (such as dust and moisture) from entering.

[0054] The bonding wire 8 is typically made of aluminum and is used to connect power chips and other electronic components (such as power terminals 2, signal terminals 3, etc.). Its main function is to provide electrical connections and maintain stability under thermal and mechanical stress; to further improve the heat dissipation and reliability of the module, in other embodiments, the bonding wire 8 can be replaced with a copper clip process.

[0055] Power terminal 2 is used to connect the power input and output of the power module. It carries a large current and therefore usually needs to have a high current carrying capacity and low contact resistance.

[0056] Signal terminal 3 is used to connect control and detection signals of the power module, and is typically connected to the gate circuit and monitoring circuit. It transmits control signals, status information, etc., to help regulate and protect the operation of the module.

[0057] The molybdenum sheet 4 is used as a coefficient of thermal expansion (CTE) matching layer. By buffering the huge stress caused by thermal expansion and contraction between the chip and the copper base plate, it significantly improves the reliability of the power module and extends its service life.

[0058] The thermoelectric separation substrate 5 is the base for connecting various components and is made of copper and FR4. Its function is to support and fix the components, provide a heat dissipation channel for the entire power module, and also serve as a current path.

[0059] AMB 6 is a metal brazing technique used to weld chips to thermoelectric separation substrate 5 and other components. It ensures thermal and electrical connection between the chip and thermoelectric separation substrate 5, and has high thermal conductivity and good electrical conductivity.

[0060] Power chips are the core components of power modules, responsible for performing the core function of power conversion. They are typically made of semiconductor materials (such as SiC or IGBTs) and are used to switch and control the flow of current.

[0061] This embodiment also provides a half-bridge power module fabrication process, including the following steps;

[0062] S1. For the upper half-bridge power chip of the half-bridge module, the first solder pad is first used as the intermediate connection layer between the upper half-bridge power chip and the molybdenum sheet 4. In the formic acid reduction furnace, the first solder pad is melted by high temperature to form a solder layer, thereby realizing the welding interconnection between the upper half-bridge power chip and the molybdenum sheet 4, and obtaining the first assembly.

[0063] This embodiment establishes a three-dimensional thermal-structural coupling simulation model for a 4.3mm × 5.3mm upper-half-bridge power chip, systematically analyzing the quantitative relationship between different dimensions (length × width) and thickness parameters of the molybdenum sheet 4 and the operating junction temperature and interface thermal stress distribution of the upper-half-bridge power chip. Simulation results are as follows: Figure 2 , Figure 3 As shown, when the size of molybdenum sheet 4 is 5mm×6mm×0.3mm (length×width×thickness), its overall performance in terms of thermal properties (junction temperature control) and mechanical properties (stress buffering) reaches the optimal level.

[0064] S2. For the lower half-bridge power chip of the half-bridge module, the first solder pad is used as the intermediate connection layer between the lower half-bridge power chip and AMB 6. In the formic acid reduction furnace, the first solder pad is melted by high temperature to form a solder layer, thereby realizing the welding interconnection between the lower half-bridge power chip and AMB 6.

[0065] In this embodiment, the ceramic layer of AMB 6 uses Si3N4 and AlN to reduce the thermal resistance of the lower half-bridge.

[0066] S3. A second solder pad is used as an intermediate solder layer between the first assembly and the thermoelectric separation substrate 5, and a third solder pad is used as an intermediate solder layer between the second assembly and the thermoelectric separation substrate 5, thereby achieving interlayer welding interconnection between the first assembly, the second assembly, and the thermoelectric separation substrate 5 to obtain a third assembly. In this embodiment, the thermoelectric separation substrate 5 is a copper substrate.

[0067] The planar dimensions of the second solder pad are strictly matched with the connection surface area of ​​the molybdenum sheet 4, while the planar dimensions of the third solder pad correspond perfectly to the connection surface area of ​​the copper layer on the back of the AMB 6 (Active Metal Brazing Substrate). At the same time, the melting points of the second and third solder pads must be strictly lower than the melting point of the first solder pad to avoid secondary melting of the first solder pad due to high temperature during the welding process, thereby ensuring the metallurgical bonding stability of each welding interface and the long-term reliability of the overall structure.

[0068] S4. Using a high-precision automatic aluminum wire bonding machine, aluminum wire is used as the conductive interconnection medium to realize the electrical interconnection between the gate pads and source pads on the front side of the power chip and the copper layer on the surface of the thermoelectric separation substrate 5, thus obtaining the fourth assembly.

[0069] S5. Select a suitable solder paste as the interconnect medium and precisely apply it to the preset pads of signal terminal 3, power terminal 2, and the corresponding connection parts of the fourth assembly. Through the wetting and curing action of the solder paste, a reliable electrical connection and mechanical fixation between the three are achieved, resulting in a sample. The solder paste selected in this embodiment must meet the core technical requirement: its melting point must be lower than that of the first and second solder pads. This requirement can prevent the solder pads from melting again due to temperature rise during subsequent processes or product use, thereby ensuring the stability of the interconnect structure and the consistency of electrical performance.

[0070] S6. Select a sealant that is compatible with the materials of the outer shell 1 and the sample, and apply it evenly and continuously along the bonding surfaces of the two to ensure that the sealant layer is free of bubbles, breaks, and uneven thickness. Then, precisely align the outer shell 1 and the sample and press them firmly to fix them.

[0071] Once the sealant has fully cured, it forms a dense protective barrier, which not only prevents the internal power chip and bonding wire 8 from directly contacting the outside air, moisture, dust, etc., but also reduces the corrosion of the core components by the external environment, ensuring the electrical performance stability and structural integrity of the experimental sample.

[0072] S7. Align the silicone gel with the pre-set circular hole in the center of the outer casing 1, and slowly and evenly pour it in, ensuring that the silicone gel fully fills the internal gaps of the half-bridge power module, leaving no air bubbles or dead corners. After potting, strictly follow the technical requirements of the silicone gel to control the curing environment, maintaining suitable temperature and humidity, until it is completely cured. The cured silicone gel will form a flexible protective layer, which can not only buffer the impact of external vibrations on the internal structure of the half-bridge power module, but also further isolate moisture and impurities from intrusion, thereby significantly improving the structural stability, long-term operational reliability and shock resistance of the half-bridge power module.

[0073] Traditional standard welded modules have long power circuits and small overlap areas, resulting in large stray inductance; while press-fit packaging is reliable, controlling stray parameters is difficult. This solution adopts a polarity design with the base plate as the positive power terminal and the front side arranged as the negative terminal, constructing a three-dimensional current path, such as... Figure 4 and Figure 5 As shown in the diagram, in this design, the current flows in from the positive power terminal 2, through the molybdenum sheet 4, the upper half-bridge power chip, the bonding wire 8, the lower half-bridge power chip, the bonding wire 8, and out from the negative power terminal 2. This structure significantly reduces the current loop area and effectively suppresses parasitic parameters by enhancing the magnetic field coupling cancellation effect. Using a network analyzer, the parasitic inductance of the main power loops at both the positive and negative terminals was measured to be as low as 2.3 nH, significantly improving the module's switching characteristics and anti-interference capability.

[0074] Traditional modules, when multiple chips are connected in parallel, suffer from poor dynamic and static current sharing due to loop asymmetry and the dispersion of bonding wire parameters. This solution leverages the structural advantages of the thermoelectric separation substrate 5, employing a vertically evenly distributed source terminal layout to achieve a high degree of matching of the source current paths of each chip within the module, minimizing path length deviations. Compared to the two-dimensional design and inconsistent branch lengths of traditional modules, this solution offers significant advantages. The current characteristics of branches d1, d2, and d3 under the overall module turn-on and turn-off conditions are shown below. Figure 6 As shown, the design of this scheme improves the uniformity of branch parasitic inductance distribution by more than 40%, ensures excellent current sharing characteristics under multi-chip parallel operation, and effectively reduces the risk of local overheating caused by uneven current distribution.

[0075] While existing planar interconnect modules improve heat dissipation, they introduce challenges related to thermal mismatch stress. Double-sided heat dissipation modules are extremely complex and costly to manufacture, and discrete devices connected in series and parallel exhibit poor heat dissipation. This solution addresses these issues by soldering a molybdenum sheet 4 beneath the upper half-bridge power chip, mitigating the CTE mismatch between the copper of the directly soldered thermoelectric separation substrate 5 and the SiC chip. An AMB 6 is soldered beneath the lower half-bridge power chip, ensuring both insulation and high thermal conductivity. Specifically, this solution proposes a molybdenum block-based stress optimization scheme. By introducing the molybdenum sheet 4 as a thermal expansion coefficient matching layer, it buffers the thermal expansion and contraction stress between the chip and the copper base plate. The molybdenum block (6mm long, 5mm wide, and 0.3mm thick), optimized through multiphysics simulation, reduces the maximum chip stress to below 75MPa while maintaining a thermal conductivity ≥120W / (m·K), significantly improving module reliability and extending its lifespan.

[0076] Existing press-fit packages have low power density; discrete components occupy a large space in series and parallel connections. This solution achieves extreme miniaturization, with package dimensions precisely controlled at 40mm×40mm×5mm, a volume only about 1 / 6 of current mainstream commercial power modules, significantly improving power density and providing core support for the miniaturization of the entire system.

[0077] Existing planar interconnect and double-sided heat dissipation modules have complex processes, extremely high requirements for flatness and precision, and high manufacturing costs. Compared with existing plastic-encapsulated power modules, the packaging structure of this solution is basically consistent with the current common potted modules, possessing better process adaptability and reducing the technical difficulty of production and manufacturing. Compared with traditional potted modules, it has comprehensive optimization in thermal resistance and parasitic parameters; compared with discrete device solutions, it has a high degree of integration, optimized external interface characteristics, more convenient and reliable connection, and simplified system integration process.

[0078] The above are merely embodiments of the present invention. The invention is not limited to the fields covered by these embodiments. Commonly known structures and characteristics in the solutions are not described in detail here. Those skilled in the art are aware of all common technical knowledge in the field prior to the application date or priority date, are able to access all existing technologies in that field, and have the ability to apply conventional experimental methods prior to that date. Those skilled in the art can, under the guidance of this application, improve and implement this solution in combination with their own capabilities. Some typical known structures or methods should not be obstacles for those skilled in the art to implement this application. It should be noted that those skilled in the art can make several modifications and improvements without departing from the structure of the present invention. These should also be considered within the scope of protection of the present invention, and will not affect the effectiveness of the implementation of the present invention or the practicality of the patent. The scope of protection claimed in this application should be determined by the content of its claims, and the specific embodiments described in the specification can be used to interpret the content of the claims.

Claims

1. A process for manufacturing a half-bridge power module, characterized in that, Includes the following: Assembly prefabrication and interlayer welding: For the upper half-bridge power chip, a first solder pad is used to weld it to the molybdenum sheet to form a first assembly; for the lower half-bridge power chip, a first solder pad is used to weld it to the AMB to form a second assembly; a second solder pad with a melting point lower than the first solder pad is used to weld and fix the first assembly to the thermoelectric separation substrate; a third solder pad with a melting point lower than the first solder pad is used to weld and fix the second assembly to the thermoelectric separation substrate. Electrical interconnection and terminal bonding: Electrical interconnection between the front pads of the power chip and the surface of the thermoelectric separation substrate is achieved through bonding wires; Power terminals and signal terminals are soldered to preset positions on the thermoelectric separation substrate using solder paste with a melting point lower than that of the second and third solder pads.

2. The half-bridge power module manufacturing process of claim 1, wherein: It also includes overall encapsulation: the outer shell is attached and fixed to the thermoelectric separation substrate with sealant, and silicone gel is filled into the interior through the pre-set holes of the outer shell.

3. The half-bridge power module manufacturing process of claim 2, wherein: The prefabrication and interlayer welding of the assembly specifically include: S1. The first solder pad is used as the intermediate connection layer between the upper half-bridge power chip and the molybdenum sheet. In the formic acid reduction furnace, the first solder pad is melted by high temperature to form a solder layer, thereby realizing the welding interconnection between the upper half-bridge power chip and the molybdenum sheet, and obtaining the first assembly. S2. The first solder pad is used as the intermediate connection layer between the lower half-bridge power chip and the AMB. In the formic acid reduction furnace, the first solder pad is melted by high temperature to form a solder layer, thereby realizing the welding interconnection between the lower half-bridge power chip and the AMB. S3. Using a second solder pad as an intermediate solder layer between the first assembly and the thermoelectric separation substrate, and using a third solder pad as an intermediate solder layer between the second assembly and the thermoelectric separation substrate, interlayer welding interconnection of the first assembly, the second assembly and the thermoelectric separation substrate is achieved to obtain the third assembly. The planar dimensions of the second solder pad match the connection surface area of ​​the molybdenum sheet, while the planar dimensions of the third solder pad correspond to the connection surface area of ​​the copper layer on the back of the AMB sheet. The melting points of the second and third solder pads are lower than those of the first solder pad.

4. The half-bridge power module manufacturing process of claim 3, wherein: The electrical interconnection and terminal fixing specifically include: S4. Using aluminum wire as the conductive interconnect medium, the electrical interconnection between the gate pads and source pads on the front side of the power chip and the copper layer on the surface of the thermoelectric separation substrate is realized to obtain the fourth assembly. S5. Select a suitable solder paste as the interconnect medium and solder the preset pads of the signal terminals and power terminals to the preset positions of the fourth assembly. The melting point of the solder paste is lower than that of the first and second solder pads.

5. The half-bridge power module fabrication process according to claim 4, characterized in that: The overall packaging specifically includes: S6. Apply sealant along the mating surface between the outer shell and the thermoelectric separation substrate, and precisely align and press the outer shell and thermoelectric separation substrate together. S7. Align the pre-set circular hole on the outer shell and pour in the silicone gel to fill the internal gaps. After the encapsulation is completed, allow the silicone gel to fully solidify and form.

6. A half-bridge power module, fabricated using the process described in any one of claims 1-5, characterized in that, include: Thermoelectric separation substrate, AMB, power chip and molybdenum sheet; The power chip includes an upper-bridge power chip and a lower-bridge power chip; The upper half-bridge power chip is welded to the molybdenum sheet via a first solder pad to form a first assembly, and several first assemblies are welded onto the thermoelectric separation substrate via a second solder pad. Several lower half-bridge power chips are soldered to the AMB via a first solder pad to form a second assembly, which is then soldered onto a thermoelectric separation substrate via a third solder pad.

7. The half-bridge power module of claim 6, characterized in that: It also includes two sets of power terminals and two sets of signal terminals; the two sets of power terminals are respectively disposed on the left and right sides of the thermoelectric separation substrate, and the first assembly and the second assembly are located between the two sets of power terminals; the two sets of signal terminals are respectively disposed on the rear side of the corresponding power terminals.

8. The half-bridge power module of claim 7, characterized in that: It also includes two sets of power terminals and two sets of signal terminals; the two sets of power terminals are disposed on opposite sides of the thermoelectric separation substrate, and the first assembly and the second assembly are located between the two sets of power terminals; each set of signal terminals is disposed adjacent to one set of power terminals in the same end region of the thermoelectric separation substrate.

9. The half-bridge power module of claim 8, characterized in that: The gate and source pads on the front sides of the upper and lower half-bridge power chips are electrically interconnected with the copper layer on the surface of the thermoelectric separation substrate via bonding wires.

10. The half-bridge power module of claim 9, characterized in that: The molybdenum sheet measures 5mm in length, 6mm in width, and 0.3mm in thickness.

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