Board card starting method and device, electronic equipment and readable storage medium

Abstract

The embodiment of the invention provides a board card starting method and device, electronic equipment and a readable storage medium. The board card starting method and device are applied to a first to-be-started unit in a board card. The board card further comprises at least one second to-be-started unit and a preset memory, the first to-be-started unit and the second to-be-started unit are in communication connection through the serial bus interface, and the first to-be-started unit is connected with the preset memory; the method comprises the steps of obtaining a state value of a preset flag bit in a preset memory in response to a board card starting operation; under the condition that the state value is the first state, executing a starting program corresponding to the first to-be-started unit; under the condition that the state value is the second state, receiving data through the serial bus interface; under the condition that a completion instruction is received through the serial bus interface, the state value of the preset flag bit is updated to be in the first state, and obtaining of the state value of the preset flag bit in the preset memory is executed again. And the problem of abnormal starting is avoided.

Description

Technical Field

[0001] This invention belongs to the field of integrated circuit technology, and in particular relates to a board startup method, device, electronic device, and readable storage medium. Background Technology

[0002] With the development of integrated circuit technology, in order to improve chip availability, more and more fields have begun to adopt chip boards that integrate a central processing unit (CPU) and other programmable devices (such as field-programmable gate arrays or microcontrollers).

[0003] When the above-mentioned type of board starts up, the CPU unit and other programmable device units need to be started. In some scenarios, in order to avoid startup lag, there are certain requirements for the startup order of different units to be started. However, the startup speed of different units to be started usually varies. Therefore, how to guide the startup order of different units to be started has become an urgent problem to be solved. Summary of the Invention

[0004] This invention provides a board boot method, apparatus, electronic device, and readable storage medium to solve the problem of how to guide the boot sequence of different units to be booted.

[0005] To solve the above-mentioned technical problems, the present invention is implemented as follows: In a first aspect, the present invention provides a board boot method, the method being applied to a first bootable unit in a board; the board further includes at least one second bootable unit and a preset memory, the first bootable unit and the second bootable unit being communicatively connected via a serial bus interface, the first bootable unit being connected to the preset memory; the method includes: In response to the board startup operation, the status value of the preset flag bit in the preset memory is obtained; When the state value is the first state, the startup program corresponding to the first unit to be started is executed; When the state value is in the second state, data is received through the serial bus interface; Upon receiving a completion command via the serial bus interface, the status value of the preset flag bit is updated to the first status, and the step of obtaining the status value of the preset flag bit in the preset memory is executed again. The second unit to be started is used to respond to the board startup operation, execute the startup program corresponding to the second unit to be started, and output the completion command through the serial bus interface after execution.

[0006] Optionally, the startup program corresponding to the first unit to be started is stored in the preset memory. Before obtaining the status value of the preset flag bit in the preset memory, the method further includes: Obtain the startup program from the preset memory and store the startup program in the cache; Switch the operating mode of the preset memory from instruction fetch mode to read / write mode; The execution of the startup program corresponding to the first unit to be started includes: Retrieve the startup program from the cache and execute it.

[0007] Optionally, if the state value is the first state, the method further includes: Update the state value of the preset flag bit in the preset memory to the second state.

[0008] Optionally, after obtaining the state value of the preset flag bit in the preset memory, the method further includes: If the state value is other than the state value, the state value of the preset flag bit in the preset memory is updated to the second state; the other state is a state value that is different from both the first state and the second state.

[0009] Optionally, the first unit to be started is a processor, and the second unit to be started is a field-programmable gate array.

[0010] Secondly, the present invention provides a board booting device, which is applied to a first bootable unit in a board; the board further includes at least one second bootable unit and a preset memory, the first bootable unit and the second bootable unit being communicatively connected via a serial bus interface, and the first bootable unit being connected to the preset memory; the device includes: The first acquisition module is used to acquire the status value of the preset flag bit in the preset memory in response to the board boot operation; The first execution module is used to execute the startup program corresponding to the first unit to be started when the state value is the first state. A receiving module is configured to receive data through the serial bus interface when the state value is in the second state. The first update module is used to update the status value of the preset flag bit to the first state when a completion instruction is received through the serial bus interface, and to execute the step of obtaining the status value of the preset flag bit in the preset memory again. The second unit to be started is used to respond to the board startup operation, execute the startup program corresponding to the second unit to be started, and output the completion command through the serial bus interface after execution.

[0011] Optionally, the startup program corresponding to the first unit to be started is stored in the preset memory, and the device further includes: The second acquisition module is used to acquire the startup program in the preset memory and store the startup program in the cache; A switching module is used to switch the operating mode of the preset memory from instruction fetch mode to read / write mode; The first execution module is specifically used to: retrieve the startup program from the cache and execute it.

[0012] Optionally, the device further includes: The second update module is used to update the state value of the preset flag bit in the preset memory to the second state when the state value is the first state.

[0013] Optionally, the device further includes: The third update module is used to update the state value of the preset flag bit in the preset memory to the second state when the state value is other states; the other states are state values ​​that are different from both the first state and the second state.

[0014] Optionally, the first unit to be started is a processor, and the second unit to be started is a field-programmable gate array.

[0015] Thirdly, the present invention provides an electronic device, comprising: a processor, a memory, and a computer program stored in the memory and executable on the processor, characterized in that the processor implements the above-described board startup method when executing the program.

[0016] Fourthly, the present invention provides a readable storage medium that, when the instructions in the storage medium are executed by the processor of an electronic device, enables the electronic device to execute the above-described board boot method.

[0017] The board startup method provided in this invention is applied to a board including a first startup unit, at least one second startup unit, and a preset memory. The first and second startup units are connected via a serial bus interface. The first startup unit is connected to the preset memory. When the board starts, after the second startup unit completes its corresponding startup program, it outputs a completion instruction to update the status value of a preset flag bit in the preset memory to a first state. The first startup unit then obtains the status value of the preset flag bit in the preset memory, and if the status value is in the first state, it executes its corresponding startup program. Simultaneously, when the status value of the preset flag bit is in the second state, the first startup unit can receive data through the serial bus interface. This ensures the communication stability between the first and second startup units before the operating system starts, guaranteeing that the first startup unit receives the completion instruction output by the second startup unit in a timely manner, and thus updates the status value of the preset flag bit to the first state through the completion instruction. In this way, by using the preset flag bits in the preset memory, the boot order between the first and second units to be booted can be guided, avoiding boot anomalies caused by the boot order not matching the actual needs, and ensuring the boot effect of the board to a certain extent. Attached Figure Description

[0018] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0019] Figure 1 This is a flowchart of the steps of a board boot method provided in an embodiment of the present invention; Figure 2 This is a schematic diagram of the structure of a circuit board provided in an embodiment of the present invention; Figure 3 This is a schematic diagram of a board startup process provided in an embodiment of the present invention; Figure 4 This is a structural diagram of a board startup device provided in an embodiment of the present invention; Figure 5 This is a structural diagram of an electronic device provided in an embodiment of the present invention. Detailed Implementation

[0020] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0021] The terms "first," "second," etc., used in the specification and claims of this invention are used to distinguish similar objects and not to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that embodiments of the invention can be implemented in orders other than those illustrated or described herein, and the objects distinguished by "first," "second," etc., are generally of the same class and the number of objects is not limited; for example, the first object can be one or more. Furthermore, the term "and / or" in the specification and claims is used to describe the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent: A alone, A and B simultaneously, and B alone. The character " / " generally indicates that the preceding and following related objects are in an "or" relationship. In embodiments of this invention, the term "multiple" refers to two or more, and other quantifiers are similar.

[0022] Figure 1 This is a flowchart illustrating the steps of a board boot method provided in an embodiment of the present invention. The method can be applied to a first bootable unit in a board, which also includes at least one second bootable unit and a preset memory. The first bootable unit and the second bootable unit are communicatively connected via a serial bus interface, and the first bootable unit is connected to the preset memory. Figure 1 As shown, the method may include the following steps: Step 101: In response to the board startup operation, obtain the status value of the preset flag bit in the preset memory.

[0023] Step 102: If the state value is the first state, execute the startup program corresponding to the first unit to be started.

[0024] Step 103: When the state value is the second state, receive data through the serial bus interface.

[0025] Step 104: Upon receiving a completion instruction via the serial bus interface, update the status value of the preset flag bit to the first status, and execute the step of obtaining the status value of the preset flag bit in the preset memory again.

[0026] The second unit to be started is used to respond to the board startup operation, execute the startup program corresponding to the second unit to be started, and output the completion command through the serial bus interface after execution.

[0027] Regarding steps 101-104 above, this embodiment of the invention can be applied to any board with at least two startup units. The first startup unit can be the one with a faster startup speed on the board, and correspondingly, the second startup unit can be the one with a slower startup speed. In one case, the first startup unit can be a CPU, and the second startup unit can be a Field Programmable Gate Array (FPGA) or a microcontroller. Alternatively, the first startup unit can also be an FPGA or a microcontroller, and correspondingly, the second startup unit can be a CPU. The determination of the first and second startup units can be set according to the actual needs of the board. For example, for a board containing a CPU and an FPGA, if the CPU needs to access some registers in the FPGA during startup, and if the registers in the FPGA are not yet initialized, it will cause an abnormal CPU startup. In this case, the CPU can be designated as the first startup unit, and the FPGA as the second startup unit, so that the CPU executes its startup program after the FPGA has finished starting. Accordingly, if the FPGA needs to access some registers in the CPU during startup, and the CPU registers have not yet been initialized, it will cause an FPGA startup error. In this case, the FPGA can be designated as the first unit to be started, and the CPU as the second unit to be started, so that the FPGA executes its corresponding startup program after the CPU has finished starting. This can be configured according to the actual situation and startup requirements, and this embodiment of the invention does not impose any restrictions on this.

[0028] Optionally, the first and second boot units can be connected via a serial bus interface (Universal Asynchronous Receiver / Transmitter, UART). Specifically, UART is relatively stable and has low power consumption; a UART communication connection ensures stable communication between the first and second boot units during the firmware phase before the operating system boots. Alternatively, the first and second boot units can also be synchronously connected using a high-speed serial computer expansion bus standard (PCIe) or a local bus. PCIe and Local Bus can be used for communication between the two units after the board has fully booted.

[0029] The aforementioned preset memory can be pre-selected from the registers contained in the board or it can be a pre-set external memory. The first unit to be started can access the preset memory. Of course, the second unit to be started can also access the preset memory. The preset memory can be selected according to the actual needs of the board. This embodiment of the invention does not limit this.

[0030] The aforementioned board startup operation can be the board being powered on or receiving a board startup command. Furthermore, the aforementioned preset flag bit can be one or more data bits pre-selected from the data bits contained in the preset memory, and different data values ​​of the preset flag bit can represent different states of the preset memory. The aforementioned state value refers to the current data value of the preset flag bit. In one case, when the first unit to be started is a CPU, the aforementioned preset memory can be a non-volatile memory with a serial communication interface (SPI FLASH), and its preset flag bit can be the SYN_FLAG flag bit in the SPI FLASH.

[0031] For example, Figure 2 This is a schematic diagram of the structure of a circuit board provided in an embodiment of the present invention, such as... Figure 2 As shown, the board can contain a CPU, FPGA, and SPI FLASH. The CPU can interact with the SPI FLASH, and the CPU and FPGA communicate via UART, connected through PCIe or Local Bus. (For...) Figure 2 The CPU can be the first unit to be started, and the FPGA can be the second unit to be started.

[0032] The startup program for the first unit to be started can be pre-written into the first unit to be started, and similarly, the startup program for the second unit to be started can also be pre-written into the second unit to be started. The startup programs for different units to be started are different. For example, the startup program for the CPU may include startup instructions for CPU core initialization, cache initialization, memory initialization, network initialization, and initialization of other hardware devices, while the startup program for the FPGA may include startup instructions for register initialization, functional module initialization, etc.

[0033] Furthermore, in this embodiment of the invention, the second unit to be started can execute the startup program corresponding to the second unit to be started in response to the board startup operation, and when the execution is completed, output a completion instruction for updating the status value of the preset flag bit in the preset memory to the first state. Accordingly, the completion instruction can be output to the first unit to be started via UART.

[0034] Simultaneously, in response to the board boot operation, the first boot unit can obtain the status value of the preset flag bit in the preset memory. If the status value is the first state, it indicates that the second boot unit has been fully booted, and the first boot unit can then execute the boot program corresponding to the first boot unit. Optionally, the status value of the preset flag bit can be 0 or 1, with a status value of 1 corresponding to the first state and a status value of 0 corresponding to the second state.

[0035] Accordingly, when the first unit to be started obtains the status value of the preset flag bit in the preset memory as the second state, it indicates that the second unit to be started has not yet completed its startup program. At this time, the first unit to be started needs to wait for the second unit to complete its startup. Therefore, the first unit to be started can receive data through the serial interface. Upon receiving a completion command through the UART, it updates the status value of the preset flag bit to the aforementioned first state and performs the access operation to the preset flag bit in the preset memory again. Specifically, when the status value is the second state, the first unit to be started can execute a preset serial port receiving routine to cyclically detect whether data has arrived from the UART.

[0036] Optionally, when the board contains multiple second boot units, a plurality of preset flag bits can be set in the preset memory, and different preset flag bits can be pre-assigned to different second boot units. Accordingly, any second boot unit can execute its own boot program in response to the board boot operation, and output a completion command via UART after execution. Optionally, the completion command can carry the unit identifier of the second boot unit, which can be a unique identifier for the second boot unit.

[0037] Accordingly, when the first unit to be started receives any completion instruction, it can first obtain the unit identifier from the completion instruction, and determine the preset flag bit corresponding to the second unit to be started that sent the completion instruction based on the unit identifier and the pre-generated mapping relationship, and update the status value of the preset flag bit to the first state. The aforementioned mapping relationship can be generated by assigning different preset flag bits to different second units to be started, and this mapping relationship can include the correspondence between different unit identifiers and different preset flag bits.

[0038] Furthermore, the first unit to be started can execute the startup program corresponding to the first unit to be started when all preset flag bits are in the first state.

[0039] For example, taking board units a, b, and c as examples, if unit a needs to access some registers in units b and c during startup, and if the registers in units b and c are not yet initialized, it will cause unit a startup error. In this case, this embodiment of the invention can designate unit a as the first unit to be started and units b and c as the second units to be started. Unit a determines whether units b and c have finished starting by using the preset flag bits corresponding to units b and c. If the preset flag bits corresponding to units b and c are both in the first state, the startup program of unit a is then executed. Simultaneously, if unit b needs to access some registers in unit c during startup, and if the registers in unit c are not yet initialized, it will cause unit b startup error. In this case, unit b can execute the board startup method in this embodiment of the invention. That is, for units b and c, this embodiment of the invention designates unit b as the first unit to be started and unit c as the second unit to be started, so that unit b executes the startup program after unit c has finished starting.

[0040] Optionally, this embodiment of the invention can also set a time threshold. Within this time threshold, the operation of obtaining the status value of a preset flag bit can be continuously executed. If, after reaching the time threshold, the status value of the preset flag bit in the preset memory is still in the second state, it indicates that the board startup time is too long and the second unit to be started may have a startup failure. At this time, this embodiment of the invention can generate and output a prompt message. This prompt message is used to characterize the startup failure of the board, and can remind relevant personnel to troubleshoot the cause of the failure in a timely manner. Optionally, the above prompt message can be in the form of text or sound and light, and can be set according to actual needs. This embodiment of the invention does not impose any restrictions on this.

[0041] In summary, this embodiment of the invention is applied to a board containing a first bootable unit, at least one second bootable unit, and a preset memory. The first and second bootable units are connected via a serial bus interface. The first bootable unit is connected to the preset memory. When the board starts up, after the second bootable unit completes its corresponding startup program, it outputs a completion instruction to update the status value of a preset flag bit in the preset memory to a first state. The first bootable unit then obtains the status value of the preset flag bit in the preset memory, and if the status value is in the first state, it executes its corresponding startup program. Simultaneously, when the status value of the preset flag bit is in the second state, the first bootable unit can receive data through the serial bus interface. This ensures the communication stability between the first and second bootable units before the operating system starts, guaranteeing that the first bootable unit receives the completion instruction output by the second bootable unit in a timely manner, and thus updates the status value of the preset flag bit to the first state through the completion instruction. In this way, by using the preset flag bits in the preset memory, the boot order between the first and second units to be booted can be guided, avoiding boot anomalies caused by the boot order not matching the actual needs, and ensuring the boot effect of the board to a certain extent.

[0042] Optionally, when the state value is the first state, the embodiments of the present invention may further include: S21. Update the state value of the preset flag bit in the preset memory to the second state.

[0043] The second state is a state value different from the first state. When the first unit to be started obtains the state value of the preset flag bit in the preset memory as the first state, it can update the state value of the preset flag bit in the preset memory to the second state while executing the startup program.

[0044] Specifically, since the board may need to be started multiple times, in order to ensure that the startup order of the board meets the requirements when it is started next time, it is necessary to ensure that the board is not in the first state when it is started next time. In this case, after obtaining the state value of the preset flag bit as the first state, the embodiment of the present invention can update it to the second state to ensure the startup order of the board when it is started next time.

[0045] In this embodiment of the invention, when the state value is the first state, the state value of the preset flag bit in the preset memory is updated to the second state. This avoids the problem of the first startup unit executing its corresponding startup program before the second startup unit has finished executing its startup program, leading to an incorrect startup order, because the preset flag bit remains in the first state from the previous startup when the board boots up again.

[0046] Optionally, after the above-described operation of obtaining the state value of the preset flag bit in the preset memory, the embodiments of the present invention may further include: S31. If the state value is other than the state value, update the state value of the preset flag bit in the preset memory to the second state; the other state is a state value that is different from both the first state and the second state.

[0047] Specifically, in some cases, the preset flag bit in the preset memory may have other states. For example, the preset memory may have been rewritten by other devices. In this case, the state value of the preset flag bit in the preset memory may be null or other state values ​​different from the first state and the second state. Therefore, when the state value is neither the first state nor the second state, the preset flag bit in the preset memory may have data errors. In this embodiment of the invention, the preset flag bit can be reset, that is, updated to the second state, and the operation of obtaining the state value of the preset flag bit in the preset memory can be performed again to avoid affecting the board boot process.

[0048] In this embodiment of the invention, when the state value is other than the first state, the state value of the preset flag bit in the preset memory is updated to the second state; the other state is a state value that is different from both the first state and the second state. This allows for timely correction of the preset flag bit's state value in case of an anomaly, preventing disruption to the board's boot process.

[0049] Optionally, the startup program corresponding to the first unit to be started is stored in the preset memory. Before obtaining the status value of the preset flag bit in the preset memory, the embodiments of the present invention may further include: S41. Obtain the startup program from the preset memory and store the startup program in the cache.

[0050] S42. Switch the working mode of the preset memory from instruction fetch mode to read / write mode; The above-described operation of executing the startup program corresponding to the first unit to be started can specifically include, in this embodiment of the invention: S43. Retrieve the startup program from the cache and execute it.

[0051] The aforementioned startup program refers to multiple instruction codes used to start the first unit to be started, which may include initialization instructions and parameter configuration instructions for different modules. Specifically, when the preset memory is used to store the startup program, the preset memory is often an SPI FLASH. The SPI FLASH has two working modes. In the instruction fetch mode, the first unit to be started can read the startup program from the SPI FLASH, but the access permission of the preset flag bit is inaccessible. That is, in the instruction fetch mode, the status value of the preset flag bit of the SPI FLASH cannot be updated or read. In this case, the embodiment of the present invention can switch the working mode of the SPI FLASH to the read-write mode before obtaining the status value of the preset flag bit. In the read-write mode, the access permission of the preset flag bit is accessible, which facilitates the subsequent updating and reading of the status value of the preset flag bit.

[0052] Specifically, the aforementioned mode switching method can be to configure a mode register for a preset memory. This mode register is used to control the operating mode of the preset memory. Specifically, the preset memory can switch modes accordingly based on different values ​​in the mode register. Accordingly, in this embodiment of the invention, mode switching can be achieved by writing different values ​​into the mode register. For example, when the data in the mode register is 0, the operating mode of the preset register is the fetch mode, and when the data in the mode register is 1, the operating mode of the preset register is the read-write mode.

[0053] Furthermore, in read / write mode, the startup program in the preset memory cannot be read. At this time, the startup program that is pre-stored in the cache can be obtained and executed to avoid affecting the startup process of the first unit to be started.

[0054] In this embodiment of the invention, the startup program corresponding to the first unit to be started is stored in the preset memory. Before obtaining the status value of the preset flag bit in the preset memory, the startup program in the preset memory is obtained and stored in the cache; the working mode of the preset memory is switched from instruction fetch mode to read-write mode; the startup program is obtained from the cache and executed. Thus, by pre-storing the startup program in the preset memory in the cache before switching the working mode of the preset memory, the problem of the startup program failing to execute due to the inability to read the startup program in the preset memory during read-write mode can be avoided. Simultaneously, by switching the working mode of the preset memory to read-write mode before executing the startup program, it is convenient to read and write the status value of the preset flag bit.

[0055] Optionally, the first unit to be started is a processor, and the second unit to be started is a field-programmable gate array.

[0056] Furthermore, when the first unit to be started is a processor, the embodiments of the present invention may first initialize the CPU core and the cache (CACHE) before obtaining the status value of the preset flag bit.

[0057] It should be noted that with the development of chip technology, CPU and FPGA solutions are commonly used in the industrial control field. Consequently, if the boot order of the CPU and FPGA does not meet the actual requirements, it may lead to problems such as abnormal boot, abnormal function, or excessively long boot waiting time.

[0058] This invention provides a board boot method, taking a first boot unit as a processor and a second boot unit as an FPGA as an example. Figure 3 This is a schematic diagram of a board startup process provided by an embodiment of the present invention, such as... Figure 3 As shown: In response to the board's boot operation, the CPU powers on and initializes, including the CPU and cache. Specifically, the CPU cores can be initialized, and relevant registers can be configured to preset values.

[0059] Furthermore, instructions of a cache size (a CPU-specific parameter, such as 1MB) starting from the current instruction are latched. Specifically, the CPU's boot program in the SPI FLASH can be latched into the cache, making it easier to read instructions when the SPI FLASH cannot fetch them.

[0060] Furthermore, the SPI FLASH is switched from boot mode (fetch mode: the CPU fetches and executes instructions from this SPI FLASH by default upon power-up, but cannot read or write the contents of the SPI FLASH) to read / write mode (input / output mode, IN / OUT, IO). In read / write mode, the contents of the SPI FLASH can be read and written by the program, but the CPU cannot fetch and execute instructions.

[0061] Furthermore, the CPU can read the SYN_FLAG flag status in the SPI FLASH. If the status is WAIT (second state), it continues reading the flag status; if the status is BOOT (first state), it changes the flag status to WAIT and boots normally. This avoids system failures caused by asynchronous CPU and FPGA startup on the next power-on due to an incorrect SYN_FLAG flag status.

[0062] Furthermore, if the status is other (not WAIT, BOOT), the SYS_FLAG flag is updated to WAIT, and the SYN_FLAG flag status in the SPI FLASH is read again.

[0063] Specifically, for the second FPGA unit to be started, after power-on, the corresponding startup program is executed and the FPGA starts normally. After initialization is complete, a BOOT instruction (completion instruction) can be sent. Accordingly, this completion instruction can change SYN_FLAG in the SPI FLASH to BOOT.

[0064] Optionally, when the first unit to be started is a CPU, the board boot method provided in this embodiment of the invention can be applied to the basic input output system (BIOS) of the CPU.

[0065] In summary, the board startup method provided by this invention is applied to a board including a first startup unit, at least one second startup unit, and a preset memory. The first and second startup units are connected via a serial bus interface. The first startup unit is connected to the preset memory. When the board starts, after the second startup unit completes its corresponding startup program, it outputs a completion instruction to update the status value of a preset flag bit in the preset memory to a first state. The first startup unit then obtains the status value of the preset flag bit in the preset memory, and if the status value is in the first state, it executes its corresponding startup program. Simultaneously, when the status value of the preset flag bit is in the second state, the first startup unit can receive data through the serial bus interface. This ensures the communication stability between the first and second startup units before the operating system starts, guaranteeing that the first startup unit receives the completion instruction output by the second startup unit in a timely manner, and thus updates the status value of the preset flag bit to the first state through the completion instruction. In this way, by using the preset flag bits in the preset memory, the boot order between the first and second units to be booted can be guided, avoiding boot anomalies caused by the boot order not matching the actual needs, and ensuring the boot effect of the board to a certain extent.

[0066] At the same time, there is no need to set a delayed startup time for the unit to be started, which can ensure the timeliness of the board startup and avoid excessive startup time.

[0067] Figure 4 This is a structural diagram of a board booting device provided in an embodiment of the present invention. The device is applied to a first bootable unit in a board. The board also includes at least one second bootable unit and a preset memory. The first bootable unit and the second bootable unit are communicatively connected via a serial bus interface, and the first bootable unit is connected to the preset memory. The device includes: The first acquisition module 201 is used to acquire the status value of the preset flag bit in the preset memory in response to the board startup operation; The first execution module 202 is used to execute the startup program corresponding to the first unit to be started when the state value is the first state; The receiving module 203 is used to receive data through the serial bus interface when the state value is the second state; The first update module 204 is used to update the status value of the preset flag bit to the first state when a completion instruction is received through the serial bus interface, and to execute the process of obtaining the status value of the preset flag bit in the preset memory again. The second unit to be started is used to respond to the board startup operation, execute the startup program corresponding to the second unit to be started, and output the completion command through the serial bus interface after execution.

[0068] Optionally, the startup program corresponding to the first unit to be started is stored in the preset memory, and the device further includes: The second acquisition module is used to acquire the startup program in the preset memory and store the startup program in the cache; A switching module is used to switch the operating mode of the preset memory from instruction fetch mode to read / write mode; The first execution module is specifically used to: retrieve the startup program from the cache and execute it.

[0069] Optionally, the device further includes: The second update module is used to update the state value of the preset flag bit in the preset memory to the second state when the state value is the first state.

[0070] Optionally, the device further includes: The third update module is used to update the state value of the preset flag bit in the preset memory to the second state when the state value is other states; the other states are state values ​​that are different from both the first state and the second state.

[0071] Optionally, the first unit to be started is a processor, and the second unit to be started is a field-programmable gate array.

[0072] In summary, the board startup device provided in this embodiment of the invention is applied to a board including a first startup unit, at least one second startup unit, and a preset memory. The first startup unit and the second startup unit are connected via a serial bus interface. The first startup unit is connected to the preset memory. When the board starts up, after the second startup unit completes the execution of its corresponding startup program, it outputs a completion instruction to update the status value of a preset flag bit in the preset memory to a first state. The first startup unit then obtains the status value of the preset flag bit in the preset memory, and if the status value is the first state, it executes its corresponding startup program. Simultaneously, when the status value of the preset flag bit is the second state, the first startup unit can receive data through the serial bus interface. This ensures the communication stability between the first and second startup units before the operating system starts, guaranteeing that the first startup unit receives the completion instruction output by the second startup unit in a timely manner, and thus updates the status value of the preset flag bit to the first state through the completion instruction. In this way, by using the preset flag bits in the preset memory, the boot order between the first and second units to be booted can be guided, avoiding boot anomalies caused by the boot order not matching the actual needs, and ensuring the boot effect of the board to a certain extent.

[0073] The present invention also provides an electronic device, see [link to relevant documentation]. Figure 5 It includes: a processor 301, a memory 302, and a computer program 3021 stored in the memory and executable on the processor. When the processor executes the program, it implements the board boot method of the aforementioned embodiment.

[0074] The present invention also provides a readable storage medium, wherein when the instructions in the storage medium are executed by the processor of an electronic device, the electronic device is able to execute the board boot method of the foregoing embodiments.

[0075] As the device embodiment is basically similar to the method embodiment, the description is relatively simple, and relevant parts can be found in the description of the method embodiment.

[0076] The algorithms and displays provided herein are not inherently related to any particular computer, virtual system, or other device. Various general-purpose systems can also be used in conjunction with the teachings herein. The required structure for constructing such systems is apparent from the above description. Furthermore, this invention is not directed to any particular programming language. It should be understood that the contents of the invention described herein can be implemented using various programming languages, and the above description of specific languages ​​is for the purpose of disclosing the best mode of implementation of the invention.

[0077] Numerous specific details are set forth in the specification provided herein. However, it will be understood that embodiments of the invention may be practiced without these specific details. In some instances, well-known methods, structures, and techniques have not been shown in detail so as not to obscure the understanding of this specification.

[0078] Similarly, it should be understood that, in order to simplify the invention and aid in understanding one or more of the various inventive aspects, in the above description of exemplary embodiments of the invention, various features of the invention are sometimes grouped together in a single embodiment, figure, or description thereof. However, this disclosure should not be construed as reflecting an intention that the claimed invention requires more features than are expressly recited in each claim. Rather, as reflected in the following claims, inventive aspects lie in fewer than all features of a single foregoing disclosed embodiment. Therefore, the claims following the detailed description are hereby expressly incorporated into this detailed description, wherein each claim itself is a separate embodiment of the invention.

[0079] Those skilled in the art will understand that modules in the device of the embodiments can be adaptively changed and placed in one or more devices different from that embodiment. Modules, units, or components in the embodiments can be combined into a single module, unit, or component, and further, they can be divided into multiple sub-modules, sub-units, or sub-components. Except where at least some of such features and / or processes or units are mutually exclusive, any combination can be used to combine all features disclosed in this specification (including the accompanying claims, abstract, and drawings) and all processes or units of any method or device so disclosed. Unless expressly stated otherwise, each feature disclosed in this specification (including the accompanying claims, abstract, and drawings) may be replaced by an alternative feature that serves the same, equivalent, or similar purpose.

[0080] The various component embodiments of the present invention can be implemented in hardware, or as software modules running on one or more processors, or a combination thereof. Those skilled in the art will understand that microprocessors or digital signal processors (DSPs) can be used in practice to implement some or all of the functions of some or all of the components in the sorting device according to the present invention. The present invention can also be implemented as a device or apparatus program for performing part or all of the methods described herein. Such a program implementing the present invention can be stored on a computer-readable medium, or can be in the form of one or more signals. Such signals can be downloaded from an Internet website, provided on a carrier signal, or provided in any other form.

[0081] It should be noted that the above embodiments are illustrative of the invention and not restrictive, and that those skilled in the art can devise alternative embodiments without departing from the scope of the appended claims. In the claims, any reference signs placed between parentheses should not be construed as limiting the claims. The word "comprising" does not exclude the presence of elements or steps not listed in the claims. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The invention can be implemented by means of hardware comprising several different elements and by means of a suitably programmed computer. In the unit claims enumerating several means, several of these means may be embodied by the same item of hardware. The use of the words first, second, and third, etc., does not indicate any order. These words can be interpreted as names.

[0082] Those skilled in the art will understand that, for the sake of convenience and brevity, the specific working processes of the systems, devices, and units described above can be referred to the corresponding processes in the foregoing method embodiments, and will not be repeated here.

[0083] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

[0084] The above description is merely a specific embodiment of the present invention, but the scope of protection of the present invention is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed in the present invention should be included within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the scope of the claims.

Claims

1. A board boot method, characterized in that, The method is applied to a first bootable unit in a board; the board further includes at least one second bootable unit and a preset memory, the first bootable unit and the second bootable unit are connected via a serial bus interface, and the first bootable unit is connected to the preset memory; the method includes: In response to the board startup operation, the status value of the preset flag bit in the preset memory is obtained; When the state value is the first state, the startup program corresponding to the first unit to be started is executed; When the state value is in the second state, data is received through the serial bus interface; Upon receiving a completion command via the serial bus interface, the status value of the preset flag bit is updated to the first status, and the step of obtaining the status value of the preset flag bit in the preset memory is executed again. The second unit to be started is used to respond to the board startup operation, execute the startup program corresponding to the second unit to be started, and output the completion command through the serial bus interface after execution.

2. The method according to claim 1, characterized in that, The startup program corresponding to the first unit to be started is stored in the preset memory. Before obtaining the status value of the preset flag bit in the preset memory, the method further includes: Obtain the startup program from the preset memory and store the startup program in the cache; Switch the operating mode of the preset memory from instruction fetch mode to read / write mode; The execution of the startup program corresponding to the first unit to be started includes: Retrieve the startup program from the cache and execute it.

3. The method according to claim 1, characterized in that, When the state value is the first state, the method further includes: Update the state value of the preset flag bit in the preset memory to the second state.

4. The method according to claim 1, characterized in that, After obtaining the state value of the preset flag bit in the preset memory, the method further includes: If the state value is other than the state value, the state value of the preset flag bit in the preset memory is updated to the second state; the other state is a state value that is different from both the first state and the second state.

5. The method according to any one of claims 1-4, characterized in that, The first unit to be started is a processor, and the second unit to be started is a field-programmable gate array.

6. A board-based startup device, characterized in that, The device is applied to a first bootable unit in a board; the board further includes at least one second bootable unit and a preset memory, the first bootable unit and the second bootable unit are connected via a serial bus interface, and the first bootable unit is connected to the preset memory; the device includes: The first acquisition module is used to acquire the status value of the preset flag bit in the preset memory in response to the board boot operation; The first execution module is used to execute the startup program corresponding to the first unit to be started when the state value is the first state. A receiving module is configured to receive data through the serial bus interface when the state value is in the second state. The first update module is used to update the status value of the preset flag bit to the first state when a completion instruction is received through the serial bus interface, and to execute the step of obtaining the status value of the preset flag bit in the preset memory again. The second unit to be started is used to respond to the board startup operation, execute the startup program corresponding to the second unit to be started, and output the completion command through the serial bus interface after execution.

7. The apparatus according to claim 6, characterized in that, The startup program corresponding to the first unit to be started is stored in the preset memory, and the device further includes: The second acquisition module is used to acquire the startup program in the preset memory and store the startup program in the cache; A switching module is used to switch the operating mode of the preset memory from instruction fetch mode to read / write mode; The first execution module is specifically used to: retrieve the startup program from the cache and execute it.

8. The apparatus according to claim 6, characterized in that, The device further includes: The second update module is used to update the state value of the preset flag bit in the preset memory to the second state when the state value is the first state.

9. The apparatus according to claim 6, characterized in that, The device further includes: The third update module is used to update the state value of the preset flag bit in the preset memory to the second state when the state value is other states; the other states are state values ​​that are different from both the first state and the second state.

10. The apparatus according to any one of claims 6-9, characterized in that, The first unit to be started is a processor, and the second unit to be started is a field-programmable gate array.

11. An electronic device, characterized in that, include: A processor, a memory, and a computer program stored in the memory and executable on the processor, characterized in that the processor, when executing the program, implements the method as described in any one of claims 1-5.

12. A readable storage medium, characterized in that, When the instructions in the storage medium are executed by the processor of the electronic device, the electronic device is able to perform the method of any one of claims 1-5.

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