Signal transmission control method and device, equipment and storage medium
By establishing a connection with external devices through FPGA and utilizing parallel processing technology to preprocess and convert multi-source signals, the problem of low efficiency and high power consumption of traditional serial processors in multi-tasking scenarios is solved, and efficient and low-power signal transmission is achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- GEER TECH CO LTD
- Filing Date
- 2024-11-12
- Publication Date
- 2026-05-19
AI Technical Summary
In existing technologies, traditional serial processors have low data transmission efficiency and high power consumption in multi-tasking scenarios, resulting in low accuracy and uncontrollability of resource scheduling.
The FPGA establishes connections with various external devices, acquires current multi-source signals through multiple channels, performs parallel preprocessing including analog-to-digital conversion, filtering, compression, and decoding, generates protocol conversion strategies based on device type, and transmits signals to data processing devices through the target high-speed interface.
It improves data transmission efficiency, significantly reduces power consumption, and achieves efficient and low-power signal transmission.
Smart Images
Figure CN122064501A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of signal processing technology, and in particular to signal transmission control methods, apparatus, devices and storage media. Background Technology
[0002] As Augmented Reality (AR) technology continues to develop, application requirements are becoming increasingly complex. To meet these requirements, more and more external devices are needed, such as sensors. Currently, the devices controlling data transmission are traditional serial processors (such as CPUs or GPUs). However, in multi-tasking scenarios, the above data transmission methods often result in queuing, meaning that the next task can only be processed after the current task is finished. This inevitably leads to low data transmission efficiency. Furthermore, the traditional serial processor has low precision and is uncontrollable in scheduling resources when processing each task, resulting in high power consumption during data transmission.
[0003] The above content is only used to help understand the technical solution of this application and does not represent an admission that the above content is prior art. Summary of the Invention
[0004] The main objective of this application is to provide a signal transmission control method, apparatus, device, and storage medium, which aims to solve the technical problems of low data transmission efficiency and high power consumption in the prior art.
[0005] To achieve the above objectives, this application proposes a signal transmission control method, the method comprising:
[0006] When a connection to multiple external devices is detected, the current multi-source signal is acquired through multiple channels.
[0007] The target multi-source signal is obtained by preprocessing the current multi-source signal in parallel according to the device types of the various external devices.
[0008] When the data format of the target multi-source signal is consistent with the data format supported by the data processing device, the logic unit of the current task is determined;
[0009] The logic unit executing the current task transmits the target multi-source signal to the data processing device according to the target high-speed interface.
[0010] In one embodiment, the step of preprocessing the current multi-source signal in parallel according to the device types of the various external devices includes:
[0011] Determine the signal type of the current multi-source signal;
[0012] When the signal type is an analog signal, the current multi-source signal is converted using an integrated analog-to-digital converter.
[0013] The converted multi-source signal is filtered using hardware circuitry.
[0014] When the device type of the various external devices is not a preset type, the filtered current multi-source signal is compressed.
[0015] In one embodiment, after the step of filtering the converted current multi-source signal using hardware circuitry, the method further includes:
[0016] When the device type of the various external devices is a preset type, the filtered current multi-source signal is decoded.
[0017] The decoded multi-source signal is compressed.
[0018] In one embodiment, after the step of preprocessing the current multi-source signal in parallel according to the device types of the various external devices to obtain the target multi-source signal, the method further includes:
[0019] When the data format of the target multi-source signal is inconsistent with the data format supported by the data processing device, system compatibility performance information of various external devices is obtained;
[0020] A protocol conversion strategy is generated based on the system compatibility performance information and the data format of the target multi-source signal.
[0021] The target multi-source signal is format-converted by executing a protocol conversion strategy;
[0022] The logic unit executing the current task transmits the converted target multi-source signal to the data processing device according to the target high-speed interface.
[0023] In one embodiment, the step of transmitting the target multi-source signal to the data processing device via the logic unit executing the current task according to the target high-speed interface includes:
[0024] The clock frequency of each module is dynamically adjusted based on the clock information from various external devices.
[0025] While ensuring real-time synchronization with the various external devices based on the adjusted clock frequency, the system complexity characteristic value of the data processing device is obtained.
[0026] When the system complexity characteristic value is greater than a preset threshold, the logic unit executing the current task transmits the target multi-source signal to the data processing device according to the target high-speed interface.
[0027] In one embodiment, the step of transmitting the target multi-source signal to the data processing device through the logic unit executing the current task according to the target high-speed interface when the system complexity characteristic value is greater than a preset threshold includes:
[0028] When the system complexity characteristic value is greater than a preset threshold, the current signal transmission requirement is obtained;
[0029] The communication frequency and data packet size with the data processing device need to be dynamically adjusted based on the current data transmission requirements.
[0030] The logic unit executing the current task transmits the target multi-source signal to the data processing device according to the target high-speed interface, the adjusted communication frequency, and the data packet size.
[0031] In one embodiment, after the step of obtaining the system complexity characteristic value of the data processing device, the method further includes:
[0032] When the system complexity characteristic value is less than or equal to a preset threshold, a standard communication interface is determined;
[0033] The logic unit executing the current task transmits the target multi-source signal to the data processing device according to the standard communication interface.
[0034] Furthermore, to achieve the above objectives, this application also proposes a signal transmission control device, which includes:
[0035] The acquisition module is used to acquire the current multi-source signals through multiple channels when a connection with multiple external devices is detected.
[0036] The preprocessing module is used to preprocess the current multi-source signal in parallel according to the device types of the various external devices to obtain the target multi-source signal;
[0037] The determination module is used to determine the logical unit of the current task when the data format of the target multi-source signal is consistent with the data format supported by the data processing device.
[0038] The transmission module is used to transmit the target multi-source signal to the data processing device through the logic unit executing the current task according to the target high-speed interface.
[0039] In addition, to achieve the above objectives, this application also proposes a signal transmission control device, the device comprising: a memory, a processor, and a computer program stored in the memory and executable on the processor, the computer program being configured to implement the steps of the signal transmission control method as described above.
[0040] In addition, to achieve the above objectives, this application also proposes a storage medium, which is a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, it implements the steps of the signal transmission control method described above.
[0041] One or more technical solutions proposed in this application have at least the following technical effects: when a connection with multiple external devices is detected, current multi-source signals are acquired through multiple channels respectively; the current multi-source signals are preprocessed in parallel according to the device types of the multiple external devices to obtain a target multi-source signal; when the data format of the target multi-source signal is consistent with the data format supported by the data processing device, the logic unit of the current task is determined; the logic unit executing the current task transmits the target multi-source signal to the data processing device according to the target high-speed interface; through the above method, by utilizing an FPGA with high efficiency, low power consumption and parallel processing capabilities in data processing, the current multi-source signals output by multiple external devices are processed through a series of steps, and the logic unit executing the current task transmits the target multi-source signal to the data processing device according to the target high-speed interface, thereby effectively improving the efficiency of data transmission and significantly reducing the power consumption of data transmission. Attached Figure Description
[0042] The accompanying drawings, which are incorporated in and form part of this specification, illustrate embodiments consistent with this application and, together with the description, serve to explain the principles of this application.
[0043] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0044] Figure 1 This is a flowchart illustrating an embodiment of the signal transmission control method of this application.
[0045] Figure 2 This is a flowchart illustrating Embodiment 2 of the signal transmission control method of this application;
[0046] Figure 3 A simplified structural diagram of the signal transmission control method provided in Embodiment 2 of this application;
[0047] Figure 4 This is a schematic diagram of the module structure of the signal transmission control device according to an embodiment of this application;
[0048] Figure 5 This is a schematic diagram of the device structure of the hardware operating environment involved in the signal transmission control method in the embodiments of this application.
[0049] The purpose, features, and advantages of this application will be further explained in conjunction with the embodiments and with reference to the accompanying drawings. Detailed Implementation
[0050] It should be noted that the executing entity in this embodiment can be a computing service device with data processing, network communication, and program execution functions, such as a tablet computer, personal computer, or mobile phone, or an electronic device capable of implementing the above functions, such as a Field-Programmable Gate Array (FPGA). The following description uses an FPGA as an example to illustrate this embodiment and the subsequent embodiments.
[0051] Based on this, embodiments of this application provide a signal transmission control method, referring to... Figure 1 , Figure 1 This is a flowchart illustrating the first embodiment of the signal transmission control method of this application.
[0052] In this embodiment, the signal transmission control method includes steps S10 to S40:
[0053] Step S10: When a connection with multiple external devices is detected, the current multi-source signal is acquired through multiple channels.
[0054] It's worth noting that FPGAs support multiple standard interface protocols, such as I2C, SPI, UART, CAN, and PCIe, enabling seamless connectivity with various external devices. This flexibility allows FPGAs to act as a core bridge in different types of embedded systems, facilitating data transmission between external devices and data processing devices (main processors), such as sensors. Leveraging these standard interface protocols, FPGAs can connect to multiple external devices simultaneously and acquire data with extremely low latency. Furthermore, their programmable logic resources allow for customized protocols and even the development of proprietary interfaces for specific sensors, meeting the needs of various application scenarios. This diverse interface support enables FPGAs to adapt to a wide range of sensor types and data formats, easily integrating them into complex systems. Combined with their powerful parallel data processing capabilities, low power consumption, and interface flexibility, FPGAs exhibit exceptional performance and adaptability in the control and data processing of external devices, becoming a core component of efficient, flexible, and low-power solutions.
[0055] It should be understood that when a connection to multiple external devices is detected, it indicates that signals output by multiple external devices are needed. At this time, different channels acquire the current multi-source signals, and these multiple external devices can be different types of sensors.
[0056] Step S20: Preprocess the current multi-source signal in parallel according to the device types of the various external devices to obtain the target multi-source signal.
[0057] It is understandable that, in order to cope with the high data throughput requirements of multiple external device systems, after obtaining the current multi-source signal, the current multi-source signal is preprocessed in parallel. This preprocessing operation includes, but is not limited to, filtering, compression, and decoding.
[0058] Further, step S20 includes: determining the signal type of the current multi-source signal; when the signal type is an analog signal type, converting the current multi-source signal using an integrated analog-to-digital converter; filtering the converted current multi-source signal using hardware circuitry; and compressing the filtered current multi-source signal when the device types of the various external devices are not preset types.
[0059] It should be understood that when the FPGA is connected to an external device via an ADC interface, the external device outputs an analog signal. In this case, the integrated analog-to-digital converter converts the current multi-source signal. Due to the parallelism of the FPGA in data processing, efficient preprocessing is allowed before transmitting the data to the data processing device. Specifically, the converted multi-source signal is filtered to eliminate noise. Then, when the device types of the various external devices are not preset, the filtered multi-source signal is compressed to reduce the amount of data and lower transmission latency.
[0060] Furthermore, after the step of filtering the converted current multi-source signal through hardware circuitry, the method further includes: decoding the filtered current multi-source signal when the device types of the various external devices are preset types; and compressing the decoded current multi-source signal.
[0061] It is understandable that preset types include, but are not limited to, image sensor types, LiDAR types, and other complex sensor types. When multiple external devices are identified as preset types, it indicates that signal decoding is required, followed by compression of the decoded multi-source signal. This preprocessing operation can be performed in real-time within the FPGA hardware circuitry, significantly reducing latency and ensuring that the signal is transmitted to the data processing device in its optimal form.
[0062] Furthermore, after step S20, the method further includes: when the data format of the target multi-source signal is inconsistent with the data format supported by the data processing device, obtaining system compatibility performance information of various external devices; generating a protocol conversion strategy based on the system compatibility performance information and the data format of the target multi-source signal; performing format conversion on the target multi-source signal by executing the protocol conversion strategy; and transmitting the converted target multi-source signal to the data processing device through the logic unit executing the current task according to the target high-speed interface.
[0063] It should be understood that before data transmission, it is necessary to determine whether the data format of the target multi-source signal is consistent with the data format supported by the data processing device. If they are not, it means that the target multi-source signal cannot be successfully transmitted to the data processing device. At this time, data conversion is required. In order to ensure system compatibility, a protocol conversion strategy is generated by combining system compatibility performance information and the data format of the target multi-source signal. Then, the target multi-source signal is converted by executing the protocol conversion strategy. For example, the I2C format of the target multi-source signal of the external device is converted into the AXI bus format suitable for the data processing device to receive. Adaptation is also performed between different data rates and voltage standards.
[0064] Step S30: When the data format of the target multi-source signal is consistent with the data format supported by the data processing device, determine the logical unit of the current task.
[0065] It is understandable that when the data format of the target multi-source signal is determined to be consistent with the data format supported by the data processing device, it indicates that the data processing device can normally receive the target multi-source signal. At this time, the logic unit of the current task is determined, which refers to the circuit unit required to process the current task.
[0066] Step S40: The logic unit executing the current task transmits the target multi-source signal to the data processing device according to the target high-speed interface.
[0067] It should be understood that the target high-speed interface refers to an interface that can efficiently transmit signals. In order to avoid wasting resources, when transmitting signals, the FPGA only enables the logic unit that executes the current task, accurately schedules the resources required to execute the task, and transmits the target multi-source signal to the data processing device according to the target high-speed interface. The data processing device can be a system on chip (SOC).
[0068] This embodiment acquires current multi-source signals through multiple channels when a connection with multiple external devices is detected; preprocesses the current multi-source signals in parallel according to the device types of the multiple external devices to obtain a target multi-source signal; when the data format of the target multi-source signal is consistent with the data format supported by the data processing device, the logic unit of the current task is determined; the logic unit of the current task transmits the target multi-source signal to the data processing device according to the target high-speed interface. Through the above method, by utilizing an FPGA, which has high efficiency, low power consumption, and parallel processing capabilities in data processing, the current multi-source signals output by multiple external devices are processed through a series of steps, and then the target multi-source signal is transmitted to the data processing device by the logic unit of the current task according to the target high-speed interface, thereby effectively improving the efficiency of data transmission and significantly reducing the power consumption of data transmission.
[0069] Based on the first embodiment of this application, in the second embodiment of this application, the content that is the same as or similar to that in the first embodiment described above can be referred to the above description, and will not be repeated hereafter. Based on this, please refer to... Figure 2 Step S40 includes steps S401 to S403:
[0070] Step S401: Dynamically adjust the clock frequency of each module based on the clock information of various external devices.
[0071] It should be understood that to ensure the FPGA maintains low power consumption during long-term signal transmission, it is necessary to ensure that the clock frequency is synchronized with various external devices in real time. Therefore, the clock frequency of each module can be dynamically adjusted based on the clock information of various external devices to reduce power consumption. In addition, custom hardware circuit paths are also used to reduce power consumption during data transmission.
[0072] Step S402: While determining to maintain real-time synchronization with the various external devices based on the adjusted clock frequency, obtain the system complexity characteristic value of the data processing device.
[0073] Understandably, the system complexity characteristic value represents the complexity of the data processing device system. The larger the system complexity characteristic value, the more complex it is. After adjusting the clock frequency of each module, it is necessary to determine whether it maintains real-time synchronization with multiple external devices. If so, the system complexity characteristic value of the data processing device will be determined.
[0074] Step S403: When the system complexity feature value is greater than a preset threshold, the logic unit executing the current task transmits the target multi-source signal to the data processing device according to the target high-speed interface.
[0075] It should be understood that after obtaining the system complexity characteristic value, it is necessary to determine whether the system complexity characteristic value is greater than the preset threshold. If so, it indicates that it is a complex system. At this time, it is necessary to transmit the target multi-source signal to the data processing device through the connected target high-speed interface, thereby significantly reducing the power consumption of data transmission.
[0076] Further, step S403 includes: when the system complexity characteristic value is greater than a preset threshold, obtaining the current signal transmission requirement; dynamically adjusting the communication frequency and data packet size with the data processing device according to the current data transmission requirement; and transmitting the target multi-source signal to the data processing device through the logic unit executing the current task according to the target high-speed interface, the adjusted communication frequency, and the data packet size.
[0077] It is understood that the current signal transmission requirement refers to the requirement to transmit signals at the current moment. In this embodiment, the communication frequency and data packet size with the data processing device can be dynamically adjusted according to the current data transmission requirement to further optimize power consumption and performance. After the dynamic adjustment is completed, the logic unit that executes the current task transmits the target multi-source signal to the data processing device according to the target high-speed interface, the adjusted communication frequency and data packet size.
[0078] Furthermore, after the step of obtaining the system complexity characteristic value of the data processing device, the method further includes: when the system complexity characteristic value is less than or equal to a preset threshold, determining a standard communication interface; and transmitting the target multi-source signal to the data processing device through the logic unit executing the current task according to the standard communication interface.
[0079] It should be understood that when the system complexity characteristic value is less than or equal to a preset threshold, it is considered a simple system. In this case, it communicates with the data processing device through a standard communication interface, that is, the logic unit executing the current task transmits the target multi-source signal to the data processing device through the standard communication interface.
[0080] This embodiment dynamically adjusts the clock frequency of each module based on the clock information of various external devices. While ensuring real-time synchronization with the various external devices based on the adjusted clock frequency, it acquires the system complexity characteristic value of the data processing device. When the system complexity characteristic value is greater than a preset threshold, the logic unit executing the current task transmits the target multi-source signal to the data processing device through the target high-speed interface. By dynamically adjusting the clock frequency, real-time synchronization with various external devices is ensured. Then, the system complexity characteristic value is compared with the preset threshold. When the target high-speed interface is determined based on the comparison result, the logic unit executing the current task transmits the target multi-source signal through the target high-speed interface, thereby effectively improving the efficiency of signal transmission and reducing the power consumption of signal transmission.
[0081] For example, to help understand the implementation flow of the signal transmission control method obtained by combining this embodiment with the above embodiment one, please refer to... Figure 3 , Figure 3 A simplified structural diagram of a signal transmission control method is provided, specifically:
[0082] Field-Programmable Gate Arrays (FPGAs) act as a bridge between the System-on-a-Chip (SoC) and external devices (sensors). They communicate with different types of external devices through various interface protocols, such as external device 1, external device 2, ..., external device n, and typically through a target high-speed interface, to transmit multi-source signals from external devices to the SoC. Furthermore, the programmable logic of the FPGA can be dynamically configured according to changes in the application scenario, increasing system flexibility. While processing signals, the FPGA can also execute specific algorithms for computation, reducing the computational burden on the SoC. These algorithms include, but are not limited to, machine learning inference and image processing. Additionally, to ensure the integrity and accuracy of transmitted signals, the FPGA verifies and corrects the current multi-source signals after acquisition. With this structure, the SoC can focus on higher-level task processing, delegating real-time-critical external device management and signal processing tasks to the FPGA, significantly improving overall system performance.
[0083] It should be noted that the above examples are only for understanding this application and do not constitute a limitation on the signal transmission control method of this application. Any simple modifications based on this technical concept are within the protection scope of this application.
[0084] This application also provides a signal transmission control device, please refer to... Figure 4 The signal transmission control device includes:
[0085] The acquisition module 10 is used to acquire the current multi-source signal through multiple channels when a connection with multiple external devices is detected.
[0086] The preprocessing module 20 is used to preprocess the current multi-source signal in parallel according to the device types of the various external devices to obtain the target multi-source signal.
[0087] The determination module 30 is used to determine the logical unit of the current task when the data format of the target multi-source signal is consistent with the data format supported by the data processing device.
[0088] The transmission module 40 is used to transmit the target multi-source signal to the data processing device through the logic unit executing the current task according to the target high-speed interface.
[0089] This embodiment acquires current multi-source signals through multiple channels when a connection with multiple external devices is detected; preprocesses the current multi-source signals in parallel according to the device types of the multiple external devices to obtain a target multi-source signal; when the data format of the target multi-source signal is consistent with the data format supported by the data processing device, the logic unit of the current task is determined; the logic unit of the current task transmits the target multi-source signal to the data processing device according to the target high-speed interface. Through the above method, by utilizing an FPGA, which has high efficiency, low power consumption, and parallel processing capabilities in data processing, the current multi-source signals output by multiple external devices are processed through a series of steps, and then the target multi-source signal is transmitted to the data processing device by the logic unit of the current task according to the target high-speed interface, thereby effectively improving the efficiency of data transmission and significantly reducing the power consumption of data transmission.
[0090] The signal transmission control device provided in this application, employing the signal transmission control method described in the above embodiments, can solve the technical problems of low data transmission efficiency and high power consumption in the prior art. Compared with the prior art, the beneficial effects of the signal transmission control device provided in this application are the same as those of the signal transmission control method described in the above embodiments, and other technical features in the signal transmission control device are the same as those disclosed in the methods of the above embodiments, and will not be repeated here.
[0091] In one embodiment, the preprocessing module 20 is further configured to determine the signal type of the current multi-source signal; when the signal type is an analog signal type, convert the current multi-source signal using an integrated analog-to-digital converter; filter the converted current multi-source signal using hardware circuitry; and compress the filtered current multi-source signal when the device types of the various external devices are not preset types.
[0092] In one embodiment, the preprocessing module 20 is further configured to decode the filtered current multi-source signal and compress the decoded current multi-source signal when the device types of the multiple external devices are preset types.
[0093] In one embodiment, the preprocessing module 20 is further configured to: acquire system compatibility performance information of various external devices when the data format of the target multi-source signal is inconsistent with the data format supported by the data processing device; generate a protocol conversion strategy based on the system compatibility performance information and the data format of the target multi-source signal; perform format conversion on the target multi-source signal by executing the protocol conversion strategy; and transmit the converted target multi-source signal to the data processing device through the logic unit executing the current task according to the target high-speed interface.
[0094] In one embodiment, the transmission module 40 is further configured to dynamically adjust the clock frequency of each module according to the clock information of multiple external devices; while determining to maintain real-time synchronization with the multiple external devices according to the adjusted clock frequency, it acquires the system complexity characteristic value of the data processing device; when the system complexity characteristic value is greater than a preset threshold, the logic unit executing the current task transmits the target multi-source signal to the data processing device according to the target high-speed interface.
[0095] In one embodiment, the transmission module 40 is further configured to: acquire the current signal transmission requirement when the system complexity feature value is greater than a preset threshold; dynamically adjust the communication frequency and data packet size with the data processing device according to the current data transmission requirement; and transmit the target multi-source signal to the data processing device through the logic unit executing the current task according to the target high-speed interface, the adjusted communication frequency, and the data packet size.
[0096] In one embodiment, the transmission module 40 is further configured to determine a standard communication interface when the system complexity feature value is less than or equal to a preset threshold; and transmit the target multi-source signal to the data processing device through the logic unit executing the current task according to the standard communication interface.
[0097] This application provides a signal transmission control device, which includes: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions executable by the at least one processor, and the instructions are executed by the at least one processor to enable the at least one processor to perform the signal transmission control method in the above embodiment 1.
[0098] The following is for reference. Figure 5This document illustrates a schematic diagram of a signal transmission control device suitable for implementing embodiments of this application. The signal transmission control device in the embodiments of this application may include, but is not limited to, mobile terminals such as mobile phones, laptops, digital broadcast receivers, PDAs (Personal Digital Assistants), PADs (Portable Application Description), PMPs (Portable Media Players), in-vehicle terminals (e.g., in-vehicle navigation terminals), and fixed terminals such as digital TVs and desktop computers. Figure 5 The signal transmission control device shown is merely an example and should not impose any limitations on the functionality and scope of use of the embodiments of this application.
[0099] like Figure 5 As shown, the signal transmission control device may include a processing unit 1001 (e.g., a central processing unit, a graphics processing unit, etc.), which can perform various appropriate actions and processes according to a program stored in a read-only memory (ROM) 1002 or a program loaded from a storage device 1003 into a random access memory (RAM) 1004. The RAM 1004 also stores various programs and data required for the operation of the signal transmission control device. The processing unit 1001, ROM 1002, and RAM 1004 are interconnected via a bus 1005. An input / output (I / O) interface 1006 is also connected to the bus. Typically, the following systems can be connected to the I / O interface 1006: input devices 1007 including, for example, touchscreens, touchpads, keyboards, mice, image sensors, microphones, accelerometers, gyroscopes, etc.; output devices 1008 including, for example, liquid crystal displays (LCDs), speakers, vibrators, etc.; storage devices 1003 including, for example, magnetic tapes, hard disks, etc.; and communication devices 1009. Communication device 1009 allows the signal transmission control device to communicate wirelessly or wiredly with other devices to exchange data. Although the figure shows signal transmission control devices with various systems, it should be understood that implementation or possession of all the systems shown is not required. More or fewer systems may be implemented alternatively.
[0100] Specifically, according to the embodiments disclosed in this application, the process described above with reference to the flowcharts can be implemented as a computer software program. This computer program includes program code for performing the methods shown in the flowcharts. In such embodiments, the computer program can be downloaded and installed from a network via a communication device, or installed from storage device 1003, or installed from ROM 1002. When the computer program is executed by processing device 1001, it performs the functions defined in the methods of the embodiments disclosed in this application.
[0101] The signal transmission control device provided in this application, employing the signal transmission control method described in the above embodiments, can solve the technical problems of low data transmission efficiency and high power consumption in the prior art. Compared with the prior art, the beneficial effects of the signal transmission control device provided in this application are the same as those of the signal transmission control method provided in the above embodiments, and other technical features of this signal transmission control device are the same as those disclosed in the previous embodiment method, and will not be repeated here.
[0102] It should be understood that the various parts disclosed in this application can be implemented using hardware, software, firmware, or a combination thereof. In the description of the above embodiments, specific features, structures, materials, or characteristics can be combined in any suitable manner in one or more embodiments or examples.
[0103] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.
[0104] This application provides a computer-readable storage medium having computer-readable program instructions (i.e., a computer program) stored thereon, the computer-readable program instructions being used to execute the signal transmission control method described in the above embodiments.
[0105] The computer-readable storage medium provided in this application may be, for example, a USB flash drive, but is not limited to, electrical, magnetic, optical, electromagnetic, infrared, or semiconductor systems, devices, or any combination thereof. More specific examples of computer-readable storage media may include, but are not limited to: electrical connections having one or more wires, portable computer disks, hard disks, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM or flash memory), optical fiber, portable compact disk read-only memory (CD-ROM), optical storage devices, magnetic storage devices, or any suitable combination thereof. In this embodiment, the computer-readable storage medium may be any tangible medium containing or storing a program that can be used by or in conjunction with an instruction execution system, system, or device. The program code contained on the computer-readable storage medium may be transmitted using any suitable medium, including but not limited to: wires, optical cables, RF (Radio Frequency), etc., or any suitable combination thereof.
[0106] The aforementioned computer-readable storage medium may be included in the signal transmission control device; or it may exist independently and not assembled into the signal transmission control device.
[0107] Computer program code for performing the operations of this application can be written in one or more programming languages or a combination thereof, including object-oriented programming languages such as Java, Smalltalk, and C++, and conventional procedural programming languages such as the "C" language or similar programming languages. The program code can be executed entirely on the user's computer, partially on the user's computer, as a standalone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving remote computers, the remote computer can be connected to the user's computer via any type of network—including a Local Area Network (LAN) or a Wide Area Network (WAN)—or can be connected to an external computer (e.g., via the Internet using an Internet service provider).
[0108] The flowcharts and block diagrams in the accompanying drawings illustrate the architecture, functionality, and operation of possible implementations of systems and methods according to various embodiments of this application. In this regard, each block in a flowchart or block diagram may represent a module, segment, or portion of code containing one or more executable instructions for implementing the specified logical function. It should also be noted that in some alternative implementations, the functions indicated in the blocks may occur in a different order than those indicated in the drawings. For example, two consecutively indicated blocks may actually be executed substantially in parallel, and they may sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each block in the block diagrams and / or flowcharts, and combinations of blocks in the block diagrams and / or flowcharts, can be implemented using a dedicated hardware-based system that performs the specified function or operation, or using a combination of dedicated hardware and computer instructions.
[0109] The modules described in the embodiments of this application can be implemented in software or hardware. The names of the modules do not necessarily limit the functionality of the unit itself.
[0110] The readable storage medium provided in this application is a computer-readable storage medium that stores computer-readable program instructions (i.e., a computer program) for executing the above-described signal transmission control method, which can solve the technical problems of low data transmission efficiency and high power consumption in the prior art. Compared with the prior art, the beneficial effects of the computer-readable storage medium provided in this application are the same as the beneficial effects of the signal transmission control method provided in the above embodiments, and will not be repeated here.
[0111] The above description is only a part of the embodiments of this application and does not limit the patent scope of this application. All equivalent structural transformations made under the technical concept of this application and using the contents of the specification and drawings of this application, or direct / indirect applications in other related technical fields, are included in the patent protection scope of this application.
Claims
1. A signal transmission control method, characterized in that, The method includes: When a connection to multiple external devices is detected, the current multi-source signal is acquired through multiple channels. The target multi-source signal is obtained by preprocessing the current multi-source signal in parallel according to the device types of the various external devices. When the data format of the target multi-source signal is consistent with the data format supported by the data processing device, the logic unit of the current task is determined; The logic unit executing the current task transmits the target multi-source signal to the data processing device according to the target high-speed interface.
2. The method as described in claim 1, characterized in that, The step of preprocessing the current multi-source signal in parallel according to the device types of the various external devices includes: Determine the signal type of the current multi-source signal; When the signal type is an analog signal, the current multi-source signal is converted using an integrated analog-to-digital converter. The converted multi-source signal is filtered using hardware circuitry. When the device type of the various external devices is not a preset type, the filtered current multi-source signal is compressed.
3. The method as described in claim 2, characterized in that, After the step of filtering the converted multi-source signal using hardware circuitry, the method further includes: When the device type of the various external devices is a preset type, the filtered current multi-source signal is decoded. The decoded multi-source signal is compressed.
4. The method as described in claim 1, characterized in that, After the step of preprocessing the current multi-source signal in parallel according to the device types of the various external devices to obtain the target multi-source signal, the method further includes: When the data format of the target multi-source signal is inconsistent with the data format supported by the data processing device, system compatibility performance information of various external devices is obtained; A protocol conversion strategy is generated based on the system compatibility performance information and the data format of the target multi-source signal. The target multi-source signal is format-converted by executing a protocol conversion strategy; The logic unit executing the current task transmits the converted target multi-source signal to the data processing device according to the target high-speed interface.
5. The method as described in claim 1, characterized in that, The step of transmitting the target multi-source signal to the data processing device through the logic unit executing the current task according to the target high-speed interface includes: The clock frequency of each module is dynamically adjusted based on the clock information from various external devices. While ensuring real-time synchronization with the various external devices based on the adjusted clock frequency, the system complexity characteristic value of the data processing device is obtained. When the system complexity characteristic value is greater than a preset threshold, the logic unit executing the current task transmits the target multi-source signal to the data processing device according to the target high-speed interface.
6. The method as described in claim 5, characterized in that, The step of transmitting the target multi-source signal to the data processing device through the logic unit executing the current task when the system complexity characteristic value is greater than a preset threshold includes: When the system complexity characteristic value is greater than a preset threshold, the current signal transmission requirement is obtained; The communication frequency and data packet size with the data processing device need to be dynamically adjusted based on the current data transmission requirements. The logic unit executing the current task transmits the target multi-source signal to the data processing device according to the target high-speed interface, the adjusted communication frequency, and the data packet size.
7. The method as described in claim 5, characterized in that, Following the step of obtaining the system complexity characteristic value of the data processing device, the method further includes: When the system complexity characteristic value is less than or equal to a preset threshold, a standard communication interface is determined; The logic unit executing the current task transmits the target multi-source signal to the data processing device according to the standard communication interface.
8. A signal transmission control device, characterized in that, The device includes: The acquisition module is used to acquire the current multi-source signal through multiple channels when a connection with multiple external devices is detected. The preprocessing module is used to preprocess the current multi-source signal in parallel according to the device types of the various external devices to obtain the target multi-source signal; The determination module is used to determine the logical unit of the current task when the data format of the target multi-source signal is consistent with the data format supported by the data processing device. The transmission module is used to transmit the target multi-source signal to the data processing device through the logic unit executing the current task according to the target high-speed interface.
9. A signal transmission control device, characterized in that, The device includes: a memory, a processor, and a computer program stored in the memory and executable on the processor, the computer program being configured to implement the steps of the signal transmission control method as described in any one of claims 1 to 7.
10. A storage medium, characterized in that, The storage medium is a computer-readable storage medium, and a computer program is stored on the storage medium. When the computer program is executed by a processor, it implements the steps of the signal transmission control method as described in any one of claims 1 to 7.