Preparation method of ultraviolet LED with micro-nano mixed structure and ultraviolet LED
By forming a micro/nano hybrid scattering structure through electrochemical selective etching of the N-type semiconductor transport layer, the problem of low light extraction efficiency of AlGaN-based ultraviolet LEDs was solved, and higher light extraction efficiency was achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- ADVANCED ULTRAVIOLET OPTOELECTRONICS CO LTD
- Filing Date
- 2026-03-02
- Publication Date
- 2026-05-19
AI Technical Summary
In existing technologies, the light extraction efficiency of AlGaN-based ultraviolet LEDs is limited, especially due to the absorption of ultraviolet light and the optical waveguide effect of P-GaN, which makes it difficult for some light to be emitted. Existing micro/nanoscale structures offer limited improvement.
An ultraviolet LED with a micro-nano hybrid structure was fabricated by electrochemical selective etching of the N-type semiconductor transport layer to form a micro-nano hybrid scattering structure array, combined with dry etching and SiO2 thin film treatment.
It significantly improves photon scattering efficiency, allowing more photons to be emitted from the bottom of the substrate, thus enhancing light extraction efficiency.
Smart Images
Figure CN122069847A_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of LED fabrication technology, and more particularly to a method for fabricating an ultraviolet LED with a micro-nano hybrid structure and the ultraviolet LED itself, and even more particularly to a method for fabricating a deep ultraviolet LED with a micro-nano hybrid structure and the ultraviolet LED itself. Background Technology
[0002] AlGaN-based ultraviolet LEDs (light-emitting diodes) typically use P-GaN material as the P-type ohmic contact layer. However, due to the absorption of ultraviolet light by P-GaN, a flip-chip structure is usually employed. This causes the generated photons to be emitted from the multi-quantum-well active region sequentially through the N-type semiconductor transport layer, buffer layer, and substrate from the bottom of the device, reducing light absorption. However, during photon propagation, an optical waveguide is formed, making it difficult for some light at a fixed angle to escape, which also limits the improvement of light extraction efficiency to some extent. Currently, fabricating micro / nanoscale structures to increase the light extraction efficiency of ultraviolet LEDs is the most common method.
[0003] Current technologies propose using electrochemical etching to etch the N-type semiconductor transport layer. This involves creating openings in the SiO2 layer above the etched mesa of the exposed N-type semiconductor transport layer, which is not covered by the N-type ohmic electrode, and then performing electrochemical etching in both horizontal and vertical directions. For example, patent CN119789639A discloses a deep ultraviolet light-emitting diode with a light-scattering structure and its fabrication method. This method fabricates a horizontal light-scattering structure with nanoscale dimensions in the N-type semiconductor transport layer. While this method improves light extraction efficiency to some extent, the etching area is relatively limited because the nanoarray is perpendicular to the horizontal direction, located between the N-type ohmic electrode and the mesa step, and inside the N-type semiconductor transport layer. Therefore, the light extraction efficiency remains relatively low. Summary of the Invention
[0004] To address the aforementioned technical problems, this invention provides a method for fabricating a UV LED with a micro-nano hybrid structure and the UV LED itself. The technical solution of this invention is as follows: In a first aspect, a method for fabricating a UV LED with a micro / nano hybrid structure is provided, comprising: S1, a buffer layer, an N-type semiconductor transport layer, a multi-quantum-well active layer, a P-type semiconductor transport layer and a P-type GaN contact layer are grown sequentially from bottom to top on the substrate surface to form an epitaxial wafer; S2, the epitaxial wafer formed in S1 is etched to the N-type semiconductor transport layer to form an N-electrode mesa; S3, a SiO2 thin film is prepared on the surface of the N electrode mesa, and the SiO2 thin film is dry etched to expose part of the N-type semiconductor transport layer and form through holes with an array structure; S4, electrochemical selective etching is performed on the epitaxial wafer formed in S3 to form a micro-nano hybrid scattering structure array in the exposed area of the N-type semiconductor transport layer formed in S3. After etching, the SiO2 film is removed. S5, deposit a SiO2 thin film on the surface of the epitaxial wafer formed in S4, and perform photolithography using a SiO2 mask. After photolithography, perform dry etching to form N-electrode channels and P-electrode channels, and deposit N-type ohmic electrodes and P-type ohmic electrodes in the N-electrode channels and P-electrode channels, respectively.
[0005] Preferably, step S4 includes: preparing an alkaline electrolyte of 0.1~1.0wt%, preparing a conductive metal layer on the side of the epitaxial wafer formed in step S3, clamping the conductive metal layer on the working electrode, setting the voltage to 10~30V, the electrochemical etching time to 10s~5min, forming a micro-nano hybrid scattering structure array in the exposed area of the N-type semiconductor transport layer formed in step S3, immersing in BOE etching solution after etching to remove the SiO2 film, and immersing in metal etching solution to remove the conductive metal layer.
[0006] Preferably, the surface of the micro-nano hybrid scattering structure in the micro-nano hybrid scattering structure array is circular or other shapes, and the cross-section is bowl-shaped, semi-ellipsoidal, frustum-shaped or sawtooth-shaped. The aperture diameter is 20~200nm, and the depth is 20-100% of the thickness of the N-type semiconductor transport layer. The micro-nano hybrid scattering structure array as a whole is parallel to the epitaxial layer growth direction in the middle, and the edges are at 0-90° to the epitaxial layer growth direction.
[0007] Preferably, the N-type semiconductor transport layer (103) has an Al composition of 45-65% and a Si doping concentration of 1.0 × 10⁻⁶. 18 ~1.0×10 19 / cm -3 The exposed area of the N-type semiconductor transport layer (103) accounts for 10-60% of the area of the N-type semiconductor transport layer.
[0008] Preferably, the material of the N-type semiconductor transport layer is... Where 0.2≤x1≤0.8, and the thickness is 1~5um.
[0009] Preferably, the material of the multi-quantum-well active layer is... Where 0 ≤ x³ ≤ 1, , 0≤x4≤1, Quantum barrier The band gap is larger than that of a quantum well. bandgap, quantum well The number of quantum wells is greater than or equal to 3; The thickness is 0.5–5 nm, quantum barrier The thickness is 3–50 nm.
[0010] Preferably, the material of the P-type semiconductor transport layer is Al. x2 Ga 1-x2 N; where 0≤x2≤1, 0≤1-x2≤1, and the thickness is 50~250nm; The P-type GaN contact layer is made of P-type doped GaN and has a thickness of 2–20 nm.
[0011] Preferably, the material of the P-type ohmic electrode is Ni / Au, Cr / Au, Pt / Au, or Ni / Al.
[0012] Preferably, the N-type ohmic electrode is made of Al / Au, Cr / Au, or Ti / Al / Ti / Au, wherein the area of the N-type ohmic electrode accounts for 10-50% of the area of the N-type semiconductor transport layer.
[0013] In a second aspect, a UV LED with a micro-nano hybrid structure is provided, which is prepared by the method for preparing a UV LED with a micro-nano hybrid structure as described in the first aspect.
[0014] All of the above-mentioned optional technical solutions can be combined arbitrarily, and the present invention will not provide a detailed description of the structure after each combination.
[0015] By means of the above solution, the beneficial effects of the present invention are as follows: By performing electrochemical selective etching on epitaxial wafers to form a micro / nano hybrid scattering structure array in the exposed area of the N-type semiconductor transport layer, the area ratio of the micro / nano hybrid scattering structure in the N-type semiconductor transport layer can be significantly increased, thereby significantly improving photon scattering efficiency and allowing more light to be emitted from the bottom of the substrate, thus significantly improving light extraction efficiency.
[0016] The above description is merely an overview of the technical solution of the present invention. In order to better understand the technical means of the present invention and to implement it in accordance with the contents of the specification, the preferred embodiments of the present invention are described in detail below with reference to the accompanying drawings. Attached Figure Description
[0017] Figure 1 This is a schematic diagram of the structure of the epitaxial wafer formed in step S1 of this embodiment of the invention.
[0018] Figure 2 This is a schematic diagram of the structure of the epitaxial wafer formed in step S3 of this embodiment of the invention.
[0019] Figure 3 This is a schematic diagram of the structure of the epitaxial wafer formed in step S4 of this embodiment of the invention.
[0020] Figure 4This is a schematic diagram of the structure of the ultraviolet LED formed in step S5 of this embodiment of the invention.
[0021] Figure 5 This is a partially enlarged schematic diagram of the micro-nano hybrid scattering structure in an embodiment of the present invention.
[0022] Figure 6 This is a schematic diagram of the surface microstructure distribution of the micro-nano hybrid scattering structure in an embodiment of the present invention.
[0023] Figure 7 This is a schematic diagram of the cross-sectional microstructure distribution of the micro / nano hybrid scattering structure in an embodiment of the present invention.
[0024] Figure 8 This is a schematic diagram showing the light emission comparison between the reference device and device 1 after they are lit in an embodiment of the present invention.
[0025] Figure 9 This is a schematic diagram comparing the light extraction efficiency of the reference device and device 1 in an embodiment of the present invention. Detailed Implementation
[0026] The specific embodiments of the present invention will be described in further detail below with reference to the accompanying drawings and examples. The following examples are for illustrative purposes only and are not intended to limit the scope of the invention.
[0027] The method for fabricating a micro-nano hybrid ultraviolet LED provided in this invention includes the following steps S1 to S5: S1, a buffer layer 102, an N-type semiconductor transport layer 103, a multi-quantum-well active layer 104, a P-type semiconductor transport layer 105 and a P-type GaN contact layer 106 are grown sequentially from bottom to top on the surface of substrate 101 to form an epitaxial wafer.
[0028] Specifically, this step can be achieved using MOCVD (organic metal chemical vapor deposition) technology.
[0029] The substrate 101 is one of sapphire, Si, AlN, SiC or GaN. The substrate 101 can be a c-plane (a crystal plane perpendicular to the c-axis in a crystal structure) or an m-plane (a crystal plane parallel to the c-axis in a hexagonal crystal system) along the epitaxial growth direction.
[0030] The buffer layer 102 is made of AlN, GaN or other materials, and has a thickness of 1 to 4 μm.
[0031] The material of the N-type semiconductor transport layer 103 is... Wherein, 0.2 ≤ x1 ≤ 0.8. The Al composition of the N-type semiconductor transport layer 103 is 45~65%, and the Si doping concentration is 1.0 × 10⁻⁶. 18 ~1.0×1019 / cm -3 The thickness of the N-type semiconductor transport layer 103 is 1~5um, denoted as d1.
[0032] The material of the multi-quantum well active layer 104 is... Where 0 ≤ x³ ≤ 1, , 0≤x4≤1, Quantum barrier The band gap is larger than that of a quantum well. bandgap, quantum well The number of quantum wells is greater than or equal to 3; The thickness is 0.5–5 nm, quantum barrier The thickness is 3–50 nm.
[0033] The P-type semiconductor transport layer 105 is made of Al. x2 Ga 1-x2 N; where 0 ≤ x2 ≤ 1, 0 ≤ 1 - x2 ≤ 1, and the thickness is 50–250 nm. It should be noted that the values of x1, x2, x3, and x4 are not equal.
[0034] The P-type GaN contact layer 106 is made of P-type doped GaN and has a thickness of 2–20 nm.
[0035] The structure of the epitaxial wafer obtained in step S1 is as follows Figure 1 As shown.
[0036] S2, the epitaxial wafer formed in S1 is etched to the N-type semiconductor transport layer 103 to form an N-electrode mesa.
[0037] Specifically, through photolithography and etching processes, dry etching is performed from the P-type GaN contact layer 106 to the N-type semiconductor transport layer 103. The exposed area of the N-type semiconductor transport layer 103 accounts for 10-60% of the total area of the N-type semiconductor transport layer 103 (S1), preferably 30%. The dry etching depth (perpendicular to the horizontal direction) is denoted as d2. Mesa etching can be performed to the surface of the N-type semiconductor transport layer 103 or to the interior of the N-type semiconductor transport layer 103.
[0038] S3, a SiO2 thin film 107 is prepared on the surface of the N electrode mesa, and the SiO2 thin film 107 is dry etched to expose part of the N-type semiconductor transport layer 103 and form through holes with an array structure.
[0039] This step S3 can be achieved through processes such as etching or development. The thickness of the SiO2 thin film 107 is 3000-10000 Å.
[0040] The structure of the epitaxial wafer obtained in step S3 is as follows Figure 2 As shown.
[0041] S4, electrochemical selective etching is performed on the epitaxial wafer formed in S3 to form a micro-nano hybrid scattering structure array 108 in the exposed area of the N-type semiconductor transport layer 103 formed in S3. After etching, the SiO2 thin film 107 is removed.
[0042] In one specific embodiment, step S4 includes: preparing a 0.1-1.0 wt% alkaline electrolyte; fabricating a conductive metal layer on the side of the epitaxial wafer formed in step S3; clamping the conductive metal layer onto the working electrode; setting the voltage to 10-30V; and setting the electrochemical etching time to 10s-5min; forming a micro / nano hybrid scattering structure array 108 within the exposed area of the N-type semiconductor transport layer 103 formed in step S3; immersing the wafer in BOE etching solution after etching to remove the SiO2 thin film 107; and then immersing the wafer in a metal etching solution to remove the conductive metal layer. The alkaline electrolyte can be a KOH solution.
[0043] The micro-nano hybrid scattering structure array 108 is composed of several micro-nano hybrid scattering structures. The surface of the micro-nano hybrid scattering structure is circular or other shapes (elliptical, etc.), and the cross-section is bowl-shaped, semi-ellipsoidal, frustum-shaped or sawtooth-shaped, preferably bowl-shaped or semi-ellipsoidal. The aperture diameter is 20~200nm, and the depth is 20-100% of the thickness (d1) of the N-type semiconductor transport layer 103. The micro-nano hybrid scattering structure array 108 is generally parallel to the epitaxial layer growth direction in the middle, and the edges are at 0-90° to the epitaxial layer growth direction.
[0044] The micro / nano hybrid scattering structure array 108 is located inside the exposed N-type semiconductor transport layer 103 (e.g. Figure 3 As shown), it forms a porous structure inside, with different characteristics. The micro-nano hybrid scattering structure at the edge of the micro-nano hybrid scattering structure array 108 has a certain tilt angle, and the micro-nano hybrid scattering structure in the central region is close to the vertical channel.
[0045] The BOE corrosion solution is made by mixing 40% ammonium fluoride solution (HF) and 49% hydrofluoric acid solution (NH4F) in a specific ratio. The specific ratio can be a volume ratio, such as 6:1 or 10:1.
[0046] The structure of the epitaxial wafer obtained in step S4 is as follows Figure 3 As shown.
[0047] S5, a SiO2 thin film 107 is deposited on the surface of the epitaxial wafer formed in S4, and photolithography is performed using a SiO2 mask. After photolithography, dry etching is performed to form N-electrode channels and P-electrode channels. N-type ohmic electrodes 110 and P-type ohmic electrodes 109 are deposited in the N-electrode channels and P-electrode channels, respectively.
[0048] The thickness of the SiO2 thin film 107 is 3000-10000 Å.
[0049] The P-type ohmic electrode 109 is made of Ni / Au, Cr / Au, Pt / Au, or Ni / Al.
[0050] The N-type ohmic electrode 110 is made of Al / Au, Cr / Au, or Ti / Al / Ti / Au, and the area of the N-type ohmic electrode 110 accounts for 10 to 50% of the area (S1) of the N-type semiconductor transport layer 103.
[0051] This results in a UV LED with a micro / nano hybrid scattering structure, such as Figure 4 As shown, a locally magnified schematic diagram of the micro / nano hybrid scattering structure is as follows: Figure 5 As shown (the white area represents the micro / nano hybrid scattering structure), the surface microstructure distribution of the micro / nano hybrid scattering structure is as follows. Figure 6 As shown, the cross-sectional microstructure distribution is as follows: Figure 7 As shown, it describes in detail the aperture distribution characteristics of the micro / nano hybrid scattering structure.
[0052] The mechanism of selective electrochemical etching (SCE) of the N-type semiconductor transport layer 103 to prepare micro / nano hybrid scattering structures is as follows: Selective electrochemical etching not only occurs in the exposed area of the N-type semiconductor transport layer 103, but also extends laterally to the unexposed area. Therefore, for all etched samples, the etched area can be clearly divided into two regions: the vertical etched region and the lateral etched region. This phenomenon is attributed to the stronger electric field intensity under high voltage, which induces more holes and drives them to migrate to the AlGaN-electrolyte interface. Using SiO2 as a mask, the electric field below its opening (central etched region) exhibits a relatively uniform square distribution, while below the SiO2 film 107 (lateral etched region) it exhibits a radial spherical distribution, which is consistent with... Figure 7 The cross-sectional etching profile shown is perfectly matched, therefore, the selected area etching inner pore size distribution is as follows: Figure 7 As shown.
[0053] Based on the electric field distribution and nanopore cross-sectional morphology, when an N-type semiconductor transport layer 103 (n-AlGaN) sample is immersed in an alkaline solution and a bias voltage is applied, holes are generated in the space charge region (SCR) at the n-AlGaN / solution interface. These holes trigger a chemical reaction between AlGaN and OH⁻, leading to the formation of etched nanopores on the AlGaN surface. Furthermore, due to the tip effect, the electric field strength is stronger at the edges of the SiO₂ opening region, resulting in an enhanced local current density. Therefore, the nanopore density is higher at the edges of the SiO₂ openings. It is well known that the electric field is more concentrated at the bottom of the formed nanopores, leading to etching along the nanopore axis. Moreover, according to the electric field distribution, the ECSA (electrochemical active area) etching process causes the electric field to diffuse outward, resulting in radial extension of the electric field at the bottom of the nanopore. Therefore, during further ECSA etching, the nanopores extend vertically. Once the bottom of the nanopore reaches a sufficient size, it may branch into two or more sub-nanopores. This phenomenon differs from conventional EC (electrochemical) etching processes, which typically observe purely vertical etching. However, when the space charge regions (SCRs) of adjacent nanopores overlap, the branching effect is suppressed, and the etching of the nanopores proceeds only along the axial direction. In the lateral etching region, the nanopores are etched along the inclined direction. As the etching depth increases, the spacing between adjacent nanopores gradually increases, thus triggering a continuous branching phenomenon—the main nanopore will derive multiple sub-nanopores, and these sub-pores themselves may also continue to branch, such as... Figure 6 , 7 As shown, a typical hole structure is marked with red lines.
[0054] To demonstrate the beneficial effects of the method for preparing ultraviolet light-emitting diodes provided in the embodiments of the present invention, the following specific embodiment 1 is provided.
[0055] Example 1 includes the following steps: The first step involves using MOCVD technology to sequentially grow an AlN buffer layer, an N-type semiconductor transport layer 103 (thickness denoted as d1), a multi-quantum-well active layer 104, a P-type semiconductor transport layer 105, and a p-type GaN contact layer 106 on a substrate 101. These layers constitute the basic structure of the epitaxial wafer.
[0056] Substrate 101 is a sapphire substrate, square in shape, with a size of 38. The N-type semiconductor transport layer 103 has an Al composition of (60±5)% and an N-type doping concentration of 1.0×10⁻⁶ mils along the
[0001] direction, with a thickness of 430 μm. 18 / cm -3 The thickness is 3µm.
[0057] The second step involves dry etching from the P-type GaN contact layer 106 to the N-type semiconductor transport layer 103 using photolithography and etching processes. The exposed area of the N-type semiconductor transport layer 103 accounts for 30% of the total area of the N-type semiconductor transport layer. The dry etching depth (perpendicular to the horizontal direction) is denoted as d2 and is 1.0 μm.
[0058] The third step involves depositing a SiO2 thin film 107. Using the SiO2 thin film 107 as a mask, the N-type semiconductor transport layer 103 is exposed through etching or development processes, forming vias with an array structure, such as... Figure 2 As shown.
[0059] The thickness of the SiO2 thin film 107 is (6000±200) Å.
[0060] The fourth step is selective electrochemical etching. A 0.1 wt% alkaline electrolyte is prepared, and a conductive metal layer is fabricated on the side of the epitaxial wafer. The conductive metal layer is then clamped onto the working electrode. A voltage of 30 V and an electrochemical etching time of 30 s are set. A micro / nano hybrid scattering structure array 108 with a semi-ellipsoidal cross-section is formed within the exposed area of the N-type semiconductor transport layer 103. After etching, the wafer is immersed in BOE etching solution to remove the SiO2 thin film 107, followed by immersion in metal etching solution to remove the conductive metal layer. Figure 3 As shown.
[0061] The micro / nano hybrid scattering structure array 108 is located inside the exposed N-type semiconductor transport layer 103. It is a nano-sized air cavity with array distribution characteristics. The cross-section is bowl-shaped, with an area of about 40% of the exposed N-type semiconductor transport layer 103. The aperture ranges from 50 to 100 nm, and the depth is about 1 μm. The selected area etching edge is an inclined air cavity, and the selected area center is almost vertical to the air cavity.
[0062] Fifth step: Based on the above steps, deposit SiO2 thin film 107, use SiO2 mask for photolithography, and after photolithography, perform dry etching to deposit N-type ohmic electrode 110 and P-type ohmic electrode 109 in sequence.
[0063] Among them, the area of the N-type ohmic electrode layer 110 is 28%S1 and the area of the P-type ohmic electrode layer 109 is 68%S1.
[0064] As shown in Table 1, it is 38 mil. Table 1 shows the photoelectric properties of a 38mil chip. As can be seen from Table 1, the ultraviolet LED (device 1) with a micro-nano hybrid scattering structure prepared in Example 1 has better performance than the reference device (ultraviolet LED without micro-nano hybrid scattering structure).
[0065]
[0066] Figure 8 Figures a and b in the diagram are schematic comparisons of the light emission of the reference device and device 1 after they are lit, respectively. Figure 8 It can be seen that the luminescent areas of the etched regions of the N-type semiconductor transport layer 103 are all electrochemical selective etching regions, i.e., circular regions (with a semi-ellipsoidal cross-section). Each circular region corresponds to... Figure 6 , 7 The morphology of the corroded areas is arranged in an array. The emission from the nanopores further demonstrates that the micro-nano scattering hybrid structure improves the light emission path.
[0067] like Figure 9 As shown, this is a schematic diagram comparing the light extraction efficiency of the reference device and device 1 in an embodiment of the present invention. Figure 9 As can be seen, the light extraction efficiency of device 1 is significantly increased compared to the reference device.
[0068] This invention also provides a UV LED with a micro-nano hybrid structure, which is prepared using the fabrication method for a UV LED with a micro-nano hybrid structure described in the above embodiments. The structure of the prepared UV LED is as follows: Figure 4 As shown.
[0069] The method for fabricating a micro-nano hybrid structure and the ultraviolet LED provided in this invention, through selective electrochemical etching, significantly increases the area ratio of the micro-nano hybrid scattering structure array 108 in the N-type semiconductor transport layer 103. On the other hand, the cross-section of the micro-nano hybrid scattering structure is generally semi-ellipsoidal or similar in shape, and the micro-nano hybrid scattering structure at the edge of the selected area has a certain tilt angle. The synergistic effect of the above two aspects can significantly improve the photon scattering efficiency, allowing more light to be emitted from the bottom of the substrate 101 and improving the light extraction efficiency.
[0070] It should be noted that the ultraviolet LED involved in the embodiments of the present invention is preferably a deep ultraviolet LED.
[0071] The above description is merely a preferred embodiment of the present invention and is not intended to limit the present invention. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the technical principles of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.
Claims
1. A method for fabricating a UV LED with a micro / nano hybrid structure, characterized in that, include: S1, a buffer layer (102), an N-type semiconductor transport layer (103), a multi-quantum well active layer (104), a P-type semiconductor transport layer (105) and a P-type GaN contact layer (106) are grown sequentially from bottom to top on the surface of the substrate (101) to form an epitaxial wafer; S2, the epitaxial wafer formed in S1 is etched to the N-type semiconductor transport layer (103) to form an N-electrode mesa; S3, a SiO2 thin film (107) is prepared on the surface of the N electrode mesa, and the SiO2 thin film (107) is dry etched to expose part of the N-type semiconductor transport layer (103) and form a through hole with an array structure; S4, electrochemical selective etching is performed on the epitaxial wafer formed in S3 to form a micro-nano hybrid scattering structure array (108) in the exposed area of the N-type semiconductor transport layer (103) formed in S3, and the SiO2 film (107) is removed after etching is completed. S5, deposit a SiO2 thin film (107) on the surface of the epitaxial wafer formed in S4, and perform photolithography using a SiO2 mask. After photolithography, perform dry etching to form N-electrode channels and P-electrode channels, and deposit N-type ohmic electrodes (110) and P-type ohmic electrodes (109) in the N-electrode channels and P-electrode channels, respectively.
2. The method for preparing a UV LED with a micro / nano hybrid structure according to claim 1, characterized in that, S4 includes: Prepare an alkaline electrolyte of 0.1~1.0wt% and prepare a conductive metal layer on the side of the epitaxial wafer formed in S3. Clamp the conductive metal layer on the working electrode, set the voltage to 10~30V, and the electrochemical etching time to 10s~5min. Form a micro-nano hybrid scattering structure array (108) in the exposed area of the N-type semiconductor transport layer (103) formed in S3. After etching, immerse in BOE etching solution to remove the SiO2 film (107) and immerse in metal etching solution to remove the conductive metal layer.
3. The method for preparing a UV LED with a micro / nano hybrid structure according to claim 1 or 2, characterized in that, The micro-nano hybrid scattering structure in the array (108) has a circular or other shape on the surface, and a cross-section that is bowl-shaped, semi-ellipsoidal, frustum-shaped or sawtooth-shaped. The hole diameter is 20~200nm and the depth is 20-100% of the thickness of the N-type semiconductor transport layer (103). The micro-nano hybrid scattering structure array (108) as a whole has a middle parallel to the growth direction of the epitaxial layer and an edge at 0-90° to the growth direction of the epitaxial layer.
4. The method for preparing a UV LED with a micro / nano hybrid structure according to claim 1, characterized in that, The N-type semiconductor transport layer (103) has an Al composition of 45-65% and a Si doping concentration of 1.0 × 10⁻⁶. 18 ~1.0×10 19 / cm -3 The exposed area of the N-type semiconductor transport layer (103) accounts for 10-60% of the area of the N-type semiconductor transport layer (103).
5. The method for fabricating a UV LED with a micro / nano hybrid structure according to claim 1, characterized in that, The material of the N-type semiconductor transport layer (103) is Where 0.2≤x1≤0.8, and the thickness is 1~5um.
6. The method for fabricating a UV LED with a micro / nano hybrid structure according to claim 1, characterized in that, The material of the multi-quantum-well active layer (104) is Where 0 ≤ x³ ≤ 1, , 0≤x4≤1, Quantum barrier The band gap is larger than that of a quantum well. bandgap, quantum well The number of quantum wells is greater than or equal to 3; The thickness is 0.5–5 nm, quantum barrier The thickness is 3–50 nm.
7. The method for fabricating a UV LED with a micro / nano hybrid structure according to claim 1, characterized in that, The P-type semiconductor transport layer (105) is made of Al. x2 Ga 1-x2 N; where 0≤x2≤1, 0≤1-x2≤1, and the thickness is 50~250nm; The P-type GaN contact layer (106) is made of P-type doped GaN and has a thickness of 2-20 nm.
8. The method for fabricating a UV LED with a micro / nano hybrid structure according to claim 1, characterized in that, The material of the P-type ohmic electrode (109) is Ni / Au, Cr / Au, Pt / Au or Ni / Al.
9. The method for fabricating a UV LED with a micro / nano hybrid structure according to claim 1, characterized in that, The N-type ohmic electrode (110) is made of Al / Au, Cr / Au or Ti / Al / Ti / Au, wherein the area of the N-type ohmic electrode (110) accounts for 10 to 50% of the area of the N-type semiconductor transport layer (103).
10. A UV LED with a micro-nano hybrid structure, characterized in that, The ultraviolet LED with a micro-nano hybrid structure was prepared using the preparation method described in any one of claims 1 to 9.