Semiconductor structure and forming method of semiconductor structure

Abstract

The invention discloses a semiconductor structure and a forming method of the semiconductor structure, and the semiconductor structure comprises a substrate, a plurality of photoelectric conversion devices and power devices are formed on the substrate, and the photoelectric conversion devices are covered with first dielectric layers; deep trench isolation structures are arranged between the photoelectric conversion devices and / or between the photoelectric conversion devices and the power device; a deep trench isolation structure penetrates through the first dielectric layer and extends into the substrate; a deep trench of the deep trench isolation structure is filled with a metal material, and an isolation layer is arranged between the metal material and the inner wall of the deep trench; an opening is formed in the bottom of the isolation layer, the metal material is filled in the opening and makes contact with the inner wall of the bottom of the deep groove, and the upper portion of the metal material is electrically connected with other circuits. By adopting the semiconductor structure and the forming method of the semiconductor structure, dark current and other interference signals can be isolated and exported.

Description

Technical Field

[0001] This application relates to the field of semiconductor manufacturing technology, specifically to various semiconductor structures. This application also relates to a method for forming a semiconductor structure. Background Technology

[0002] With the rapid iteration of semiconductor chip technology, the synergistic application of photodiodes and power devices has become an important technical solution in fields such as optical communication, intelligent driving, medical sensing, and industrial automation. However, the differences in technical characteristics between photodiodes and power devices, the significant degradation of thermal stability under high-temperature conditions, the matching problem between dynamic response speed and high-speed communication requirements, crosstalk and heat dissipation problems caused by high-density integration, dark current issues, and the influence of environmental factors pose challenges to the technological development of synergistic applications. Device structure optimization is an important means to address these challenges.

[0003] In existing technologies, introducing deep trench isolation (DTI) filling structures is an effective device structure optimization solution that can significantly improve the performance parameters of individual devices, suppress inter-pixel crosstalk, reduce dark current, and optimize optical efficiency. It is a key technology for the efficient integration of photodiodes and power devices in collaborative application systems. However, existing deep trench isolation filling structure processes involve two steps: oxide deep trench structure formation and polysilicon deep trench structure formation, which are complex and costly.

[0004] Therefore, how to provide device structure optimization schemes to form structurally optimized semiconductor devices is a problem that needs to be solved. Summary of the Invention

[0005] This application provides a semiconductor structure and a method for forming the semiconductor structure, which can provide a semiconductor structure with optimized structure and a semiconductor structure forming process to overcome the above-mentioned defects. The specific solution is as follows: In a first aspect, this application provides a semiconductor structure, including: a substrate on which a plurality of photoelectric conversion devices and power devices are formed, and a first dielectric layer is covered on the photoelectric conversion devices; A deep trench isolation structure is provided between the photoelectric conversion devices and / or between the photoelectric conversion devices and the power device; the deep trench isolation structure penetrates the first dielectric layer and extends into the substrate; the deep trench isolation structure includes a deep trench, the interior of which is filled with a metal material, and an isolation layer is provided between the metal material and the inner wall of the deep trench. An opening is formed at the bottom of the isolation layer, and the metal material fills the opening and contacts the inner wall of the bottom of the deep trench; The upper part of the metal material in the deep trench is electrically connected to other circuits, so that the inner wall of the bottom of the deep trench is electrically connected to the other circuits through the metal material.

[0006] Optionally, the opening is formed on the bottom wall of the deep trench and exposes the entire bottom wall of the deep trench; or the opening is formed on the bottom wall of the deep trench and the size of the opening is smaller than the bottom dimension of the deep trench.

[0007] Optionally, the metal material filling the opening and contacting the inner wall of the bottom of the deep trench includes: the opening extending into the inner wall of the bottom of the deep trench, forming a groove structure on the inner wall of the bottom of the deep trench, and the metal material filling the groove structure.

[0008] Optionally, the isolation layer is made of insulating material and has a single-layer or multi-layer structure.

[0009] Optionally, the isolation layer is specifically an oxide, a nitride, a combination of silicon oxide and silicon nitride, or other doped oxides.

[0010] Optionally, an epitaxial layer is also formed on the substrate, and the plurality of photoelectric conversion devices and power devices are formed in the epitaxial layer on the substrate.

[0011] Optionally, the deep trench isolation structure extends through the epitaxial layer into the substrate.

[0012] Optionally, shallow trenches are formed between the photoelectric conversion devices and / or between the photoelectric conversion devices and the power device, and the deep trench isolation structure is located in the middle of the shallow trenches.

[0013] Secondly, embodiments of this application also provide a method for forming a semiconductor structure, comprising: A substrate is provided, wherein a device region is provided for forming a plurality of photoelectric conversion devices and power devices, and a first dielectric layer is provided covering the device region; A deep trench is formed between the photoelectric conversion devices and / or between the photoelectric conversion devices and the power device; the deep trench penetrates the first dielectric layer and extends into the substrate; An isolation layer is formed on the inner wall of the deep trench; An opening is formed at the bottom of the isolation layer, exposing the bottom wall of the deep trench; The deep trench is filled with metal material, such that the metal material fills the opening and contacts the inner wall of the bottom of the deep trench; The upper part of the metal material is electrically connected to other circuits, so that the inner wall of the bottom of the deep trench is electrically connected to the other circuits through the metal material.

[0014] Optionally, forming an isolation layer on the inner wall of the deep trench includes: depositing a single layer or multiple layers of isolation layer material on the planar portion of the deep trench and the inner wall to form the isolation layer.

[0015] Optionally, forming an opening at the bottom of the isolation layer and exposing the bottom wall of the deep trench includes: etching in a pattern-defined area of ​​the opening to form the opening and expose at least a portion of the bottom wall of the deep trench.

[0016] Optionally, it further includes: etching downward at the opening to form a groove structure on the inner wall of the bottom wall of the deep trench; or, etching at the opening toward at least one side wall of the deep trench, such that the bottom width of the deep trench is greater than the opening width.

[0017] Optionally, forming a deep trench between the photoelectric conversion devices and / or between the photoelectric conversion devices and the power device includes: forming the deep trench using a two-step deep trench etching process in the deep trench etching region; wherein, the first deep trench etching process includes: etching with a first etching angle ranging from 85° to 90° to form an initial trench structure; the etching angle is the angle between the etching direction and the etching surface; the second deep trench etching process includes: after forming the initial trench structure, etching with a second etching angle ranging from 5° to 20° to form a deep trench with its bottom penetrating into the substrate.

[0018] Optionally, after or simultaneously filling the deep trench with metal material, a metal layer for etching out the metal pattern is deposited on the surface of the first dielectric layer.

[0019] Optionally, while filling the deep trench with metal material, a metal layer for etching out metal patterns is deposited on the surface of the first dielectric layer, including: depositing metal material on the surface of the first dielectric layer to form a metal layer for etching out metal patterns, while the metal material is deposited inside the isolation layer and fills the opening and contacts the inner wall of the bottom of the deep trench.

[0020] Optionally, before forming the deep trench or before filling the deep trench with metal material, the method further includes: simultaneously or sequentially etching contact holes corresponding to the plurality of photoelectric conversion devices and contact holes corresponding to the power device in the first dielectric layer; depositing a first metal in the contact holes, removing excess first metal from the surface, wherein the upper side of the first metal in one contact hole is flush with the surface of the first dielectric layer, and the other side contacts the plurality of photoelectric conversion devices or the power device corresponding to the contact hole.

[0021] Optionally, the thickness of the isolation layer ranges from 1,000 angstroms to 6,000 angstroms.

[0022] Optionally, it further includes: growing an epitaxial layer on the substrate, wherein the device region is located in the epitaxial layer; wherein a deep trench formed between the photoelectric conversion devices and / or between the photoelectric conversion devices and the power device penetrates the epitaxial layer and extends into the substrate.

[0023] Compared with the prior art, this application has the following advantages: The semiconductor structure and method for forming the semiconductor structure provided in this application simplify the two-step process of forming a deep trench isolation structure into a one-step etching process. Furthermore, during the etching process at the bottom of the deep trench, the bottom is etched through to the substrate, forming a semiconductor structure with optimized device structure. The deep trench isolation structure formation process is then performed in a post-processing manner. The semiconductor structure includes: a substrate on which multiple photoelectric conversion devices and power devices are formed, and a first dielectric layer covers the photoelectric conversion devices; deep trench isolation structures exist between the photoelectric conversion devices and / or between the photoelectric conversion devices and the power devices; the deep trench isolation structure penetrates the first dielectric layer and extends into the substrate; the deep trench isolation structure includes a deep trench, the interior of which is filled with a metal material, and an isolation layer is disposed between the metal material and the inner wall of the deep trench; an opening is formed at the bottom of the isolation layer, and the metal material fills the opening and contacts the inner wall of the bottom of the deep trench; the upper part of the metal material in the deep trench is electrically connected to other circuits, such that the inner wall of the bottom of the deep trench is electrically connected to the other circuits through the metal material. This provides a one-step etching method for forming a metal-filled deep trench isolation structure, simplifying the process complexity. Furthermore, by placing the deep trench isolation structure formation process in a later stage, existing metal deposition processes used for etching metal patterns can be employed to fill the deep trenches, reducing process modification costs. Simultaneously, optimized metal filling effectively improves the response speed and signal-to-noise ratio performance of photoelectric conversion devices. The isolation layer in the deep trench isolation structure achieves isolation between photoelectric conversion devices and / or between photoelectric conversion devices and power devices. Simultaneously, the metal material filling the deep trench structure introduces a ground wire, venting dark currents, crosstalk signals, and noise generated by impurities and current carriers in the semiconductor. That is, the same deep trench isolation structure simultaneously achieves effective isolation between devices and reduces signal crosstalk and dark current. In addition, by extending the bottom of the deep trench into the substrate, the traditional backside grinding and backside metallization (BGBM) processes in semiconductor manufacturing back-end processes can be eliminated. Attached Figure Description

[0024] Figure 1AThis is a schematic diagram of the cross-sectional structure of a semiconductor structure with a deep trench structure, formed based on existing process flows.

[0025] Figure 1B These are the processing steps in the existing process flow for forming semiconductor structures with deep trench structures.

[0026] Figure 1C It is the step in the existing process flow for forming oxide deep trench structures in semiconductor structures.

[0027] Figure 1D It is the step in the existing process flow for forming a polycrystalline silicon deep trench structure to form a semiconductor structure with a deep trench structure.

[0028] Figure 2A This is a schematic cross-sectional view of a semiconductor structure provided in one embodiment of this application.

[0029] Figure 2B This is another cross-sectional schematic diagram of a semiconductor structure provided in one embodiment of this application.

[0030] Figure 3 This is a schematic diagram of the process flow of a semiconductor structure formation method provided in one embodiment of this application.

[0031] Figures 4A-4E This is a cross-sectional structural diagram of an intermediate stage in the formation of a semiconductor structure provided in one embodiment of this application. Detailed Implementation

[0032] To enable those skilled in the art to better understand the technical solutions of this application, the application will be clearly and completely described below with reference to the accompanying drawings of the embodiments. However, this application can be implemented in many other ways different from those described below. Therefore, based on the embodiments provided in this application, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of this application.

[0033] It should be noted that the terms "first," "second," etc., in the claims, specification, and drawings of this application are used to distinguish similar objects and are not used to describe a specific order or sequence. Such data are interchangeable where appropriate so that the embodiments of this application described herein can be implemented in a sequence other than that shown or described herein. Furthermore, the terms "comprising," "having," and their variations are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that includes a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0034] It should be noted that the thickness and shape in the accompanying drawings of the embodiments of this application do not reflect the actual proportions, and are only intended to illustrate the various embodiments.

[0035] To facilitate understanding of the embodiments of this application, some concepts involved in the embodiments and related technologies for fabricating semiconductor structures with deep trench structures are given.

[0036] Deep trench isolation structure: also known as deep trench isolation (DTI) filling structure, refers to the material and structural design used in deep trench isolation technology to fill the deep trenches formed by etching, in order to achieve effective isolation and performance optimization between devices. In this specification, deep trench structure also refers to deep trench isolation structure.

[0037] Please refer to Figure 1A , Figure 1A A schematic cross-sectional view of a semiconductor structure (10) formed based on an existing process flow includes: a substrate 100, a semiconductor device layer 200, an isolation layer 300, a first semiconductor device 400 formed in the semiconductor device layer, and deep trench isolation structures 500 located on both sides of the first semiconductor device; wherein, the deep trench isolation structure 500 includes: an oxide deep trench structure 501 and a polysilicon deep trench structure 502.

[0038] Please refer to this again. Figure 1B The figure shows the main relevant steps of the existing process flow for forming the above semiconductor structure (10), including steps S101 to S106.

[0039] Step S101: An oxide deep trench structure 501 is formed on both sides of the first semiconductor device 400. For example... Figure 1C As shown, step S101 specifically includes: S101-1, Oxide deep trench lithography, includes: forming a photoresist of a certain thickness by spin coating, developing, and opening the visible area of ​​the deep trench; S101-2, oxide deep trench etching, includes: etching the hard mask layer with a mixed gas composed of C4F8 (octafluorocyclobutane) and O2 (oxygen); forming deep trenches by using the hard mask layer as an etching barrier layer and etching gas composed of SF6 (sulfur hexafluoride) and O2. S101-3, Oxide Deep Trench Backfilling, includes: forming a thin layer of oxide of about 1000 angstroms inside the deep trench through thermo-oxidation, and then filling the deep trench through LPTOES (Low Pressure Chemical Vapor Deposition Tetraethyl Orthosilicate) process.

[0040] Step S102: A polysilicon deep trench structure 502 is formed between the oxide deep trench structure 501 and the first semiconductor device 400, and also on the outside of the oxide deep trench structure 501. For example... Figure 1D As shown, step S102 specifically includes: S102-1, Polysilicon deep trench photolithography, including: forming a photoresist of a certain thickness by spin coating, developing and opening the visible area of ​​the deep trench; S102-2, deep trench etching of polysilicon, including: etching the hard mask layer with a mixed gas composed of C4F8 (octafluorocyclobutane) and O2 (oxygen), using the hard mask layer as an etching barrier layer and etching deep trenches with an etching gas composed of SF6 (sulfur hexafluoride) and O2. S102-3, Polycrystalline silicon deep trench backfilling, includes: etching and cleaning the inside of the deep trench, then filling the inside of the DT with doped-poly, and removing the surface poly using CMP process; In step S103, an isolation layer of a certain thickness is formed through interlayer dielectric deposition (ILD DEP) and chemical mechanical planarization (CMP) processes.

[0041] In step S104, contact holes are fabricated using photolithography and etching processes, and then tungsten (W) is filled into the contact holes using physical vapor deposition (PVD) processes. Excess W on the surface is then removed using CMP processes.

[0042] Step S105, metal layer deposition and metal pattern formation through metal lithography and etching processes, includes: depositing a metal layer through PVD process, and then etching the metal pattern through metal lithography and etching processes to achieve semiconductor device performance.

[0043] Step S106: Backside interconnection is achieved through backside thinning and backside metallization (BGBM) processes to provide reliable electrical connection and enhance the chip's heat dissipation capability.

[0044] The existing process flow for forming the semiconductor structure (10) is a device structure optimization scheme. The process flow for preparing the deep trench isolation structure 500 includes two process steps, which is relatively complex and costly.

[0045] This application provides a semiconductor structure and its formation method. Through process innovation, the above two-step etching process is simplified into a one-step etching process. In the deep trench etching process, the bottom is etched into the substrate, and the deep trench is filled with metal to form a metal-filled deep trench structure, thereby effectively reducing the process complexity and significantly reducing the process cost.

[0046] Example 1 The first embodiment provides a semiconductor structure in which a metal-filled deep trench isolation structure, which can be formed through a simplified process flow, is provided between multiple photoelectric conversion devices on a substrate and / or between the photoelectric conversion devices and the power device. This semiconductor structure can improve the performance parameters of individual semiconductor devices while suppressing interference between photoelectric conversion devices or between photoelectric conversion devices and other devices, such as power devices, located outside the metal-filled deep trench isolation structure. When this semiconductor structure is applied to a system where photodiodes and power devices are used in synergy, it can optimize the system structure, improve the performance parameters of individual photodiodes, suppress inter-pixel crosstalk, reduce dark current, and optimize optical efficiency, thus facilitating the efficient integration of photodiodes and power devices in synergy. The following is combined with... Figure 2A and 2B The semiconductor structure will be described.

[0047] Please refer to Figure 2AThe figure shows a cross-sectional view of a semiconductor structure (20) formed by a simplified process flow, including: a substrate 210, on which a plurality of photoelectric conversion devices 220 and power devices 230 are formed, and a first dielectric layer 240 is covered on the photoelectric conversion devices; a deep trench isolation structure 250 is provided between the photoelectric conversion devices 220 and / or between the photoelectric conversion devices 220 and the power devices 230; the deep trench isolation structure 250 penetrates the first dielectric layer 240 and extends into the substrate 210; the deep trench isolation structure... Structure 250 includes a deep trench 2501, the interior of which is filled with a metal material 2502. An isolation layer 2503 is provided between the metal material 2502 and the inner wall of the deep trench. An opening 2504 is formed at the bottom of the isolation layer 2503, and the metal material 2502 is filled in the opening 2504 and in contact with the bottom inner wall of the deep trench. The upper part of the metal material 2502 in the deep trench is electrically connected to other circuits 260, so that the bottom inner wall of the deep trench is electrically connected to the other circuits 260 through the metal material 2502.

[0048] Specifically, substrate 210 refers to a material on which other material layers can be added. The material added to substrate 210 can be patterned or left unpatterned. Exemplarily, substrate 210 may include, for example, single-crystal silicon (Si), single-crystal germanium (Ge), silicon-germanium (GeSi), silicon carbide (SiC), silicon-on-insulator (SOI), germanium-on-insulator (GOI), or gallium arsenide. Substrate 210 can be an N++ substrate (i.e., a highly doped n-type semiconductor substrate), that is, an n-type dopant such as phosphorus (P) or arsenic (As) is introduced into the silicon substrate through ion implantation or diffusion processes to form a highly concentrated n-type doped layer substrate. In this application embodiment, the specific structure, material, and fabrication method of substrate 210 are not specifically limited. The photoelectric conversion device can be a photodiode, a phototransistor, or an image sensor integrating a photodiode, or other semiconductor devices that utilize the photoelectric effect of semiconductor materials to convert light energy into electrical signals. The power device can be a power diode, a thyristor, or other electronic devices used to process voltage and current.

[0049] Specifically, the first dielectric layer 240 can be a thin film formed by depositing an oxide, a nitride, or a combination of oxides and nitrides. The thickness of the first dielectric layer 240 ranges from 3000 angstroms to 7000 angstroms.

[0050] Preferably, the metal material contacts the substrate at the bottom of the deep trench or at a portion of the deep trench deeper than the isolation layer. A greater depth of the contact portion with the substrate results in better suppression of dark current and signal interference affecting the photoelectric conversion device. Preferably, the thickness of the isolation layer ranges from 1000 angstroms to 6000 angstroms.

[0051] Specifically, the deep trench isolation structure 250 has a trench depth of 10 micrometers or more and an aspect ratio greater than 10:1. The process of forming the deep trench isolation structure includes: forming a deep trench 2501 between the photoelectric conversion devices 220 and / or between the photoelectric conversion devices 220 and the power device 230; the deep trench 2501 penetrates the first dielectric layer 240 and extends into the substrate 210; forming an isolation layer 2503 on the inner wall of the deep trench; forming an opening 2504 at the bottom of the isolation layer 2503, exposing the bottom wall of the deep trench; filling the deep trench with a metal material 2502, such that the metal material 2502 fills the opening 2504 and contacts the inner wall of the bottom of the deep trench, and the upper part of the metal material 2502 is electrically connected to other circuits 260. The deep trench isolation structure formed in this process can isolate devices through the isolation layer 2503, and also conduct dark current and noise interference caused by impurities and inter-device interference through the filling metal material 2502. Furthermore, the deep trench isolation structure process can be placed in the back-end of semiconductor manufacturing, such as after depositing the first dielectric layer, or after depositing the first dielectric layer and fabricating the contact structure for leading out photoelectric conversion devices and / or power devices. The contact structure refers to the conductive structure that electrically connects the leads of photoelectric conversion devices and / or power devices to other circuits. During the deep trench filling stage of the fabrication process, existing metal deposition processes for depositing metal layers used to etch metal patterns can be used to fill the deep trenches, thereby reducing process modification costs.

[0052] The metal material 2502 is in contact with the inner wall of the bottom of the deep trench. Since the deep trench extends into the substrate 210, the metal material 2502 is in contact with the substrate 210. The filling depth of the metal material 2502 in the deep trench is not less than the bonding depth of the insulating layer 2503 with the sidewall of the deep trench.

[0053] Specifically, the opening 2504 is formed in the bottom wall of the deep trench and exposes the entire bottom wall of the deep trench; or the opening 2504 is formed in the bottom wall of the deep trench, and the size of the opening is smaller than the bottom dimension of the deep trench. Wherein, the metal material filling the opening and contacting the inner wall of the bottom of the deep trench includes: the opening 2504 extending into the inner wall of the bottom of the deep trench, forming a groove structure on the inner wall of the bottom of the deep trench, and the metal material 2502 filling the groove structure.

[0054] Specifically, the isolation layer 2503 is an insulating material and has a single-layer or multi-layer structure. Specifically, the isolation layer 2503 is an oxide (such as silicon oxide SiO2), a nitride (such as silicon nitride), a combination of silicon oxide and silicon nitride, or other doped oxides (such as SiCOH). For example, the isolation layer can be a single layer of silicon oxide or dilute silicon, or it can include a layer of silicon oxide and a layer of silicon nitride, depending on the isolation requirements of the photoelectric conversion device. Alternatively, silicon oxide and silicon nitride can be deposited sequentially to form the isolation layer. Another example is that the isolation layer can be a silicon oxynitride thin film generated based on silicon-containing gas and ammonia gas. The specific composition of the isolation layer is not limited.

[0055] Preferably, the thickness of the isolation layer 2503 ranges from 1000 angstroms to 6000 angstroms.

[0056] Please refer to this again. Figure 2B , Figure 2B In the semiconductor structure shown, an epitaxial layer 270 is also formed on the substrate, and the plurality of photoelectric conversion devices 220 and power devices 230 are formed in the epitaxial layer 270 on the substrate 210. The first dielectric layer 240 is formed on the epitaxial layer 270. The epitaxial layer (EPI) can be a single-crystal layer formed on a wafer substrate by an epitaxial growth process. Furthermore, the deep trench isolation structure 250 extends through the epitaxial layer 270 into the substrate 210.

[0057] Specifically, the photoelectric conversion device 220 and the power device 230 are electrically connected to other circuits 260 via a conductive structure 280. The conductive structure 280 includes contact holes and a metal, such as tungsten, filling the contact holes. The conductive structure 280 is formed in the first dielectric layer 240.

[0058] Please continue to refer to this. Figure 2B Shallow trenches 290 are formed between the photoelectric conversion devices and / or between the photoelectric conversion devices and the power device, and the deep trench isolation structure 250 is located in the middle of the shallow trenches 290.

[0059] Furthermore, a second dielectric layer 241 may also be present between the photoelectric conversion device 220 and the first dielectric layer 240. Please refer to [link / reference needed]. Figure 2B A second dielectric layer 241 may be provided between the photoelectric conversion device 220 and the first dielectric layer 240. A conductive structure 280 penetrates the first and second dielectric layers and contacts the leads of the photoelectric conversion device and the power device, respectively. The surface of the isolation trench 290 formed between the photoelectric conversion device and the power device may be covered with the second dielectric layer. The deep trench isolation structure 250 has its deep trench opening on the upper surface of the first dielectric layer 240, and the filling metal material 2502 is flush with the upper surface of the first dielectric layer 240. Specifically, a hard mask layer 242 may also be provided between the first dielectric layer 240 and the second dielectric layer 241.

[0060] Specifically, the metal-filled deep trench structure provided in this embodiment can be used to suppress signal interference from short-wavelength light (such as blue and violet light) to photodiodes in the synergistic application of photodiodes and power devices. These synergistic applications include, but are not limited to: optical communication systems, industrial automation, medical devices, renewable energy systems, and consumer electronics. In optical communication systems, photodiodes receive optical signals and convert them into electrical signals, while power devices (such as laser diode drivers) control the emission power of the light source, enabling high-speed, high-capacity data transmission. In industrial automation systems, photodiodes detect the position or color of objects, and power devices (such as motor drivers) control motor operation based on the detection results, achieving automated production processes. In medical device systems, photodiodes detect physiological parameters (such as blood oxygen saturation), and power devices control the output power of the medical device to ensure safe and effective treatment. In renewable energy systems, photodiodes monitor the light intensity of solar panels, and power devices (such as inverters and DC-DC converters) adjust the energy conversion efficiency to improve system performance. In consumer electronics, photodiodes act as ambient light sensors to automatically adjust screen brightness; power devices control the power of the screen backlight, achieving energy saving and comfortable display. In these collaborative application systems, when photodiodes and power devices are integrated into a single module, the semiconductor structure and its formation method provided in the embodiments of this application can be used as an optimized device structure scheme for the integration of photodiodes and power devices.

[0061] In the semiconductor structure provided in this embodiment, effective isolation between devices is achieved simultaneously through the same deep trench isolation structure, while signal crosstalk and dark current are reduced. Specifically, the isolation layer in the deep trench isolation structure provides isolation between photoelectric conversion devices and / or between photoelectric conversion devices and power devices. Simultaneously, the metal material filling the deep trench isolation structure introduces a ground wire, absorbing dark current, crosstalk signals, and noise generated by impurities and current carriers in the semiconductor, thus optimizing optical efficiency. Furthermore, the metal filling process of the deep trench isolation structure can utilize a metal deposition process for forming metal patterns, thereby saving process costs.

[0062] Example 2 Based on the above embodiments, the second embodiment provides a method for forming a semiconductor structure to form the semiconductor structure provided in the above embodiments. A deep trench isolation structure is formed between multiple photoelectric conversion devices and / or between photoelectric conversion devices and power devices by simplifying the process flow. Specifically, it is a metal-filled deep trench structure, which improves the performance parameters of individual photoelectric conversion devices and simultaneously suppresses interference between the photoelectric conversion devices and other photoelectric conversion devices or power devices located outside the deep trench structure. This simplifies the process complexity and reduces the process cost. The following is combined with... Figure 3 as well as Figures 4A-4E The method for forming the semiconductor structure is described.

[0063] Figure 3 The method for forming the semiconductor structure shown includes steps S301 to S306.

[0064] S301, a substrate is provided, the substrate having a device region for forming a plurality of photoelectric conversion devices and power devices, the device region being covered with a first dielectric layer; S302, a deep trench is formed between the photoelectric conversion devices and / or between the photoelectric conversion devices and the power device; the deep trench penetrates the first dielectric layer and extends into the substrate; S303, an isolation layer is formed on the inner wall of the deep trench; S304, an opening is formed at the bottom of the isolation layer, exposing the bottom wall of the deep trench; S305, fill the deep trench with metal material, such that the metal material fills the opening and contacts the inner wall of the bottom of the deep trench; S306, the upper part of the metal material is electrically connected to other circuits so that the inner wall of the bottom of the deep trench is electrically connected to the other circuits through the metal material.

[0065] Specifically, the substrate refers to a material on which other material layers can be added. The order in which the deep trench isolation structure, the plurality of photoelectric conversion devices, and the power device are fabricated on the substrate is not specifically limited. For example, the photodiode and power device can be formed first according to the defined pattern of the semiconductor structure, and then the deep trench isolation structure can be fabricated. Alternatively, the deep trench isolation structure can be fabricated first according to the defined pattern of the semiconductor structure and the regional layout of the deep trench isolation structure, and then the photodiode and power device can be formed. Furthermore, the plurality of photoelectric conversion devices and the power device can also be fabricated in an epitaxial layer (EPI) grown on the substrate. For example, the substrate is an N++ substrate, and the material of the epitaxial layer can be the same as the substrate material (homogeneous epitaxial layer) or different from the substrate material (heterogeneous epitaxial layer). The technology for growing the epitaxial layer on the substrate can employ vapor phase epitaxy (VPE), liquid phase epitaxy (LPE), etc., and this application does not specifically limit the specific techniques used in the embodiments.

[0066] Specifically, the first dielectric layer is an interlayer dielectric (ILD). Before forming the deep trench or before filling the deep trench with metal, a conductive structure is formed in the first dielectric layer, including: simultaneously or sequentially etching contact holes corresponding to the plurality of photoelectric conversion devices and contact holes corresponding to the power devices in the first dielectric layer; depositing a first metal within the contact holes, removing excess first metal from the surface, with the upper side of the first metal in one contact hole flush with the surface of the first dielectric layer, and the other side contacting the plurality of photoelectric conversion devices or the power device corresponding to the contact hole. This forms a conductive structure in the first dielectric layer, which includes contact holes (CT) and metal (such as tungsten) filling the contact holes. For example, tungsten W is filled inside the contact holes using physical vapor deposition (PVD), and excess metal W on the surface is removed using a CMP process.

[0067] Specifically, a first dielectric layer is deposited on the device region before forming the conductive structure; this includes: depositing an isolation layer material with a thickness ranging from 9000 angstroms to 12000 angstroms on the device region; and adjusting the thickness of the isolation layer material to 3000 angstroms to 7000 angstroms using a global planarization process to form the first dielectric layer.

[0068] Specifically, steps S302 to S306 are steps for forming a deep trench isolation structure. Compared to the two-step etching process of oxide deep trench structure formation and polysilicon deep trench structure formation in existing deep trench isolation technologies, the fabrication process of the deep trench isolation structure in this embodiment is simplified to a one-step etching process. That is, after etching out the deep trench, an isolation layer (such as oxide) is deposited, and then the opening is filled with metal material to form a metal-filled deep trench isolation structure. This simplifies the fabrication process of the deep trench isolation structure. The step of forming the deep trench isolation structure can be performed after the formation of the first dielectric layer, or after the formation of the first dielectric layer and the formation of the conductive structure in the first dielectric layer.

[0069] The formation of deep trenches between the photoelectric conversion devices and / or between the photoelectric conversion devices and the power device includes: forming a photoresist layer by spin coating, the photoresist thickness being approximately 3-5 micrometers; and exposing the deep trench etching area by a development process according to the defined pattern of the deep trench, the surface of the deep trench etching area including a partial hard mask layer. The hard mask layer is titanium nitride (TiN), silicon nitride (SiN), silicon dioxide (SiO2), etc. Further, etching to form the deep trench includes: etching the hard mask layer on the surface of the deep trench etching area using a first mixed gas, and using a second mixed gas to use the hard mask layer as an etching barrier layer for deep trench etching to form the deep trench. The first mixed gas is C4F8 and O2. The second mixed gas is SF6 and O2. The depth of the formed deep trench is greater than 10 micrometers, the aspect ratio is greater than 10:1, and the interior of the deep trench is cleaned after etching. Then, deep trench backfilling is carried out, including forming an isolation layer on the inner wall of the deep trench and filling it with metal material.

[0070] Specifically, a two-step etching process can be used in the etching process to form deep trenches. In implementation, forming deep trenches between the photoelectric conversion devices and / or between the photoelectric conversion devices and the power device includes: forming the deep trenches using a two-step deep trench etching process in the deep trench etching region; wherein, the first deep trench etching process includes: etching at a first etching angle with an etching angle range of 85°~90° until an initial trench structure is formed; the etching angle is the angle between the etching direction and the etching surface; the second deep trench etching process includes: after forming the initial trench structure, etching at a second etching angle with an etching angle range of 5°~20° to form a deep trench with its bottom penetrating into the substrate. That is, the first step uses a smaller tilt angle to form a stable initial trench structure, and the second step switches to a larger tilt angle to ensure complete bottom penetration.

[0071] Specifically, the deep trench backfilling stage involves forming an isolation layer on the inner wall of the deep trench and filling the deep trench with metal. After cleaning the inside of the deep trench, the deep trench backfilling stage begins. The deep trench backfilling stage can further include, in sequence, an initial deposition stage, a bottom etching stage, and a metal filling stage.

[0072] In the initial deposition stage, a single or multiple layer of isolation material can be deposited on the planar portion of the deep trench using a HARP (High Aspect Ratio Process) to form the isolation layer. The isolation layer material can be an oxide (such as silicon oxide, SiO2), a nitride (such as silicon nitride), a combination of silicon oxide and silicon nitride, or other doped oxides (such as SiCOH). The isolation layer can be a single or multiple layer, for example, it can consist of a layer of silicon oxide and a layer of silicon nitride. Alternatively, an oxide such as SiO2 can be initially deposited on the inner surface of the deep trench to form a thin oxide layer. Preferably, the thickness of the isolation layer ranges from 3000 angstroms to 7000 angstroms.

[0073] In the bottom etching stage following the deposition of the isolation layer, deep trench bottom etching is performed using a machine until it penetrates into the substrate. After forming the isolation layer, the isolation layer is further etched according to a pattern, penetrating the isolation layer to form an opening at the bottom of the isolation layer and exposing the bottom wall of the deep trench. This includes etching in the pattern-defined area of ​​the opening to form the opening and exposing at least a portion of the deep trench bottom wall. The entire deep trench bottom wall may be exposed, or only a portion may be exposed. Further etching is performed downwards (vertically downwards or obliquely downwards at a certain etching angle) or laterally at the opening, extending into the deep trench. This includes etching downwards at the opening to form a groove structure on the inner wall of the deep trench bottom wall; or etching at the opening towards at least one sidewall of the deep trench, such that the bottom width of the deep trench is greater than the opening width. The shape and size of the groove formed at the bottom of the deep trench are not specifically limited.

[0074] In the metal filling stage, a metal layer is deposited using a PVD process to fill the deep trench with metal material. Specifically, after or simultaneously with filling the deep trench with metal material, a metal layer for etching metal patterns is deposited on the surface of the first dielectric layer. This simultaneous deposition of the metal layer for etching metal patterns on the surface of the first dielectric layer includes: depositing metal material on the surface of the first dielectric layer to form a metal layer for etching metal patterns, while simultaneously depositing the metal material within the isolation layer, filling the opening, and contacting the inner wall of the bottom of the deep trench. The metal material directly connects to the substrate through the bottom of the deep trench, eliminating the need for BGBM (Backside Grinding and Backside Metal) processes. Furthermore, the deep trench isolation function can be achieved simultaneously with the PVD deposition of the metal layer, achieving dual benefits. On the one hand, it significantly reduces process modification costs; on the other hand, the optimized metal filling structure effectively improves the response speed and signal-to-noise ratio performance of the photoelectric conversion device. After filling the deep trench with metal material, a metal layer for etching out metal patterns is deposited on the surface of the first dielectric layer. Specifically, this involves using or modifying existing surface metal deposition processes to fill the deep trench with metal material, ensuring the metal material contacts the substrate at the bottom of the deep trench, forming the deep trench isolation structure. The metal material can be copper or aluminum. After filling the deep trench, a metal layer is deposited on the surface using a PVD (Polymerization and Deposition) process, and metal patterns (i.e., other circuits) are etched according to the design layout. Thus, the upper part of the metal material filling the deep trench directly contacts the other circuits, and the bottom directly contacts the substrate through the bottom of the deep trench.

[0075] Preferably, the metal material is in direct contact with the substrate at the bottom of the deep trench, and the filling depth of the metal material in the deep trench is not less than the bonding depth of the insulating layer and the sidewall of the deep trench.

[0076] In this embodiment, the method further includes: growing an epitaxial layer on the substrate, wherein the device region is located in the epitaxial layer; wherein a deep trench formed between the photoelectric conversion devices and / or between the photoelectric conversion devices and the power device penetrates the epitaxial layer and extends into the substrate.

[0077] Please refer to Figures 4A-4E The figure shows a schematic cross-sectional view of an exemplary intermediate stage (a) to (e) for forming a semiconductor structure.

[0078] Figure 4AThe diagram shows the cross-sectional structure of stage (a), which is the first dielectric layer deposition stage, including: substrate 410, epitaxial layer 420, first dielectric layer 430, photoelectric conversion device 440, and power device 460. This stage includes: depositing an isolation layer material of 9000 Å to 12000 Å on the surface using CVD (chemical vapor deposition) and PETOSE (plasma-enhanced tetraethoxysilane) deposition processes; adjusting the thickness of the isolation layer material to 3000 Å to 7000 Å using CMP processes, thus forming the first dielectric layer 430. A second dielectric layer 431 and a hard mask layer 432 can also be formed on the epitaxial layer 420, with the first dielectric layer 430 formed on the upper surface of the hard mask layer 432.

[0079] Figure 4B The cross-sectional structure of stage (b) is shown. Stage (b) involves fabricating a conductive structure 470 in the first dielectric layer, including: forming contact holes through photolithography and etching; filling the contact holes with metal (such as tungsten) using a PVD process; and removing excess metal (such as tungsten) from the surface using a CMP process. The contact holes penetrate the first dielectric layer and the second dielectric layer (if a second dielectric layer exists), corresponding to photoelectric conversion devices or power devices respectively.

[0080] Figure 4C The cross-sectional structure of stage (c) includes deep trench photolithography and etching, which includes: forming a photoresist of a certain thickness, approximately 3 to 5 micrometers, by spin coating on the surface; developing to open the visible area of ​​the deep trench and exposing at least part of the hard mask layer 432; etching the hard mask layer with a first mixed gas (C4F8 and O2); using the hard mask layer as an etching barrier layer and a second mixed gas (SF6 and O2) to perform deep trench etching to form the deep trench 4501.

[0081] Figure 4D The cross-sectional structure of stage (d) includes etching the bottom of the deep trench, which includes: cleaning the inside of the deep trench after etching, depositing a thin layer of oxide, a thin layer of nitride, or a multilayer thin layer of oxide and nitride on the inner surface of the deep trench using the HARP process, which is the isolation layer 4503 with a thickness of 2000 angstroms to 5000 angstroms; and then etching the bottom using an ET (Etch Tool) machine until it penetrates to a certain depth in the substrate. The greater the depth of penetration into the substrate, the better the suppression effect of dark current and signal interference.

[0082] Figure 4EThe cross-sectional structure of stage (e) includes the deposition of a metal layer, which includes: depositing a metal material (such as copper or aluminum) on the isolation layer through a PVD process, and filling the deep trench with the metal material 4502 to form a metal-filled deep trench isolation structure 450; and etching a metal pattern 480 according to the design layout through metal photolithography and etching processes to achieve device performance.

[0083] Therefore, this embodiment provides a semiconductor structure formation scheme with simplified process and lower cost.

[0084] Although this application discloses preferred embodiments as described above, it is not intended to limit this application. Any person skilled in the art can make possible changes and modifications without departing from the spirit and scope of this application. Therefore, the scope of protection of this application should be determined by the scope defined in the claims of this application.

Claims

1. A semiconductor structure, characterized in that, include: A substrate on which a plurality of photoelectric conversion devices and power devices are formed, wherein a first dielectric layer is covered on the photoelectric conversion devices; A deep trench isolation structure is provided between the photoelectric conversion devices and / or between the photoelectric conversion devices and the power device; the deep trench isolation structure penetrates the first dielectric layer and extends into the substrate; the deep trench isolation structure includes a deep trench, the interior of which is filled with a metal material, and an isolation layer is provided between the metal material and the inner wall of the deep trench. An opening is formed at the bottom of the isolation layer, and the metal material fills the opening and contacts the inner wall of the bottom of the deep trench; The upper part of the metal material in the deep trench is electrically connected to other circuits, so that the inner wall of the bottom of the deep trench is electrically connected to the other circuits through the metal material.

2. The semiconductor structure according to claim 1, characterized in that, The opening is formed in the bottom wall of the deep trench and exposes the entire bottom wall of the deep trench; or The opening is formed on the bottom wall of the deep trench, and the size of the opening is smaller than the bottom dimension of the deep trench.

3. The semiconductor structure according to claim 2, characterized in that, The metal material filling the opening and contacting the inner wall of the bottom of the deep trench includes: The opening extends into the inner wall of the bottom of the deep trench, forming a groove structure on the inner wall of the bottom of the deep trench, and the metal material is filled into the groove structure.

4. The semiconductor structure according to claim 1, characterized in that, The isolation layer is made of insulating material and has a single-layer or multi-layer structure.

5. The semiconductor structure according to claim 4, characterized in that, The isolation layer is specifically an oxide, a nitride, a combination of silicon oxide and silicon nitride, or other doped oxides.

6. The semiconductor structure according to claim 1, characterized in that, An epitaxial layer is also formed on the substrate. The plurality of photoelectric conversion devices and power devices are formed in an epitaxial layer on the substrate.

7. The semiconductor structure according to claim 6, characterized in that, The deep trench isolation structure extends through the epitaxial layer into the substrate.

8. The semiconductor structure according to claim 1, characterized in that, Shallow trenches are formed between the photoelectric conversion devices and / or between the photoelectric conversion devices and the power device, and the deep trench isolation structure is located in the middle of the shallow trenches.

9. A method for forming a semiconductor structure, characterized in that, include: A substrate is provided, wherein a device region is provided for forming a plurality of photoelectric conversion devices and power devices, and a first dielectric layer is provided covering the device region; A deep trench is formed between the photoelectric conversion devices and / or between the photoelectric conversion devices and the power device; the deep trench penetrates the first dielectric layer and extends into the substrate; An isolation layer is formed on the inner wall of the deep trench; An opening is formed at the bottom of the isolation layer, exposing the bottom wall of the deep trench; The deep trench is filled with metal material, such that the metal material fills the opening and contacts the inner wall of the bottom of the deep trench; The upper part of the metal material is electrically connected to other circuits, so that the inner wall of the bottom of the deep trench is electrically connected to the other circuits through the metal material.

10. The method for forming a semiconductor structure according to claim 9, characterized in that, The process of forming an isolation layer on the inner wall of the deep trench includes: The isolation layer is formed by depositing a single or multiple layers of isolation material on the plane portion and inner wall of the deep trench.

11. The method for forming a semiconductor structure according to claim 9, characterized in that, An opening is formed at the bottom of the isolation layer, exposing the bottom wall of the deep trench, including: The opening is formed by etching within the pattern-defined area of ​​the opening, exposing at least a portion of the bottom wall of the deep trench.

12. The method for forming a semiconductor structure according to claim 11, characterized in that, Furthermore, it also includes: The opening is etched downwards to form a groove structure on the inner wall of the bottom wall of the deep trench; or... Etching is performed at the opening toward at least one sidewall of the deep trench, such that the bottom width of the deep trench is greater than the width of the opening.

13. The method for forming a semiconductor structure according to claim 9, characterized in that, The formation of deep trenches between the photoelectric conversion devices and / or between the photoelectric conversion devices and the power device includes: The deep trenches are formed using a two-step deep trench etching process in the deep trench etching region; wherein... The first step of the deep trench etching process includes: etching with a first etching angle ranging from 85° to 90° until the initial trench structure is formed; the etching angle is the angle between the etching direction and the etching surface. The second step, deep trench etching process, includes: after forming the initial trench structure, etching is performed using a second etching angle with an etching angle range of 5° to 20° to form a deep trench that penetrates to the substrate at the bottom.

14. The method for forming a semiconductor structure according to claim 9, characterized in that, After or simultaneously filling the deep trench with metal material, a metal layer for etching out metal patterns is deposited on the surface of the first dielectric layer.

15. The method for forming a semiconductor structure according to claim 14, characterized in that, While filling the deep trench with metal material, a metal layer for etching the metal pattern is deposited on the surface of the first dielectric layer, including: A metal material is deposited on the surface of the first dielectric layer to form a metal layer for etching out metal patterns. At the same time, the metal material is deposited inside the isolation layer, fills the opening, and contacts the inner wall of the bottom of the deep trench.

16. The method for forming a semiconductor structure according to claim 9, characterized in that, The process includes, prior to the formation of the deep trench or before filling the deep trench with metal material: Contact holes corresponding to the plurality of photoelectric conversion devices and contact holes corresponding to the power devices are simultaneously or sequentially etched in the first dielectric layer. A first metal is deposited in the contact hole, and excess first metal on the surface is removed. The upper side of the first metal in one contact hole is flush with the surface of the first dielectric layer, and the other side contacts the plurality of photoelectric conversion devices or the power devices corresponding to the contact hole.

17. The method for forming a semiconductor structure according to claim 9, characterized in that, The thickness of the isolation layer ranges from 1,000 angstroms to 6,000 angstroms.

18. The method for forming a semiconductor structure according to claim 9, characterized in that, Also includes: An epitaxial layer is grown on the substrate, and the device region is located in the epitaxial layer; wherein a deep trench formed between the photoelectric conversion devices and / or between the photoelectric conversion devices and the power device penetrates the epitaxial layer and extends into the substrate.

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