Transmission / reception device of user station and method for communication using differential

Abstract

A transmitting / receiving apparatus of a subscriber station and a method of communicating using a differential signal. The transmitting / receiving device has: a transmitting module for transmitting a digital transmission signal as an analog differential signal onto a bus of a bus system in order to transmit a message to a further subscriber station; a receiving module for receiving a signal from the bus and for generating a digital receive signal from the analog differential signal; and at least one determination module for determining which of the at least two communication standards to communicate on the bus in order to switch the transmitting module and the receiving module in accordance with the determined communication standard on the bus, the transmitting module having a full bridge in which the first and fourth transmitting stages are connected in series and the third and second transmitting stages are connected in series, the transmitting module (121) is designed to adjust the resistance values of the resistors of the first to fourth transmitting stages on the basis of the determination result of the at least one determination module, and to generate an analog differential signal using the first to fourth transmitting stages thus adjusted.

Description

Technical Field

[0001] The present invention relates to a transmitting / receiving device for a user station in a serial bus system and a method for communicating using differential signals in a serial bus system. Background Technology

[0002] A serial bus system has a bus to which user stations connect via a transmitting / receiving device to communicate with each other. This transmitting / receiving device is also called a transceiver. During communication, data is exchanged between user stations, such as sensors and control devices in vehicles or technical production systems. Various standards or data transmission protocols exist for data transmission in serial bus systems. For serial bus systems using differential signaling, particularly known protocols include CAN XL, 10BASE-T1S Ethernet, FlexRay, and LVDS (Low Voltage Differential Signaling).

[0003] Each of these serial bus systems uses differential signals with different signal states, which transmit the data to be exchanged serially.

[0004] It is possible that one part of the technical system uses a different communication standard than another part of the same system. For example, a CAN bus system should be used for communication in the vehicle's emergency braking system, while a 10BASE-T1S bus system should be used for communication in the windshield wiper system.

[0005] The problem is that communication in a CAN bus system is incompatible with communication in a 10BASE-T1S bus system. For example, if at least one control device needs to be replaced due to a defect, it is not always possible to find a control device that supports the communication standards of the bus system to which the replaced control device was previously connected.

[0006] In addition, the parts of this technology system that communicate using different communication standards require data from certain vehicle devices, such as rain sensors or warning signal generators.

[0007] To solve this problem, two devices may be used, in particular two rain sensors and / or warning signal generators, one of which is connected to the CAN bus system and the other to the 10BASE-T1S bus system.

[0008] Alternatively, such a device may have: a communication device designed for communication in a CAN bus system; and a communication device designed for communication in a 10BASE-T1S bus system.

[0009] However, this requires significantly more equipment compared to a technical system that communicates using only one communication standard. Consequently, the technical system requires more space and becomes more expensive to manufacture and maintain. Summary of the Invention

[0010] Therefore, the objective of this invention is to provide a transmitting / receiving apparatus for a user station in a serial bus system and a method for communicating using differential signals in a serial bus system, which solves the aforementioned problems. In particular, it is intended to provide a transmitting / receiving apparatus for a user station in a serial bus system and a method for communicating using differential signals in a serial bus system, which solves the compatibility problem between different communication standards in the technical system.

[0011] This task is solved by a transmitting / receiving device for a user station in a serial bus system having the features of claim 1. The transmitting / receiving device comprises: a transmitting module for transmitting a digital transmitting signal as an analog differential signal onto the bus of the bus system to send a message to at least one other user station in the bus system; a receiving module for receiving signals from the bus and for generating a digital receiving signal from the analog differential signal; and at least one determining module for determining which of at least two communication standards to use for communication on the bus, so as to switch the transmitting module and the receiving module according to the determined communication standard on the bus, wherein the transmitting module has a full bridge, wherein the first and fourth transmitter stages are connected in series, and the third and second transmitter stages are connected in series, and wherein the transmitting module is designed to: adjust the resistance values ​​of the resistors of the first to fourth transmitter stages based on the determination result of the at least one determining module, and generate an analog differential signal using the adjusted first to fourth transmitter stages.

[0012] The described transmitting / receiving device can be identified using a dedicated module and digital transmission signals: which of at least two different communication standards the transmitting / receiving device follows, and then the resistance of the full-bridge of the transmitting module can be adjusted accordingly to communicate on the bus according to the identified communication standard. These at least two different communication standards specifically include, in particular, the standard for 10BASE-T1S and / or the standard for CAN, especially CAN-XL.

[0013] Advantageously, the described transmitting / receiving device can be designed such that: no additional connection or non-standard inputs are required to identify the communication standard used on the bus, not the communication control device, especially the controller of the communication control device.

[0014] Therefore, the described transmitting / receiving device can automatically identify which communication standard the connected communication control device uses and adjust the transmitting module accordingly. Thus, with the connection between the described transmitting / receiving device and the bus remaining unchanged, there is a high degree of flexibility in selecting the communication standard of the bus system and, consequently, the communication control device.

[0015] An additional advantage is that the circuitry of the described transmitting / receiving device, such as the power supply, can be used with two different communication standards. Therefore, the described transmitting / receiving device can save semiconductor area. This optimizes the space requirements of the transmitting / receiving device and the bus system. As a result, the described transmitting / receiving device is extremely resource-efficient and inexpensive.

[0016] Due to the design of the described transmitting / receiving device, the workload of adapting the communication control device to the transmitting / receiving device is very small. For the transmitting / receiving device, it is only necessary to adapt the wiring of the bus line connection terminals (pins) to the communication control device being used.

[0017] Furthermore, due to the design of the described transmitting / receiving device, it is still possible to achieve reliable communication with a very low bit error rate for at least two different differential bus systems simply and at low cost.

[0018] Therefore, the described transmitting / receiving device enables relatively simple communication standard conversion for existing wiring. This is because the described transmitting / receiving device can be used on bus systems communicating with different communication standards with minimal configuration effort. Furthermore, if necessary, existing equipment in the technical system can be flexibly connected to different bus systems to communicate with different communication standards.

[0019] The described transmitting / receiving device is designed to be adjusted to a CANSIC transmitting / receiving device and / or a CAN XL transmitting / receiving device and / or a 10BASE-T1S transmitting / receiving device, depending on the connected communication control device. More specifically, it can be adjusted for either 10BASE-T1S multidrop mode or 10BASE-T1S singledrop mode. Furthermore, it can be adjusted for, for example, a 3.3V or 5.0V bus power supply. When only two user stations are connected on bus 40, i.e., when there is a point-to-point connection between these user stations, the 10BASE-T1S operates in singledrop mode. When more than two user stations are connected on bus 40, the 10BASE-T1S operates in multidrop mode.

[0020] Overall, the described transmitting / receiving device not only enables communication between other user stations in a bus system at the (high) bit rate required for the corresponding communication standard, but is also designed so that the transmittable bit rate is not reduced due to errors in communication.

[0021] The described transmitting / receiving devices are particularly suitable for gateway products. Such gateway products typically include a power supply block and multiple interfaces. For example, the power supply U_bat is regulated to 5V to operate multiple CAN transmitting / receiving devices (CAN transceivers) and / or LIN transceivers. Such a gateway can contain multiple identical, previously described transmitting / receiving devices, which can then be controlled by a Tier 1 controller to operate as transmitting / receiving devices for CAN-XL (CAN-SIC) or 10BASE-T1S.

[0022] Other advantageous designs of the transmitting / receiving device are described in the dependent claims.

[0023] The aforementioned transmitting / receiving device may also have a control unit for manipulating the first to fourth transmitting stages, wherein the resistors of the first to fourth transmitting stages are each formed by a parallel circuit of up to N switchable resistors, wherein each switchable resistor is connected in series with a switch, wherein N is a natural number greater than 1, wherein the control unit is designed to progressively manipulate these switches based on the transmitted signal so as to switch the state on the bus based on the state transition of the transmitted signal, and wherein progressively manipulating these switches includes delaying the on or off of the switches, wherein at least two switches of one of the first to fourth transmitting stages are switched together in one step.

[0024] The aforementioned transmitting / receiving device may further include: a first connection terminal for receiving a transmitted signal from a communication control device; and a second connection terminal for outputting a digital received signal to the communication control device, wherein the at least one determining module has a COM-IF detection module and is designed to determine whether the digital transmitted signal at the first connection terminal has at least one predetermined characteristic of one of two communication standards, for which the transmitting module and the receiving module are designed to communicate in a serial bus system, and wherein the transmitting / receiving device is designed to switch the second connection terminal as an output terminal or as an input terminal based on the determination result of the COM-IF detection module.

[0025] The aforementioned transmitting / receiving device may also have a third connection terminal for adjusting one of two predetermined voltage levels, wherein the COM-IF detection module is further designed to determine whether a digital transmission signal at the first connection terminal is combined with one of the two predetermined voltage levels at the third connection terminal. In this case, the at least one determining module, attached to or replacing the COM-IF detection module, may have a COM-IF determining module that, if the transmitting / receiving device is switched to an operating mode in which it can actively perform communication through at least one of the first to third connection terminals, evaluates whether the third connection terminal is switched to an output terminal or an input terminal.

[0026] It can be envisioned that the at least one determining module has a detection module designed to detect the resistance value of the resistor at the end of the bus and the voltage value of the supply voltage present on the transmitting / receiving device for voltage supply.

[0027] The aforementioned transmitting / receiving device may also have an operating mode selection module for selecting the operating mode of the transmitting module and / or the receiving module based on the output of the at least one determining module.

[0028] The operating mode selection module may be designed to evaluate the transmit signal at the first connection terminal and the voltage level at the third connection terminal in order to select the operating mode of the transmit module and / or the receive module.

[0029] The COM-IF detection module may be designed to further evaluate the transmitted signal regarding at least one predetermined characteristic after transferring the detection result to the operation mode selection module.

[0030] In one design, the sending module is designed to generate analog differential signals at a different physical layer than in the second communication stage, during the first communication phase of a message, in one of the two communication standards.

[0031] It can be envisioned that the at least two communication standards include CAN XL and 10BASE-T1S, wherein the 10BASE-T1S communication standard is at least one of the following communication standards: 10BASE-T1S multi-point mode with a power supply voltage of 5 V, 10BASE-T1S multi-point mode with a power supply voltage of 3.3V, and 10BASE-T1S single-point mode with a power supply voltage of 5 V.

[0032] The aforementioned transmitting / receiving device may be part of a user station in a serial bus system. The user station also has a communication control device for controlling communication in the bus system and for generating transmission signals. The user station is designed for communication in the bus system, where at least temporarily, exclusive and conflict-free access to the bus of the bus system is guaranteed for the user station.

[0033] At least two of the aforementioned transmitting / receiving devices may be part of a gateway for forwarding messages between at least a first bus system and a second bus system, wherein one of the at least two transmitting / receiving devices of the gateway is connected to the first bus system, and the other of the at least two transmitting / receiving devices is connected to the second bus system.

[0034] The aforementioned task is also solved by a method for communication using differential signals in a serial bus system, having the features of claim 14. The method is performed using a transmitting / receiving device for a user station in the bus system, the transmitting / receiving device having a transmitting module, a receiving module, and at least one determining module, wherein the transmitting module is designed to transmit digital transmitting signals as analog differential signals onto the bus of the bus system to send messages to at least one other user station in the bus system; wherein the transmitting module has a full bridge, wherein a first transmitting stage and a fourth transmitting stage are connected in series, and a third transmitting stage and a second transmitting stage are connected in series, and wherein the method includes the steps of: using the at least one determining module to determine which of at least two communication standards will be used for communication on the bus; in the transmitting module, adjusting the resistance values ​​of the resistors of the first to fourth transmitting stages based on the determination result of the at least one determining module; and adjusting the receiving module according to the determined communication standard on the bus.

[0035] This method offers the same advantages as those previously mentioned regarding the transmitting / receiving device.

[0036] Other advantageous designs of the method are described in the dependent claims.

[0037] The above method may also include: a transmitting step: using a transmitting module, transmitting the transmitting signal as an analog differential signal onto the bus using resistors of the first to fourth transmitting stages, the resistance values ​​of which are adjusted in the adjustment step; and / or a receiving step: using a receiving module, receiving the analog differential signal from the bus for outputting a digital received signal to the communication control device, the digital received signal being generated according to the communication standard adjusted at the receiving module.

[0038] Furthermore, in the method for communicating using differential signals in a serial bus system, the described transmitting / receiving device also performs a method for adjusting the transmitting / receiving device to one of two communication standards to communicate using differential signals in the serial bus system.

[0039] Other possible implementations of the invention include combinations of features or implementations not explicitly mentioned in the preceding or hereinafter described with reference to embodiments. Those skilled in the art will also consider individual aspects as improvements or supplements to the corresponding basic form of the invention. Attached Figure Description

[0040] The present invention will then be described in more detail with reference to the accompanying drawings and embodiments. Wherein: Figure 1 A simplified block diagram of a gateway having a bus system according to the first embodiment is shown; Figure 2 A schematic diagram is shown to illustrate the frame structure for explaining messages that can be sent by a user station of the bus system according to the first embodiment; Figure 3 It shows Figure 1 A block diagram of the transmitting / receiving device of the user station in a bus system; Figure 4 It shows when Figure 3 The transmitting / receiving device is adapted for use on the bus according to the first communication standard. Figure 2 The block diagram of the transmitting / receiving device when the frame is a differential signal; Figure 5 It shows when Figure 3 A block diagram of the transmitting / receiving device when it is adapted for differential signals on a bus for a second communication standard; Figures 6 to 9 It shows the transmission / reception device in Figure 4 Under the configuration for Figure 2 An example of the process of frame reception or signal generation on the bus changing over time; Figure 10 It shows the transmission / reception device in Figure 4Another example of the time-varying process of signals (TxD or RxD) received or generated on the bus during the arbitration phase (SIC operating mode) under the configuration; Figure 11 The diagram illustrates the time-varying process of bus signals CAN_H and CAN_L, which are based on... Figure 10 The transmitted signal is provided by Figure 4 The transmitting / receiving device sends data onto the bus; Figures 12 to 15 It shows the transmission / reception device in Figure 5 An example of how signals received or generated on the bus change over time under a given configuration; Figure 16 The diagram illustrates the time-varying process of the reset signal, which is generated by the transmitting / receiving device. Figure 5 Receive under the configuration; Figure 17 A circuit diagram of a transmitting module of a transmitting / receiving device is shown, which can be used in a user station of a bus system according to a first embodiment; Figure 18 It shows the explanation Figure 17 A graph showing the calculation of the H-bridge resistance of the transmitting module; Figure 19 It shows Figure 17 A block diagram of the control components of the transmitting module; Figure 20 It shows that it is available Figure 17 The time-varying process of the signal state transition generated by the transmitting module; and Figure 21 It shows Figure 19 A portion of the logic block of the control unit and used for Figure 17 The circuit diagram of the resistor array of the transmitter stage of the transmitting module.

[0041] In these accompanying drawings, unless otherwise stated, the same or functionally equivalent elements are given the same reference numerals. Detailed Implementation

[0042] Figure 1 A first bus system 1 and a second bus system 1A are shown, which are connected to each other via a gateway 5. However, the gateway 5 can be connected to more than two bus systems 1 and 1A, even though this is not shown in the figures.

[0043] The first bus system 1 can be, for example, at least partially compliant with the ISO 11898-1:2024 international standard CAN bus system, such as the classic CAN bus system, CAN-FD bus system, CAN-XL bus system, etc. The second bus system 1A can be, for example, at least partially compliant with the IEEE 802.3cg™ international standard 10BASE-T1S bus system. However, bus systems 1 and 1A are not limited to these. In particular, these bus systems 1 and 1A can be designed to operate according to the same communication standard. Bus systems 1 and 1A can be used in vehicles, especially motor vehicles, aircraft, etc., or in hospitals, etc.

[0044] Although bus systems 1 and 1A are subsequently described in reference to CAN bus systems and 10BASE-T1S bus systems, bus systems 1 and 1A are by no means limited thereto. Alternatively, at least one of bus systems 1 and 1A can be other serial bus systems 1, which in particular use differential signaling.

[0045] exist Figure 1 In the CAN bus system 1, there are multiple user stations 10, 20, and 30. These user stations, like the gateway 5, are connected to bus 40 or bus lines, which have a first bus core line 41 and a second bus core line 42. In the CAN bus system, bus core lines 41 and 42 can also be called CANH and CANL, and are used to guide the CAN_H and CAN_L signals on bus 40. Bus core lines 41 and 42 together form the bus lines of bus 40.

[0046] exist Figure 1 In the example, bus system 1A has a user station 50, which, like gateway 5, is connected to bus 40A or a bus line having a first bus core line 41A and a second bus core line 42A. In 10BASE-T1S bus system 1A, bus core lines 41A and 42B are referred to as LINE+ and LINE-. Bus core lines 41A and 42B together form the bus line of bus 40A. The maximum net data transfer rate in 10BASE-T1S bus system 1A is 10 megabits per second.

[0047] Messages 45, 46, and 47 can be transmitted as signals between user stations 10, 20, and 30 and gateway 5 via the first bus 40. Message 48 can be transmitted as a signal between user station 50 and gateway 5 via the second bus 40A. Gateway 5 can forward messages 45, 46, and 47 to bus 40A by converting them to the required communication standards, and / or forward message 48 to bus 40. User stations 10, 20, 30, and 50 are, for example, control devices or display devices of a motor vehicle.

[0048] like Figure 1 As shown, user stations 10 and 30 each have a communication control device 11 and a transmitting / receiving device 12. The transmitting / receiving device 12 has a transmitting module 121 and a receiving module 122.

[0049] User station 20 has a communication control device 21 and a transmitting / receiving device 22. The transmitting / receiving device 22 has a transmitting module 221 and a receiving module 222.

[0050] User station 50 has a communication control device 11A and a transmitting / receiving device 12. The transmitting / receiving device 12 also has a transmitting module 121 and a receiving module 122, even when... Figure 1 This is not shown in the text.

[0051] The transmitting / receiving devices 12 of user stations 10 and 30 and the transmitting / receiving device 22 of user station 20 are directly connected to bus 40, even though this is... Figure 1 Not shown in the diagram. The same applies to the transmitting / receiving device 12 of user station 50 associated with bus 40A.

[0052] Communication control devices 11 and 21 are respectively used to control communication between corresponding user stations 10, 20, and 30 and at least one other user station among user stations 10, 20, and 30 connected to the bus 40. The same applies to the communication control device 11A of user station 50 associated with the bus 40A.

[0053] Communication control unit 11 creates and reads first messages 45, 47, which are, for example, modified CAN messages 45, 47. In this case, the modified CAN messages 45, 47 are constructed, for example, based on the CAN XL format. Transmit / receive unit 12 is used to transmit messages 45, 47 and receive these messages from bus 40. Transmit module 121 receives a digital transmit signal TxD created by communication control unit 11 for one of messages 45, 47, and converts the digital transmit signal into a signal on bus 40. The digital transmit signal TxD may be at least temporarily or partially a pulse width modulation signal. Receive module 122 receives the signal corresponding to messages 45 to 47 transmitted on bus 40 and generates a digital receive signal RxD from it. Receive module 122 sends the receive signal RxD to communication control unit 11.

[0054] Additionally, the communication control device 11 can be designed to create and read second messages 46, such as CAN FD messages 46. The transmitting / receiving device 12 can be designed accordingly.

[0055] Communication control device 11A regarding Figure 5 To describe in more detail.

[0056] Figure 1 The communication control unit 21 can be implemented like a conventional CAN controller according to ISO 11898-1:2015, that is, like a Classical CAN controller or a CAN FD controller that tolerates CAN FD. The communication control unit 21 creates and reads second messages 46, such as CAN FD messages or Classical CAN messages. The transmitting / receiving unit 22 is used to transmit messages 46 and receive these messages from the bus 40. The transmitting module 221 receives the digital transmit signal TxD created by the communication control unit 21 and converts it into a signal for message 46 on the bus 40. The receiving module 222 receives signals corresponding to messages 45 to 47 transmitted on the bus 40 and generates a digital receive signal RxD from them. The transmitting / receiving unit 22 can be implemented like a conventional CAN FD transceiver or a CAN SIC transceiver.

[0057] To transmit messages 45, 46, and 47 onto bus 40 via CAN SIC or CAN XL, proven characteristics are employed, particularly a frame structure with identification codes and arbitration based on the well-known CSMA / CR method. These characteristics are responsible for the robustness and user-friendliness of CAN and CAN FD. The CSMA / CR method necessitates the existence of so-called recessive states on bus 40, which can be overridden by dominant levels or states on bus 40 from other user stations 10, 20, and 30.

[0058] Using these two user stations 10 and 30, it is possible to generate and transmit messages 45 and 47 in various CAN formats, especially Classical CAN, CAN FD, or CAN XL, as well as to receive such messages 45 and 47. This is described in more detail below with respect to message 45.

[0059] If there is no communication on bus 40, at least one of user stations 10, 20, and 30, especially their communication control devices 11 and 21, can be put into sleep mode. This saves energy.

[0060] In CAN XL, user stations 10 and 30, in particular, switch their transmitting / receiving devices 12 to operating modes SLOW or SIC to participate in communication on bus 40. In operating modes SLOW or SIC, user stations 10 and 30 can... Figure 2 The arbitration phase 451 (first communication phase) of the frame participates in the arbitration between user stations 10, 20, and 30 of bus system 1.

[0061] Figure 2 Frame 450 is shown for message 45. This frame is specifically a CAN XL frame, provided by communication control device 11 to transmitting / receiving device 12 for transmission onto bus 40. In this case, communication control device 11 creates frame 450 in the current embodiment to be compatible with CAN FD. Alternatively, frame 450 is compatible with any subsequent standard of CAN FD. Frame 450 has a maximum duration T_450, which corresponds to a predetermined maximum frame length of frame 450.

[0062] according to Figure 2 Frame 450 is divided into different communication phases 451 and 452 for CAN communication on bus 40, namely arbitration phase 451 (first communication phase) and data phase 452 (second communication phase). After the start bit SOF, frame 450 has an arbitration field 453, a control field 454, a first switching field 455, a data field 456, a checksum field 457, a second switching field 458, and a frame end field 459. The checksum field 457, the second switching field 458, and the frame end field 459 form the frame end phases 457, 458, and 459 of frame 450.

[0063] During arbitration phase 451, user stations 10, 20, and 30 negotiate bit-by-bit using the identifier (ID) in arbitration field 453: which user station 10, 20, or 30 wants to send the highest priority messages 45 and 46 and thus obtain exclusive access to bus 40 of bus system 1 for transmission in the next data phase 452. During arbitration phase 451, a physical layer similar to that used in CAN, CAN FD, or CAN SIC is employed. The physical layer corresponds to the bit transport layer or Layer 1 of the well-known OSI model (Open Systems Interconnection Model 1).

[0064] During phase 451, the well-known CSMA / CR method is used, which allows user stations 10, 20, and 30 to simultaneously access bus 40 without disrupting higher-priority messages 45 and 46. This allows for the relatively simple addition of other bus user stations 10, 20, and 30 to bus system 1, which is highly advantageous.

[0065] This CSMA / CR method results in the existence of so-called recessive states on bus 40, which can be overridden by dominant levels or states on bus 40 from other user stations 10, 20, and 30. In the recessive state, high impedance conditions exist at each user station 10, 20, and 30, which, combined with parasites in the bus wiring, leads to a longer time constant. This limits the maximum bit rate of the current CAN-FD physical layer to approximately 2 megabits per second in real-world vehicle applications.

[0066] At the end of arbitration phase 451, the system switches to the operating mode of data phase 452 by means of the first switching field 455. For CAN-XL, user stations 10, 30, and especially their transmitting / receiving devices 12, which are the senders of frame 450 and therefore win arbitration, switch to operating mode FAST_TX in data phase 452. However, for CAN XL, user stations 10, 30, and especially their transmitting / receiving devices 12, which are the receivers of frame 450 and therefore lose arbitration, switch to operating mode FAST_RX in data phase.

[0067] In data phase 452, in addition to a portion of the first switching field 455, valid data from the data field 456 of the CAN-XL frame 450 or message 45, as well as a portion of the checksum field 457 and the second switching field 458, are transmitted. At the end of data phase 452, the system switches back to arbitration phase 451 by means of the second switching field 458.

[0068] When user station 10, as the sender, wins the arbitration and thereby exclusively accesses bus 40 of bus system 1 for transmission, the sender of message 45 begins to send the bits of data stage 452 onto bus 40.

[0069] Therefore, user stations 10 and 30, in the arbitration phase 451, which is the first communication phase, partially, and especially up to the FDF bit (inclusive), use the format known from CAN / CAN-FD according to ISO 11898-1:2015. However, compared to CAN or CAN FD, in the data phase 452, which is the second communication phase, the net data transfer rate can be increased to over 10 megabits per second, especially 20 Mbit / s. Furthermore, the size of the effective data per frame can be increased, especially to approximately 2 kilobytes (kbytes) or any other value.

[0070] Figure 3 The transmitting / receiving device 12, which can be used in one of the user stations 10 and 30, is shown in more detail. The transmitting / receiving device 12 has: [Further details on the device's features and functions]. Figure 6 or Figure 10or Figure 12 The transmitted signal or Figure 16 The reset signal connection terminal TXD / TX is used for... Figure 9 or Figure 15 The transmitter / receiver 12 has the following connection terminals: RXD / RX for receiving signals; STB / ED for status signals, in particular; CANH / LINE+ for signals CAN_H or LINE+; and CANL / LINE- for signals CAN_L or LINE-. Additionally, the transmitter / receiver 12 has connection terminals for power supply VCC, ground (GND), and VIO for optional additional power supplies for connection terminals TXD / TX, RXD / RX, and STB / ED. However, the number of connection terminals of the transmitter / receiver 12 is not limited to the aforementioned eight. Instead, the number of connection terminals can be selected as needed.

[0071] The transmitting / receiving device 12 also includes a transmitting module 121, a receiving module 122, and an operating mode selection module 123. Furthermore, Figure 3 The transmitting / receiving device 12 has a communication interface detection module 124 and / or a communication interface determination module 125 and a communication interface detection module 16. Each of these modules 124, 125, 16 is a determination module for determining, in particular by detection, evaluation or measurement, which communication standard (especially CAN or 10BASE-T1S) is used for communication on bus 40 or 40A and / or which communication standard (especially CAN or 10BASE-T1S) is to be used for communication.

[0072] The communication interface detection module 124 is hereinafter referred to as the COM-IF detection module 124. The communication interface determination module 125 may also be referred to as the COM-IF determination module 125. As described below, the detection module 124 detects: which communication standard (especially CAN or 10BASE-T1S) is being used on bus 40 or 40A and / or which communication standard (especially CAN or 10BASE-T1S) is being used to communicate.

[0073] The COM-IF detection module 124 includes a check module 1241 for checking the status of signals at the connection terminals TXD / TX, STB / ED and / or the corresponding connection terminals TXD / TX, STB / ED. Furthermore, the COM-IF detection module 124 includes a decision block 1242 for determining which communication control devices 11, 11A are connected to the transmitting / receiving device 12. Therefore, the COM-IF detection module 124 performs an evaluation of the status (especially voltage level or resistance value) of signals at the connection terminals TXD / TX, STB / ED and / or the corresponding connection terminals TXD / TX, STB / ED. This will be described in more detail later.

[0074] Figure 3 The transmitting module 121 is designed as a full-bridge with four transmitting stages, as will be discussed later. Figures 17 to 20 As described in more detail, the transmitting module 121 has an internal resistance 1211.

[0075] Transmitting / receiving device 22 can be constructed in the same manner as transmitting / receiving device 12. Therefore, transmitting / receiving device 22 will not be described separately.

[0076] exist Figure 3 In the transmitting / receiving device 12, a voltage supply is provided via at least one connection terminal VCC to supply power to the first and second bus cores 41, 42. Specifically, a voltage of 5 V or 3.3 V, or any other desired voltage for voltage supply, can be connected to the connection terminal VCC. Connection to ground, particularly CAN_GND, is achieved via the connection terminal GND.

[0077] The communication interface detection module 16 is designed to: determine, in particular detect and / or evaluate Figure 1 Electrical characteristics of bus system 1 and / or bus system 1A. Figure 3 Module 16, especially the detection bus 40 or 40A connected according to Figure 4 or Figure 5 The resistance value of resistor 49. Furthermore, module 16 can detect the voltage value of the supply voltage present on the connection terminal VCC provided for voltage supply in the transmitting / receiving device 12. For simplicity of illustration, in Figure 3 The specific wiring configuration of the communication interface detection module 16 is not shown. The communication interface detection module 16 outputs its determination results, especially the detection results, to the operating mode selection module 123. Therefore, the detection module 16 detects which communication standard, CAN or 10BASE-T1S, is being used on bus 40 or 40A. The COM-IF detection module 124 outputs its determination results, especially the detection results and / or evaluation results, to the operating mode selection module 123.

[0078] Although two communication interface detection modules 124, 16 are present in the current embodiment, this is not absolutely necessary. Depending on the situation on buses 40, 40A, for example, if there are always more than two user stations 10, 20, 30, 50 connected to buses 40, 40A and / or it is clear which power supply voltage VCC is used for the transmitting / receiving device 12, the communication interface detection module 16 may be omitted.

[0079] like Figure 3 As shown, the transmitter / receiver 12 with connection terminals CANH / LINE+ and CANL / LINE- can be connected to bus 40, more specifically, to the first bus core 41 for CAN_H or CAN-XL_H or LINE+ and the second bus core 42 for CAN_L or CAN-XL_L or LINE-. More specifically, the transmitter module 121 connects its output terminal to the connection terminals CANH / LINE+ and CANL / LINE-. Furthermore, the receiver module 122 connects its input terminal to the connection terminals CANH / LINE+ and CANL / LINE-.

[0080] Figure 3 The transmitting module 121 connects its input terminal to the connection terminal TXD / TX for transmitting data from... Figure 1 The communication control device 11 receives the communication control device 11 Figure 6 or Figure 10 The transmitted signal TxD shown in the figure, or used to receive signals in... Figure 12 or Figure 16 The transmission signal Tx is shown in the figure. In addition, the transmission module 121 is connected to the output of the operation mode selection module 123 via its input terminal, and outputs the operation mode selection signal B_SW at the output terminal, which carries information for selecting the operation mode to be switched.

[0081] also, Figure 3 The receiving module 122 connects its input terminal to the output terminal of the operating mode selection module 123, at which it outputs an operating mode switching signal B_SW. The first output terminal of the receiving module 122 is connected to the connection terminal RXD / RX, used to... Figure 9 The received signal RxD shown in the figure is output to Figure 1 The communication control device 11, or for outputting the received signal Rx, such as Figure 15 As shown in the diagram, the second output of the receiving module 122 is connected to the connection terminal STB / ED.

[0082] Figure 3 The operating mode selection module 123 is connected to the connection terminal TXD / TX via the first input connection terminal for receiving and transmitting signals TxD or Tx, as described above. Furthermore, Figure 3The operating mode selection module 123 is connected to the output of the COM-IF detection module 124 via a second input connection terminal. Furthermore, Figure 3 The operating mode selection module 123 is connected to the STB / ED connector via a third input connector. Furthermore, Figure 3 The operating mode selection module 123 is connected to the output of the detection module 16 via a fourth input connection terminal. The output connection terminal of the operating mode selection module 123 is connected to the transmitting module 121 and the receiving module 122, as described above.

[0083] Figure 3 The COM-IF detection module 124 is connected to the connection terminal TXD / TX via its first input connection terminal to receive the transmitted signal TxD or Tx, as described above. Furthermore, Figure 3 The COM-IF detection module 124 is connected to the connection terminal STB / ED via its second input connection terminal.

[0084] Therefore, the COM-IF detection module 124 evaluates the inputs at the TXD / TX and STB / ED terminals to determine whether the transmitting / receiving device 12 is connected to the communication control device 11 (CAN-XL controller) or to... Figure 5 The communication control device 11A (10BASE-T1S controller) is connected. The COM-IF detection module 124 outputs its evaluation results to the operation mode selection module 123.

[0085] The COM-IF detection module 124 can be a digital component, particularly a time-discrete system. The COM-IF detection module 124 can operate at a predetermined frequency suitable for checking the signal at the TXD / TX connection. Specifically, this frequency is higher than 400 MHz.

[0086] If the COM-IF detection module 124 exists, then Figure 3 The operating mode selection module 123 is designed to determine the current operating mode based on the input at the connection terminal TXD / TX and the output of module 124, i.e., for example, SLEEP, SLOW or SIC, FAST_TX, FAST_RX in the case of CAN XL, or LOW_POWER, NORMAL, TRANSMITTING, CONFIG in the case of 10BASE-T1S.

[0087] Additionally or alternatively, if a COM-IF determining module 125 exists, then Figure 3The operating mode selection module 123 is designed to select and / or determine the current operating mode based on the output of module 125, i.e., for example, SLEEP, SLOW or SIC, FAST_TX, FAST_RX in the case of CAN XL, or LOW_POWER, NORMAL, TRANSMITTING, CONFIG in the case of 10BASE-T1S.

[0088] The COM-IF determination module 125 is designed to evaluate the status of the connection end STB / ED if the transmitting / receiving device 12 is in an active state, i.e., the transmitting / receiving device 12 has not switched to an inactive state. For example, for CAN XL, the active state is operating mode SLOW or SIC, FAST_TX, FAST_RX, and for 10BASE-T1S, the active state is operating mode NORMAL, TRANSMITTING, CONFIG.

[0089] If the COM-IF determination module 125 identifies that the connection end STB / ED has been pulled to state LW (LOW = low) from the outside without prior state processing regarding the 10BASE-T1S operating mode CONFIG, then the transmitting / receiving device 12 will operate according to the CAN standard, especially the CAN-XL guidelines (CiA610-3), and will either enter the active state of CAN, especially CAN-XL, or remain in the active state. This is because, based on this state at the connection end STB / ED, it is evident that the transmitting / receiving device 12 is connected to the communication control device 11, especially the CAN or CAN-XL controller.

[0090] If the COM-IF determination module 125 identifies that the connection end STB / ED has been pulled to state LW (LOW = low) from the outside, having previously undergone state processing for the 10BASE-T1S operating mode CONFIG, then the transmitting / receiving device 12 will operate according to the 10BASE-T1S standard for functionality according to Open Alliance TC14 and will enter the active state of operating mode CONFIG. Regarding Figure 5 It also describes the operation according to the 10BASE-T1S standard in more detail.

[0091] For example, Figure 3The COM-IF determination module 125 can be designed as analog hardware to distinguish between two communication standards: CAN (especially CAN XL) and 10Base-T1S. For this distinction, this hardware, present not only in CAN but also in 10Base-T1S, is used to identify the operating mode CONFIG, since the STB connection is switched to an input. Thus, no significant additional circuitry overhead is incurred for distinguishing between these two communication standards.

[0092] Furthermore, if the transmitting / receiving device 12 is inactive, the COM-IF determination module 125 can use a comparator (not shown) to evaluate the status of the connection end STB / ED. In this inactive state of the transmitting / receiving device 12, the transmitting / receiving device 12 is switched to the operating mode STANDBY, for example, in CAN, especially CAN XL, and to the operating mode LOW_POWER in 10BASE-T1S.

[0093] Furthermore, the operating mode selection module 123 is designed to forward its determination result, i.e., information about the operating mode, to modules 121 and 122 in the signal B_SW. Specifically, based on the communication standard required for the transmission / reception device 12 to be put into use, the operating mode selection module 123 uses the signal B_SW to switch the operating mode of the transmission module 121 and the operating mode of the reception module 122. In the following, according to... Figure 4 This is described in relation to CAN bus system 1, and based on Figure 5 This is described in relation to the 10BASE-T1S bus system 1A.

[0094] Figure 4 It is shown that the transmitting / receiving device 12 is switched in the CAN bus system 1. Figure 1 The communication control unit 11 is connected to the DC choke 13 for communication according to the CAN XL standard. The DC choke 13 is connected to the bus lines 41 and 42 of the bus line of the bus 40 via line connector 15. The DC choke 13 is also called a common-mode choke (CMC). The bus lines 41 and 42 can be designed as twisted pairs. Twisted pairs are also called twisted pairs. The first and second bus lines 41 and 42 are terminated by terminating resistor 49. Terminating resistor 49 is an external load resistor of the transmitting module 121. As described above, the transmitting module 121 can be designed as a full bridge with four transmitting stages. Resistor 49 is switched in the bridge branch of this full bridge between the CANH / LINE+ and CANL / LINE- terminals of the transmitting / receiving unit 12 (more precisely, the transmitting module 121) for the connection of bus lines 41 and 42.

[0095] Figure 5 It is shown that the transmitting / receiving device 12 is switched between the communication control device 11A and the DC choke 13 in the 10BASE-T1S bus system 1A for communication according to the 10BASE-T1S standard. The DC choke 13 is connected to the line connector 15 via the AC decoupling module 14, in particular at least one decoupling capacitor, and thus to the bus cores 41, 42 and the terminating resistor 49. For this purpose, for 10BASE-T1S, a decoupling capacitor with a capacitance of 100 nF is used in both multi-point and single-point operating modes. The communication control unit 11A is designed to control communication according to the 10BASE-T1S standard. The AC decoupling module 14 can also be referred to as an AC decoupling module. Furthermore, the same applies to the transmitting module 121, as per the description of... Figure 3 and / or Figure 4 As described.

[0096] like Figure 4 and Figure 5 As shown, in the transmitting / receiving device (transceiver) 12, the connection terminals RXD / RX and STB / ED can be switched in different ways for use in the bus systems 1 and 1A.

[0097] Table 1 below shows examples of the types and functions of the various connection terminals (SO8 connection terminals or SO8 pins) of the transmitting / receiving device 12.

[0098] Table 1: Comparison of the types and functions of the connection terminals of the transmitting / receiving devices 12 in CAN XL and 10BASE-T1S.

[0099] If the transmitting / receiving device 12 is switched to Figure 4 The configuration allows for receiving or generating data at the connection point of the transmitting / receiving device 12. Figures 6 to 11 The transmitting / receiving device 12 can switch to different operating modes, SLEEP, SLOW, SIC, FAST_TX, and FAST_RX, as specified in the ISO 11898-1:2024 international standard for CAN.

[0100] Figure 6 The transmitting / receiving device 12 is shown for... Figure 2 Example of the time-varying process of the digital transmission signal TxD serially received from the communication control device 11 in frame 450. The transmission signal TxD is divided into two communication phases 451 and 452 over time t, as described above.

[0101] In the first communication phase (arbitration phase) 451, the transmitted signal TxD has a bit time t_bt1 and two different states: HI (high), specifically 1, and LW (low), specifically 0. In the second communication phase (data phase) 452, the transmitted signal TxD is at least temporarily a pulse width modulation (PWM) signal with a bit time t_bt2 and two different states LV0 and LV1, also referred to as PWM symbols. The bit time t_bt2 is shorter than the bit time t_bt1.

[0102] according to Figure 6 The transmitting / receiving device 12 and the transmitting / receiving device 22 use the first physical layer 451_P in the first communication phase (arbitration phase) 451 to transmit... Figure 6 The transmitted signal TxD is used as a reference. Figure 7 The differential bus signals CAN_H and CAN_L are sent to bus 40. For physical layer 451_P, there are operating modes SLOW or SIC for the transmitting / receiving device 12, as described above and below in more detail.

[0103] However, according to Figure 6 The transmitting / receiving device 12 can use the second physical layer 452_P in the second communication phase (data phase) 452 in order to... Figure 6 The transmitted signal TxD is used as a reference. Figure 7 The differential bus signals CAN_H and CAN_L are sent to bus 40. This second physical layer is different from the first physical layer 451_P. For physical layer 452_P, there are two operating modes for the transmitting / receiving device 12, namely FAST_TX and FAST_RX, as described in more detail previously.

[0104] like Figure 7 The signals CAN_H and CAN_L shown are serial analog signals and alternately have at least one dominant state 401 and / or at least one recessive state 402. For dominant state 401, U = VCAN_H = 3.5 V and U = VCAN_L = 1.5 V are applied. For recessive state 402, U = VCAN_H = VCAN_L = 2.5 V is applied. In the NRZ encoding of the transmitted signal TxD in stage 451, dominant state 401 (dom) is driven if TXD = 0 or LW (LOW = low) is applied. In the NRZ encoding of the transmitted signal TxD in stage 451, recessive state 402 (rec) is generated or occurs if TXD = 1 or HI (HIGH = high) is applied.

[0105] Following arbitration in arbitration phase 451, one of user stations 10, 20, and 30 is determined to be the winner. If the relevant user station 10 or 30 identifies in... Figure 2 If the signaling in the first switching field 455 for switching from the first communication phase 451 to the second communication phase 452 is received, then the relevant transmitting / receiving device 12 switches its physical layer 451_P to the physical layer 452_P of the data phase 452 at the end of the arbitration phase 451, as also described previously.

[0106] like Figure 7 As shown, the transmitter's transmission module 121 then, in the data phase 452 or in the second operating mode (FAST_TX), according to... Figure 6 The transmit signal TxD is used to sequentially and therefore serially generate states L0 or L1 for signals CAN_H and CAN_L on bus 40 via physical layer 452_P. In the pulse width modulation (PWM encoding) of the transmit signal TxD, state L0 (VCAN_H = 3.0 V, VCAN_L = 2.0 V) is driven for the first PWM symbol in the transmit signal TxD. In the pulse width modulation (PWM encoding) of the transmit signal TxD, state L1 (VCAN_H = 2.0 V and VCAN_L = 3.0 V) is driven for the second PWM signal LV1 in the transmit signal TxD, which is different from the first PWM signal LV0.

[0107] Based on the transmitted signal TxD, the frequencies of signals CAN_H and CAN_L can be increased during the data phase 452. Therefore, in Figure 6 and Figure 7 In the example, the bit time or bit duration t_bt2 in the data phase 452 is shorter or less than the bit time or bit duration t_bt1 in the arbitration phase 451. Therefore, in Figure 6 and Figure 7 In the example, the net data transfer rate is improved in data phase 452 compared to arbitration phase 451.

[0108] Conversely, if user station 30 is only the receiver of frame 450 in data phase 452, i.e., not the sender, then, for example, the transmitting / receiving device 12 of user station 30 switches its physical layer 451_P from the first operating mode (SLOW or SIC) to the physical layer 452_P of the third operating mode (FAST_RX) for data phase 452 at the end of arbitration phase 451.

[0109] If the transmitting / receiving device 12, especially utilizing in Figure 2The signaling in the second switching field 458 identifies that a switch from data phase 452 back to arbitration phase 451 is required. Therefore, the transmitting / receiving device 12 is switched from transmitting signals using physical layer 452_P (operating mode FAST_TX) or receiving signals using physical layer 451_P (operating mode FAST_RX) to transmitting and / or receiving signals using physical layer 451_P. Thus, all transmitting / receiving devices 12 switch their operating mode to the first operating mode (SLOW or SIC) after the end of data phase 452. Therefore, all transmitting / receiving devices 12 can switch not only between bit times t_bt1 and t_bt2, but also their physical layers, as described above.

[0110] according to Figure 8 During arbitration phase 451, ideally, a differential signal VDIFF = CAN_H – CAN_L is formed on bus 40 over time t. This differential signal has a value of VDIFF = 2V for dominant state 401 (dom) and a value of VDIFF = 0V for recessive state 402 (rec). Figure 8 The left side shows the change process of VDIFF in stage 451. Conversely, in data stage 452, data is formed on bus 40 with time t. Figure 7 The differential signal VDIFF corresponding to states L0 and L1 is CAN_H – CAN_L, as shown in... Figure 8 As shown on the right. State L0 has a value VDIFF = 1V. State L1 has a value VDIFF = -1V.

[0111] The receiving module 122 can distinguish between states 401 and 402 by using two of the receiving thresholds T1, T2, and T3, which fall within the ranges TH_T1, TH_T2, and TH_T3, respectively. Therefore, the receiving module 122 performs a certain action at time point t_A. Figure 7 or Figure 8 The signal is evaluated, such as Figure 8 As shown. For evaluation Figure 7 or Figure 8 In the arbitration phase 451, the receiving module 122 uses a receiving threshold T1 of, for example, 0.7 V and a receiving threshold T2 of, for example, -0.35 V, to evaluate the signal. Conversely, in the data phase 452, the receiving module 122 only uses the receiving threshold T3 to evaluate the signal. (See previous references...) Figure 6 When switching between the first to third operating modes (SLOW or SIC, FAST_TX, FAST_RX), the receiving module 122 switches the receiving thresholds T2 and T3 respectively.

[0112] The receiving threshold T2 is used to identify whether bus 40 is idle when user station 12 is newly connected to communication on bus 40 and attempts to join communication on bus 40.

[0113] When receiving a corresponding signal from bus 40, each transmitting / receiving device 12 generates a related receive signal RxD, such as Figure 9 As shown in the image. Ideally, Figure 9 The received signal RxD and Figure 6 The transmitted signal TxD has no time offset.

[0114] Figure 10 An example of a portion of the digital transmission signal TxD is shown, which the transmission module 121 receives from the communication control device 11 during the arbitration phase 451, and generates signals CAN_H and CAN_L for the bus 40. Figure 10 In the process, the transmitted signal TxD changes from state LW (low) to state HI (high) and then changes back to state LW (low).

[0115] like Figure 11 As shown in more detail below, the sending module 121 is designed for... Figure 10 The transmit signal TxD generates signals CAN_H and CAN_L for bus cores 41 and 42, resulting in an additional state 403 (sic). State 403 (sic) can be of varying lengths, as shown by state 403_0 (sic) during the transition from state 402 (rec) to state 401 (dom) and state 403_1 (sic) during the transition from state 401 (dom) to state 402 (rec). State 403_0 (sic) is shorter in time than state 403_1 (sic). To generate according to... Figure 11 The signal will switch the transmitting module 121 to SIC operating mode (SIC mode).

[0116] In CiA610-3, the short SIC state 403_0 is not required, and this state depends on the implementation. In CAN-XL, the duration of the "long" state 403_1 (SIC) is specified as t_sic < 530ns for both CAN-SIC and SIC operating modes, starting at... Figure 10 The rising edge of the transmitted signal TxD.

[0117] In the "long" state 403_1 (SIC), the transmitting module 121 should match the impedance between bus cores 41 (CANH) and 42 (CANL) as well as possible to the characteristic backlash Zw of the bus lines used. In this case, Zw = 100 Ohm or 120 Ohm is suitable. This matching prevents reflections and thus allows operation at higher bit rates. For simplicity, state 403 (SIC) or SIC state 403 will always be referred to below.

[0118] In accordance with Figure 4 With the configuration of the transmitting / receiving device 12, the transmitting module 121 can be used to generate signals for the following CAN types of bus 40: CAN-FD, CAN-SIC and CAN-XL, as shown in Table 2 below. CAN type Communication stage / bit rate Bus states Send module status CAN-FD arbitration dom, rec dom, rec CAN-SIC arbitration dom, sic, rec dom, sic, rec CAN-XL Arbitration, or in cases where the system is not switched to Fast operating mode, arbitration and data fields. dom, sic, rec dom, sic, rec CAN-XL Data phase L0, L1 L0, L1 Table 2: CAN type used for transmitting module 121.

[0119] Therefore, the module status 403 (sic) can be generated not only in CAN-SIC or CAN-XL (xl_sic) scenarios, but also in CAN-FD. However, in CAN-FD, the time required to generate the module status 403 (sic) is shorter than in CAN-SIC or CAN-XL scenarios.

[0120] Therefore, the transmitting module 121 can generate two different bus states for CAN FD, three different bus states for CAN SIC, and five different states for CAN XL.

[0121] If the transmitting / receiving device 12 is switched Figure 5 The configuration allows for receiving or generating data at the connection point of the transmitting / receiving device 12. Figures 12 to 15 The transmitting / receiving device 12 can switch to different operating modes, such as LOW-POWER, NORMAL, TRANSMITTING, and CONFIG, as specified in the IEEE 802.3cg™ international standard for 10BASE-T1S.

[0122] Figure 12 An example illustrating the time-varying process of the digital transmitted signal Tx is shown, from which the transmitting / receiving device 12... Figure 5 The communication control device 11A receives the digital transmission signal so that it can transmit the transmission signal Tx as differential bus signals LINE+ and LINE- to the bus 40A of the bus system 1A according to the 10BASE-T1S standard.

[0123] according to Figure 12 The transmission signal Tx is divided into multiple communication phases 460, 461, and 462 over time t. These communication phases are allocated by the host user station to each user station 10, 20, and 30 for transmission. In communication phases 460 and 462, the NORMAL operating mode is enabled for the transmitting / receiving device 12, specifically its transmitting module 121 and receiving module 122. In communication phase 461, the transmitting / receiving device 12 is allowed to transmit onto bus 40A. Therefore, in phase 461, the TRANSMITTING operating mode is enabled for the transmitting / receiving device 12, specifically its transmitting module 121 and receiving module 122. Transmission rights are allocated according to a round-robin algorithm, where each user station receives a transmission slot in a transmission cycle, thus avoiding collisions on bus 40A. In communication phases 460, 461, and 462, the transmitted signal Tx has bits of bit time t_bt and two different states: HI (high), specifically 1, and LW (low), specifically 0.

[0124] like Figure 13 As shown, the transmitting / receiving device 12 will Figure 12 The transmit signal Tx is sent to bus 40A as serial analog signals LINE+ and LINE-. These signals alternately have: at least one state V0, also known as VLINE_POS; and / or at least one state V1, also known as VLINE_NEG.

[0125] according to Figure 14 Ideally, a differential signal V_L is formed on bus 40A over time t. For state V0, U = V_L(V0) = +0.5 V applies. For state V1, U = V_L(V1) = -0.5 V applies. Alternatively, in 10BASE-T1S single-point mode, state V1 (VLINE_POS) has a differential voltage VDIFF = +1.2 V, and state V0 (VLINE_NEG) has a differential voltage VDIFF = -1.2 V. In this case, the resistance value R_IN_DIFF or R_IN of the internal resistance 1211 has a value of 100 Ohms, as explained in more detail later with respect to Table 3.

[0126] The receiving module 122 can distinguish between states V0 and V1 by using two of the receiving thresholds T1_ETH, T2_ETH, and T3_ETH, which fall within the ranges TH_T1, TH_T2, and TH_T3, respectively. To this end, the receiving module 122 performs a pre-determined check at a predetermined time point. Figure 13 or Figure 14The signal is sampled. To evaluate the sampling results, the receiver module 122 uses all three receiver thresholds T1_ETH, T2_ETH, and T3_ETH in both NORMAL and TRANSMITTING operating modes. In contrast, the receiver module 122 uses only two receiver thresholds, T2_ETH and T3_ETH, in LOW-POWER operating mode. Receiver threshold T1_ETH typically has a value of 0.0 V, receiver threshold T2_ETH typically has a value of +0.15 V, and receiver threshold T3_ETH typically has a value of -0.15 V. (Previously regarding...) Figure 6 When switching between the described operating modes (NORMAL, TRANSMITTING, LOW-POWER), the receiving module 122 switches these receiving thresholds T1_ETH, T2_ETH, and T3_ETH as needed. Of course, in 10BASE-T1S single-point mode, for states V1 and V0 with VDIFF = +1.2 V and -1.2 V, at least the receiving thresholds T2_ETH and T3_ETH can be adjusted to different voltage values ​​than described above.

[0127] When receiving a corresponding signal from bus 40, each transmitting / receiving device 12 generates a related receiving signal Rx, such as Figure 15 As shown in the diagram. Ideally, the received signal Rx has no time offset from the transmitted signal Tx.

[0128] In order to follow Figure 4 To adjust the configuration of the transmitting / receiving device 12 for generating according to Figure 7 or Figure 11 The signals on bus 40, or in order to... Figure 5 To adjust the configuration of the transmitting / receiving device 12 for generating according to Figure 13 The signals on bus 40, the transmitting / receiving device 12 operates as described below.

[0129] After the power supply voltage at the VCC terminal is switched on (this is also known as power-up), the transmitting module 121 initially maintains a high impedance state on the bus side as much as possible. In this case, "high impedance state" means that at the transmitting module 121, the resistance value R_IN of the internal resistance 1211 is adjusted to be at least as large as the resistance value of the bus termination resistor 49. This ensures that buses 40 and 40A are not blocked by potentially erroneous symbols.

[0130] The transmitting module 121 remains in a high impedance state on the bus side until the standard described below is checked to confirm whether a communication control device 11 is connected to the input of the transmitting / receiving device 12 so that the device 12 is to operate according to the CAN standard, especially the CAN-XL standard, or to confirm whether a communication control device 11A is connected so that the device 12 is to operate according to the 10BASE-T1S standard.

[0131] The COM-IF detection module 124 and / or the COM-IF determination module 125 forward the corresponding decision as an evaluation result to the operation mode selection module 123.

[0132] Once the check and / or evaluation is completed using at least one of modules 124 and 125 and module 123, in particular, a decision has been made or is being made regarding the communication standard, the transmitting / receiving device 12 will operate according to the corresponding communication standard.

[0133] However, the transmitting / receiving device 12 is designed to further check and / or evaluate at least one of the following criteria for reasonableness checks. This ensures that possible error conditions, such as short circuits at connection ends STB / ED and / or TX / TXD, are identified. The identification criteria for the interface of the transmitting / receiving device 12 are as follows: The first criterion (for STB / ED = HIGH, it is the TX edge) Module 124 is designed to check whether the connection terminal STB / ED is in state HI (high = HIGH) and whether an edge is received at the connection terminal TXD / TX. If the connection terminal STB / ED is in state HI (high = HIGH) and an edge is received at the connection terminal TX, then module 124 determines that the connected communication control device is a communication control device 11A for 10BASE-T1S. This is because there is no equivalent behavior for CAN-XL.

[0134] Additionally or alternatively, for the first criterion, module 124 is designed to check whether a status LW (low = LOW) is reported at the connection terminal STB / ED of the transmitting / receiving device 12. If a status LW (low = LOW) is reported at the connection terminal STB / ED of the transmitting / receiving device 12, then module 124 determines that the connected communication control device is the communication control device 11 for CAN XL. This is because the communication control device 11 for CAN in CAN-XL reports the operation mode switch from Standby mode to SLOW, Normal, or SIC operation mode by reporting a status LW (low = LOW) at the connection terminal STB / ED of the transmitting / receiving device 12.

[0135] The second standard (the periodic reset command R_ST after power-on) Module 124 is designed to check: periodically sending data at the TXD / TX connection end according to... Figure 16 The reset instruction RS_C is used to return the transmitting / receiving device 12, according to the 10BASE-T1S protocol, from the initial LOW_POWER state to the NORMAL state. Conversely, in the 10BASE-T1S standard, the reset instruction RS_C is called a RESET command. Figure 16 At the bottom, the state of variable CMD over time t is shown, derived from the signal change at the connection point TXD / TX over time t. "CMD" is an internal variable of the digital component of the transmitting / receiving device 12 (transceiver). This digital component may be, for example, part of module 123 and / or module 124. The value of variable CMD is adjusted according to the signaling at TX, more specifically, based on the signal change at the connection point TXD / TX over time t. The value of variable CMD is used for navigation of internal states. In other words, the value of variable CMD is used to determine internal states and / or transitions between these internal states, which are NORMAL, TRANSMITTING, LOW_POWER, LOW_POWER_WAKE, and CONFIGURATION. Figure 16 In the example, the variable CMD has two defined states, N_N and R_ST. Conversely, in the 10BASE-T1S standard, state N_N is called NONE, and state R_ST is called RESET. The state R_ST of variable CMD indicates that a reset command was detected at the TXD / TX connection. The state N_N indicates that a reset command was (still) not detected at the TXD / TX connection. Shaded states correspond to undefined states or states irrelevant in the context.

[0136] according to Figure 16The reset instruction RS_C has a state HI (high = HIGH) for a duration ttxda of at least 20 ns, and then typically has a state LW (low = LOW) for a duration ttxrst = 80 ns. Then, it remains in state HI (high = HIGH) for at least a duration tcgap of 20 ns. The duration tcgap is set to the time between reset instructions RS_C. After this reset instruction RS_C, the communication control device 11A waits: the transmitting / receiving device 12 pulls or switches the connection end STD / ED to state LW (low = LOW) to indicate that the transmitting / receiving device 12 configured for 10BASE-T1S is ready to wake up.

[0137] Therefore, module 124 evaluates whether, after the transmitting / receiving device 12 is powered on, data is transmitted at the connection terminal TXD / TX according to... Figure 16 At least one reset command RS_C is sent; and then, the transmitting / receiving device 12 or device 11A pulls or switches the connection terminal STD / ED to state LW (LOW = low). During the period until the transmitting / receiving device 12 or device 11A pulls the connection terminal STD / ED to state LW (LOW = low), further reset commands RS_C may periodically arrive at the connection terminal TXD / TX, which are sent by the communication control device 11A. The frequency of these pulses (reset commands RS_C) is not explicitly specified, but is determined by the manufacturer.

[0138] Furthermore, module 124 evaluates whether the interval between reset commands RS_C at the connection terminal TXD / TX exceeds 245ns. If the interval between reset commands RS_C exceeds 245ns, module 124 determines that the connected communication control device is a communication control device 11A for 10BASE-T1S. This is because the maximum allowed symbol length for PWM symbols LV0 and LV1 in CAN XL is shorter than 245ns, but the bit length of state 401 (dom) is longer than 80ns. Therefore, the mode checked by module 124 is too long for PWM symbols LV0 and LV1, but too short for the dominant bit 401 (dom) in CAN-SIC operating mode.

[0139] In addition, module 124 evaluates whether the reset command RS_C arrives at the connection terminal TXD / TX with a time interval of <245ns. This evaluation takes into account that this bit pattern can also represent a CAN-XL PWM symbol. To exclude this case, module 124 can wait for the maximum length of the CAN-XL frame 450, which corresponds to... Figure 2The duration is T_450. If no arbitration bit with bit time t_bt1 is sent after frame 450 of CAN-XL frame 450, module 124 determines that the connected communication control device is communication control device 11A for 10BASE-T1S. Therefore, the transmitting / receiving device 12 pulls its connection terminal STB / ED to the status or voltage level LW (LOW = low) in order to switch to NORMAL operating mode according to the 10BASE-T1S protocol.

[0140] The third criterion (minimum symbol length): Module 124 is designed to check the length or bit time t_bt2 of the transmitted signal at the connection point TXD / TX. If the symbol length is shorter than a predetermined time, especially 45 ns or within 49 ns, module 124 determines that the connected communication control device is a communication control device 11A for 10BASE-T1S. This is because 45 ns is the shortest permissible symbol time, which, according to the CAN-XL standard, must be identified by the transmitting / receiving device 12 itself. Another reason is that in the CAN-XL standard, under FAST operation modes FAST_TX and FAST_RX, the nominal duration of the shortest permissible PWM symbols LV0 and LV1, measured between two consecutive edges of the same polarity, is 50 ns. This corresponds to a data transmission rate of 20 Mbit / s. However, in the 10BASE-T1S standard, the DMEO symbol only has a duration of 40 ns.

[0141] The COM-IF detection module 124 is, for example, a digital component, particularly a time-discrete system. The COM-IF detection module 124 operates at a predetermined frequency f, which is suitable for checking the signal at the connection point TXD / TX. Specifically, this frequency f > 400 MHz.

[0142] Therefore, module 124 can reliably distinguish between symbol lengths of 40 ns and 45 ns by checking the third criterion. Thus, in particular, the 5 ns difference can be reliably distinguished by the sampling time point.

[0143] The fourth criterion (Symbol Duty-Cycle): Module 124 is designed to check the duty cycle of the arriving symbols at the TXD / TX connection.

[0144] In particular, module 124 is designed to check whether a symbol arrives with a duty cycle of approximately 50%. If the symbol's duty cycle is approximately 50%, module 124 determines that the connected communication control device is a communication control device 11A for 10BASE-T1S. This is because, according to the 10BASE-T1S standard, a DMEO symbol typically consists of a 20ns HIGH state and a 20ns LOW state at TX. This corresponds to a 50% duty cycle. However, in contrast, the CAN-XL controller of device 11 sends PWM symbols LV0 and LV1 with a nominal duty cycle of 25% (LV0 symbol) or 75% (LV1 symbol).

[0145] Alternatively or additionally, module 124 may be designed to check at the connection point TXD / TX whether the symbol's duty cycle is greater than a predetermined first value, such as 60%, or less than a predetermined second value, such as 30%. If the symbol's duty cycle is greater than the predetermined first value, such as 60%, or less than the predetermined second value, such as 30%, then module 124 determines that the connected communication control device is the communication control device 11 for CAN XL. Of course, under the above-mentioned boundary conditions for the symbol's duty cycle, other values ​​may be selected for the predetermined first value and / or the predetermined second value.

[0146] Therefore, the COM-IF detection module 124 can reliably identify the length of the duty cycle of the symbol at the connection terminal TXD / TX by using the check of the fourth standard.

[0147] Based on the results of the inspection of the fourth standard, the COM-IF detection module 124 makes a decision about which communication interface the transmitting / receiving device 12 should operate.

[0148] The COM-IF detection module 124 forwards the corresponding decision as an evaluation result to the operation mode selection module 123.

[0149] Figure 17 The transmitting module 121 of the transmitting / receiving device 12, which can be used in one of the user stations 10 and 30, is shown in more detail. The transmitting module 221 of the transmitting / receiving device 22 can be constructed in the same manner as the transmitting module 121 of the transmitting / receiving device 12. Therefore, the transmitting module 221 is not described separately.

[0150] Transmitting module 121 is connected to bus 40. More specifically, for CAN_H or CAN-XL_H in a CAN bus system or LINE+ in a 10BASE-T1S bus system, it is connected to the first bus line 41 of the bus; and for CAN_L or CAN-XL_L in a CAN bus system or LINE- in a 10BASE-T1S bus system, it is connected to the second bus line 42 of the bus. Each of the transmitter stages 121A to 121D is connected to bus 40.

[0151] In addition, the control unit 15 receives data from the operating mode selection module 123 ( Figure 3 The signal B_SW, and in CAN or according to Figure 4 The transmitted signal TxD is configured to be sent under either 10BASE-T1S or according to the configuration. Figure 5 Sending signal Tx under configuration ( Figure 6 ).

[0152] Figure 17 The sending module 121, for example, can generate according to Figure 7 The signals CAN_H and CAN_L have states 401, 402 or states L0, L1. These replace states 401 and 402. Figure 17 The sending module 121 can generate statuses 401, 402, and 403, such as Figure 11 As shown. Alternatively, Figure 17 The transmitting module 121 generates signals for communication on the bus 40 according to the 10BASE-T1S generated therein, such as... Figure 13 As shown in the image.

[0153] The transmitting module 121 includes first to fourth transmitting stages 121A, 121B, 121C, and 121D, and a control unit 15. For example... Figure 17 As shown, transmitters 121A to 121D are wired as a full bridge. This full bridge has a first half-bridge consisting of transmitters 121A and 121D and a second half-bridge consisting of transmitters 121B and 121C. Control unit 15 is controlled by operating mode selection module 123. Figure 3 Adjustments are made using signal B_SW for one of the operating modes, and are also used according to the transmitted signal TxD ( Figure 6 The operating mode SIC, FAST_TX, or according to the transmission signal Tx of the transmitting module 121 adjusted for CAN XL is 121 and 121. Figure 12The control unit 15 controls the transmitter stages 121A, 121B, 121C, and 121D by adjusting the 10BASE-T1S operating mode of the transmitting module. To this end, the control unit 15 generates at least one signal N_A_1 for controlling the first transmitter stage 121A, at least one signal N_B_1 for controlling the second transmitter stage 121B, at least one signal N_C_1 for controlling the third transmitter stage 121C, and at least one signal N_D_1 for controlling the fourth transmitter stage 121D. Regarding... Figures 18 to 21 It also describes in more detail the manipulation using signals N_A_1, etc.

[0154] Voltage supply is achieved via at least one connection terminal 43, used to supply power, particularly a typically 5V CAN-Supply voltage, to the first and second bus cores 41, 42. Connection to ground, particularly CAN_GND, is achieved via connection terminal 44. The first and second bus cores 41, 42 are terminated by terminating resistor 49. Terminating resistor 49 serves as an external load resistor, switching to a full-bridge configuration. Resistor 49 switches to a bridge branch used between the connection terminals of bus cores 41, 42.

[0155] Figure 17 The first emitter stage 121A has a reverse polarity diode D_A, a transistor HVP_A, and a parallel circuit 121A1, wherein a series circuit consisting of a first switch S_A1 and a first resistor R_A1 is connected in parallel with at least one series circuit consisting of an Nth switch S_AN and an Nth resistor R_AN, for the first to Nth current levels, such as... Figure 20 As shown in more detail and described later, N is a natural number > 1. Regarding emitter 121A, the number N is hereby also referred to as N_A. Therefore, the parallel circuit 121A1 has a resistance value R_A that can be adjusted using switches S_A1 to S_AN. Transistor HVP_A is a CMOS transistor, specifically a PMOS transistor; for the sake of simplicity, its manipulation is... Figure 17 The details are not shown in more detail. The abbreviation "CMOS" refers to semiconductor devices in which p-channel and n-channel MOSFETs are used on a common substrate. The abbreviation CMOS stands for "Complementary metal-oxide-semiconductor." The abbreviation "MOSFET" stands for metal-oxide-semiconductor field-effect transistor.

[0156] Figure 17The second emitter stage 121B has a reverse polarity diode D_B, a transistor HVN_B, and a parallel circuit 121B1. A series circuit consisting of a first switch S_B1 and a first resistor R_B1 is connected in parallel with at least one series circuit consisting of an Nth switch S_BN and an Nth resistor R_BN for the first to Nth current levels, where N is a natural number > 1. Regarding the emitter stage 121B, the number N is hereinafter also referred to as N_B. Therefore, the parallel circuit 121B1 has a resistance value R_B that can be adjusted using switches S_B1 to S_BN. The transistor HVN_B is a CMOS transistor, especially an NMOS transistor; for simplicity, its operation is... Figure 17 The details are not shown in the text.

[0157] Figure 17 The third emitter stage 121C has a reverse-polarity diode D_C, a transistor HVP_C, and a parallel circuit 121C1. A series circuit consisting of a first switch S_C1 and a first resistor R_C1 is connected in parallel with at least one series circuit consisting of an Nth switch S_CN and an Nth resistor R_CN, for the first to Nth current levels, where N is a natural number > 1. Regarding the emitter stage 121C, the number N is hereinafter also referred to as N_C. Therefore, the parallel circuit 121C1 has a resistance value R_C that can be adjusted using switches S_C1 to S_CN. The transistor HVP_C is a CMOS transistor, especially a PMOS transistor; for simplicity, its operation is... Figure 17 The details are not shown in the text.

[0158] Figure 17 The fourth emitter stage 121D has a reverse polarity diode D_D, a transistor HVN_D, and a parallel circuit 121D1. A series circuit consisting of a first switch S_D1 and a first resistor R_D1 is connected in parallel with at least one series circuit consisting of an Nth switch S_DN and an Nth resistor R_DN for the first to Nth current levels, where N is a natural number > 1. Regarding emitter stage 121D, the number N is hereinafter also referred to as N_D. Therefore, the parallel circuit 121D1 has a resistance value R_D that can be adjusted using switches S_D1 to S_DN. The transistor HVN_D is a CMOS transistor, especially an NMOS transistor; for simplicity, its operation is... Figure 17 The details are not shown in the text.

[0159] Each of the series circuits in the parallel circuits 121A1, 121B1, 121C1, and 121D1 implements one of the current levels S1 to SN of the emitter stages 121A to 121D. For this purpose, the current levels S1 to SN of the emitter stages 121A to 121D are designed as resistive levels, which can also be referred to as resistive fingers. These resistive levels are adjusted by selecting the resistance values ​​corresponding to the current levels, for example, by selecting resistors R_A1 to R_AN for the emitter stage 121A, and so on. Due to the adjustment of the resistance values, currents generated by the associated emitter stages 121A to 121D and therefore current levels occur. The number N can be chosen arbitrarily. In particular, the number N, and therefore the number or quantity of resistive levels or current levels, can be selected between 1 and 60. However, alternatively, a number greater than 60 can be chosen for N, as also illustrated in Table 4 below.

[0160] Each of the reverse polarity diodes D_A, D_B, D_C, and D_D protects the associated emitter from positive feedback to terminal 44 (CAN-Supply (CAN power)) and negative feedback to terminal 43 (CAN_GND). Each of the reverse polarity diodes D_A, D_B, D_C, and D_D can also be called a blocking diode.

[0161] Each of the parallel circuits 121A1, 121B1, 121C1, and 121D1, more specifically, when operated by the control unit 15, adjusts the resistors or resistance values ​​R_A, R_B, R_C, and R_D of the relevant transmitter stages 121A, 121B, 121C, and 121D according to the communication standard used or to be used on buses 40 and 40A, the operating mode of the transmitter module 121, and the transmission signal TxD. The communication standard is, in particular, CAN_XL or 10BASE-T1S. The operating mode of the transmitter module 121 is, for example, SLOW, SIC, or FAST_TX under CAN_XL, or multi-point mode or single-point mode under 10BASE-T1S. In both multi-point and single-point operating modes under 10BASE-T1S, the center voltage VCM or DC common-mode voltage on bus 40 is not fixed because there is AC decoupling from module 14, as previously mentioned. Figure 5 As described.

[0162] Therefore, the resistance values ​​of each transmitter stage 121A, 121B, 121C, and 121D can be determined based on the operating mode of the transmitter module 121 and the received transmitter signal TxD. Figure 6 or Figure 10 ) or Tx ( Figure 12Adjustments will be made based on this. In the following text, based on... Figures 19 to 21 And Tables 3 through 6 describe this in more detail.

[0163] Each of transistors HVP_A, HVN_B, HVP_C, and HVN_D is a high-voltage (HV) cascode transistor, and can also be referred to as a high-voltage standoff device. Transistor HVP_A protects the parallel circuit 121A1 by absorbing a high voltage drop. Each of transistors HVN_B, HVP_C, and HVN_D has the same function for its corresponding assigned parallel circuits 121B1, 121C1, and 121D1. Each of transistors HVP_A, HVN_B, HVP_C, and HVN_D can be controlled at its corresponding control connection terminal, particularly by control unit 15 or other control devices not shown.

[0164] According to Figure 4 In the transmission module 121, transmitter 121A is switched between the power supply connection 43 and the connection 41 (CANH) for the CAN_H signal. Furthermore, transmitter 121C is switched between the power supply connection 43 and the connection 42 (CANL) for the CAN_L signal, and either the connection 43 or the connection 44 (CAN_GND) for ground. Additionally, transmitter 121D is switched between the connection 41 (CANH) for the CAN_H signal and either the connection 43 or the connection 44 (CAN_GND) for ground. And transmitter 121B is switched between the connection 42 (CANL) for the CAN_L signal and either the connection 43 or the connection 44 (CAN_GND) for ground. Therefore, in the transmission module 121, for those according to... Figure 4 The configuration involves switching transmitter 121A to the CANH path and transmitter 121D to the CANH path. Simultaneously, it switches transmitter 121C to the CANL path and transmitter 121B to the CANL path.

[0165] In accordance with Figure 4 Under this configuration, signals CAN_H and CAN_L form a differential signal, which is generated by... Figure 17 The transmitting module 121 sends the data to the bus 40.

[0166] Therefore, in accordance with Figure 4In this configuration, the transmitting module 121 consists of parallel circuits 121A1, 121B1, 121C1, and 121D1 of predetermined current ratings or resistors in both the CANH and CANL paths, as described above. All current ratings in the parallel circuits are connected in series with high-voltage cascode transistors HVP_A, HVN_B, HVP_C, and HVN_D, and reverse-polarity diodes D_A, D_B, D_C, and D_D in both the CANH and CANL paths, as described above. The high-voltage cascode transistors HVP_A, HVN_B, HVP_C, and HVN_D are capable of adhering to limiting values ​​(maximum rating parameters), such as voltages from -27V to +40V at CANH and CANL.

[0167] In accordance with Figure 5 Under this configuration, the signals LINE+ and LINE- form a differential signal, which is generated by... Figure 17 The transmitting module 121 sends data to the bus 40. Therefore, a similar situation applies to the path LINE+ at connection 41 and the path LINE- at connection 42, in accordance with... Figure 5 The sending module 121 is configured as follows.

[0168] Through Figure 17 The transmitting module 121 shown and previously described can generate various electrical states, which are determined by its open-circuit voltage V0 and its internal resistance 1211 ( Figure 3 The resistor value R_IN is defined by the emitter stage 121A. Therefore, the resistor values ​​R_A1 to R_AN of the emitter stage 121A (more precisely, its parallel circuit 121A1) are adjusted accordingly. The adjustment of the resistor values ​​is achieved by turning on or off the parallel resistors R_A1, R_A2, ..., R_AN and / or the resistors of other emitter stages 121B, 121C, and R_D. Subsequently, based on... Figure 18 Let's elaborate on this in more detail. Here, in order to adjust the resistance value of the transmitting module 121, we need to consider the half-bridge AD consisting of the transmitting stages 121A and 121D and the half-bridge BC consisting of the transmitting stages 121B and 121C.

[0169] Figure 18 A half-bridge BC is shown, consisting of transmitter stages 121B and 121C located between connection terminals 43 and 44 and at bus connection terminal 42, for example, for CAN_L or LINE-. The half-bridge BC is simplified to circuits BC_V1 and BC_V2, as shown below, using... Figure 18 The block arrows in the diagram indicate this. The same applies to the half-bridge AD consisting of transmitter stages 121A and 121D, so the half-bridge AD is not shown in the diagram.

[0170] To adjust the resistance value of the transmitting module 121, it is simplified to assume that the parasitic resistances of the common-source cascode transistors HVP_A, HVP_B, HVP_C, HVP_D of the emitter stages 121A, 121B, 121C, and 121D, the switches S_A1...S_AN, S_B1...S_BN, S_C1...S_CN, S_D1...S_DN, and the diodes D_A, D_B, D_C, and D_D are negligible. From this, a simplified half-bridge BC_V1 is derived, which... Figure 18 The middle part has a resistor or resistance value R_B, R_C.

[0171] If we consider the open-circuit voltages V0_AD and V0_BC of the aforementioned half-bridge AD and BC, then using the supply voltage VCC fed in at connection terminal 43, we can derive: V0_AD = (VCC + (VCC -2*U_dio)*(R_D – R_A) / (R_D + R_A)) / 2 V0_BC = (VCC + (VCC -2*U_dio)*(R_B – R_C) / (R_B + R_C)) / 2 exist Figure 18 In the diagram, the open-circuit voltage V0_BC is explained on the right side of the further simplified half-bridge BC_V2.

[0172] To adjust the resistance value of the transmitting module 121, it is also considered that the radiation from the transmitting module 121 is caused by signal fluctuations, which are due to... Figure 4 or Figure 5 The DC choke 13 is used to form the common-mode signal ripple. To minimize these undesirable radiations, the transmitting module 121 is designed to adjust the bus center voltage VCM = (V0_AD + V0_BC) / 2 generated by the transmitting module 121 to a constant. Therefore, it is necessary to apply... VCM = VCC / 2 (constant).

[0173] Therefore, the sending module 121 is designed to adjust out R_A = R_B := R_M ("Main-Branch" or main branch) as well as R_C = R_D := R_CP ("Complementary-Branch" or complementary branch).

[0174] Next, the internal resistance 1211 of the transmitting module 121 ( Figure 3 The resistance value R_IN or conductance G_IN and open-circuit voltage U0 are given by the following equation: R_IN = 1 / G_IN = R_IN_AD + R_IN_BC = 2*(R_M*R_C) / (R_M + R_C) = 1 / (G_M + G_CP) U0 = U0_AD – U0_BC = U_X*ZBUS*(GM-GC) / (1+ZBUS*G_IN).

[0175] In this case, R_IN_AD is the internal resistance of the half-bridge AD formed by transmitter stages 121A and 121D, or its value. Furthermore, R_IN_BC is the internal resistance of the half-bridge BC formed by transmitter stages 121B and 121C, or its value, such as... Figure 18 As shown in the diagram. Furthermore, U0_AD is the open-circuit voltage of the half-bridge AD converter composed of emitter stages 121A and 121D, and U0_BC is... Figure 18 The open-circuit voltage of the half-bridge BC, consisting of emitter stages 121B and 121C, is shown. Additionally, ZBUS is the ripple impedance of bus 40. Furthermore, the following applies to the conductance G_M of the main branch (“Main-Branch”), the conductance G_CP of the complementary branch (“Complementary-Branch”), and the voltage U_X: G_M = 1 / (2*R_M) G_CP = 1 / (2*R_CP) U_X = VCC – 2*U_dio.

[0176] For resistors R_M (“Main-Branch” or main branch) and R_CP (“Complementary-Branch” or complementary branch), the following can be derived: R_M = ZBUS*U_X / (U_X*ZBUS*Gin + U0(1+ZBUS*Gin)) R_CP = ZBUS*U_X / (U_X*ZBUS*Gin - U0(1+ZBUS*Gin)) Table 3 below shows the electrical characteristics of the transmitting module 121 of the transmitting / receiving device 12 at the bus 40, which ends with a resistor 49 having impedance Z_Bus and is powered by the supply voltage VCC, for states (REC, SIC, DOM, L1, L0) in CAN-XL. Furthermore, Table 3 shows the electrical characteristics of the transmitting module 121 of the transmitting / receiving device 12 at the bus 40A, which ends with a resistor 49 having impedance Z_Bus and is powered by the supply voltage VCC, for states V0 and V1 in 10BASE-T1 for various operating modes or operating conditions of 10BASE-T1 (single-point mode, multi-point mode with VCC = 5V, and multi-point mode with VCC = 3.3V). State V0 is also referred to as VLINE_POS. State V1 is also referred to as VLINE_NEG. In Table 3, it is assumed that in the transmitting module 121, the diode voltage U_dio = 0.7V, and the impedance of the single resistor is R_finger = 10kOhm.

[0177] Table 3: Electrical characteristics of the transmitting module status.

[0178] Next, the number of fingers turned on in each element of H-bridge N_A, N_B, N_C, and N_D shall be in accordance with Table 4 below.

[0179] Table 4: The number of resistors with a resistance of R_finger = 10 kOhm for the diode voltage U_dio = 0.7 V and the resistors R_M and R_CP according to Table 3.

[0180] The resistors of emitter stages 121A, 121B, 121C, and 121D can be switched, as described below. Figures 19 to 21 And refer to Tables 5 and 6 below as described.

[0181] As an example, based on Figures 19 to 21 Tables 5 and 6 below, based on the operating mode of the transmitting module 121 and the bus states 401 (dom), 403 (sic), and 402 (rec) in the SIC operating mode (arbitration phase 451), and the bus states L0 and L1 in the data phase 452, will illustrate... Figure 17 The basic working principle of the circuit. Figure 17 The corresponding circuits are used to generate the states V0 and V1 of the 10BASE-T1S communication standard.

[0182] Figure 19The control unit 15 of the transmitting module 121 of the transmitting / receiving device 12 is shown in more detail. This control unit can be used at user stations 10, 30 of the bus system 1. The transmitting / receiving device 22 of the user station 20 can be constructed in the same manner as described below for the transmitting / receiving device 12.

[0183] The control unit 15 includes a state processing block 151, a step size generator 152, a logic block 153, and a storage block 154. The operating mode selection signal B_SW is input to the control unit 15, and a signal TxD is also sent. Figure 6 or Figure 11 ) or send signal Tx ( Figure 12 or Figure 16 These signals are input to the control unit. The control unit 15 uses these signals to generate one or more control signals for the transmitter stages 121A to 121D. The state processing block 151, step generator 152, and logic block 153 form a control chain, or a chain for progressively generating the transmit currents of the transmit module 121, which are necessary for low-radiation transitions between two bus signal states or bus states 401, 402, 403, LV0, LV1.

[0184] exist Figure 19 In the state processing block 151, there is an evaluation unit 1511 and a signal generation unit 1512. The evaluation unit 1511 evaluates the digital transmission signal TxD based on the current signal state of the digital transmission signal TxD and the operating mode switched for the transmission module 121. Therefore, the evaluation unit 1511 evaluates the transmission signal TxD according to the current signal state of the digital transmission signal TxD and the operating mode switched for the transmission module 121. Figure 5 or Figure 7 The evaluation result of the received transmit signal TxD can be HI (high) or LW (low). Next, based on the operating mode (SIC, FAST_TX) switched to by the transmit module 121, it is determined which of the following bus signal states—401, 402, 403, LV0, or LV1—should be generated. Furthermore, the evaluation unit 1511 can evaluate whether the signal state of the digital transmit signal TxD has changed compared to its previous signal state; and / or whether the operating mode of the transmit module 121 has changed.

[0185] Signal generation unit 1512 is designed to generate signals S_SL, S_SW, and S_ST if the evaluation result of evaluation unit 1512 indicates that a switch needs to be made between two bus states among bus states 401, 402, 403, LV0, and LV1, and therefore a transition needs to occur between the two bus states 401, 402, 403, LV0, and LV1. Therefore, signal generation unit 1512 generates a selection signal S_SL, a rise rate signal S_SW, and a step start signal S_ST based on the evaluation of evaluation unit 1511. Signals S_SL, S_SW, and S_ST are different depending on the transition type, i.e., for example, from state 401 (dom) to state 403 (sic). Optionally, at least one of signals S_SL, S_SW, and S_ST is generated using parameter 151P. Parameter 151P can be stored in signal generation unit 1512 or obtained by accessing memory block 154.

[0186] Signal generation unit 1512 outputs a selection signal S_SL to logic block 153. In contrast, signal generation unit 1512 outputs a rise rate signal S_SW, a step start signal S_ST, and a reset signal S_RS to step generator 152.

[0187] If the control of the transition between two bus signal states is completed, for example, the transition from state 401 (dom) to state 403 (sic), then the signal generation unit 1512 generates a reset signal S_RS.

[0188] Step generator 152 has an evaluation unit 1521 and a signal generation unit 1522. Evaluation unit 1521 evaluates the rise rate signal S_SW and the step start signal S_ST. Signal generation unit 1522 generates a step signal S<1:X> based on this evaluation and outputs the step signal to logic block 153, as described in more detail later. X is any natural number greater than 1. The step signal S<1:X> is designed to progressively change the resistance values ​​of the transmitter stages 121A, 121B, 121C, and 121D of transmitter module 121, and thus progressively change their transmit currents.

[0189] Logic block 153 can be designed as programmable logic. Logic block 153 controls the transmitter stages 121A, 121B, 121C, and 121D of the transmitting module 121, particularly when using control units 153A, 153B, 153C, and 153D and parameter 154P. Parameter 154P is stored in memory block 154. Control unit 153A is designed to manipulate transmitter stage 121A, particularly its parallel circuit 121A1. Control unit 153B is designed to manipulate transmitter stage 121B, particularly its parallel circuit 121B1. Control unit 153C is designed to manipulate transmitter stage 121C, particularly its parallel circuit 121C1. Control unit 153D is designed to manipulate transmitter stage 121D, particularly its parallel circuit 121D1.

[0190] In storage block 154, for all permissible transitions between signal states on bus 40, for each step in the transition, for... Figure 17 The parallel circuits 121A1, 121B1, 121C1, and 121D1 store setting values, especially as parameter 154P. In the CAN bus system, these transitions include, for example, transitions from state 401 (dom) to state 403 (sic), transitions from state 403 (sic) to state 401 (dom), transitions from state LV0 to state LV1, and transitions from state LV1 to state LV0, etc.

[0191] Logic block 153 is designed to perform manipulation, which is... Figure 17 The parallel circuits 121A1, 121B1, 121C1, and 121D1 are used to adjust the setpoints. Figure 17 The settings stored in parameter 154P for the parallel circuits 121A1, 121B1, 121C1, and 121D1 can be arbitrarily adapted to minimize the radiation of the transmitting module 121, thereby complying with the electromagnetic compatibility (EMC) requirements of the transmitting module 121.

[0192] Tables 5 and 6 below show examples of settings that can be stored in storage block 154. In the examples in Tables 5 and 6, logic block 153 manipulates... Figure 17 The parallel circuit 121A1, 121B1, 121C1, and 121D1 enables... Figure 17The parallel circuits 121A1, 121B1, 121C1, and 121D1 employ 30 different resistor values ​​R_A, R_B, R_C, and R_D, respectively. Therefore, for each of the 30 steps S1 to S30, different differential resistors R_DIFF or impedances appear for the emitter stages 121A / 121B and 121C / 121D, and different differential voltages VDIFF appear on bus 40, as illustrated in Table 5. Thus, the transition from 401 to 403 is completed within the 30 steps S1 to S30. Table 6 illustrates the number of resistors N_A that are switched to active state for transmitter stage 121A of transmitter module 121, the number of resistors N_B that are switched to active state for transmitter stage 121B of transmitter module 121, the number of resistors N_C that are switched to active state for transmitter stage 121C of transmitter module 121, and the number of resistors N_D that are switched to active state for transmitter stage 121D of transmitter module 121.

[0193] Steps S1 to S30 are also referred to as intermediate states on bus 40. state Step size / intermediate state V_DIFF (V) R_DIFF (Ohm) R_A (Ohm) R_B (Ohm) R_C (Ohm) R_D (Ohm) 401 (dom) S0 2 40 20 20 infinity infinity intermediate state S1 1.96 41 21 21 7k 7k intermediate state S2 1.9 43 22 22 2.3k 2.3k intermediate state ... ... ... ... ... ... ... intermediate state S29 0.03 99 96 96 101 101 403 (sic) S30 0 100 100 100 100 100 Table 5: Examples of electrical setting values ​​for the transition from 401 to 403 in 30 steps S1 to S30 or S1, ... S30 according to the resistor references in Table 3. state Step size / intermediate state N_A N_B N_C N_D 401 (dom) S0 500 500 0 0 intermediate state S1 485 485 1 1 intermediate state S2 461 461 4 4 intermediate state ... ... ... ... ... intermediate state S29 104 104 98 98 403 (sic) S30 100 100 100 100 Table 6: Transition from 401 to 403 in CAN XL for 30 steps S1 to S30 or S1, ... S30 Figure 17 Examples of the number of resistor pointers in the parallel circuits 121A1, 121B1, 121C1, and 121D1, for a single resistor pointer having R_finger = 10 kOhm, a reverse polarity diode protection voltage of 0.7V, a power supply voltage Vcc = 5V at connection 43, and an impedance Z_Bus = 50 Ohm for resistor 49.

[0194] When the transmitting module 121 is running, in the state processing block 151, based on the transmitting signal TxD at the input, in particular using the evaluation unit 1511, it is determined when to perform which transition.

[0195] To introduce the transition, especially from bus state 401 (dom) to bus state 403 (sic), firstly, the corresponding combination circuits of resistors R_A1, etc., in parallel circuits 121A1, 121B1, 121C1, 121D1, etc., N_A, N_B, N_C, and N_D are selected in logic block 153 via the selection signal S_SL. Furthermore, and especially simultaneously, for the upcoming transition, the desired slew-rate of the bus signals (CAN_H; CAN_L) is adjusted according to the specification of the slew-rate signal S_SW, and the chain, especially the step generator 152, is reset to its output value via the reset signal S_RS.

[0196] therefore, Figure 19 The circuit forms a delay chain that sequentially moves in one direction through the aforementioned step sizes S1 to SX. This simplifies the circuitry. Furthermore, it reduces current consumption compared to circuits with more than one delay chain, particularly three or three-by-two delay chains (as previously described with respect to the prior art).

[0197] State processing block 151 is designed to generate a step-start signal S_ST, causing step generator 152 to start only after a predetermined delay time to facilitate transitions between bus states. Therefore, a delay chain starts or triggers only after a predetermined delay time to facilitate transitions between two consecutive bus states. For example, this predetermined delay time is approximately 1 ns, particularly between 1 ns and 5 ns. This predetermined delay time ensures that not only step generator 152 but also logic block 153 is ready to perform the desired transitions between bus states.

[0198] Therefore, the step size generator 152, and especially its signal generation unit 1522, generates control signals or step size signals for step sizes S1, ..., SX, which change their quality sequentially at time intervals t_D1, ..., t_DX, especially changing to HI (high = high).

[0199] Figure 20 An example is shown illustrating the relationship between the variation of the bus voltage U and the maximum voltage Um of the transition, which is caused by... Figure 19 The control unit 15 controls the transmitter 121 between states 401 (dom) and 403 (sic). Figure 20 In the example shown, control unit 15 manipulates the transition with time t in steps S1, ..., SX and time intervals t_D1, ..., t_DX. For clarity, in Figure 20The table does not specify all step sizes S1 to SX and time intervals t_D1,..., t_DX that correspond to the intermediate states on bus 40.

[0200] Figure 20 The example illustrates the asynchronous time step generation that produces a transition between bus signal states 401 (dom) and 403 (sic). This time step generation asynchronously specifies the fixed form of the time steps S1,..., SX of the transition using control unit 15. These time steps, as intermediate states or separate signals for each of the steps S1,..., SX, form the outputs of step generator 152 and control unit 15. From this, the predetermined rise time Δt_R of the edge between the two states on bus 40 is also derived.

[0201] The ratio of the length of the time step t_Dn to the total switching time t_S = t_D1 + … + t_DX is constant. In the middle (the steepest part of the curve), the time step is short and longer at the beginning and end. The total length of the transition t_S can be adjusted by changing the bias current to regulate the slew-rate of the transition.

[0202] The transition process between two states in these states 401, 402, 403, LV0, and LV1 can be set or configured in a freely selectable manner. Since there are longer time steps t_D1, ... t_DX at the beginning or end of the transition or sequence than in the middle, a spectrally optimal "smooth" overall transition from one state to another can be approximated.

[0203] Compared with the synchronous step chain controlled by a conventional clock signal, the main advantage of the asynchronous step chain of the transmitting module 121 is that the step chain of the transmitting module 121 described above has significantly better radiation characteristics.

[0204] The reason is that the high-frequency spectral components of the signal on bus 40 are distributed more evenly across the frequency range, rather than being concentrated on integer multiples of the clock frequency. For the same number of steps in each transition or step sequence, the maximum spectral value in the high-frequency range of 100MHz-3GHz is significantly reduced.

[0205] Next, the speed of the step chain defines the time it takes for this transition between states to occur. The speeds of transitions 401, 402, 403, LV0, and LV1 are limited only by the maximum switching speed indicated by the resistors used in emitter stages 121A, 121B, 121C, and 121D.

[0206] In order to generate according to bus 40 Figure 20 The transformation, in Figure 17Each of the four resistor arrays or parallel circuits 121A1, 121B1, 121C1, and 121D1 in the H-bridge has a separate resistor unit. Control units are set in logic block 153 for each of these resistor units, as per [the provided text]. Figure 21 As described.

[0207] For the parallel circuit 121A1, Figure 21 An example of a resistor unit 121A1_1 and a corresponding control unit 153A_1 for time step S1 is shown for an intermediate state or time step S1. For each time step S1, ..., SX, each parallel circuit 121A1, 121B1, 121C1, 121D1 has a resistor unit 121A1_1 and a corresponding control unit 153A_1, as follows. Figure 21 As shown in the diagram, all control units 153A_1 used for step sizes S2 to SX are constructed identically.

[0208] Accordingly, the transmitting module 121 has a total of 30 resistor units 121A1_1 for each individual transmitter stage 121A1, 121B1, 121C1, 121D1. Therefore, each parallel circuit 121A1, 121B1, 121C1, 121D1 has a total of 30 resistor units 121A1_1. Thus, in the current example concerning the manipulation of 30 time steps, the transmitting module 121 has 4 x 30 = 120 resistor units 121A1_1 and 4 x 30 = 120 control units 153A_1.

[0209] according to Figure 21 Resistor unit 121A1_1 has binary-weighted switchable resistor elements S_A1, R_A1, etc., which are wired in resistor blocks 161, 162, 163, 164. The resistance values ​​of resistor elements S_A1, R_A1, etc. and / or resistor blocks 161, 162, 163, 164 can be selected as needed for individual resistor unit 121A1_1. For resistor unit 121A1_1 of each emitter stage 121A1, 121B1, 121C1, 121D1, the resistance values ​​of resistor elements S_A1, R_A1, etc. and resistor blocks 161, 162, 163, 164 can be the same or at least partially different.

[0210] Therefore, each of these parallel circuits 121A1, 121B1, 121C1, and 121D1 has binary-weighted switchable resistive elements, which are effective for respective steps S1 to SX. Figure 20 )according to Figure 19 The step size signal S<1:X> is switched in a suitable manner. Figure 21In the example, resistor unit 121A1_1 can be switched using 4 bits.

[0211] An example of wiring 16 resistor fingers or resistor elements in four resistor blocks 161, 162, 163, and 164, which have switches S_A1 to S16 and resistors R_A1 to R_A16. Figure 21 The design of resistor unit 121A1_1 for parallel circuit 121A1 is shown. Therefore, N = 16. In this example, parallel circuits 121B1, 121C1, and 121D1 are designed in the same way and therefore are not described separately.

[0212] Resistors R_A1 to R_A16, for example, all have the same resistance value. Subsequently, as an example, assume that the resistance value of each of resistors R_A1 to R_A16 is 8 kOhm. Switches S_A1 to S16 can be CMOS transistors, especially PMOS transistors. The same applies to switches S_A1 to S16 in parallel circuit 121C1. Switches S_A1 to S16 in parallel circuits 121B1 and 121D1 can be CMOS transistors, especially NMOS transistors.

[0213] The first resistor block 161 has a resistor in the series circuit formed by the first switch S_A1 and the first resistor R_A1. If the first switch S_A1 is switched on, then in the example above, the resistor block 161 in the resistor unit 121A1_1 operates with a total resistance of 8 kOhm.

[0214] The second resistor block 162 has two resistors R_A2 and R_A3 in two parallel series circuits. Therefore, block 162 has: a series circuit consisting of the second switch S_A2 and the second resistor R_A2; and a series circuit consisting of the third switch S_A3 and the third resistor R_A3. If the first switches S_A2 and S_A3 are switched on, the resistor block 162 in resistor unit 121A1_1 operates with a total resistance of 4 kOhm.

[0215] The third resistor block 163 has four resistors R_A4 to R_A7 in four parallel series circuits. Therefore, block 163 has a series circuit consisting of the fourth switch S_A4 and the fourth resistor R_A4, up to a series circuit consisting of the seventh switch S_A7 and the seventh resistor R_A7. If the fourth to seventh switches S_A4 to S_A7 are switched on, the resistor block 163 in resistor unit 121A1_1 operates with a total resistance of 2 kOhm.

[0216] The fourth resistor block 164 has eight resistors R_A8 to R_A16 in eight parallel series circuits. Therefore, block 164 has a series circuit consisting of the eighth switch S_A8 and the eighth resistor R_A8, up to a series circuit consisting of the sixteenth switch S_A16 and the sixteenth resistor R_A16. If the eighth to sixteenth switches S_A8 to S_A16 are switched on, the resistor block 164 in resistor unit 121A1_1 operates with a total resistance of 1 kOhm.

[0217] For clarity, in Figure 21 Not all resistors R_A1 to R_A16 and not all switches S_A1 to S16 are equipped with the attached reference numerals.

[0218] The control unit 153A has four D flip-flops 3A1, 3A2, 3A3, and 3A4. Each bit in the binary number N_A_1<0:3> is connected to the input D of each of these flip-flops 3A1, 3A2, 3A3, and 3A4. Figure 21 In the first D flip-flop 3A1, the corresponding bit of the binary number N_A_1<0:3> is called A_1_0. For Figure 21 In the second D flip-flop 3A2, the corresponding bit of the binary number N_A_1<0:3> is called A_1_1. For Figure 21 In the third D flip-flop 3A3, the corresponding bit of the binary number N_A_1<0:3> is called A_1_2. For Figure 21 The fourth D flip-flop 3A4 in the binary number N_A_1<0:3> has a corresponding bit called A_1_3.

[0219] Binary numbers are composed of Figure 20 The signal generation unit 1512 selects the signal from the storage block 154 using the selection signal S_SL. The bits N_A_1<0:3> of the binary number, i.e., signals A_1_0, A_1_1, A_1_2, and A_1_3, control which switches in the four resistor arrays 161 to 164 must be turned on after a certain step size, i.e., step size S1 in this case. For this purpose, the output of the first D flip-flop 3A1... The switch S_A1 acts on the first resistor block 161. The output of the second D flip-flop 3A2. Switches S_A2 and S_A3 act on the second resistor block 162. The output of the third D flip-flop 3A3. Switches S_A4 to S_A7 act on the third resistor block 163. The output of the fourth D flip-flop 3A4. Switches S_A8 to S_A16 act on the fourth resistor block 164.

[0220] As an example, the step size signal or signal of step size S1 is attached to the input terminal C of each of the four D flip-flops 3A1, 3A2, 3A3, and 3A4.

[0221] Now, once the rising edge of the signal with step size S1 reaches the input terminal C of one of the D flip-flops 3A1, 3A2, 3A3, and 3A4, the value of the signal at input terminal D is transmitted to the inverting output terminal. This is because, in the example shown, switches S_A1 to S_A16 are designed as PMOS transistors. However, if switches S_A1 to S_A16 were designed as NMOS transistors, as in parallel circuits 121B1 and 121D1, then the output would be replaced. The output terminal Q is used to control switches S_A1 to S16.

[0222] Therefore, at least one of the resistor blocks 161, 162, 163, and 164 can be switched to conduction.

[0223] The same control is performed on resistor blocks 161, 162, 163, and 164 of the resistor units in parallel circuits 121B1, 121C1, and 121D1, and in particular, the same control is performed simultaneously. Furthermore, this control is then performed on resistor blocks 161, 162, 163, and 164 of the resistor units in parallel circuits 121A1, 121B1, 121C1, and 121D1 for at least one subsequent step S_X.

[0224] If the entire transformation is completed, each resistor unit 121A1_1 of the parallel circuit 121A1 can have one of 16 equivalent resistance values, depending on the value manipulated and then adjusted by the control unit 15. These equivalent resistance values ​​are between infinity (where all switches S1 to S16 are open) and a resistance value of approximately 533 Ohms (where all switches S1 to S16 are closed). Thus, each resistor array or each parallel circuit 121A1 can have possible equivalent resistance values ​​between infinity (where all switches S1 to S16 are open) and a resistance value of approximately 18 Ohms (where all switches S1 to S16 are closed). The same applies to the parallel circuits 121B1, 121C1, 121D1 and their resistor units 121A1.

[0225] This allows for simple adaptation to perform calibrations not only for individual parts but also for standards different from the CAN bus system, specifically for the transmitter module 121. In particular, the transmitter module 121 can represent or generate all static states permitted in CAN-XL and / or 10Base-T1S, including their intermediate states. These intermediate states can also be referred to as transition states.

[0226] Using this solution, individual resistor fingers or resistor elements S_A1, R_A1, etc., are grouped into resistor blocks 161, 162, 163, and 164 using binary encoding. For each array, with 450 individual resistor fingers, only 30*4=120 control lines remain in the H-bridge from logic block 153 to transmitting module 121. Here, transmitting module 121 ensures that the number of resistor fingers or resistor elements S_A1, R_A1, etc., switched simultaneously does not exceed the necessary number.

[0227] This avoids large switching spikes that occur when, for example, the 450 resistive fingers or resistive elements S_A1, R_A1, etc., of the transmitting module 121 are directly controlled in binary mode using 9 lines, such as during a transition from 255 to 256 (binary: 011111111 to 100000000). During this transition from 255 to 256 (binary: 011111111 to 100000000), the conductive fingers switch each individual line.

[0228] Another advantage is that even if an unexpected incomplete transition occurs, no abrupt change will happen at the output of the transmitting module 121. This is because even after the chain is reset, the change simply occurs or proceeds step by step again. This ensures continuous output and thus benefits the radiation characteristics of the transmitting module 121 and the associated transmitting and receiving devices 12.

[0229] exist Figure 21 The circuit implementation of logic block 153 shown is only one possibility for implementing logic block 153, which manipulates logic function N(X, transition), where N = (N_A, N_B, N_C, N_D) is a vector of active resistive fingers that should be active with respect to the selected transition step size S_X.

[0230] Typically, a logic function N(X, transition) can be implemented for all transitions on bus 40. The implementation may differ for different transitions.

[0231] In addition, although Figure 21 The circuit implementation of logic block 153 shown is not complex and robust, but it can only implement, for example, a finitely large step size or intermediate state of the transition.

[0232] Therefore, the control of logic block 153 and / or the switching of resistors for emitter stages 121A, 121B, 121C, and 121D can achieve step-wise or intermediate-state AND operations. Figure 20The design scheme shown is different from the design scheme previously described in Tables 5 and 6. In particular, the control of the switching of logic block 153 and / or the resistors of emitter stages 121A, 121B, 121C, 121D can be designed with greater flexibility in terms of step size and / or duration of intermediate states.

[0233] Second Embodiment According to the second embodiment, in order to meet the voltage strength requirements of the transmitter stages 121A, 121B, 121C, and 121D of the transmitting module 121, the transmitting module 121 does not have cascode transistors HVP_A, HVP_B, HVP_C, and HVP_D, nor does it have diodes D_A, D_B, D_C, and D_D. This is possible as long as the voltage strength requirements allow.

[0234] However, the voltage strength requirements for the transmitter stages 121A, 121B, 121C, and 121D of the transmitter module 121 can be replaced by other protection circuits that do not include diodes D_A, D_B, D_C, and D, in addition to the cascode transistors HVP_A, HVP_B, HVP_C, and HVP_D.

[0235] Even in this case, the resistors R_M and R_CP of the transmitting module 121 having transmitting stages 121A, 121B, 121C, and 121D can be adjusted, as previously described with respect to the first embodiment.

[0236] Third Embodiment According to the third embodiment, the COM-IF detection module 124 is designed to check at least one and at most three of the above four standards.

[0237] Therefore, module 124 can determine which communication interface the transmitting / receiving device 12 should operate based on fewer than the four criteria mentioned above.

[0238] The COM-IF detection module 124 according to the third embodiment can be used in the transmitting / receiving device 12 according to the first embodiment.

[0239] The transmitting / receiving apparatus 12, user stations 10, 20, 30, bus systems 1, 1A, gateway 5, and all previously described designs of the methods performed therein or by these embodiments and their modifications can be used individually or in all possible combinations. Additionally, modifications are particularly conceivable as follows.

[0240] The bus systems 1, 1A described above according to at least one of these embodiments are based on a CAN protocol or a 10BASE-T1S bus system. However, alternatively, the bus systems 1, 1A according to these embodiments can be another type of communication network in which signals are transmitted as differential signals.

[0241] The evaluation module 16 need not be a separate component of the transmitting / receiving device 12. Instead, the evaluation module 16 can be part of the transmitting module 121. Alternatively, the evaluation module 16 can be part of any module of the transmitting / receiving device 12.

[0242] A favorable, but not mandatory, prerequisite is that user stations 10, 20, and 30 have exclusive, conflict-free access to bus 40 in bus system 1, at least for a specific period of time.

[0243] The bus system 1 according to at least one of these embodiments and modifications is particularly a bus system in which communication can be performed between at least two user stations 10, 20, 30 according to two different CAN standards, such as CAN-HS or CAN FD or CAN SIC or CAN XL. Therefore, the functionality of the above embodiments can be used, for example, in the transmitting / receiving devices 12, 22, which should operate in such a bus system.

[0244] The number and layout of user stations 10, 20, 30 in a bus system 1 according to at least one of these embodiments and their modifications can be arbitrarily selected.

Claims

1. A transmitting / receiving device (12) for a user station (10; 30; 50) in a serial bus system (1; 1A), the transmitting / receiving device comprising: The transmitting module (121) is used to transmit digital transmission signals (TxD; Tx) as analog differential signals (CAN_H, CAN_L; LINE+, LINE-) to the bus (40; 40A) of the bus system (1; 1A) in order to send messages (45; 48) to at least one other user station (10; 20; 30) of the bus system (1; 1A). The receiving module (122) is configured to receive signals (CAN_H, CAN_L; LINE+, LINE-) from the bus (40; 40A) and to generate digital receive signals (RxD; Rx) from the analog differential signals (CAN_H, CAN_L; LINE+, LINE-); and At least one determining module (124; 125; 16) is configured to determine which of at least two communication standards (CAN; 10BASE-T1S) is used for communication on the bus (40; 40A) in order to switch the transmitting module (121) and the receiving module (122) according to the determined communication standard on the bus (40; 40A). in, The transmitting module (121) has a full bridge, wherein the first and fourth transmitting stages (121A, 121D; 121A0, 121D0) are connected in series, and the third and second transmitting stages (121C, 121B; 121C0, 121B0) are connected in series, and The transmitting module (121) is designed to: adjust the resistance values ​​(R_A, R_B, R_C, R_D; R_M, R_CP) of the resistors of the first to fourth transmitting stages (121A, 121D; 121A0, 121D0) based on the determination results of the at least one determining module (124; 125; 16), and generate the analog differential signal (CAN_H, CAN_L; LINE+, LINE-) using the first to fourth transmitting stages (121A, 121D; 121A0, 121D0) adjusted in this way.

2. The transmitting / receiving device (12) according to claim 1. The transmitting / receiving device also has a control unit (15) for operating the first to fourth transmitting stages (121A, 121D; 121A0, 121D0). in, The resistors of the first to fourth emitter stages (121A, 121D; 121A0, 121D0) are formed by parallel circuits of up to N switchable resistors (R_A1 to R_AN; R_B1 to R_BN; R_C1 to R_CN; R_A1 to R_DN). Each switchable resistor (R_A1 to R_AN; R_B1 to R_BN; R_C1 to R_CN; R_A1 to R_DN) is connected in series with a switch (S_A1 to S_AN; S_B1 to S_BN; S_C1 to S_CN; S_A1 to S_DN). Where N is a natural number greater than 1, The control unit (15) is designed to progressively manipulate the switches (S_A1 to S_AN; S_B1 to S_BN; S_C1 to S_CN; S_A1 to S_DN) based on the transmitted signal (TxD) to switch the state on the bus (40; 40A) based on the state transition of the transmitted signal (TxD), and The process involves progressively controlling the switches (S_A1 to S_AN; S_B1 to S_BN; S_C1 to S_CN; S_A1 to S_DN) by delaying the switching on or off of the switches in the switches (S_A1 to S_AN; S_B1 to S_BN; S_C1 to S_CN; S_A1 to S_DN). In one step, at least two switches (S_A1 to S_AN; S_B1 to S_BN; S_C1 to S_CN; S_A1 to S_DN) of one of the first to fourth transmitter stages (121A, 121D; 121A0, 121D0) are switched together.

3. The transmitting / receiving device (12) according to claim 1 or 2, further comprising: A first connection terminal (TXD / TX) for receiving the transmitted signal (TxD; Tx) from the communication control device (11; 11A); and The second connection terminal (RXD / RX) is used to output the digital received signal (RxD; Rx) to the communication control device (11; 11A). in, The at least one determining module (124; 125; 16) has a COM-IF detection module (124) and is designed to determine whether the digital transmission signal (TxD; Tx) at the first connection terminal (TXD / TX) has at least one predetermined characteristic of one of two communication standards (CAN; 10BASE-T1S), for which the transmitting module (121) and the receiving module (122) are designed to communicate in the serial bus system (1; 1A), and The transmitting / receiving device (12) is designed to switch the second connection terminal (RXD / RX) as an output terminal or as an input terminal based on the determination result of the COM-IF detection module (124).

4. The transmitting / receiving device (12) according to claim 2, further comprising: The third connection terminal (STB / ED) is used to adjust one of the two predetermined voltage levels (HI; LW). in, The COM-IF detection module (124) is also designed to determine whether the digital transmission signal (TxD; Tx) at the first connection terminal (TXD / TX) is combined with one of the two predetermined voltage levels (HI; LW) at the third connection terminal (STB / ED).

5. The transmitting / receiving device (12) according to claim 4, wherein, Attached to or replacing the COM-IF detection module (124), the at least one determining module (124; 125; 16) has a COM-IF determining module (125) that, if the transmitting / receiving device (12) is switched to an operating mode in which the transmitting / receiving device (12) is able to actively perform communication through at least one of the first to third connection terminals (TXD / TX; RXD / RX; STB / ED), the COM-IF determining module is used to evaluate whether the third connection terminal (STB / ED) is switched to an output terminal or a input terminal.

6. The transmitting / receiving device (12) according to any one of the preceding claims, wherein, The at least one determining module (124; 125; 16) has a detection module (16) designed to detect the resistance value of the resistor (49) at the end of the bus (40) and the voltage value of the supply voltage (VCC) present on the transmitting / receiving device (12) for voltage supply.

7. The transmitting / receiving device (12) according to any one of the preceding claims, the transmitting / receiving device further comprising an operating mode selection module (123) for selecting the operating mode of the transmitting module (121) and / or the receiving module (122) based on the output of the at least one determining module (124; 125; 16).

8. The transmitting / receiving apparatus (12) according to claim 7, which depends on any one of claims 4 to 6, wherein, The operating mode selection module (123) is designed to evaluate the transmission signal (TxD; Tx) at the first connection terminal (TXD / TX) and the voltage level at the third connection terminal (STB / ED) in order to select the operating mode of the transmitting module (121) and / or the receiving module (122).

9. The transmitting / receiving apparatus (12) according to claim 7 or 8, which depends on any one of claim 5 or 6, wherein, The COM-IF detection module (124) is designed to further evaluate the transmitted signal (TxD; Tx) with respect to the at least one predetermined characteristic after transferring the detection result to the operating mode selection module (123).

10. The transmitting / receiving apparatus (12) according to any one of the preceding claims, wherein, The transmitting module (121) is designed to generate the analog differential signal (CAN_H, CAN_L) in the first communication phase (451) of the message (45) of the two communication standards (CAN; 10BASE-T1S) (CAN XL) with a different physical layer (451_P) than in the second communication phase (452).

11. The transmitting / receiving device (12) according to any one of the preceding claims. in, The at least two communication standards mentioned include CAN XL and 10BASE-T1S, and The 10BASE-T1S communication standard is at least one of the following communication standards: 10BASE-T1S multi-point mode with a power supply voltage of 5 V, 10BASE-T1S multi-point mode with a power supply voltage of 3.3 V, and 10BASE-T1S single-point mode with a power supply voltage of 5 V.

12. A user station (10; 30; 50) for a serial bus system (1; 1A), said user station having: The transmitting / receiving device (12) according to any one of the preceding claims; and A communication control device (11; 11A) is used to control communication in the bus system (1; 1A) and to generate the transmission signals (TxD, Tx). in, The user stations (10; 30; 50) are designed for communication in a bus system (1; 1A) in which exclusive, conflict-free access to the bus (40; 40A) of the bus system (1; 1A) is guaranteed, at least temporarily.

13. A gateway (5) for forwarding messages (45; 46; 47; 48) between at least a first bus system (1) and a second bus system (1A), the gateway having: At least two transmitting / receiving devices (12) according to any one of claims 1 to 11. in, One of the at least two transmitting / receiving devices (12) of the gateway (5) is connected to the first bus system (1), and the other of the at least two transmitting / receiving devices (12) is connected to the second bus system (1A).

14. A method for communication using differential signals in a serial bus system (1; 1A), wherein, The method is performed using a transmit / receive device (12) for a user station (10; 30; 50) of the bus system (1; 1A), the transmit / receive device having a transmit module (121), a receive module (122) and at least one determination module (124; 125; 16), wherein the transmit module (121) is designed to transmit digital transmit signals (TxD; Tx) as analog differential signals (CAN_H, CAN_L; LINE+, LINE-) to the bus. On the bus (40; 40A) of the system (1; 1A), messages (45; 48) are sent to at least one other user station (10; 20; 30) of the bus system (1; 1A), wherein the sending module (121) has a full bridge, wherein the first and fourth transmitter stages (121A, 121D; 121A0, 121D0) are connected in series, and the third and second transmitter stages (121C, 121B; 121C0, 121B0) are connected in series, and wherein the method comprises the following steps: Using the at least one determining module (124; 125; 16), determine which communication standard (CAN; 10BASE-T1S) is used for communication on the bus (40; 40A); In the transmitting module (121), based on the determination results of the at least one determining module (124; 125; 16), the resistance values ​​(R_A, R_B, R_C, R_D; R_M, R_CP) of the resistors of the first to fourth transmitting stages (121A, 121D; 121A0, 121D0) are adjusted; and The receiving module (122) is adjusted according to the communication standard (CAN; 10BASE-T1S) determined on the bus (40; 40A).

15. The method according to claim 14, further comprising: Transmission Step: Using the transmission module (121), with the resistors of the first to fourth transmitter stages (121A, 121D; 121A0, 121D0), the transmission signal (TxD; Tx) is transmitted as an analog differential signal (CAN_H, CAN_L; LINE+, LINE-) to the bus (40; 40A), and the resistance values ​​(R_A, R_B, R_C, R_D; R_M, R_CP) are adjusted in the adjustment step; and / or Receiving steps: Using the receiving module (122), analog differential signals (CAN_H, CAN_L; LINE+, LINE-) are received from the bus (40; 40A) for outputting digital receiving signals (RxD; Rx) to the communication control device (11; 11A). The digital receiving signals are generated according to the communication standard (CAN; 10BASE-T1S) adjusted at the receiving module (122).

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