Photoelectric conversion device, forming method and image sensor

Abstract

The embodiment of the invention discloses a photoelectric conversion device, a forming method and an image sensor. The photoelectric conversion device includes: a substrate; a front trench isolation structure; at least two avalanche diode units formed on the substrate; each avalanche diode unit comprises a device region and a back side deep trench isolation structure surrounding the device region; the doped region is formed by outward diffusion from the front side trench isolation structure; the doped region has a doping concentration gradient which is gradually reduced outwards from the front side trench isolation structure; wherein at least one front side trench isolation structure exists between any two adjacent avalanche diode units; at least a portion of the doped region extends across the backside deep trench isolation structure, forming a dark current suppression region within each of two adjacent avalanche diode cells. By means of the mode, the dark count rate of the device can be reduced, and the device has better electrical performance and reliability.

Description

Technical Field

[0001] The embodiments of the present invention relate to the semiconductor field, and in particular to optoelectronic conversion devices, forming methods, and image sensors. Background Technology

[0002] Single-photon avalanche diodes (SPADs) have been widely used in laser detection and ranging systems (Lidar), autonomous driving, fluorescence lifetime imaging, quantum communication, and biomedical imaging due to their advantages such as high sensitivity to detect single photons with low intensity, high time resolution, and strong anti-interference ability.

[0003] Dark Count Rate (DCR) refers to the frequency at which dark carriers are generated within a SPAD due to various effects in the absence of incident light, triggering avalanche counting. DCR is one of the core performance indicators of a SPAD, affecting the signal-to-noise ratio in a lidar system, and consequently influencing the lidar's core performance such as ranging.

[0004] In existing common back-illuminated SPAD device structures, backside deep trench isolation (BDTI) is often used for optical crosstalk isolation and electrical isolation between SPAD devices. BDTI is formed by etching from the back side of silicon, followed by filling with tungsten metal and a high-k dielectric (HK) material. BDTI etching generates many surface defects, which produce a large number of dark carriers, increasing the device's density-reduction ratio (DCR). To address this issue, front trench isolation (FTI) is used in SPAD processes. FTI is silicon with a certain doping concentration. When the FTI doping concentration is high enough, it will recombine the dark carriers generated by BDTI and create a pinning effect on the BDTI surface, reducing the probability of dark carrier generation. However, in reality, the FTI etching process introduces new surface defects, making this approach even more problematic for DCR. Summary of the Invention

[0005] The main technical problem solved by the embodiments of the present invention is to provide an image sensor, a photoelectric conversion device and a method for forming the same, which can solve the problem of increased DCR caused by surface defects.

[0006] To solve the above-mentioned technical problems, one technical solution adopted in the embodiments of the present invention is: providing a photoelectric conversion device, including: a substrate; a front trench isolation structure; at least two avalanche diode units formed on the substrate; each avalanche diode unit includes: a device region and a back deep trench isolation structure surrounding the device region; and a doped region diffused outward from the front trench isolation structure; the doped region has a doping concentration gradient that gradually decreases outward from the front trench isolation structure; wherein, between any two adjacent avalanche diode units, there is at least one front trench isolation structure; at least a portion of the doped region extends beyond the back deep trench isolation structure, and dark current suppression regions are formed in both adjacent avalanche diode units.

[0007] In some embodiments, a front trench isolation structure exists between any two adjacent avalanche diode units; wherein the front trench isolation structure is located between the back deep trench isolation structures of the two adjacent avalanche diode units.

[0008] In some embodiments, the first distance is less than the second distance; wherein, the first distance is the distance between the centerline of the front trench isolation structure and the inner side of the back deep trench isolation structure of the adjacent avalanche diode unit; the second distance is the distance between the centerline of the front trench isolation structure and the minimum effective concentration boundary of the doped region, the minimum effective concentration boundary having a preset doping concentration.

[0009] In some embodiments, each avalanche diode unit has a corresponding front trench isolation structure; wherein the corresponding front trench isolation structure surrounds the back deep trench isolation structure of the avalanche diode unit, and the front trench isolation structure is located outside the back deep trench isolation structure.

[0010] In some embodiments, the third distance is less than the fourth distance, wherein the third distance is the distance between the outer side of the back-side deep trench isolation structure of the avalanche diode unit and the centerline of the corresponding front-side trench isolation structure; the fourth distance is the distance between the centerline of the corresponding front-side trench isolation structure and the minimum effective concentration boundary of the doped region formed by the diffusion of the corresponding front-side trench isolation structure, wherein the minimum effective concentration boundary has a preset doping concentration.

[0011] In some embodiments, the back-side deep trench isolation structure is a first etched trench filled with isolation material; wherein the isolation material includes: metal or a high dielectric constant dielectric material.

[0012] In some embodiments, the first etched groove is formed from the first surface of the substrate by an etching operation.

[0013] In some embodiments, a microlens is further disposed on the first surface of the substrate.

[0014] In some embodiments, the front trench isolation structure is a second etch trench for growing silicon material through vapor phase epitaxy; wherein the silicon material is doped with impurities.

[0015] In some embodiments, the front trench isolation structure is defined by a second etched trench; wherein the second etched trench is formed by etching from a second surface of the substrate through an etching operation; the second surface is a surface opposite to the first surface.

[0016] To solve the above-mentioned technical problems, another technical solution adopted in the embodiments of the present invention is to provide an image sensor, including: the photoelectric conversion device as described above; an analog front-end circuit for converting the analog electrical signal generated by the photoelectric conversion device into a digital signal; and a digital processor for performing noise filtering and digital signal smoothing on the digital signal.

[0017] To solve the above-mentioned technical problems, another technical solution adopted in the embodiments of the present invention is: providing a method for forming a photoelectric conversion device, comprising: forming at least two device regions in a substrate, each device region including a first doped region and a second doped region; forming at least one front trench isolation structure from a second surface of the substrate toward the interior of the substrate; the at least one front trench isolation structure separating any two adjacent device regions; causing impurities doped in the front trench isolation structure to diffuse outward from the front trench isolation structure in the substrate to form a doped region; forming at least two back trench isolation structures from a first surface of the substrate in the doped region, such that a dark current suppression region is formed inside the back trench isolation structure; one of the back trench isolation structures surrounds one of the device regions, such that the front trench isolation structure is located outside the back trench isolation structure.

[0018] In some embodiments, forming at least one front trench isolation structure from the second surface of the substrate toward the interior of the substrate includes: etching from the second surface of the substrate to form a second etch trench; and growing silicon material with impurities in the second etch trench to form a front trench isolation structure.

[0019] In some embodiments, forming at least one front trench isolation structure from the second surface of the substrate toward the interior of the substrate includes: etching at least two second etch trenches from the second surface of the substrate, one of the etch trenches surrounding one of the back trench isolation structures; and growing silicon material with impurities in the at least two second etch trenches to form at least two front trench isolation structures.

[0020] The beneficial effects of the embodiments of the present invention are as follows: Unlike the prior art, the embodiments of the present invention avoid the formation of new surfaces in the device area by using a deep trench isolation structure on the back side to surround the device area, thereby avoiding the increase in dark count rate caused by new surface defects, reducing the dark count rate of the device, and making the device have better electrical performance and reliability. Attached Figure Description

[0021] Embodiments of the invention will now be described by way of example with reference to the accompanying drawings. One or more embodiments are illustrated by way of example with reference to the corresponding pictures in the drawings, and these illustrative descriptions do not constitute a limitation on the embodiments. For convenience, the same or similar elements are referred to by the same or similar reference numerals in the drawings, and the figures in the drawings are not to be limited by scale unless otherwise specified.

[0022] in,

[0023] Figure 1 This is a schematic cross-sectional view of an existing back-illuminated single-photon avalanche diode;

[0024] Figure 2 This is a schematic cross-sectional view of the first photoelectric conversion device provided in the embodiments of the present invention;

[0025] Figure 3 This is a top view of the first photoelectric conversion device provided in the embodiments of the present invention;

[0026] Figure 4 This is a schematic cross-sectional view of the second type of photoelectric conversion device provided in the embodiments of the present invention;

[0027] Figure 5 This is a top view of the second photoelectric conversion device provided in the embodiments of the present invention;

[0028] Figure 6 This is a schematic cross-sectional view of the third type of photoelectric conversion device provided in the embodiments of the present invention;

[0029] Figure 7 This is a top view of the third photoelectric conversion device provided in the embodiments of the present invention;

[0030] Figure 8 This is a schematic flowchart of a method for forming a photoelectric conversion device according to an embodiment of the present invention;

[0031] Figure 9 yes Figure 8 A schematic diagram of a sub-process of step S200 in the method for forming the photoelectric conversion device shown;

[0032] Figure 10 yes Figure 8 This is a schematic diagram of another sub-process of step S200 in the method for forming the photoelectric conversion device shown. Detailed Implementation

[0033] To facilitate understanding of this application, a more detailed description is provided below with reference to the accompanying drawings and specific embodiments. It should be noted that when an element is described as being "fixed to" another element, it can be directly on the other element, or one or more intermediate elements may exist between them. When an element is described as being "connected" to another element, it can be directly connected to the other element, or one or more intermediate elements may exist between them. The terms "upper," "lower," "inner," "outer," "bottom," etc., used in this specification indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, and are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application. Furthermore, the terms "first," "second," "third," etc., are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0034] Unless otherwise defined, all technical and scientific terms used in this specification have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs. The terminology used in this specification is for the purpose of describing particular embodiments only and is not intended to limit the scope of this application. The term "and / or" as used in this specification includes any and all combinations of one or more of the associated listed items.

[0035] Furthermore, the technical features involved in the different embodiments of this application described below can be combined with each other as long as they do not conflict with each other.

[0036] The technical solutions in this application will be described below with reference to the accompanying drawings.

[0037] Integrated circuit (IC) technology continues to advance, resulting in reduced device size for lower manufacturing costs, increased device density, faster speeds, and better performance. Due to the shrinking device size, the pixels in the pixel array of an image sensor are smaller and closer together. There is a need to improve the electrical and optical isolation between adjacent pixels in these image sensors to reduce blooming and crosstalk. Dielectric trenches and implant wells can be fabricated as isolation structures to isolate the pixels of the image sensor.

[0038] Back-illuminated single-photon avalanche diodes (SPADs) have become a mainstream image sensor technology in both commercial and scientific applications. A schematic cross-sectional view of the aforementioned back-illuminated single-photon avalanche diode is shown below. Figure 1 As shown, a first doped region 600 and a second doped region 700 are formed inside the substrate 300. In the PN junction formed by the first doped region 600 and the second doped region 700, photons are absorbed and electron-hole pairs are generated.

[0039] A front trench isolation structure 500 is formed by etching on the front side of the substrate 300, and a back deep trench isolation structure 400 is formed by etching on the back side of the substrate 300. The back deep trench isolation structure 400 is composed of a doped layer 410 and a dielectric filling layer 420. Since the front trench isolation structure 500 is made of silicon material with a certain doping concentration, when the doping concentration of the front trench isolation structure 500 is high enough, it will recombine the dark carriers generated by the back deep trench isolation structure 400, and at the same time, it will produce a certain pinning effect on the surface of the back deep trench isolation structure 400, reducing the probability of dark carrier generation.

[0040] The formation process of the front trench isolation structure 500 is as follows: In the substrate 300, the front trench is first etched, and then silicon material is grown by vapor phase epitaxy to fill the front trench. Finally, a ring of impurity distribution with high doping concentration and a concentration gradient is formed in the substrate 300 through thermal diffusion to suppress dark carriers on the surface of the back trench isolation structure 400. However, in the formation of the front trench isolation structure 500, the etching process introduces new interface defects, that is, there are also a lot of defects at the interface between the front trench isolation structure 500 and the substrate 300, making it impossible to use the front trench isolation structure 500 to reduce the dark count rate.

[0041] To address this problem, embodiments of the present invention provide a photoelectric conversion device, the schematic cross-sectional view of which is shown below. Figure 2 As shown, its top view is as follows Figure 3 As shown, the photoelectric conversion device includes a substrate 110, a front trench isolation structure 120, a device region 130, a back deep trench isolation structure 140, a doped region 150, and a microlens 160. The device region 130 includes a first doped region 132 and a second doped region 131.

[0042] Substrate 110 serves as the base material for the entire device, providing mechanical support and semiconductor properties. Substrate 110 has a second surface 112 and a first surface 111. The first surface 111 is a first dielectric layer, used to reduce the reflection of incident light. The second surface 112 is a second dielectric layer. The second dielectric layer is disposed between the single-photon avalanche diode and the front-side metal trace layer, wherein the front-side metal trace layer is electrically connected to the corresponding single-photon avalanche diode via contact wires. In this embodiment, substrate 110 may include any form of semiconductor body and doping (where the body may be, for example, a silicon block / complementary metal-oxide-semiconductor block, silicon-germanium, silicon-on-insulator, etc.), such as a semiconductor wafer or one or more grains on a wafer. Other forms of semiconductors and / or epitaxial layers may be formed on the semiconductor body and / or in a manner related to the semiconductor body in other ways.

[0043] The substrate 110 includes at least two avalanche diode cells formed within the substrate 110. Each avalanche diode cell includes a device region 130 and a back-side deep trench isolation structure 140 surrounding the device region 130. The device region 130 is used to convert incident radiation or incident light (e.g., photons) into an electrical signal. In some embodiments, the device region 130 includes a first doped region 132 and an adjacent second doped region 131. The first doped region 132 is located inside the substrate 110 and has a first doping form (e.g., p-type doping), and the second doped region 131 is located inside the substrate 110 and has a second doping form (e.g., n-type doping).

[0044] The back-side deep trench isolation structure 140 is disposed in the substrate 110 and extends from the back-side first dielectric layer 111 to the second dielectric layer 112 of the substrate 110. In a preferred embodiment, the back-side deep trench isolation structure 140 can extend into the interior of the second dielectric layer 112, wherein the thickness of the back-side deep trench isolation structure 140 extending into the second dielectric layer 112 can be less than or equal to the thickness of the second dielectric layer 112. Figure 3 As can be seen, a back-side deep trench isolation structure 140 surrounds a device region 130 to isolate adjacent device regions 130. In some embodiments, the back-side deep trench isolation structure 140 includes a doped layer 141 and a dielectric filling layer 142 (specifically, a metal or a high-dielectric-constant dielectric material), the doped layer 141 having the first doping form described above (e.g., p-type doping). The doped layer 141 is arranged along one sidewall surface of the first etch trench, and the dielectric filling layer 142 fills the remaining space of the deep trench. In the embodiments of this application, the first etch trench is formed by etching from the first surface 111 of the substrate through an etching operation.

[0045] The front trench isolation structure 120 is disposed in the substrate 110 and extends from the front second dielectric layer 112 to the first dielectric layer 111 of the substrate 110. Figure 3 As can be seen, a front trench isolation structure 120 exists between any two adjacent avalanche diode cells, wherein the front trench isolation structure 120 is located between the back deep trench isolation structures 140 of the two adjacent avalanche diode cells. In some embodiments, the front trench isolation structure 120 is formed by growing silicon material with a certain doping concentration through vapor phase epitaxy in a second etch trench. In the embodiments of this application, the second etch trench is formed from the second surface 112 of the substrate through an etching operation.

[0046] The doped region 150 is formed by the outward diffusion of impurities doped in the front trench isolation structure 120 through thermal diffusion, and has a doping concentration gradient that gradually decreases from the front trench isolation structure 120 outward. It should be noted that, in terms of formation sequence, the front trench isolation structure 120 is formed before the back deep trench isolation structure 140, so that the back deep trench isolation structure 140 is formed within the doped region 150. This is manifested in at least a portion of the doped region 150 extending beyond the back deep trench isolation structure 140 into the avalanche diode cell, achieving the purpose of the doped region 150 covering the contact surface between the back deep trench isolation structure 140 and the substrate 110, thereby forming dark current suppression regions in both adjacent avalanche diode cells. In the dark current suppression region, dark carriers generated due to surface defects at the contact surface between the back deep trench isolation structure 140 and the substrate 110 recombine with holes in the diffusion region 150. This reduces the dark count rate of the single-photon avalanche diode, thereby improving the signal-to-noise ratio and overall performance of the single-photon avalanche diode, enhancing its reliability and accuracy in various applications, and ultimately improving the ranging performance of the lidar system.

[0047] The distance between the centerline of the front trench isolation structure 120 and the inner side of the back deep trench isolation structure 140 of the adjacent avalanche diode unit is defined as the first distance; the distance between the centerline of the front trench isolation structure 120 and the minimum effective concentration boundary of the doped region is defined as the second distance, where the minimum effective concentration boundary has a preset doping concentration. In this embodiment, to ensure that the doped region 150 covers the contact surface between the back deep trench isolation structure 140 and the substrate 110, the first distance must be less than the second distance.

[0048] Microlenses 160 are arranged on the first surface 111 of the substrate 110 and aligned with the corresponding device regions 130 to focus incident light and improve photon reception efficiency. A metal layer (not shown here as it is not part of this application) is also disposed between the microlenses 160 and the first surface 111.

[0049] In some embodiments, each of the plurality of microlenses 160 has a substantially flat bottom surface and a curved top surface, the substantially flat bottom surface being adjacent to the aforementioned metal layer. The curved top surface is configured to focus incident radiation or incident light. During the operation of the aforementioned photoelectric conversion device, the incident radiation or incident light is focused into the underlying device region 130 by the microlenses 160. When incident radiation or incident light of sufficient energy strikes the device region 130, it generates an electron-hole pair, thus creating a photocurrent. In particular, although Figure 2 The microlens 160 is shown fixed to the aforementioned photoelectric conversion device. It should be understood that the aforementioned photoelectric conversion device may not include a microlens, but the microlens may be attached to the aforementioned photoelectric conversion device in a different manufacturing process.

[0050] Furthermore, embodiments of the present invention provide another photoelectric conversion device, the schematic cross-sectional view of which is shown below. Figure 4 As shown, its top view is as follows Figure 5 As shown, the schematic cross-sectional view of this photoelectric conversion device is the same as... Figure 2 The photoelectric conversion device also includes a substrate 110, a front trench isolation structure 120, a device region 130, a back deep trench isolation structure 140, a doped region 150, and a microlens 160. The device region 130 includes a first doped region 132 and a second doped region 131.

[0051] Substrate 110 serves as the base material for the entire device, providing mechanical support and semiconductor properties. Substrate 110 has a second dielectric layer 112 and a first dielectric layer 111. In embodiments of this application, substrate 110 may include any form of semiconductor body (e.g., silicon block / complementary metal-oxide-semiconductor block, silicon-germanium, silicon-on-insulator, etc.), such as a semiconductor wafer or one or more grains on a wafer. Other forms of semiconductors and / or epitaxial layers may be formed on the semiconductor body and / or in a manner that has other forms of correlation with the semiconductor body.

[0052] The substrate 110 includes at least two avalanche diode cells formed therein. Each avalanche diode cell includes a device region 130 and a back-side deep trench isolation structure 140 surrounding the device region 130. The device region 130 is used to convert incident radiation or incident light (e.g., photons) into an electrical signal. In some embodiments, the device region 130 includes a first doped region 132 and an adjacent second doped region 131. The first doped region 132 is inside the substrate 110 and has a first doping form (e.g., p-type doping), and the second doped region 131 is inside the substrate 110 and has a second doping form (e.g., n-type doping).

[0053] The back-side deep trench isolation structure 140 is disposed in the substrate 110 and extends from the back-side first dielectric layer 111 to the second dielectric layer 112 of the substrate 110. Figure 5 As can be seen, a back-side deep trench isolation structure 140 surrounds a device region 130 to isolate adjacent device regions 130. In some embodiments, the back-side deep trench isolation structure 140 includes a doped layer 141 and a dielectric filling layer 142 (specifically, a metal or a high-dielectric-constant dielectric material), the doped layer 141 having the first doping form described above (e.g., p-type doping). The doped layer 114 is arranged along one sidewall surface of the first etch trench, and the dielectric filling layer 142 fills the remaining space of the deep trench. In the embodiments of this application, the first etch trench is formed by etching from the first surface 111 of the substrate through an etching operation.

[0054] The front trench isolation structure 120 is disposed in the substrate 110 and extends from the front second dielectric layer 112 to the first dielectric layer 111 of the substrate 110. Figure 5 As can be seen, each avalanche diode unit has a corresponding front trench isolation structure 120. The corresponding front trench isolation structure 120 surrounds the back deep trench isolation structure 140 of the avalanche diode unit, and the front trench isolation structure 120 is located outside the back deep trench isolation structure 140. In some embodiments, the front trench isolation structure 120 is formed by growing silicon material with a certain doping concentration through vapor phase epitaxy in a second etch trench. In this embodiment, the second etch trench is formed from the second surface 112 of the substrate through an etching operation.

[0055] The doped region 150 is formed by the outward diffusion of impurities doped in the front trench isolation structure 120 through thermal diffusion, and has a doping concentration gradient that gradually decreases from the front trench isolation structure 120 outward. It should be noted that, in terms of formation sequence, the front trench isolation structure 120 is formed before the back deep trench isolation structure 140, so that the back deep trench isolation structure 140 is formed within the doped region 150. This is manifested in at least a portion of the doped region 150 extending beyond the back deep trench isolation structure 140 into the avalanche diode cell, achieving the purpose of the doped region 150 covering the contact surface between the back deep trench isolation structure 140 and the substrate 110, thereby forming dark current suppression regions in both adjacent avalanche diode cells. In the dark current suppression region, dark carriers generated due to surface defects at the contact surface between the back deep trench isolation structure 140 and the substrate 110 recombine with holes in the diffusion region 150.

[0056] The distance between the outer side of the back-side deep trench isolation structure of the avalanche diode unit and the centerline of the corresponding front-side trench isolation structure is defined as the third distance; the distance between the centerline of the corresponding front-side trench isolation structure and the minimum effective concentration boundary of the doped region formed by the diffusion of the corresponding front-side trench isolation structure is defined as the fourth distance, where the minimum effective concentration boundary has a preset doping concentration. In this embodiment, to ensure that the doped region 150 covers the contact surface between the back-side deep trench isolation structure 140 and the substrate 110, the third distance must be less than the fourth distance.

[0057] Microlenses 160 are arranged on the first surface 111 of the substrate 110 and aligned with the corresponding device regions 130 to focus incident light and improve photon collection efficiency. A metal layer (not shown here as it is not part of this application) is also disposed between the microlenses 160 and the first surface 111.

[0058] In some embodiments, each of the plurality of microlenses 160 has a substantially flat bottom surface and a curved top surface, the substantially flat bottom surface being adjacent to the aforementioned metal layer. The curved top surface is configured to focus incident radiation or incident light. During the operation of the aforementioned photoelectric conversion device, the incident radiation or incident light is focused into the underlying device region 130 by the microlenses 160. When incident radiation or incident light of sufficient energy strikes the device region 130, it generates an electron-hole pair, thus creating a photocurrent. In particular, although Figure 4 The microlens 118 is shown fixed to the aforementioned photoelectric conversion device. It should be understood that the aforementioned photoelectric conversion device may not include a microlens, but the microlens may be attached to the aforementioned photoelectric conversion device in a different manufacturing process.

[0059] Unlike existing technologies, the present invention uses a back-side deep trench isolation structure to surround the device area, thereby avoiding new interface defects introduced during the formation of the front-side trench isolation structure. This avoids the increase in dark count rate caused by new interface defects, reduces the dark count rate of the device, and enables the device to have better electrical performance and reliability.

[0060] The present invention provides another photoelectric conversion device, the schematic cross-sectional view of which is shown below. Figure 6 As shown, its top view is as follows Figure 7 As shown, the schematic cross-sectional view of this photoelectric conversion device is the same as... Figure 2 The photoelectric conversion device also includes a substrate 110, a device region 130, a back-side deep trench isolation structure 140, a doped region 150, and a microlens 160. The device region 130 includes a first doped region 132 and a second doped region 131.

[0061] Substrate 110 serves as the base material for the entire device, providing mechanical support and semiconductor properties. Substrate 110 has a second surface 112 and a first surface 111. In embodiments of this application, substrate 110 may include any form of semiconductor body (e.g., silicon block / complementary metal-oxide-semiconductor block, silicon-germanium, silicon-on-insulator, etc.), such as a semiconductor wafer or one or more grains on a wafer. Other forms of semiconductors and / or epitaxial layers may be formed on the semiconductor body and / or in a manner that has other forms of correlation with the semiconductor body.

[0062] The substrate 110 includes at least two avalanche diode cells formed on the substrate 110. Each avalanche diode cell includes a device region 130 and a back-side deep trench isolation structure 140 surrounding the device region 130. The device region 130 is used to convert incident radiation or incident light (e.g., photons) into an electrical signal. In some embodiments, the device region 130 includes a first doped region 132 and an adjacent second doped region 131. The first doped region 132 is inside the substrate 110 and has a first doping form (e.g., p-type doping), and the second doped region 131 is inside the substrate 110 and has a second doping form (e.g., n-type doping).

[0063] It should be noted that, in this embodiment, a front trench isolation structure exists at a certain time. This structure is also placed in the substrate 110 and extends from the front second dielectric layer 112 to the first dielectric layer 111 of the substrate 110. The front trench isolation structure is arranged between any two adjacent avalanche diode cells to separate the back-side deep trench isolation structure 140 of the two adjacent avalanche diode cells. The front trench isolation structure is also formed by growing silicon material with a certain doping concentration through vapor phase epitaxy in the second etch trench. In this embodiment, the second etch trench is formed by etching from the second surface 112 of the substrate.

[0064] The doped region 150 is formed by the outward diffusion of impurities doped in the front trench isolation structure through thermal diffusion, and has a doping concentration gradient that gradually decreases from the front trench isolation structure outward. It is known that the front trench isolation structure is formed before the back deep trench isolation structure. In the embodiments of this application, with... Figure 1Similar to the back-illuminated single-photon avalanche diode shown, the back-side deep trench isolation structure 140 is also placed within the front-side trench isolation structure. The difference is that during the etching process of the back-side deep trench isolation structure 140, its width is greater than that of the front-side trench isolation structure, allowing the back-side deep trench isolation structure 140 to completely etch the front-side trench isolation structure, including the contact surface with numerous defects formed between the front-side trench isolation structure and the substrate 110. Only the doped region 150 formed by thermal diffusion of the front-side trench isolation structure is retained, achieving the purpose of the doped region 150 covering the contact surface between the back-side deep trench isolation structure 140 and the substrate 110, thereby forming dark current suppression regions in both adjacent avalanche diode cells. In the dark current suppression region, dark carriers generated by surface defects at the contact surface between the back-side deep trench isolation structure 140 and the substrate 110 recombine with holes in the diffusion region 150, thereby reducing the dark count rate of the single-photon avalanche diode, thus improving the signal-to-noise ratio and overall performance of the single-photon avalanche diode, enhancing the reliability and accuracy of the single-photon avalanche diode in various applications, and thus improving the ranging performance of the lidar system.

[0065] Microlenses 160 are arranged on the first surface 111 of the substrate 110 and aligned with the corresponding device regions 130 to focus incident light and improve photon collection efficiency. A metal layer (not shown here as it is not part of this application) is also disposed between the microlenses 160 and the first surface 111.

[0066] In some embodiments, the plurality of microlenses 160 have a curved upper surface that can focus incident radiation or incident light. During the operation of the photoelectric conversion device, the incident radiation or incident light is focused into the lower device region 130 by the microlenses 160. When incident radiation or incident light of sufficient energy strikes the device region 130, it generates an electron-hole pair to produce a photocurrent.

[0067] Based on the photoelectric conversion device provided in any of the above embodiments, this invention also provides a receiving sensor. The receiving sensor may include the photoelectric conversion device provided in any of the above embodiments, an analog front-end circuit for converting the analog electrical signal generated by the photoelectric conversion device into a digital signal, and a digital processor for processing the digital signal. The processing of the digital signal may include, for example, noise filtering and digital signal smoothing. It is understood that this application does not limit the number of photoelectric conversion devices included in the receiving sensor.

[0068] Based on the aforementioned receiving sensor, this invention also provides a lidar, which may include the aforementioned receiving sensor, which includes the photoelectric sensor device provided in any of the above embodiments. The receiving sensor may be a linear array or a planar array; this application does not limit the number or arrangement of the receiving sensors. It is understood that the lidar also includes a transmitting sensor. The transmitting sensor emits a detection laser, which is reflected by the target object and received by the receiving sensor, thereby detecting the target object. The transmitting sensor may be an edge-emitting laser (EEL) or a vertical-cavity surface-emitting laser (VCSEL). ， (vertical cavity surface emitting laser). This application does not limit the number of transmitting sensors; that is, it may include one or more transmitting sensors, which may be arranged in a linear array or a planar array. This application does not impose a unique limitation on the arrangement of the transmitting devices. The correspondence between transmitting and receiving sensors can be one-to-one, one-to-many, or many-to-one; this application does not impose a unique limitation on this.

[0069] In view of the photoelectric conversion device provided in the above embodiments, the present invention provides a method for forming a photoelectric conversion device, the process of which is shown in the schematic diagram below. Figure 8 As shown, the specific steps include the following:

[0070] Step S100: Form at least two device regions in the substrate, each device region including a first doped region and a second doped region.

[0071] Step S200: From the second surface of the substrate, at least one front trench isolation structure is formed into the interior of the substrate; the at least one front trench isolation structure separates any two adjacent device regions.

[0072] Step S300: The impurities doped in the front trench isolation structure diffuse outward from the front trench isolation structure in the substrate to form a doped region.

[0073] Step S400: The impurities doped in the front trench isolation structure form at least two back deep trench isolation structures in the doped region from the first surface of the substrate, so that a dark current suppression region is formed inside the back deep trench isolation structure.

[0074] In some embodiments of this application, step S200 specifically includes the following steps to form Figure 2 The schematic diagram of the photoelectric conversion device shown is as follows: Figure 9 As shown:

[0075] Step S211: Etch a second etch trench from the second surface of the substrate.

[0076] Step S212: A silicon material with impurities is grown in the second etching tank to form a front trench isolation structure.

[0077] In some other embodiments of this application, step S200 specifically includes the following steps to form Figure 4 The schematic diagram of the photoelectric conversion device shown is as follows: Figure 9 As shown:

[0078] Step S221: Etch from the second surface of the substrate to form at least two second etch trenches, one of which surrounds a back-side deep trench isolation structure.

[0079] Step S222: Grow silicon material with impurities in at least two second etching trenches to form at least two front trench isolation structures.

[0080] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application, and not to limit them; under the concept of this application, the technical features of the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other variations of different aspects of this application as described above. For the sake of brevity, they are not provided in detail; although this application has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or make equivalent substitutions for some of the technical features; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of this application.

Claims

1. A photoelectric conversion device, characterized in that, include: Substrate; Front groove isolation structure; At least two avalanche diode units are formed on the substrate; Each of the avalanche diode units includes: a device region and a back-side deep trench isolation structure surrounding the device region; and The doped region is formed by diffusion outward from the front trench isolation structure; the doped region has a doping concentration gradient that gradually decreases outward from the front trench isolation structure; Among them, there is at least one front trench isolation structure between any two adjacent avalanche diode units; At least a portion of the doped region extends beyond the back-side deep trench isolation structure, forming dark current suppression regions in both adjacent avalanche diode cells.

2. The photoelectric conversion device according to claim 1, characterized in that, Between any two adjacent avalanche diode units, there exists a front trench isolation structure; The front trench isolation structure is located between the back deep trench isolation structures of the two adjacent avalanche diode units.

3. The photoelectric conversion device according to claim 2, characterized in that, The first distance is less than the second distance; Wherein, the first distance is the distance between the centerline of the front trench isolation structure and the inner side of the back deep trench isolation structure of the adjacent avalanche diode unit; The second distance is the distance between the centerline of the front trench isolation structure and the minimum effective concentration boundary of the doped region, wherein the minimum effective concentration boundary has a preset doping concentration.

4. The photoelectric conversion device according to claim 1, characterized in that, Each of the avalanche diode units has a corresponding front trench isolation structure; The corresponding front trench isolation structure surrounds the back deep trench isolation structure of the avalanche diode unit, and the front trench isolation structure is located outside the back deep trench isolation structure.

5. The photoelectric conversion device according to claim 4, characterized in that, The third distance is less than the fourth distance. Wherein, the third distance is the distance between the outer side of the back-side deep trench isolation structure of the avalanche diode unit and the centerline of the corresponding front-side trench isolation structure; The fourth distance is the distance between the centerline of the corresponding front trench isolation structure and the minimum effective concentration boundary of the doped region formed by the diffusion of the corresponding front trench isolation structure, wherein the minimum effective concentration boundary has a preset doping concentration.

6. The photoelectric conversion device according to claim 1, characterized in that, The back-side deep trench isolation structure is a first etched groove filled with isolation material; The insulating material includes: a metal or a high dielectric constant dielectric material.

7. The photoelectric conversion device according to claim 6, characterized in that, The first etched groove is formed from the first surface of the substrate by an etching operation.

8. The photoelectric conversion device according to claim 7, characterized in that, The first surface of the substrate is also provided with a microlens.

9. The photoelectric conversion device according to claim 7, characterized in that, The front trench isolation structure is a second etching trench for growing silicon material through vapor phase epitaxy. The silicon material contains impurities.

10. The photoelectric conversion device according to claim 9, characterized in that, The front trench isolation structure is defined by the second etched groove; The second etched groove is formed by etching from the second surface of the substrate through an etching operation; the second surface is the surface opposite to the first surface.

11. A receiving sensor, characterized in that, include: The photoelectric conversion device as described in any one of claims 1-10; An analog front-end circuit is used to convert the analog electrical signals generated by the photoelectric conversion device into digital signals. A digital processor for processing the digital signal.

12. A lidar, characterized in that, include: A transmitting sensor is used to emit detection lasers; The receiving sensor as described in claim 11 is used to receive the echo of the detection laser after it is reflected by the target object.

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