Package for semiconductor die, semiconductor structure and method of manufacturing power module

Abstract

The invention relates to a package for a semiconductor die, a semiconductor structure and a method of manufacturing a power module. A device may include a substrate. The device may include a metal portion coupled to a package of the substrate, the metal portion configured to function as an electrical connection from the semiconductor die. The device may include a die region on a substrate. The device may include a barrier surrounding at least a portion of the die region. The device may include a flexible material disposed between the die region and the barrier. The device may include an encapsulant surrounding the substrate and a metal portion of the package.

Description

Technical Field

[0001] This specification relates to the assembly and packaging of semiconductor device modules, semiconductor device assemblies, and semiconductor devices. More specifically, this specification relates to reliability improvements for power modules. Summary of the Invention

[0002] In some aspects, the technology described herein relates to a package for a semiconductor die, the package comprising: a substrate; a metal portion of the package coupled to the substrate, the metal portion being configured to serve as an electrical connection from the semiconductor die; a die region on the substrate; a barrier surrounding at least a portion of the die region; a flexible material disposed between the die region and the barrier; and an encapsulant surrounding the substrate and the metal portion of the package.

[0003] In some aspects, the technology described herein relates to a structure comprising: a silicon carbide substrate; a metal layer disposed on the silicon carbide substrate; an anchor array formed in the metal layer; a passivation layer disposed on the metal layer; and a coating on the passivation layer.

[0004] In some aspects, the technology described herein relates to a method comprising: forming an anchor array in a metal layer on a silicon carbide substrate; forming a channel in the underside of a die attachment pad; attaching the silicon carbide substrate to an upper surface of the die attachment pad; attaching a copper barrier to the die attachment pad, the copper barrier surrounding the silicon carbide substrate; disposing a flexible material at the edge of the silicon carbide substrate; and forming a molding compound around the die attachment pad. Attached Figure Description

[0005] Figure 1 This is a side front view of a power module according to some specific embodiments of this disclosure.

[0006] Figure 2 This is a top plan view of a power module (e.g., a SiC-based power module) according to some specific embodiments of this disclosure.

[0007] Figure 3 This is a cross-sectional view of a chip assembly in a power module (e.g., a SiC-based power module) according to some specific embodiments of this disclosure.

[0008] Figure 4 This is a bottom perspective view of a power module (e.g., a SiC-based power module) according to some specific embodiments of this disclosure.

[0009] Figure 5 This is a flowchart illustrating a method for manufacturing a power module (e.g., a SiC-based power module) according to some specific embodiments of this disclosure.

[0010] Figures 6 to 8 It is a plot of simulated reliability results comparing the performance of different power modules (e.g., SiC-based power modules) based on some specific embodiments of this disclosure.

[0011] When with attachment Figure 1 When reading this document, it is best to understand all aspects of this disclosure from the following detailed description. It should be noted that, according to industry practice, various features are not necessarily drawn to scale. For clarity of discussion, the dimensions of various features may be arbitrarily increased or decreased. In the accompanying drawings, the same reference numerals may indicate the same and / or similar parts (elements, structures, etc.) in different views. The accompanying drawings illustrate various specific embodiments discussed in this disclosure generally by way of example and not limitation. Reference numerals shown in a drawing may not be repeated for the same and / or similar elements in related views. Reference numerals repeated in multiple drawings may not be specifically discussed with respect to each of these drawings, but rather provide context for related views. Furthermore, not all similar elements in the drawings are specifically referenced by reference numerals when multiple instances of the element are illustrated. Detailed Implementation

[0012] The power modules (e.g., high-power semiconductor device modules) described herein are configured for high reliability by implementing various stress-reducing features. Examples of stress-reducing features that can be incorporated into the power module in any combination may include, for example, coatings (e.g., silicone coatings), channels (e.g., trenched channels, recessed channels), anchor components, and / or barriers (e.g., copper barriers).

[0013] The power modules described herein can be implemented using multiple semiconductor dies, substrates (e.g., die-attach pads (DAPs)), electrical interconnects, and molding compounds. The power transistors described herein can include, for example, insulated-gate bipolar transistors (IGBTs), power metal-oxide-semiconductor field-effect transistors (MOSFETs), and the like. Fast recovery diodes (FRDs) can be used in conjunction with power transistors. Some high-power implementations can be in the form of integrated circuits, while others can include discrete devices built on a semiconductor substrate. Electrical interconnects within the high-power semiconductor device module can include, for example, bonding wires, conductive spacers, and / or conductive clamps. Lead frames (e.g., conductive or metallic portions of a package) can be used to provide external electrical connections to the high-power semiconductor device module (e.g., from external circuitry). Polymer molding compounds can be used as encapsulants to protect components of the device assembly.

[0014] The leadframe can be any type of metal portion (e.g., copper, aluminum) of a package (e.g., leads, terminals) that can be used to connect a device (e.g., a semiconductor die) to other components (e.g., components outside the package, power supplies, etc.). Although leadframes are used in many examples and by way of example, any type of metal portion can be used and / or included in the package described herein.

[0015] Some of the high-power chip components described herein can operate at voltages ranging from about 200V to about 1000V. These high-power chip components, encapsulated as semiconductor device modules, can be used as power converters in a variety of applications, including electric vehicles (EVs) (e.g., electric cars, aircraft, or drones), hybrid electric vehicles (HEVs), and industrial applications.

[0016] Silicon carbide (SiC) can be used as an alternative substrate material to silicon in the fabrication of integrated circuits, and particularly in the manufacture of power modules. Some useful characteristics of SiC-based microchips (e.g., metal-oxide-semiconductor field-effect transistors (SiCMOSFETs)) include reduced weight, low power consumption, and the ability to maintain high-temperature operation. While silicon devices operate at temperatures up to about 120°C, SiC devices can operate at temperatures up to 500°C to 800°C due to its high thermal conductivity, which is about 3.5 times that of silicon. Therefore, SiC devices are particularly suitable for power applications such as electric vehicles (EVs), hybrid electric vehicles (HEVs), solar panels, and industrial applications. SiC devices have already been incorporated into EV production into vehicle components such as DC-DC converters and onboard fast battery chargers.

[0017] In some implementations, discrete packages may experience material failure under thermal cycling conditions. Specifically, SiC discrete packages may fail due to the high Young's modulus (e.g., stiffness) of the SiC substrate material. Such failures can include delamination of the top metal layer of the SiC die, as well as metal slip / passivation cracking. Passivation layers deposited on top of the top metal layer have been observed to become brittle during temperature cycling reliability testing. As temperatures approach 175°C, the passivation layer can preferentially shrink, leading to failure of the underlying metal layer. Passivation cracking can then occur. This progression is known as ratchet-assisted passivation cracking. Other material failures that can occur in SiC packages include passivation cracking due to metal shear and back metal peeling on the bottom of the die. While much of the discussion here pertains to SiC devices, the concepts described herein can be applied to devices formed from various substrate types, including Si, gallium nitride (GaN), and others.

[0018] Solutions to passivation cracking and metal peeling failure modes focus on reducing material stress within the passivation layer. One way to reduce passivation stress is to form walls around the die to reduce the effect of molding compounds (e.g., polymer molding compounds, epoxy molding compounds (EMC)) on the die top. Another method is to protect the die edges by adding a buffer layer in the form of a soft material (e.g., a silicone coating) around the die periphery, where most cracking occurs. Yet another way to reduce stress is to increase the flexibility of the die attachment pads. This can be achieved by creating channels in the die attachment pads around the die periphery. A further method to reduce stress by controlling the metal ratcheting effect is to add anchors (e.g., copper anchors) around the corners and edges of the first aluminum layer within the die, adjacent to the SiC substrate. Any combination of these measures can be implemented as a reliability-enhancing feature for SiC-based power modules.

[0019] Figure 1 This is a side front view of a power module 100 according to some specific embodiments of this disclosure. The power module 100 includes a chip assembly or die 102 coupled to (e.g., mounted on) a die attachment pad 104 on a leadframe 200. The leadframe 200 may be made of a conductive material, such as a highly conductive metal like copper, aluminum, or an aluminum-copper alloy (AlCu). Reference Figure 2 The lead frame 200 is further described. The die 102 may be attached to the die attachment pad 104 (e.g., mounted on or coupled to the die attachment pad) using solder or a sintered layer (e.g., conductive epoxy, silver (Ag) or copper (Cu) sintered material and / or conductive adhesive).

[0020] The power module 100 is configured for high reliability by implementing various stress-reducing features. Figure 1 Examples of stress-reducing features that can be incorporated into power module 100 include coating 106 (e.g., silicone coating), channel 108 (e.g., grooved channel), anchor assembly 110, and stop 112 (e.g., copper stop). These stress-reducing features can be incorporated in any combination that excludes one or more of the stress-reducing features. Figure 1 The side-view shown simultaneously illustrates all four stress-reducing features, thus providing context and showing the positioning of the features relative to each other.

[0021] In some embodiments, different substrates can be used to fabricate die 102 (e.g., semiconductor dies), such as a hybrid silicon / SiC die configuration in a hybrid die configuration. For example, an IGBT can be fabricated using a SiC substrate, while a controller can be fabricated using a silicon substrate. In some embodiments as described herein, more than one die 102 can be fabricated on the same substrate suitable for high-power applications, such as a SiC substrate. In some embodiments, die 102 may include, for example, a controller and / or an insulated-gate bipolar transistor (IGBT). In some embodiments that include multiple dies (such as die 102), such chip assemblies may include IGBTs and controllers configured to control the IGBTs. The controller may also act as a protection device for the IGBTs. For example, the controller may provide temperature protection and / or overvoltage protection for the IGBTs. The controller may also limit the amount of current delivered to the IGBTs. In some embodiments, the controller may be configured to monitor the IGBTs. In some embodiments, other types of semiconductor dies (e.g., silicon carbide MOSFETs, diodes, etc.) may be used as one or more dies in die 102. In some implementations, SiC MOSFETs can replace IGBTs. In some implementations, fast recovery diodes (FRDs) can be used in conjunction with power transistors.

[0022] As mentioned above, some embodiments may include multiple dies, such as die 102 (e.g., a first die and a second die), and may be coupled to die attachment pads 104 using two different adhesives. For example, in some embodiments, the first die may be sintered to die attachment pads 104, while the second die may be attached to die attachment pads 104 (or a separate die attachment pad) using conductive polyimide tape.

[0023] A molding compound can be formed on die 102. The molding compound... Figure 1 Not shown in the figures, but illustrated in subsequent figures and described below. In some embodiments, the molding compound (e.g., molding material or compound, encapsulating material) may be or may include a non-conductive layer / material. In some embodiments, the molding compound is a non-conductive material (such as epoxy resin) that can be formed using a transfer molding process or a compression molding process (application, etc.). In some embodiments, the molding compound may include a separate plastic housing that is included in a semiconductor device assembly.

[0024] As mentioned above, the power module 100 is configured for high reliability by implementing various stress-reducing features. Figure 1The diagram shows four examples of stress-reducing features that can be incorporated into the power module 100, including coating 106, channel 108, anchor assembly 110, and stop 112 (e.g., copper stop). Figure 1 The side-view shown simultaneously illustrates all four stress-reducing features, thus providing context and demonstrating their positioning relative to each other. As mentioned above, one or more of the stress-reducing features can be excluded.

[0025] Although the stress-reducing features are shown together in the figures, a practical implementation of the power module 100 may include various sub-combinations of the four stress-reducing features presented herein. For example, each of the four stress-reducing features may be implemented individually. In some cases, the four stress-reducing features may be implemented in pairs (e.g., channel 108 together with stop 112 or anchor assembly 110; coating 106 together with channel 108, anchor assembly 110 or stop 112; or anchor assembly 110 together with stop 112). In some cases, coating 106 may be implemented together with channel 108 and stop 112; in some cases, coating 106 may be implemented together with channel 108 and anchor assembly 110. In some cases, channel 108 may be implemented using anchor assembly 110 and stop 112.

[0026] Anchor assembly 110 is part of the internal structure of core 102, such as Figure 1 As indicated, and referenced below. Figure 3 A more detailed description.

[0027] In some embodiments, coating 106 may be disposed around (e.g., positioned around) at least a portion of the periphery of die 102. Coating 106 covers the area of ​​die 102 near its top edge. In some embodiments, coating 106 may contact die 102 to provide soft material cushioning to prevent cracking near the edge of die 102. Coating 106 may completely or partially cover one or more sides of die 102. For example, a portion of coating 106 may cover the top portion of die 102, a portion of coating 106 may cover the sidewalls of die 102, and a portion of coating 106 may be coupled to the top surface of lead frame 200.

[0028] In some embodiments, coating 106 may be applied to the entire periphery of die 102. In other words, from a top cross-sectional view, coating 106 may be applied around the entire periphery of die 102. In some embodiments, coating 106 may be applied to one side or opposite side of die 102, rather than the entire periphery of die 102. In some embodiments, coating 106 may be applied to discontinuous portions of the periphery of die 102. In some embodiments, coating 106 may be applied around die 102 in a regular or irregular pattern (e.g., in dots or segments). Coating 106 may extend to a height above the height of die 102.

[0029] In some embodiments, coating 106 may have a thickness between approximately 50 micrometers and approximately 100 micrometers. In some embodiments, coating 106 may have a width W1 of approximately 0.3 mm and may overlap the edge of die 102 by approximately 0.1 mm on each side. Although the cross-sectional shape of coating 106 is in Figure 1 The coating is shown as an L-shape with square corners, but in some specific implementations, the coating 106 may have rounded corners.

[0030] In some embodiments, coating 106 may have a height H1. Height H1 may be less than or greater than width W1. In some embodiments, height H1 may be equal to (or substantially equal to) width W1.

[0031] In some specific implementations, the blocking element 112 may be a wall (e.g., a structure) formed around the periphery of the coating 106, while being spaced apart from the coating 106 by a gap g. In other words, when viewed from above (as at least...), Figure 2 As shown), coating 106 can be concentrically formed within the periphery of the barrier 112.

[0032] In some embodiments, the blocking height H2 or thickness of the blocking member 112 can range from about 0.25 mm to about 0.35 mm, and the width wb of the blocking member 112 can range from about 0.45 mm to about 0.55 mm. In some embodiments, the ratio of the width wb of the blocking member 112 to the width w of the coating 106 can be about 3:1, and the blocking member 112 can be about twice the thickness of the coating 106. In some embodiments, the blocking member 112 can be about 1.0 mm wide and can have a thickness between about 100 micrometers and about 200 micrometers. The blocking height H2 of the blocking member 112 can be at or above the height of the die 102, such that when the power module 100 is packaged, the blocking member 112 will be used to deflect or separate the molding compound from the top surface of the chip assembly. When the blocking member 112 is in place, it will prevent the molding compound from exerting force on the top of the die, thereby reducing stress on the die.

[0033] In some embodiments, the height H2 of the blocking member 112 may be less than or greater than the width wb. In some embodiments, the height H2 may be equal to (or substantially equal to) the width wb.

[0034] In some embodiments, the height H2 of the blocking member 112 may be less than or greater than the height H1 of the coating 106. In some embodiments, the height H2 of the blocking member 112 may be equal to (or substantially equal to) the height H1 of the coating 106.

[0035] A channel 108 is formed in the lower surface of the lead frame 200. The formation of the channel 108 is used to increase the flexibility of the lead frame 200, for example, to reduce stiffness. In some embodiments, the channel 108 may be aligned with the stop 112 (e.g., directly below the stop, vertically below it). In some embodiments, the channel 108 (or a portion thereof) may be offset from or not vertically aligned with the stop 112.

[0036] In some embodiments, the channel 108 can provide stress reduction when its shape substantially matches (e.g., follows) the shape of the stop 112. In some embodiments, the stop height H2 is approximately equal to the depth H3 of the channel 108. In some embodiments, the stop height H2 is less than or greater than the depth H3 of the channel 108. In some embodiments, the stop width wb is approximately equal to the width W2 of the channel 108. In some embodiments, the stop width wb is less than or greater than the width W2 of the channel 108.

[0037] By reducing the thermal mass and increasing the surface area of ​​the lead frame 200, the formation of the channel 108 can facilitate heat conduction and thus more efficiently cool the underside (e.g., bottom side) of the lead frame 200. In some embodiments, the underside of the lead frame 200 may also be configured for attachment to a heat sink (not shown).

[0038] In some embodiments, die 102 may be coupled to or associated with one or more direct-bonded metal (DBM) substrates. In some embodiments, the DBM substrate may include an insulating layer disposed between the first metal layer and the second metal layer. The insulating layer may be, for example, a ceramic layer. In some embodiments, the insulating layer may be or may contain, for example, a ceramic material, such as alumina (Al2O3) or aluminum nitride (AlN).

[0039] In some embodiments, a DBM substrate can be formed by bonding one or more metal layers (e.g., a first metal layer, a second metal layer) to an insulating layer. In some embodiments, one or more metal layers can be bonded to an insulating layer using, for example, a high-temperature process.

[0040] In some embodiments, the first and / or second metal layers of the DBM substrate may be, or can be used as, a heat sink. In some embodiments, the first and / or second metal layers may be coupled to a heat sink. In some embodiments, at least a portion of one or more of the first or second metal layers may be exposed by a molding material.

[0041] In some embodiments, the first and / or second metal layers of the DBM substrate may be or may include patterned metal layers comprising one or more conductive traces. In some embodiments, the first and / or second metal layers may be or may include patterned layers configured to form one or more circuits, one or more conductive blind vias and / or through-holes, etc.

[0042] In some embodiments, the DBM substrate may be or may include a directly bonded copper (DBC) substrate (e.g., a DBM having a copper metal layer). In some embodiments, such as in a DBC substrate embodiment, the first metal layer and / or the second metal layer is a copper layer.

[0043] In some implementations, power module 100 (e.g., a package including semiconductor devices) may be included in another module (not shown). Power module 100 may be referred to as a package. For example, one or more modules (e.g., power module 100) may be one or more sub-modules included within another module. In other words, a first module may be included as a sub-module within a second module.

[0044] In some embodiments, the spacer material can be used with one or more power modules 100. In some embodiments, the spacer material can be epoxy resin, silicone adhesive, conductive material, non-conductive material, organic material, semiconductor material, metal alloy, metal foam, phase change material, etc.

[0045] In some specific implementations, one or more semiconductor dies (such as die 102) can be embedded within the layer (instead of...). Figure 1 (Surface mount shown). For example, one or more semiconductor dies may be disposed in a recess (or cavity) of a layer (e.g., substrate, printed circuit board, conductive layer, insulating layer) of the power module 100.

[0046] Although referred to by way of example as lead frame 200 in at least some parts of this detailed description, lead frame 200 may include any type of conductive portion of the package (e.g., conductive portion, conductive terminal) that can provide external connection points from the package. Therefore, lead frame 200 may be referred to as a conductive portion of the package.

[0047] In some implementations, one or more portions of the lead frame 200 may be coupled to pads on at least a portion of the DBM substrate (e.g., bonded pads).

[0048] Figure 2 This is a top plan view of a power module 100 according to some specific embodiments of this disclosure. Besides... Figure 1 In addition to the coating 106, the barrier 112, and the lead frame 200 shown, Figure 2 Also shown are lead frame extensions (two extensions are shown, including a first lead frame extension 200a and a second lead frame extension 200b), leads 204 (seven shown), wire couplings 206 (three shown), and molding compound 208. In some embodiments, slot 210 (in Figure 4 The center mark (or center mark) can be formed in the first lead frame extension 200a.

[0049] Lead frame extension 200a in Figure 2 The lead frame extension 200a is shown as a single lead frame extension. In some embodiments, the lead frame extension 200a may instead be replaced by multiple lead frame extensions, which may be, for example, smaller in size than the lead frame extension 200a.

[0050] In some embodiments, the first leadframe extension 200a may be a lateral extension of the leadframe 200, the size of which may be designed to transmit power to the die 102. In some embodiments, the lead 204 may extend upward in the z-direction beyond the plane of the die attachment pad 104. In some embodiments, the second leadframe extension 200b may be adjacent to but separate from the die attachment pad 104. In some embodiments, a wire bond 206 may couple one or more devices on the die 102 to the second leadframe extension 200b. In some embodiments, one or more wire bonds 206 may couple one or more dies (such as die 102) to the second leadframe extension 200b.

[0051] In some embodiments, the second leadframe extension 200b can serve as a bonding pad for the wire bond 206, thereby coupling the die 102 to the lead 204 for connection to external devices. In some embodiments, the leads 204 can be oriented parallel to each other, extending horizontally outward from the second leadframe extension 200b in the -x direction. In some embodiments, one or both of the leadframe extensions 200a and 200b can include copper (or another metal). In some embodiments, the wire bond 206 can include aluminum. In some embodiments, the wire bond can include gold, copper, a gold or copper alloy, or other metals. In some embodiments, the die attachment pad 104 can be a portion of the leadframe 200 located directly below the die (e.g., below the die 102), such that the die attachment pad 104 is integral with the leadframe 200.

[0052] One or more wire connections in wire connections 206, which may be included in at least some of the embodiments described herein, may be replaced by conductive components. For example, in some embodiments, one or more wire connections in wire connections 206 may be replaced by conductive clamps. Conductive clamps may be coupled to another component (e.g., attachment pads, lead frames, semiconductor dies (e.g., die 102), etc.) using, for example, solder (e.g., soft soldering), sintering couplings (e.g., sintering processes), welding, etc.). In some embodiments, one or more wire connections and / or clamps in wire connections 206 may be used as input and / or output power terminals, signal terminals, power terminals, etc.

[0053] refer to Figure 2 In some embodiments, molding compound 208 may encapsulate (e.g., surround) leadframe 200. In some embodiments, a portion of the first leadframe extension 200a and / or the second leadframe extension 200b may extend from molding compound 208. In some embodiments, at least one or more leads of leads 204 extend from molding compound 208. Within leadframe 200, molding compound 208 may encapsulate die 102 on die attachment pad 104. Molding compound 208 may also encapsulate coating 106 surrounding die 102. Molding compound 208 may also encapsulate barrier 112 surrounding coating 106. In some embodiments, molding compound may also encapsulate wire bond 206.

[0054] Multiple signal terminals (e.g., lead 204, lead frame extension 200a, lead frame extension 200b) may be or may include input signal terminals, output signal terminals, etc. In some embodiments, multiple signal terminals may be included in lead frame 200. In some embodiments, lead frame 200 may include any type of conductive portion of the package (e.g., conductive portion, conductive terminal), which can provide external connection points from the package. Therefore, lead frame 200 may be referred to as a conductive portion of a package or assembly. In some embodiments, one or more portions of lead frame 200 may be coupled to pads (e.g., bonding pads) on at least a portion of the DBM substrate and / or semiconductor die (e.g., die 102).

[0055] Figure 2 It is also shown that the stop 112 does not need to be a closed shape. For example, the stop 112 can be a C-shaped stop surrounding at least a portion of the die region, such as... Figure 2 As shown. For example, in some embodiments, the stop 112 may extend in a continuous path around three of the four sides of the die. In some embodiments, the stop 112 may extend in a continuous path around a portion of three sides and the fourth side of the die, with gaps such that the stop 112 does not form a closed shape. In some embodiments, the stop 112 may be a closed stop surrounding the entire die region.

[0056] In some embodiments, the blocking member 112 has a width W4 and a length L4 (e.g., in the range of about 5.5mm × 6.3mm to 6.5mm × 7.7mm). In some embodiments, the width W4 of the blocking member 112 may be less than the length L4 of the blocking member 112. In some embodiments, the width W4 of the blocking member 112 may be greater than the length L4 of the blocking member 112. In some embodiments, the width W4 of the blocking member 112 may be equal to (e.g., substantially equal to) the length L4 of the blocking member 112.

[0057] In some embodiments, coating 106 has a width W5 and a length L5. In some embodiments, the width W5 of coating 106 may be less than the length L5 of coating 106. In some embodiments, the width W5 of coating 106 may be greater than the length L5 of coating 106. In some embodiments, the width W5 of coating 106 may be equal to (e.g., substantially equal to) the length L5 of coating 106.

[0058] like Figure 2 As shown, the coating 106 has a periphery disposed within the periphery of the blocking member 112. Therefore, the width W4 is greater than the width W5, and the length L4 is greater than the length L5.

[0059] like Figure 2 As shown, the blocking member 112 has a gap G (e.g., a notch). Figure 2 As shown, the gap G is opposite to the line coupling 206. (As indicated...) Figure 2 As shown, the gap G is opposite to the lead frame extension 200b. In some embodiments, the stop 112 may have more than one gap. Although Figure 2 Not shown, but in some embodiments, coating 106 may have one or more gaps (or notches). In some embodiments, coating 106 may have a gap on the same side as gap G of stop 112.

[0060] Figure 3 It is based on some specific implementations of this disclosure along Figure 2 The substrate 300 with the cut line A-A' shown is in Figure 1 The image shows a cross-sectional view of the anchor assembly 110. In some embodiments, the anchor assembly 110 may include copper. Figure 3 The layers within the core 102 are shown, and the anchors (e.g., Figure 3 Anchor 314 (copper anchor) shown can be applied to this layer. For example, in some specific embodiments, the SiC die substrate can support dielectric layer 302, first metal layer 304, passivation layer 306, second metal layer 308, polyimide layer 310, silicone layer 312 and anchor 314 (e.g., copper anchor) (three are shown).

[0061] In some embodiments, anchor 314 can form an anchor array represented by the three anchors shown in the figure. In some embodiments, the number of anchors can be different. In some embodiments, there may be more than three anchors. In some embodiments, there may be fewer than three anchors.

[0062] In some embodiments, the anchors may be spaced apart (e.g., spaced apart by a distance of about 1.3 µm to about 1.7 µm). Anchor 314 extends through the first metal layer 304. Anchor 314 may have a thickness ranging from about 1.8 µm to about 2.2 µm. In some embodiments, anchor 314 may have a width (e.g., ranging from about 0.4 µm to about 0.6 µm). In some embodiments, the anchor may be located at a distance D from the edge of the first metal layer 304 (e.g., distance D may range from about 4.5 µm to about 5.5 µm).

[0063] In some embodiments, anchor 314 exhibits better mechanical properties than the metal layer due to the superior strength of the anchor structure. In some embodiments, anchor 314 extends through the underlying dielectric layer 302 and the first metal layer 304. In some embodiments, dielectric layer 302 may comprise borosilicate glass (BPSG).

[0064] In some implementations, the polyimide layer 310 may have a thickness ranging from about 9 µm to about 11 µm. The polyimide layer 310 passivates the top surface of the die 102 and provides environmental protection for the metal layer. Specifically, the polyimide layer 310 may seal the metallized structure to prevent damage from moisture and particles.

[0065] In some specific implementations, the silicone layer 312 overlaps with the coating 106.

[0066] Figure 4 This is a bottom perspective view of a power module 100 according to some specific embodiments of this disclosure. Figure 4 The entire channel 108 formed in the lower surface of the lead frame 200 is shown. The formation of the channel 108 helps to reduce... Figure 1 The rigidity of the die attachment pad 104 shown is increased, for example, by enhancing its flexibility. In some embodiments, the channel 108 may be a closed rectangular channel recessed into the lead frame 200 to a depth ranging from about 0.25 mm to about 0.35 mm. In some embodiments, the channel 108 may follow the dimensions of the die dimension width W6 and length L6, or the dimensions of the stop 112 surrounding the die 102, in order to mitigate any thermal mismatch that may occur between the molding compound and the bottom metal layer of the die 102. In some embodiments, the channel 108 has a width ranging from about 0.45 mm to about 0.55 mm. In some embodiments, the outer dimensions of the channel width W6 × length L6 may be about 6.15 mm × 6.95 mm. In some embodiments, one or more dimensions of the channel 108 in the lower surface of the lead frame 200 may match the corresponding dimensions of the stop 112 on the opposite (e.g., upper) surface of the die attachment pad 104.

[0067] In some embodiments, the width W4 of the blocking member 112 is greater than or equal to the width W6 of the channel 108. In some embodiments, the length L4 of the blocking member 112 is greater than or equal to the length L6 of the channel 108. In some embodiments, the width W4 of the blocking member 112 is less than the width W6 of the channel 108. In some embodiments, the length L4 of the blocking member 112 is less than the length L6 of the channel 108.

[0068] Figure 4 The diagram also illustrates how the first lead frame extension 200a can be oriented relative to the lead frame 200. For example, in some embodiments, the first lead frame extension 200a can be coplanar with the lead frame 200.

[0069] Figure 4The diagram also illustrates how the second leadframe extension 200b can be oriented relative to the leadframe 200. For example, in some embodiments, the second leadframe extension 200b can be positioned above and separate from the leadframe 200, such that electrical and thermal connections to the leadframe extension 200b are provided via the wire connector 206. In addition to providing connectivity, the wire connector 206 can also be used to dissipate heat from the die 102 for dissipation via the lead wire 204. The space between the leadframe 200 and the second leadframe extension 200b can facilitate further heat dissipation. In some embodiments, the second leadframe extension 200b is horizontally spaced from the leadframe 200 by a distance of about 0.2 mm to about 0.4 mm and vertically spaced by a distance of about 0.6 mm to about 0.8 mm.

[0070] Figure 5 This is a flowchart illustrating a method 500 for manufacturing a power module 100 according to some specific embodiments of this disclosure. The operations of method 500 may be performed in different orders, or not at all, depending on the specific application. It should be noted that method 500 may not produce a complete power module 100. Therefore, it should be understood that additional processes may be provided before, during, or after method 500, and some of these additional processes may be briefly described herein.

[0071] According to the reference Figures 1 to 4 As described above, some specific implementations can be carried out in operations 502 to 510 to form power module 100.

[0072] At 502, method 500 includes forming an array of anchors 314 in a first metal layer 304 of the die 102 on the SiC substrate, such as Figure 3 As shown. A first metal layer 304 (e.g., an aluminum layer or an aluminum-copper (Al-Cu) layer) can be formed on the non-conductive layer 302, for example, by bonding to the non-conductive layer, sputtering onto the non-conductive layer, diffusing onto the non-conductive layer, or thermally forming onto the non-conductive layer. Then, the metal layer 304 can be patterned by removing a portion of the metal layer at a distance D away from the edge of the metal layer 304 using an etching process to form a series of vertically parallel grooves. The grooves can then be filled with copper, for example, by electroplating or electroless plating processes. In forming anchor 314 ( Figure 3 (As shown in the diagram) Afterwards, the first metal layer 304 may be covered by the passivation layer 306. Openings may be formed in the passivation layer 306 to create contacts to the first metal layer 304.

[0073] At 504, method 500 includes forming a channel 108 on the underside of die attachment pad 104 after forming passivation layer 306. The channel can be created by patterning the underside of copper lead frame 200 opposite to (e.g., below) die attachment pad 104 and using an etching process.

[0074] At 506, method 500 includes attaching die 102 to die attachment pad 104 using die attachment (DA) material, wherein the DA material can be solder and / or a metal sintering including silver (Ag) sintering. For example, the sintering process applies high temperature and high pressure to the powder to remove gaps between particles and thus densify the powder. In some embodiments, sintered silver has superior material properties compared to solder, including higher thermal and electrical conductivity and higher reliability. The effectiveness of sintering is proportional to the pressure and bonding time. In some specific embodiments, copper or silver paste can be mixed with the sintered powder and used in place of solder in the solder printing process. Copper sintering is generally inferior to silver sintering due to lower bonding strength, higher process temperature, and copper oxidation. At 508, method 500 includes attaching a stop 112 around die 102. The stop 112 can be pre-formed (e.g., manufactured and then attached) and can be installed concurrently with the die attachment process. The stopper 112 can be attached using solder (e.g., lead-free solder) or sintering (e.g., silver sintering).

[0075] At 510, method 500 includes distributing a flexible material around the edge of the die (e.g., around die 102). The flexible material is more flexible than metal, for example, a silicone gel. Distributing the flexible material may include dispensing the silicone gel between the die region and the stop. The silicone gel may be dispensed to fill gaps around the periphery of die 102. After the dispensing operation, a curing step may be performed, wherein the silicone gel is exposed to ultraviolet light or heat to cure the gel while maintaining its elasticity.

[0076] At 512, method 500 includes a wire bond to couple the circuitry in die 102 to lead 204. The wire bond 206 can be attached using solder and / or sintering (e.g., silver sintering). In some embodiments, one or more conductive clamps (e.g., metal clamps) can be used in conjunction with and / or replace one or more wire bonds in wire bond 206. In some embodiments, one or more wire bonds can be replaced using one or more conductive clamps.

[0077] At 514, method 500 includes encapsulation, for example, forming an encapsulating agent, such as a molding material, around die 102, die attachment pad 104, coating 106, and barrier 112. For example, the encapsulating agent may include a polymer molding material, such as a compound like molding compound 208, which is used to seal and protect various components of the power module 100. Encapsulation can be accomplished, for example, by injection molding or transfer molding processes.

[0078] In some specific implementations, soldering can be or can include a process of joining two surfaces (e.g., metal surfaces) together using a molten filler metal that may be referred to as solder (e.g., metal alloys, tin (Sn), lead (Pb), silver (Ag), copper (Cu)).

[0079] In some embodiments, sintering can be, or can include, a process of fusing particles together into a solid substance using, for example, a combination of pressure and / or heat without melting the material. In some embodiments, sintering can include agglomerating a material (e.g., a powdered material) into a solid or porous substance by heating the material and typically also compressing it without liquefying it. In some embodiments, materials that can be used for sintering can include metals such as silver (Ag), copper (Cu), and / or metal alloys. In some embodiments, sintered joints can have desired electrical and / or thermal conductivity, durability, and a relatively high melting temperature.

[0080] In some specific implementations, one or more components of the parts described herein may be coupled using materials such as solder, sintered (e.g., silver, copper) and / or other metal-to-metal bonding materials.

[0081] In some specific implementations, component coupling can be performed using processes such as soldering, sintering (e.g., silver sintering, copper sintering) and / or other metal-to-metal bonding processes.

[0082] In an example embodiment, power module 100 may be a hybrid device package, such as an integrated circuit (IC) package comprising multiple semiconductor dies integrated onto a unified electronic power substrate, for example, with die attachment pads attached to the unified electronic power substrate. The electronic power substrate may be, for example, a ceramic substrate, a direct-bonded copper (DBC) substrate, an active metal brazing (AMB) substrate, an elastomeric substrate, an organic substrate, a phenolic substrate, or a printed circuit board (PCB) substrate. Different semiconductor dies may be fabricated on different semiconductor wafers or materials. For example, the multiple semiconductor dies in an IC package may include a first die formed using silicon and a second die formed using silicon carbide. In an example embodiment, the multiple semiconductor dies may be electrically connected to each other via connectors (e.g., wire bonds or electrical clamps) extending directly between the dies. In some embodiments, the first die may be connected to the second die via traces formed in a first conductive layer (e.g., a metal layer) of the electronic power substrate. One or more semiconductor dies may also be connected to leadframe posts via electrical connections such as wire bonds.

[0083] In some embodiments, one or more semiconductor dies (e.g., one or more semiconductor components) may be or may include power semiconductor dies. In some embodiments, one or more semiconductor dies may be one or more of the following (e.g., may be part of one or more of the following) or may include one or more of the following: metal-oxide-semiconductor field-effect transistor (MOSFET) devices, insulated-gate bipolar transistors (IGBTs), integrated circuits (ICs), inverters, power conversion circuits, bridge circuits, fast recovery diodes (FRDs), and / or diodes, etc. In some embodiments, one or more semiconductor dies may be components for electric vehicles (EVs) (e.g., may be part of such components) or may include such components.

[0084] The specific embodiments described herein may include more than one semiconductor die. In some embodiments, different semiconductor substrates (e.g., silicon carbide (SiC substrate, silicon (Si) substrate, gallium nitride (GaN) substrate) may be used to fabricate different semiconductor dies (when more than one semiconductor die is included in some of these embodiments). In other words, different semiconductor dies may be fabricated, for example, on different semiconductor wafers or materials. This may be referred to as a hybrid die configuration. For example, a first semiconductor die may be formed using a SiC substrate, and a second semiconductor die (separate from the first semiconductor die) may be formed using a silicon substrate. As another example, an IGBT may be fabricated using a SiC substrate, while a controller may be fabricated using a silicon substrate.

[0085] In a specific embodiment of the example, the first semiconductor die may be connected to the second die, for example, via an electrical connection (e.g., a wire bond, an electrical clamp) extending directly from the first die into the second die, or via a trace formed in a first conductive layer (e.g., a metal layer) of the electronic power substrate. The first semiconductor die among a plurality of semiconductor dies may also be connected to leadframe posts via electrical connections such as wire bonds or clamps.

[0086] In some exemplary embodiments, the package (e.g., a power module) may be a hybrid device package comprising one or more semiconductor dies integrated onto a uniform electronic power substrate (e.g., a ceramic substrate, a DBM or DBC substrate, an AMB substrate, an elastomer substrate, an organic substrate, a phenolic substrate, or a PCB / FR-4 substrate). In some embodiments, multiple semiconductor devices may be fabricated, for example, on the same substrate (such as a SiC substrate) suitable for high-power applications.

[0087] Figures 6 to 8 Graphs illustrating simulated reliability tests according to some specific embodiments of this disclosure are shown. The reliability tests are simulations of thermal cycling to examine the performance of the reliability improvements described above. Each series of tests illustrated in the graphs includes two strain measurements in the top metal layer (e.g., the second metal layer 308) and two measurements in the passivation layer 306. The simulated strain measurements include cumulative plastic strain and shear plastic strain of the metal. The simulated passivation layer measurements include passivation strain in two different directions, representing passivation tensile stress and peel stress in the passivation layer 306. Plastic deformation of the metal is an indicator of metal slippage / loosening and significantly reduces passivation tensile and peel stresses. The tests are performed after four temperature cycles, where the temperature is reduced to -55°C. The simulated temperature cycling may require a set of four to eight cycles, representing 1000-2000 temperature cycles of actual testing. Each set of graphs compares the performance of the power module 100 with and without the four improvements described above: anchor 314, stop 112, coating 106, and channel 108. The data for the standard power module 100 without improvements is normalized to 100%.

[0088] Figure 6 A bar chart showing a first comparison of the simulated temperature cycling performance of the power modules described herein according to some specific embodiments of this disclosure is presented. In each set of plots, simulated reliability test results for a standard SiC-based power module are shown on the left, and simulated reliability test results for an improved power module 100 are shown on the right. The reductions in cumulative plastic strain and shear plastic strain in the top metal layer are 56% and 52%, respectively, while the reductions in passivation layer tensile stress and passivation layer peel stress are 52% and 66%, respectively.

[0089] Figure 7 A bar chart showing a second comparison of simulated temperature cycling performance of the power modules described herein according to some specific embodiments of this disclosure is presented. The second comparison is for extreme cases, where it is assumed that the entire thickness of the metal layer yields, for example, fails, under a pressure of 50 MPa. This would be an unusual case because the metal layer is more vulnerable at corners and edges, so the entire layer does not yield immediately. That is, the metal layer tends to yield from the outside towards the center, making the center of the metal layer the last part to fail. In each set of plots, simulated reliability test results for a standard SiC-based power module are shown on the left, and simulated reliability test results for an improved SiC-based power module 100 are shown on the right. Even in the extreme cases, the simulations show much lower plastic strain and passivation stress, and therefore a much lower risk of passivation cracking or peeling. The reductions in cumulative plastic strain and shear plastic strain in the top metal layer are 75% and 56%, respectively, while the reductions in passivation layer tensile stress and passivation layer peeling stress are 42% and 67%, respectively.

[0090] Figure 8 A bar chart showing a third comparison of the simulated temperature cycling performance of the power modules described herein according to some specific embodiments of this disclosure is presented. This third comparison is also for extreme cases, similar to... Figure 7 The scenario shown assumes that all metal layers yield under a pressure of 50 MPa, for example, failing. However, in Figure 8 The only improvement included is anchor 314. In each set of plots, simulated reliability test results for the standard SiC-based power module are shown on the left, and simulated reliability test results for the improved SiC-based power module 100 are shown on the right. In extreme cases, the simulations show a significant reduction in metal strain and passivation stress when only the anchor is implemented. The shear plastic strain in the top metal layer is reduced by 86%, while the passivation layer tensile stress and passivation layer peel stress at the edge of the passivation layer 306 are reduced by 60% and 63%, respectively.

[0091] As described above, passivation cracking and metal stripping failure modes in silicon carbide-based power modules can be addressed by including structures that alleviate passivation layer stress. Such structures may include copper barriers around the die, a coating in peripheral contact with the die, channels in the lead frame, and an anchor array formed in the first metal layer. Any combination of these measures can be implemented as a reliability-enhancing feature for SiC-based power modules. Simulations of temperature cycling tests show a reduction in failure modes ranging from 14% to 58% compared to power modules without stress-relief structures.

[0092] Example 1. A package for a semiconductor die, the package comprising: a substrate; a metal portion of the package coupled to the substrate, the metal portion configured to serve as an electrical connection from the semiconductor die; a die region on the substrate; a barrier surrounding at least a portion of the die region; a flexible material disposed between the die region and the barrier; and an encapsulant surrounding the substrate and the metal portion of the package.

[0093] Example 2. The package according to Example 1, the package further includes a channel formed in the underside of the metal portion of the package.

[0094] Example 3. The package according to Example 1, wherein the semiconductor die comprises silicon carbide.

[0095] Example 4. The package according to Example 1, wherein the semiconductor die includes a metal layer in which an anchor array is formed.

[0096] Example 5. The encapsulation according to Example 1, wherein the flexible material comprises silicone gel.

[0097] Example 6. The package according to Example 1, wherein the flexible material is in contact with the semiconductor die.

[0098] Example 7. The package according to Example 1, wherein the flexible material extends above the top surface of the semiconductor die.

[0099] Example 8. The package according to Example 1, the package further includes a channel formed in the lower side of the metal portion of the package, the blocking member having a blocking member height substantially equal to the depth of the channel.

[0100] Example 9. The package according to Example 1, the package further includes a channel formed in the underside of the metal portion of the package, the width of the blocking member being substantially equal to the width of the channel.

[0101] Example 10. The package according to Example 1, wherein the barrier is attached to the substrate by at least one of solder, epoxy resin material or silver sintering.

[0102] Example 11. The encapsulation according to Example 1, wherein the blocking member extends above the top surface of the flexible material.

[0103] Example 12. A structure comprising: a silicon carbide substrate; a metal layer disposed on the silicon carbide substrate; an anchor array formed in the metal layer; a passivation layer disposed on the metal layer; and a coating layer disposed on the passivation layer.

[0104] Example 13. The structure according to Example 12, wherein the metal layer comprises aluminum and the anchor array comprises copper anchors.

[0105] Example 14. The structure according to Example 12, wherein the anchor array extends through the entire thickness of the metal layer.

[0106] Example 15. The structure according to Example 12, the structure further includes a second metal layer and a polyimide layer on the second metal layer.

[0107] Example 16. The structure according to Example 12, wherein the coating is an organosilicon coating.

[0108] Example 17. A method comprising: forming an anchor array in a metal layer on a silicon carbide substrate; forming a channel in a lower side of a die attachment pad; attaching the silicon carbide substrate to an upper surface of the die attachment pad; attaching a copper barrier to the die attachment pad, the copper barrier surrounding the silicon carbide substrate; disposing a flexible material at an edge of the silicon carbide substrate; and forming a molding compound around the die attachment pad.

[0109] Example 18. The method according to Example 17, wherein setting the flexible material includes distributing an organosilicon gel around the periphery of the silicon carbide substrate.

[0110] Example 19. The method according to Example 18, wherein dispensing the silicone gel includes dispensing a certain amount of silicone gel to fill the gaps around the periphery.

[0111] Example 20. The method according to Example 17, wherein attaching the copper stopper includes aligning the copper stopper with the channel.

[0112] Example 21. The method according to Example 17, wherein forming the molding compound includes forming the molding compound around a portion of the lead frame integral with the die attachment pad.

[0113] Example 22. The method according to Example 17, wherein forming the anchor array includes using an etching process to remove portions of the metal layer.

[0114] It should be understood that in the foregoing description, when an element such as a layer, region, or substrate is mentioned as being on, connected to, electrically connected to, coupled to, or electrically coupled to another element, the element may be directly on, connected to, or coupled to the other element, or one or more intermediate elements may be present. Conversely, when an element is mentioned as being directly on, directly connected to, or directly coupled to another element or layer, no intermediate element or layer is present. Although the terms "directly on," "directly connected to," or "directly coupled to" may not be used throughout the detailed description, elements shown as being directly on, directly connected to, or directly coupled to may be so referred to. The claims of this application may be amended to set forth the exemplary relationships described in the specification or shown in the drawings.

[0115] As used herein, the singular form may include the plural form unless the context clearly indicates otherwise. In addition to the orientations depicted in the figures, spatial relative terms (e.g., above, on, above, below, under, beneath, below, on top, at the bottom, etc.) are intended to cover different orientations of the device in use or operation. In some embodiments, the relative terms above and below may respectively include vertically above and vertically below. In some embodiments, the term adjacent may include laterally adjacent or horizontally adjacent.

[0116] Some specific implementations can be achieved using various semiconductor processing and / or packaging techniques. Some specific implementations can be achieved using various types of semiconductor device processing techniques associated with semiconductor substrates, including but not limited to, silicon (Si), silicon carbide (SiC), gallium arsenide (GaAs), gallium nitride (GaN), etc.

[0117] While certain features of the described embodiments have been exemplified as described herein, many modifications, alternatives, variations, and equivalents will now occur to those skilled in the art. For example, a feature illustrated with respect to one embodiment may be included in other embodiments where appropriate. Therefore, it should be understood that the appended claims are intended to cover all such modifications and variations falling within the scope of the embodiments. It should be understood that these modifications and variations are presented by way of example only and not limitation, and various changes in form and detail are possible. Any parts of the apparatus and / or method described herein may be combined in any way, except for mutually exclusive combinations. The embodiments described herein may include various combinations and / or sub-combinations of the functions, components, and / or features of the different embodiments described.

Claims

1. A package for a semiconductor die, the package comprising: Substrate; The metal portion of the package is coupled to the substrate and is configured to serve as an electrical connection from the semiconductor die. A die region on the substrate; A blocking element, the blocking element surrounding at least a portion of the core region; A flexible material is disposed between the core region and the blocking member; and An encapsulating agent surrounding the substrate and the metal portion of the package.

2. The package according to claim 1, further comprising a channel formed in the underside of the metal portion of the package.

3. The package according to claim 1, wherein the semiconductor die comprises silicon carbide.

4. The package of claim 1, wherein the semiconductor die includes a metal layer in which an anchor array is formed.

5. The encapsulation according to claim 1, wherein the flexible material comprises silicone gel.

6. The package of claim 1, wherein the flexible material is in contact with the semiconductor die.

7. The package of claim 1, wherein the flexible material extends above the top surface of the semiconductor die.

8. The package of claim 1, further comprising a channel formed in the underside of the metal portion of the package, the barrier having a barrier height substantially equal to the depth of the channel.

9. The package of claim 1, further comprising a channel formed in the underside of the metal portion of the package, wherein the width of the blocking member is substantially equal to the width of the channel.

10. The package of claim 1, wherein the barrier is attached to the substrate by at least one of solder, epoxy resin material or silver sintering.

11. The encapsulation of claim 1, wherein the blocking member extends above the top surface of the flexible material.

12. A semiconductor structure, the structure comprising: silicon carbide substrate; A metal layer disposed on the silicon carbide substrate; An anchor array, the anchor array being formed in the metal layer; A passivation layer is disposed on the metal layer; and A coating, the coating being applied to the passivation layer.

13. The semiconductor structure of claim 12, wherein the metal layer comprises aluminum, and the anchor array comprises copper anchors.

14. The semiconductor structure of claim 12, wherein the anchor array extends through the entire thickness of the metal layer.

15. The semiconductor structure of claim 12, further comprising a second metal layer and a polyimide layer on the second metal layer.

16. The semiconductor structure according to claim 12, wherein the coating is an organosilicon coating.

17. A method of manufacturing a power module, the method comprising: An anchor array is formed in a metal layer on a silicon carbide substrate; A channel is formed on the underside of the die attachment pad; The silicon carbide substrate is attached to the upper surface of the die attachment pad; A copper barrier is attached to the die attachment pad, the copper barrier surrounding the silicon carbide substrate; A flexible material is disposed at the edge of the silicon carbide substrate; as well as A molding compound is formed around the die attachment pads.

18. The method of claim 17, wherein disposing of the flexible material comprises distributing an organosilicon gel around the periphery of the silicon carbide substrate.

19. The method of claim 18, wherein dispensing the silicone gel comprises dispensing a certain amount of silicone gel to fill the gaps around the periphery.

20. The method of claim 17, wherein attaching the copper stopper includes aligning the copper stopper with the channel.

21. The method of claim 17, wherein forming the molding compound comprises forming the molding compound around a portion of the lead frame integral with the die attachment pad.

22. The method of claim 17, wherein forming the anchor array includes using an etching process to remove portions of the metal layer.

Images