A method for processing blind vias with thickened copper in multilayer patterned holes of flexible circuit boards

Abstract

This application discloses a processing method for filling blind vias and thickening copper in through-holes of multi-layer patterned dots on flexible printed circuit boards (PCBs), belonging to the field of printed circuit board technology. The processing method for filling blind vias and thickening copper in through-holes of multi-layer patterned dots on flexible printed circuit boards involves first laser-drilling through-holes and blind vias, followed by a first-stage patterned dot blind via filling and through-hole electroplating after shadow removal. A second-stage patterned through-hole electroplating is then performed, excluding the blind via areas. Due to the two-stage patterned dot plating of the through-holes, considering the limitations of the exposure machine's capabilities, the exposed aperture diameter of the through-hole during the second stage of patterned dot plating is 3-4 mil larger on one side than the drilled aperture diameter, while the exposed aperture diameter during the first stage is 5-6 mil larger on one side than the drilled aperture diameter. This ensures that the copper step of the second stage is within the range of the first stage copper step, effectively improving the reliability and functionality of the product.

Description

Technical Field

[0001] This application relates to the field of printed circuit board technology, specifically to a method for processing multilayer patterned blind vias and thickened through-hole copper in flexible circuit boards. Background Technology

[0002] Flexible printed circuit boards (FPCs) are core components for achieving thinness, flexibility, and miniaturization in consumer electronics products. Essentially, they are bendable circuit boards made from flexible substrates.

[0003] For consumer electronics products with a 4-layer flexible circuit board structure, rolled copper is selected as the copper foil. Electroplating can only be done through-hole plating, and immersion copper flash plating is not an option. When designing through-holes and blind vias together, the blind via fill depth is <15µm and the through-hole copper thickness is >12µm. The minimum linewidth / spacing of the outer layer circuitry is 45 / 40µm, requiring the use of a thin dry film for exposure. The filling capacity of the dry film limits the stepped copper height (surface copper height of the through-hole plating) to <27µm.

[0004] The conventional processing solutions are as follows: Solution 1: After laser etching the outer L1 / 4 layer for through-holes and blind holes, perform shadow etching and dot-matrix plating to fill the holes (plating through-holes and blind holes together). After filling the blind holes, the depth is <15µm, but the copper thickness of the through-holes is <12µm. This is because the TP value of the through-holes directly filled after shadow etching is low (50%-60%), resulting in a copper thickness of <12µm for the through-holes. Solution 2: Laser etching the outer L1 / 4 layer for blind holes, performing shadow etching and dot-matrix plating, then laser etching the through-holes and performing dot-matrix plating. This solution can meet the requirements for the depth of blind holes and the copper thickness of through-holes. However, the base copper of the L1 / 4 layer undergoes two shadow etching processes, resulting in a lower base copper thickness on the substrate than the customer requires, and it also involves an additional laser, plasma, and shadow etching process, leading to higher costs.

[0005] Therefore, this application is submitted. Summary of the Invention

[0006] The purpose of this application is to overcome the shortcomings of the existing technology and provide a processing method for filling blind holes and thickening copper in through holes of multilayer pattern dots in flexible circuit boards.

[0007] To achieve the above objectives, the technical solution adopted in this application is as follows: A method for filling blind vias and thickening the copper in through-holes of multilayer patterned holes in flexible circuit boards includes the following steps: (1) A multilayer board is provided, the multilayer board comprising a first copper layer, a first PI layer, a hot-press adhesive, a second copper layer, a second PI layer, a third copper layer, a hot-press adhesive, a third PI layer and a fourth copper layer disposed sequentially; (2) A blind hole through the first copper layer, the first PI layer, and the hot-press adhesive, and a blind hole through the hot-press adhesive, the third PI layer, and the fourth copper layer; (3) Laser penetration through the through-hole of the multilayer board; (4) The multilayer board was cleaned sequentially with micro-etching solution and plasma cleaning; (5) A graphite layer is formed on the surface of the through hole and the surface of the slot, and the graphite layer of the first copper layer, the second copper layer, the third copper layer and the fourth copper layer at the through hole and the graphite layer of the first copper layer and the fourth copper layer at the blind hole are removed by micro-etching solution. (6) Apply dry film to both surfaces of the multilayer board and expose it with ultraviolet light to transfer the circuit image to the multilayer board, exposing the vias and blind vias; (7) Fill the perforated plate with electroplating to fill the blind holes of the multilayer plate with copper ions; (8) Apply dry film to both surfaces of the multilayer board and perform electroplating to fill the perforated board so that copper ions are deposited in the through holes of the multilayer board.

[0008] In a preferred embodiment of the present invention, the surface of the second copper layer is plated with stepped copper, which penetrates the second PI layer and extends to the surface of the third copper layer.

[0009] In a preferred embodiment of the present invention, the frequency of the laser blind hole is 20-50 kHz and the energy is 4-6 Watts.

[0010] In a preferred embodiment of the present invention, the frequency of the laser through-hole is 40-60 kHz and the energy is 1-4 Watts.

[0011] In a preferred embodiment of the present invention, the micro-etching solution comprises hydrogen peroxide, sulfuric acid, a stabilizer, and water. The concentration of hydrogen peroxide in the micro-etching solution is 5–13 g / L, the concentration of sulfuric acid in the micro-etching solution is 2–4 wt%, and the concentration of the stabilizer in the sulfuric acid in the micro-etching solution is 3–7 wt%. The linear velocity for cleaning with the micro-etching solution is 2.2–2.8 m / min, and the pressure is 1.5–2 kg / cm². 2 .

[0012] As a preferred embodiment of the present invention, the plasma cleaning power is 6000-7000W, the vacuum degree is 0.1-0.25 torr, the oxygen flow rate is 2000-2400 sccm, the carbon tetrafluoride flow rate is 230-270 sccm, the nitrogen flow rate is 240-280 sccm, the temperature is 60-70℃, and the time is 10-20 min.

[0013] As a preferred embodiment of the present invention, a black shadow process is adopted, in which graphite slurry is deposited on the surface of the through hole and the surface of the slot by immersion spraying, and a graphite layer is formed on the surface of the through hole and the surface of the slot. The graphite slurry has a solid content of 3-4% and a flow rate of 150-350 L / min.

[0014] As a preferred embodiment of the present invention, in step (6), a circular plating pad is added to the waste area of ​​the through hole and the blind hole. The hole ring of the blind hole is designed to be 2 to 5 mil larger than the single side of the blind hole, while the hole ring of the through hole is designed to be 4 to 6 mil larger than the single side of the through hole.

[0015] As a preferred embodiment of the present invention, the current density of the hole-filling electroplating in step (7) is 1 to 1.2 Asd, the electroplating area ratio is 10 to 30%, and the electroplating time is 40 to 60 min.

[0016] As a preferred embodiment of the present invention, in step (8), the current density of the hole-filling electroplating is 0.5 to 0.8 Asd, the electroplating area ratio is 10 to 20%, and the electroplating time is 40 to 60 min.

[0017] The beneficial effects of this application are as follows: The processing method for filling blind vias and thickening through-hole copper in multilayer patterned dots of flexible circuit boards according to the present invention involves first laser-drilling through-holes and blind vias, followed by a black shadow and then performing the first patterned dot blind via filling and patterned dot through-hole electroplating. After film removal, a second patterned dot through-hole electroplating is performed, without electroplating the blind via areas. Due to the two patterned dot through-hole plating processes, considering the limitations of the exposure machine's capabilities, the exposed aperture diameter of the through-hole during the second patterned dot through-hole plating is 3-4 mil larger on one side than the drilled aperture diameter, while the exposed aperture diameter during the first patterned dot through-hole plating is 5-6 mil larger on one side than the drilled aperture diameter. This ensures that the second step copper layer is within the range of the first step copper layer, effectively improving the reliability and functionality of the product. Attached Figure Description

[0018] Figure 1 This is a flowchart of the fabrication process for the L2 / 3 layer of the substrate.

[0019] Figure 2 This is a schematic diagram of a multilayer board.

[0020] Figure 3 This is a schematic diagram of a multilayer board after laser-drilled blind and through holes.

[0021] Figure 4 This is a schematic diagram of a multilayer board with film applied to the first hole of the pattern.

[0022] Figure 5 This is a multilayer board after the first hole-filling process.

[0023] Figure 6 This is a picture of the actual object after the first hole filling process.

[0024] Figure 7 This is a multilayer board after the second pattern of through-hole plating.

[0025] Figure 8 This refers to the multilayer board after the blind via filling and thickened through-hole copper processing of the flexible circuit board. Detailed Implementation

[0026] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions in the embodiments of this application will be clearly and completely described below. Obviously, the described embodiments are only some embodiments of this application, not all embodiments. Based on the embodiments in this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0027] In this application, the technical features described in an open-ended manner include both closed technical solutions consisting of the listed features and open technical solutions that include the listed features.

[0028] In this application, numerical ranges are referred to as continuous unless otherwise specified, and include the minimum and maximum values ​​of the range, as well as every value between the minimum and maximum values. Furthermore, when the range refers to integers, it includes every integer between the minimum and maximum values ​​of the range. Additionally, when multiple ranges are provided to describe a feature or characteristic, the ranges may be merged. In other words, unless otherwise specified, all ranges disclosed herein should be understood to include any and all subranges to which they are incorporated.

[0029] In this application, there are no particular restrictions on the specific dispersion and mixing methods.

[0030] Unless otherwise specified, all components, raw materials, or instruments used in the embodiments and comparative examples of this application are commercially available, and the components and raw materials used in each parallel experiment are the same.

[0031] Furthermore, the terms "first" and "second" are used for descriptive purposes only and should not be construed as indicating or implying relative importance or implicitly specifying the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one of that feature. In the description of this application, "multiple" means at least two, such as two, three, etc., unless otherwise explicitly specified.

[0032] The following embodiments are provided to facilitate understanding of this application. These embodiments are provided not to limit the scope of the claims.

[0033] Example 1 A method for filling blind vias and thickening the copper in through-holes of multilayer patterned holes in flexible circuit boards includes the following steps: (1) According to the following Figure 1The steps shown illustrate the fabrication of a substrate (L2 / 3 layer, i.e., the second copper layer, the second PI layer, and the third copper layer). After laser engraving, electroplating, and circuitry are completed on the L2 / 3 layer, the copper surface of the L2 / 3 layer is roughened by horizontal browning micro-etching to improve adhesion to the adhesive. Hot-press adhesive is then applied to the base copper of the L2 / 3 layer. Then, single-sided copper + PI layers of L1 (the first copper layer) and L4 (the fourth copper layer) are applied to the hot-press adhesive on the L2 / 3 layer. Using a press press, the copper foils of the L1 and L4 layers are bonded tightly to the L2 / 3 layer after 3 hours of high-temperature pressing, resulting in a multilayer board. like Figure 2 As shown, the multilayer board includes a first copper layer (L1 bottom copper layer, 50μm thick), a first PI layer (L1 / 2 bottom copper layer, 20μm thick), a hot-press adhesive (L1 / 2, 25μm thick), a second copper layer (L2 bottom copper layer, 50μm thick), a second PI layer (L2 / 3 PI layer, 50μm thick), a third copper layer (L3 copper layer, 50μm thick), a hot-press adhesive (L3 / 4, 25μm thick), a third PI layer (L3 / 4 PI layer, 20μm thick), and a fourth copper layer (L1 bottom copper layer, 50μm thick).

[0034] The surface of the second copper layer is plated with stepped copper, which penetrates the second PI layer and extends to the surface of the third copper layer.

[0035] The first copper layer, the second copper layer, the third copper layer, and the fourth copper layer are all rolled copper.

[0036] (2) Laser blind holes and through holes: High-frequency pulsed ultraviolet laser is emitted by a laser, and optical energy is used to break the base copper and the substrate, which are vaporized to form suspended particles that escape, thus processing the required blind holes and through holes.

[0037] First, laser-drill through the first copper layer, the first PI layer, the hot-press adhesive, and the blind hole that penetrates the hot-press adhesive, the third PI layer, and the fourth copper layer; Laser penetrating through-holes in multilayer boards; Finally, laser-etch the through holes of the L4 layer. The parameters for laser-etched blind holes and through holes are different. Table 1 is the parameter table for laser-etched through holes, and Table 2 is the parameter table for laser-etched blind holes. The multilayer board diagram after laser-cut blind vias and through vias is shown in Figure 3; Table 1: Parameters of Laser Through Holes Table 2: Parameters for Laser Blind Holes (3) The multilayer board was cleaned sequentially with micro-etching solution and plasma cleaning; The micro-etching solution uses a system of water hydrogen peroxide and sulfuric acid, along with a stabilizer. The sprayed micro-etching solution undergoes a redox reaction with the copper layer. During the laser ablation of through-holes, some laser residue adheres to the base copper of the laser-etched through-holes, affecting subsequent processes. Chemical micro-etching removes the laser residue adhering to the L1 / 4 layer base copper.

[0038] Table 3 Chemical Cleaning Parameters The plasma generator's radio frequency power supply operates under a specified vacuum environment, generating plasma within the vacuum chamber. It cleans residual adhesive residue from the substrate holes after laser drilling, effectively removing this residue. Table 4. Plasma Cleaning Parameters (4) Graphite is used as a conductive material. After the substrate passes through the etching tank, a graphite layer is adsorbed onto the hole walls and the board surface. The etching solution in the etching tank reacts with the copper layer through an oxidation-reduction reaction, washing away the graphite layer adsorbed on the copper layer. The etching solution does not react with the substrate on the hole walls, thus achieving the purpose of adsorbing a graphite layer onto the hole walls. Because the substrate design combines blind holes and through holes, the etching amount for producing pure blind holes is large, while the etching amount for producing pure through holes is low. A large etching amount for through holes can easily cause gaps between the inner copper layer and the substrate, resulting in copper breakage. Therefore, the etching amount should prioritize ensuring the functionality and reliability of the through holes.

[0039] Table 5. Parameter Table for Shadows (5) First-stage plated via film: A laminator applies dry film to both sides of the substrate using a hot-pressing method. Ultraviolet light from an exposure machine irradiates the dry film, transferring the circuit pattern to the board surface. After standing for 2 hours, the unexposed areas of dry film are washed away by the developer, exposing the copper surface. The first-stage plated via film exposes the through-holes and blind holes to be plated on the substrate. Simultaneously, circular plating pads are added to the waste areas of the through-holes and blind holes to disperse the current and prevent high-current areas from appearing in individual locations within the unit, which would result in poor copper plating uniformity across the entire board. The hole ring at blind hole locations is designed to be 3 mil larger than the single side of the blind hole, while the hole ring at through hole locations is designed to be 5 mil larger than the single side of the through hole.

[0040] The resulting multi-layer boards, such as Figure 4 As shown, (6) First-stage dot-filling electroplating: Vertical VCP line electroplating uses direct current, with the plate to be plated as the negative electrode and the insoluble anode as the positive electrode. During the electroplating process, copper ions from the positive electrode are deposited onto the substrate of the negative electrode. The copper plating bath has a "high copper, low acid" acid-copper ratio, and is equipped with a dot-filling brightener (copper plating bath composition: copper sulfate concentration: 220-240g / L, sulfuric acid concentration: 25-35ml / L, hydrochloric acid: 40-70ppm, dot-filling brightener EVF-III-B: 0.4-0.6ml / L, dot-filling brightener EVF-III-L: 4-7ml / L, dot-filling brightener EVF-III-C: 4-7ml / L), so that the blind holes are filled with copper ions during the electroplating process, and the stepped copper thickness is 14um. Because the metallization inside the holes resulted in a black shadow, combined with the through-hole plating filler, the TP value of the through-holes was 55%. The through-hole copper could not meet customer requirements, and increasing the current would exceed the upper limit for step copper thickness. Therefore, a second through-hole plating process was performed after the first through-hole filling step. The parameters for the first through-hole filling step met the following requirements: blind via depth < 15µm and step copper thickness 13µm. During the initial and peak filling phases, the rectifier output ratio was adjusted to 110-120%, and towards the end of the filling process, the rectifier output ratio decreased to 70-80%.

[0041] Table 6. Electroplating Parameters for Hole Filling in Figure 6 Multilayer boards after the first hole-filling process (as shown in the image) Figure 5 As shown in the picture, the actual product is as follows. Figure 6 As stated above.

[0042] (7) After the L1 / 4 layer of the substrate is stripped, it is then passed through a laminator to attach dry film to both sides of the substrate. The exposure data design will expose the via locations, and the via diameter is 3 mil larger on each side than the via ring diameter design value. At the same time, a circular plating pad is added to ensure uniform current distribution across the entire board.

[0043] (8) Second-stage through-hole plating: After developing the L1 / 4 layer through-hole plating on the substrate, DC current is used on the VCP line to transfer copper ions from the positive electrode to the negative electrode substrate. Copper ions are deposited on the through-hole ring and the plating pad that are not covered by the dry film, thus thickening the through-hole copper. The second-stage through-hole plating is for thickening, and the current parameter is 0.7asd*50min to avoid excessive current causing the step copper thickness to exceed the upper limit.

[0044] The resulting multi-layer boards, such as Figure 7 As described, the physical image is as follows Figure 8 As shown.

[0045] Table 7. Plating parameters for through holes in the second diagram. Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of this application and are not intended to limit the scope of protection of this application. Although this application has been described in detail with reference to preferred embodiments, those skilled in the art should understand that modifications or equivalent substitutions can be made to the technical solutions of this application without departing from the substance and scope of the technical solutions of this application.

Claims

1. A processing method for filling holes and thickening copper in through holes of a flexible circuit board multilayer dot blind hole, characterized in that, It comprises the following steps: (1) providing a multilayer board comprising a first copper layer, a first PI layer, a hot-pressed glue, a second copper layer, a second PI layer, a third copper layer, a hot-pressed glue, a third PI layer and a fourth copper layer arranged in sequence; (2) laser through the blind hole of the first copper layer, the first PI layer and the hot-pressed glue, and laser through the blind hole of the hot-pressed glue, the third PI layer and the fourth copper layer; (3) laser through the through hole of the multilayer board; (4) cleaning the multilayer board with micro-etching liquid and plasma cleaning in sequence; (5) forming a graphite layer on the surface of the through hole and the slot hole, and removing the graphite layer of the first copper layer, the second copper layer, the third copper layer and the fourth copper layer at the through hole, and the graphite layer of the first copper layer and the fourth copper layer at the blind hole by micro-etching liquid; (6) pasting dry film on both surfaces of the multilayer board, exposing the through hole and the blind hole by ultraviolet exposure; (7) filling and electroplating the multilayer board to fill the blind hole of the multilayer board with copper ions; (8) pasting dry film on both surfaces of the multilayer board, and filling and electroplating the multilayer board to deposit copper ions in the through hole of the multilayer board.

2. The processing method of claim 1, wherein the processing method is characterized in that, The surface of the second copper layer is plated with step copper, which penetrates the second PI layer and extends to the surface of the third copper layer.

3. The processing method of claim 1, wherein the processing method is characterized in that, The frequency of the laser blind hole is 20-50Khz, and the energy is 4-6Watts.

4. The processing method of claim 1, wherein the processing method is characterized in that, The frequency of the laser through hole is 40-60Khz, and the energy is 1-4Watts.

5. The processing method of claim 1, wherein the processing method is characterized in that, The micro-etching solution comprises hydrogen peroxide, sulfuric acid, stabilizer and water, the concentration of the hydrogen peroxide in the micro-etching solution is 5-13 g / L, the concentration of the sulfuric acid in the micro-etching solution is 2-4 wt%, the concentration of the stabilizer in the micro-etching solution is 3-7 wt%, the linear speed of the cleaning with the micro-etching solution is 2.2-2.8 m / min, and the pressure is 1.5-2 kg / cm 2 .

6. The processing method of claim 1, wherein the processing method is characterized in that, The power of the plasma cleaning is 6000-7000W, the vacuum degree is 0.1-0.25torr, the oxygen flow rate is 2000-2400sccm, the carbon tetrafluoride flow rate is 230-270sccm, the nitrogen flow rate is 240-280sccm, the temperature is 60-70℃, and the time is 10-20min.

7. The processing method of claim 1, wherein the processing method is characterized in that, The graphite slurry is deposited on the surface of the through hole and the slot hole by immersion and spraying, and a graphite layer is formed on the surface of the through hole and the slot hole. The solid content of the graphite slurry is 3-4%, and the flow rate is 150-350L / min.

8. The processing method of claim 1, wherein the processing method is characterized in that, In step (6), the through hole and the blind hole waste area increase the circular plating pad, the blind hole position design hole ring is larger than the blind hole single side by 3-4mil, and the through hole position design hole ring is larger than the through hole single side by 5-6mil.

9. The processing method of claim 1, wherein the processing method is characterized in that, In step (7), the current density of the hole filling electroplating is 1-1.2Asd, the electroplating area ratio is 10-30%, and the electroplating time is 40-60min.

10. The processing method of claim 1, wherein the processing method is characterized in that, In step (8), the current density of the hole filling electroplating is 0.5-0.8Asd, the electroplating area ratio is 10-20%, and the electroplating time is 40-60min.

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