Semiconductor package structure

Abstract

This invention discloses a semiconductor packaging structure comprising a functional die, a heat dissipation element, an adhesive, a molding compound, and a thermally conductive material. The lower surface of the heat dissipation element is adhered to an upper surface of the functional die by the adhesive. The functional die and the heat dissipation element are encapsulated by the molding compound. The thermally conductive material has physical contact with an upper surface of the heat dissipation element, wherein the thermal conductivity of the heat dissipation element is higher than the thermal conductivity of the molding compound, and the thermal conductivity of the thermally conductive material is higher than the thermal conductivity of the heat dissipation element.

Description

Technical Field

[0001] This invention relates to semiconductor package design, and more particularly to a semiconductor package structure with a heat dissipation mechanism. Background Technology

[0002] In recent years, semiconductor dies capable of storing and processing massive amounts of data have been developed. However, with increased operating speeds, these dies generate significant heat, which can slow down their operation and degrade their performance. Generally, one or more semiconductor dies can be packaged within the same semiconductor package. Therefore, an innovative semiconductor packaging structure is needed to address the thermal issues caused by semiconductor die heat dissipation. Summary of the Invention

[0003] One of the objectives of this invention is to propose a semiconductor packaging structure with a heat dissipation mechanism.

[0004] According to an embodiment of the present invention, a semiconductor packaging structure is disclosed. The semiconductor packaging structure includes a functional die (bare die), a heat dissipation element, an adhesive, a molding compound, and a thermally conductive material. A lower surface of the heat dissipation element is adhered to an upper surface of the functional die by the adhesive. The functional die and the heat dissipation element are encapsulated by the molding compound. The thermally conductive material has physical contact with an upper surface of the heat dissipation element, wherein the thermal conductivity of the heat dissipation element is higher than the thermal conductivity of the molding compound, and the thermal conductivity of the thermally conductive material is higher than the thermal conductivity of the heat dissipation element.

[0005] According to an embodiment of the present invention, a semiconductor package structure is disclosed. The semiconductor package structure includes a functional die, a heat dissipation element, and an adhesive. A lower surface of the functional die is adhered to an upper surface of the functional die by the adhesive. The semiconductor package structure is a flip-chip based semiconductor package structure, wherein the size of the heat dissipation element is larger than the size of the functional die, and the heat dissipation element completely covers the functional die.

[0006] Regarding the wire bonding-based semiconductor packaging structure of the present invention, since the thermally conductive material has physical contact with the upper surface of the heat dissipation element and the thermal conductivity of the thermally conductive material is higher than that of the heat dissipation element, the thermally conductive material can improve the heat dissipation performance of the wire bonding-based semiconductor packaging structure. Furthermore, regarding the flip-chip-based semiconductor packaging structure of the present invention, since the heat dissipation element (e.g., a dummy silicon die) has the characteristics of large size and high thermal conductivity, heat dissipation performance can be improved. Attached Figure Description

[0007] Figure 1 This is a cross-sectional view of a first type of semiconductor packaging structure based on wire bonding according to an embodiment of the present invention;

[0008] Figure 2 This is a cross-sectional view of a second type of semiconductor packaging structure based on wire bonding according to an embodiment of the present invention;

[0009] Figure 3 This is a cross-sectional view of a first flip-chip based semiconductor packaging structure according to an embodiment of the present invention;

[0010] Figure 4 This is a cross-sectional view of a second flip-chip based semiconductor packaging structure according to an embodiment of the present invention;

[0011] Figure 5 This is a cross-sectional view of a third flip-chip based semiconductor packaging structure according to an embodiment of the present invention;

[0012] Figure 6 This is a cross-sectional view of a fourth flip-chip based semiconductor packaging structure according to an embodiment of the present invention.

[0013] Symbol explanation:

[0014] 100, 200: Semiconductor packaging structures based on wire bonding

[0015] 102, 302: Substrate

[0016] 104, 304: Functional grains

[0017] 106, 306, 406: Heat dissipation components

[0018] 108, 208, 502, 602: Thermally conductive materials

[0019] 110, 210, 308, 408, 508, 608: Molding compound

[0020] 112, 310: Tin Ball

[0021] 114, 116. 314: Adhesive

[0022] 118: Stringing

[0023] 101, 105, 109, 305, 309, 313, 401: Lower surface

[0024] 103, 107, 111, 113, 201, 303, 307, 311, 403, 501, 601: Upper surface

[0025] 300, 400, 500, 600: Flip-chip based semiconductor packaging structures

[0026] 312: Bump Detailed Implementation

[0027] Certain terms are used in the specification and claims to refer to specific elements. Those skilled in the art will understand that hardware manufacturers may use different names to refer to the same element. This specification and claims do not distinguish elements based on differences in name, but rather on differences in function. The terms "comprising" and "including" used throughout the specification and claims are open-ended and should be interpreted as "comprising but not limited to." Furthermore, the terms "coupled" or "coupled" herein include any direct and indirect electrical connection means. Therefore, if a first device is described as coupled to a second device, it means that the first device can be directly electrically connected to the second device, or indirectly electrically connected to the second device through other devices and connection means.

[0028] Figure 1 This is a cross-sectional view of a first embodiment of a semiconductor package structure based on wire bond (WB) according to the present invention. The wire bond-based semiconductor package structure 100 includes a substrate (labeled "SBT") 102, a functional die (containing active circuitry, such as transistor-based circuitry) 104, a heat dissipation element (labeled "heat dissipation") 106, a thermally conductive material (labeled "material") 108, a molding compound 110, a plurality of solder balls 112, a plurality of adhesives 114 and 116, and a plurality of bond wires 118. Solder balls 112 are formed on the bottom surface 101 of the substrate 102 for mounting on a printed circuit board (PCB). Adhesives 114 and 116 may be epoxy adhesive films. The lower surface 105 of the functional chip 104 is adhered to the upper surface 103 of the substrate 102 by an adhesive 114. The lower surface 109 of the heat dissipation element 106 is adhered to the upper surface 107 of the functional chip 104 by an adhesive 116.

[0029] The functional die 104 and the heat dissipation element 106 are encapsulated by the molding compound 110. In this embodiment, the heat dissipation element 106 can provide a heat dissipation path for the functional die 104 located below it. Therefore, the thermal conductivity of the heat dissipation element 106 is higher than that of the molding compound 110. For example, the thermal conductivity of the molding compound 110 is 1 W / mK, while the thermal conductivity of the heat dissipation element 106 is not less than 141 W / mK. In this embodiment, the heat dissipation element 106 is coated with a layer of thermally conductive material 108, wherein the thermal conductivity of the thermally conductive material 108 is higher than that of the heat dissipation element 106. For example, the heat dissipation element 106 can be a dummy silicon die, wherein the dummy silicon die is made of silicon (Si) with a thermal conductivity of 141 W / mK, and the dummy silicon die does not have any active circuitry (e.g., transistor-based circuitry). Since the thermally conductive material 108 has physical contact with the upper surface 111 of the heat dissipation element 106 and the thermal conductivity of the thermally conductive material 108 is higher than that of the heat dissipation element 106, the thermally conductive material 108 can improve the heat dissipation performance of the wire bonding-based semiconductor package structure 100. For example, the thermal conductivity of the thermally conductive material 108 can be higher than 141 W / mk.

[0030] In some embodiments of the present invention, the thermally conductive material 108 may be electrically conductive. For example, the thermally conductive material 108 may be silver (Ag) with a thermal conductivity of 429 W / mK, copper (Cu) with a thermal conductivity of 401 W / mK, gold (Au) with a thermal conductivity of 317 W / mK, or aluminum (Al) with a thermal conductivity of 237 W / mK. Therefore, the heat dissipation element 106 may be electrically non-conductive to prevent the functional die 104 from being accidentally short-circuited due to the conductivity of the thermally conductive material 108 (i.e., the heat dissipation element 106 contains an insulating material, while the thermally conductive material 108 contains a conductive material). For example, the heat dissipation element 106 may be a dummy silicon die, wherein the dummy silicon die is made of silicon (Si) with a thermal conductivity of 141 W / mK, and the dummy silicon die does not contain active circuitry (e.g., transistor-based circuitry).

[0031] about Figure 1The illustrated wire bonding-based semiconductor package structure 100 encapsulates a thermally conductive material 108 within a molding compound 110, preventing it from being exposed to the external environment. Specifically, the upper surface 113 of the thermally conductive material 108 is fully covered by the molding compound 110, and as shown in each cross-sectional view, each sidewall of the thermally conductive material 108 is also fully covered by the molding compound 110 (even though...). Figure 1 (Only a cross-sectional view is shown), and the functional die 104, the heat dissipation element (e.g., a dummy silicon die) 106, and the thermally conductive material 108 are all sealed by the molding compound 110.

[0032] Figure 2 This is a cross-sectional view of a second wire-bonded semiconductor package structure according to an embodiment of the present invention. The main difference between the wire-bonded semiconductor package structures 100 and 200 is that the thermally conductive material 208 (e.g., Ag, Cu, Au, Al, or other materials with a thermal conductivity higher than Si) is partially encapsulated by the molding compound 210 and exposed to the external environment. A heat dissipation element (e.g., a dummy silicon die) 106 is coated with a layer of the thermally conductive material 208. Both the functional die 104 and the heat dissipation element (e.g., a dummy silicon die) 106 are encapsulated by the molding compound 210. The upper surface 201 of the thermally conductive material 208 is not covered by the molding compound 210. Because the thermally conductive material 208 is exposed to the external environment, the wire-bonded semiconductor package structure 200 can have superior heat dissipation performance compared to the wire-bonded semiconductor package structure 100.

[0033] Figure 3 This is a cross-sectional view of a first flip-chip (FC) based semiconductor package structure according to an embodiment of the present invention. The flip-chip based semiconductor package structure 300 includes a substrate (labeled "SBT") 302, a functional die (containing active circuitry, such as transistor-based circuitry) 304, a heat dissipation element (labeled "heat dissipation") 306, a molding compound 308, a plurality of solder balls 310, a plurality of bumps 312, and an adhesive 314. Solder balls 310 are formed on the lower surface 313 of the substrate 302 for printed circuit board mounting. Bumps 312 are formed on the lower surface 305 (i.e., the active surface) of the functional die 304 for substrate mounting (i.e., the functional die 304 is mounted on the upper surface 303 of the substrate 302). The adhesive 314 may be an epoxy resin film. The lower surface 309 of the heat dissipation element 306 is adhered to the upper surface 307 of the functional die 304 by the adhesive 314.

[0034] The functional die 304 and the heat dissipation element 306 are encapsulated by the molding compound 308. In this embodiment, the heat dissipation element 306 provides a heat dissipation path for the functional die 304 located below it. Therefore, the thermal conductivity of the heat dissipation element 306 is higher than that of the molding compound 308. For example, the thermal conductivity of the molding compound 308 is 1 W / mK, while the thermal conductivity of the heat dissipation element 306 is not less than 141 W / mK. For example, the heat dissipation element 306 may be a dummy silicon die, wherein the dummy silicon die is made of silicon (Si) with a thermal conductivity of 141 W / mK, and the dummy silicon die does not contain active circuitry (e.g., transistor-based circuitry).

[0035] In this embodiment, the size of the heat dissipation element (e.g., a dummy silicon die) 306 is larger than the size of the functional die 304, and the heat dissipation element (e.g., the dummy silicon die) 306 completely covers the functional die 304. Specifically, in the thickness direction (i.e., the vertical direction) of the flip-chip semiconductor package structure 300, the surface area of ​​the heat dissipation element (e.g., the dummy silicon die) 306 (substantially perpendicular to the thickness direction) is larger than the surface area of ​​the functional die 304, and the surface area of ​​the functional die 304 completely overlaps the surface area of ​​the heat dissipation element (e.g., the dummy silicon die) 306. In other words, in Figure 3 In the cross-sectional view and other different cross-sectional views, the surface area of ​​the functional die 304 completely overlaps with the surface area of ​​the heat dissipation element (e.g., dummy silicon die) 306. Due to the large size and high thermal conductivity of the heat dissipation element (e.g., dummy silicon die) 306, the heat dissipation performance of the flip-chip semiconductor package structure 300 can be improved.

[0036] about Figure 3 The flip-chip based semiconductor package structure 300 shown has a heat dissipation element (e.g., a dummy silicon die) 306 encapsulated by a molding compound 308, and thus not exposed to the external environment from the molding compound 308. Specifically, the upper surface 311 of the heat dissipation element (e.g., the dummy silicon die) 306 is completely covered by the molding compound 308, and both the functional die 304 and the heat dissipation element (e.g., the dummy silicon die) 306 are sealed by the molding compound 308.

[0037] Figure 4 This is a cross-sectional view of a second flip-chip based semiconductor package structure according to an embodiment of the present invention. The main difference between the flip-chip based semiconductor package structures 300 and 400 is that the heat dissipation element (e.g., a dummy silicon die) 406 is partially encapsulated by molding compound 408 and exposed to the external environment from the molding compound 408. Figure 4As shown, the lower surface 401 of a heat dissipation element (e.g., a dummy silicon die) 406 is adhered to the upper surface 307 of a functional die 304 by an adhesive 314. The size of the heat dissipation element (e.g., the dummy silicon die) 406 is larger than the size of the functional die 304, and the heat dissipation element (e.g., the dummy silicon die) 406 completely covers the functional die 304. In other words, in the thickness direction (i.e., the vertical direction) of the flip-chip semiconductor package structure 400, the surface area of ​​the heat dissipation element (e.g., the dummy silicon die) 406 (substantially perpendicular to the thickness direction) is larger than the surface area of ​​the functional die 304, and the surface area of ​​the functional die 304 completely overlaps the surface area of ​​the heat dissipation element (e.g., the dummy silicon die) 406. Figure 4 In the cross-sectional view and other different cross-sectional views, the surface area of ​​the functional die 304 completely overlaps the surface area of ​​the heat dissipation element (e.g., dummy silicon die) 406. In this embodiment, the functional die 304 is encapsulated by the molding compound 408, and the upper surface 403 of the heat dissipation element (e.g., dummy silicon die) 406 is not covered by the molding compound 408. Since the heat dissipation element (e.g., dummy silicon die) 406 is exposed to the external environment from the molding compound 408, the flip-chip based semiconductor package structure 400 can have superior heat dissipation performance compared to the flip-chip based semiconductor package structure 300.

[0038] Figure 5 This is a cross-sectional view of a third flip-chip based semiconductor package structure according to an embodiment of the present invention. The main difference between the flip-chip based semiconductor package structures 300 and 500 is that the heat dissipation element 306 is coated with a layer of thermally conductive material (labeled "material") 502. The functional die 304 and the heat dissipation element 306 are encapsulated by molding compound 508. In this embodiment, the heat dissipation element 306 provides a heat dissipation path for the functional die 304 located below it, so the thermal conductivity of the heat dissipation element 306 is higher than that of the molding compound 508. For example, the thermal conductivity of the molding compound 508 is 1 W / mK, while the thermal conductivity of the heat dissipation element 306 is not less than 141 W / mK. In addition, the thermal conductivity of the thermally conductive material 502 is higher than that of the heat dissipation element 306. For example, the heat dissipation element 306 can be a dummy silicon die, wherein the dummy silicon die is made of silicon (Si) with a thermal conductivity of 141 W / mK, and the dummy silicon die does not contain any active circuitry (e.g., transistor-based circuitry). Since the thermally conductive material 502 has physical contact with the upper surface 311 of the heat dissipation element 306 and the thermal conductivity of the thermally conductive material 502 is higher than that of the heat dissipation element 306, the thermally conductive material 502 can improve the heat dissipation performance of the flip-chip semiconductor package structure 500. For example, the thermal conductivity of the thermally conductive material 502 is higher than 141 W / mk.

[0039] In some embodiments of the present invention, the thermally conductive material 502 may be conductive. For example, the thermally conductive material 502 may be silver (Ag) with a thermal conductivity of 429 W / mK, copper (Cu) with a thermal conductivity of 401 W / mK, gold (Au) with a thermal conductivity of 317 W / mK, or aluminum (Al) with a thermal conductivity of 237 W / mK. Therefore, the heat dissipation element 306 may be non-conductive to prevent the functional die 304 from accidentally short-circuiting due to the conductivity of the thermally conductive material 502 (i.e., the heat dissipation element 306 contains an insulating material, while the thermally conductive material 502 contains a conductive material). For example, the heat dissipation element 306 may be a dummy silicon die, wherein the dummy silicon die is made of silicon (Si) with a thermal conductivity of 141 W / mK, and the dummy silicon die does not contain active circuitry (e.g., transistor-based circuitry).

[0040] about Figure 5 The flip-chip semiconductor package structure 500 shown has a thermally conductive material 502 encapsulated by a molding compound 508, thus preventing it from being exposed to the external environment. Specifically, the upper surface 501 of the thermally conductive material 502 is completely covered by the molding compound 508, and as shown in each cross-sectional view, each sidewall of the thermally conductive material 502 is completely covered by the molding compound 508 (even though...). Figure 5 (Only a cross-sectional view is shown), and the functional die 304, the heat dissipation element (e.g., a dummy silicon die) 306, and the thermally conductive material 502 are all sealed by the molding compound 508.

[0041] Figure 6 This is a cross-sectional view of a fourth flip-chip based semiconductor package structure according to an embodiment of the present invention. The main difference between the flip-chip based semiconductor package structures 500 and 600 is that the thermally conductive material 602 (e.g., Ag, Cu, Au, Al, or other materials with a thermal conductivity higher than Si) is partially encapsulated by the molding compound 608 and exposed to the external environment from the molding compound 608. Specifically, the functional die 304 and the heat dissipation element (e.g., a dummy silicon die) 306 are encapsulated by the molding compound 608, and the upper surface 601 of the thermally conductive material 602 is not covered by the molding compound 608. Since the thermally conductive material 602 is exposed to the external environment from the molding compound 608, the flip-chip based semiconductor package structure 600 can have superior heat dissipation performance compared to the flip-chip based semiconductor package structure 500.

[0042] The above description is only a preferred embodiment of the present invention. All equivalent changes and modifications made in accordance with the claims of the present invention should be included within the scope of the present invention.

Claims

1. A semiconductor package structure comprising: Functional grains; Heat dissipation components; An adhesive, wherein the lower surface of the heat dissipation element is adhered to the upper surface of the functional grain by means of the adhesive; A molding compound, wherein the functional die and the heat dissipation element are encapsulated by the molding compound; and A thermally conductive material is in physical contact with the upper surface of the heat dissipation element, wherein the thermal conductivity of the heat dissipation element is higher than that of the molding compound, and the thermal conductivity of the thermally conductive material is higher than that of the heat dissipation element.

2. The semiconductor packaging structure as described in claim 1, wherein the heat dissipation element is a dummy silicon die.

3. The semiconductor package structure as claimed in claim 1, wherein the heat dissipation element is non-conductive.

4. The semiconductor packaging structure of claim 1, wherein the thermally conductive material is encapsulated by the molding compound and is not exposed to the external environment.

5. The semiconductor packaging structure of claim 1, wherein the thermally conductive material is partially encapsulated by the molding compound and exposed to the external environment.

6. The semiconductor packaging structure of claim 1, wherein the thermal conductivity of the thermally conductive material is higher than that of silicon.

7. The semiconductor packaging structure of claim 6, wherein the thermally conductive material is silver, copper, gold or aluminum.

8. The semiconductor packaging structure of claim 1, wherein the semiconductor packaging structure is a wire bonding semiconductor packaging structure.

9. The semiconductor packaging structure of claim 1, wherein the semiconductor packaging structure is based on a flip-chip semiconductor packaging structure.

10. A semiconductor package structure comprising: Functional grains; Heat dissipation components; and An adhesive, wherein the lower surface of the functional grain is adhered to the upper surface of the functional grain by means of the adhesive; The semiconductor packaging structure is a flip-chip semiconductor packaging structure, the size of the heat dissipation element is larger than the size of the functional die, and the heat dissipation element completely covers the functional die.

11. The semiconductor packaging structure of claim 10, further comprising: A molding compound, wherein the functional die is encapsulated by the molding compound; and the heat dissipation element is encapsulated by the molding compound and is not exposed to the external environment.

12. The semiconductor packaging structure of claim 10, further comprising: A molding compound, wherein the functional die is encapsulated by the molding compound; and the heat dissipation element is partially encapsulated by the molding compound and exposed to the external environment.

13. The semiconductor package structure of claim 10, wherein the heat dissipation element is a dummy silicon die.

14. The semiconductor package structure of claim 10, further comprising: A molding compound, wherein the functional die and the heat dissipation element are encapsulated by the molding compound; and A thermally conductive material is in physical contact with the upper surface of the heat dissipation element, wherein the thermal conductivity of the heat dissipation element is higher than that of the molding compound, and the thermal conductivity of the thermally conductive material is higher than that of the heat dissipation element.

15. The semiconductor package structure of claim 14, wherein the heat dissipation element is a dummy silicon die.

16. The semiconductor package structure of claim 14, wherein the heat dissipation element is non-conductive.

17. The semiconductor packaging structure of claim 14, wherein the thermally conductive material is encapsulated by the molding compound and is not exposed to the external environment.

18. The semiconductor package structure of claim 14, wherein the thermally conductive material is partially encapsulated by the molding compound and exposed to the external environment.

19. The semiconductor packaging structure of claim 14, wherein the thermal conductivity of the thermally conductive material is higher than that of silicon.

20. The semiconductor packaging structure of claim 19, wherein the thermally conductive material is silver, copper, gold, or aluminum.

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