Package substrate, method of manufacturing the same, and chip package structure

Abstract

The application discloses a packaging board, a preparation method thereof and a chip packaging structure. First, a substrate is provided, and a first through hole is formed by patterning the substrate, the first through hole penetrating the substrate in a thickness direction, the first through hole having a first axis, the first through hole having a first opening and a second opening oppositely arranged in the thickness direction, and the aperture of the first opening being smaller than that of the second opening. Then, a buffer structure is filled in the first through hole, and a second through hole is formed by patterning the buffer structure, the second through hole penetrating the buffer structure in the thickness direction, the second through hole having a second axis, and the first axis and the second axis being arranged in a same line. Finally, a conductive structure is prepared, and the conductive structure is located in the second through hole. The first axis and the second axis are arranged in the same line, the thickness distribution of the buffer structure around the conductive structure is uniform, the stress generated due to the difference in thermal expansion coefficients between the substrate and the conductive structure is effectively buffered, and the risk of crack generation is reduced.

Description

Technical Field

[0001] This application relates to the field of semiconductor packaging, specifically to a packaging substrate, its preparation method, and a chip packaging structure. Background Technology

[0002] With the rapid development of high-performance chips, chip integration is constantly increasing, and interconnect density is becoming increasingly dense. Traditional organic substrates are gradually failing to meet the demands of advanced packaging in terms of flatness, fine circuit processing capabilities, and signal transmission rates. Glass, due to its excellent thermal stability, can withstand higher processing temperatures than organic substrates, and its coefficient of thermal expansion is similar to that of silicon chips, effectively reducing warping problems caused by thermal mismatch. Furthermore, the high flatness and low roughness of the glass surface facilitate denser wiring; its extremely low dielectric constant and dielectric loss contribute to improved signal transmission speed and integrity; and glass also possesses excellent chemical stability, resisting corrosion from moisture, acids, and alkalis. Based on these physical, chemical, and electrical advantages, glass is considered an ideal material to replace organic substrates, with glass via technology being the core element for achieving electrical interconnects on glass substrates.

[0003] In existing glass substrate fabrication processes, to address the stress issues arising from the difference in thermal expansion coefficients between glass and metal, a common approach is to fill the glass vias with a buffer material. The conventional method involves first forming vias in the glass substrate, then filling the vias with a buffer material, and finally creating openings at the locations of the buffer material and filling them with metal.

[0004] However, existing technologies are prone to localized stress concentration, which increases the risk of cracks in the glass substrate, thereby affecting the reliability and lifespan of the packaging structure. Summary of the Invention

[0005] This application provides a packaging substrate, its preparation method, and a chip packaging structure, aiming to reduce the risk of cracking in glass substrates.

[0006] The first aspect of this application provides a method for preparing a packaging carrier, including: A substrate is provided, and the substrate is patterned to form a first through hole. The first through hole is disposed through the substrate in the thickness direction. The first through hole has a first axis and a first opening and a second opening disposed opposite to each other in the thickness direction. The diameter of the first opening is smaller than the diameter of the second opening. A buffer structure is filled in the first through hole, and the buffer structure is patterned to form a second through hole. The second through hole extends through the buffer structure in the thickness direction and has a second axis. The first axis and the second axis are collinear. A conductive structure is prepared and located within the second through hole.

[0007] According to an embodiment of the first aspect of this application, the substrate has a first side and a second side opposite to each other in the thickness direction, a first opening is located on the first side, a second opening is located on the second side, and the method further includes filling the first through-hole with a buffer material and patterning the buffer material as follows: The buffer material on the first side is patterned to form a second through hole.

[0008] According to any of the foregoing embodiments of the first aspect of this application, before the step of filling the first through-hole with buffer material and patterning the buffer material, the method further includes: A protective layer is prepared on the surface of a substrate, the protective layer being located at least on the first side of the substrate, the transmittance of the protective layer being less than the transmittance of the buffer structure, or the laser damage threshold of the protective layer being greater than the laser damage threshold of the buffer structure.

[0009] According to any of the foregoing embodiments of the first aspect of this application, the substrate has a first side and a second side opposite to each other in the thickness direction, and the step of fabricating the conductive structure includes: A seed conductive layer is prepared on the surface of the buffer structure, and the seed conductive layer is located at least on the surface of the buffer structure within the first through hole; A conductive material is prepared, which fills the second through-hole and covers the surfaces of the substrate on the first and second sides. The substrate is ground on the first and second sides to form a conductive structure located within the second through hole.

[0010] A second aspect of this application provides a packaging carrier, comprising: a substrate, a first through-hole formed thereon, the first through-hole penetrating the substrate in the thickness direction, the first through-hole having a first axis, and a first opening and a second opening disposed opposite to each other in the thickness direction, the diameter of the first opening being smaller than the diameter of the second opening; a buffer structure located within the first through-hole, the buffer structure having a second through-hole formed thereon, the second through-hole penetrating the buffer structure in the thickness direction, the second through-hole having a second axis, the first axis and the second axis being collinear; and a conductive structure located within the second through-hole.

[0011] According to an embodiment of the second aspect of this application, the diameter of the first through hole gradually increases along the direction from the first opening to the second opening.

[0012] According to any of the foregoing embodiments of the second aspect of this application, the thickness of the buffer structure in the circumferential direction of the second axis gradually increases along the direction from the first opening to the second opening.

[0013] According to any of the foregoing embodiments of the second aspect of this application, the diameter of the second through hole is less than or equal to the diameter of the first opening, and / or the diameter of the first through hole is greater than or equal to the diameter of the first opening.

[0014] According to any of the foregoing embodiments of the second aspect of this application, in a cross section of the buffer structure perpendicular to the thickness direction, the thickness of the buffer structure in the circumferential direction of the second axis is equal.

[0015] According to any of the foregoing embodiments of the second aspect of this application, on the plane where the first opening is located, the thickness of the buffer structure in the circumferential direction of the second axis is a first thickness, and on the plane where the second opening is located, the thickness of the buffer structure in the circumferential direction of the second axis is a second thickness, and the first thickness and the second thickness are different.

[0016] According to any of the foregoing embodiments of the second aspect of this application, the diameter of the second through hole remains unchanged in the thickness direction along the direction from the first opening to the second opening.

[0017] According to any of the foregoing embodiments of the second aspect of this application, the packaging substrate further includes at least a protective layer disposed on the substrate facing the first through hole, wherein the transmittance of the protective layer is less than the transmittance of the buffer structure, or the laser damage threshold of the protective layer is greater than the laser damage threshold of the buffer structure.

[0018] An embodiment of the third aspect of this application provides a display device comprising a packaging substrate prepared by the packaging substrate preparation method of any of the above embodiments or a packaging substrate of any of the above embodiments.

[0019] The method for fabricating a packaging substrate according to an embodiment of this application involves: First, a substrate is provided, and the substrate is patterned to form a first through-hole. The first through-hole penetrates the substrate in the thickness direction and has a first axis. The first through-hole has a first opening and a second opening disposed opposite to each other in the thickness direction, with the diameter of the first opening being smaller than the diameter of the second opening. Then, a buffer structure is filled into the first through-hole, and the buffer structure is patterned to form a second through-hole. The second through-hole penetrates the buffer structure in the thickness direction and has a second axis. The first axis and the second axis are collinear. Finally, a conductive structure is fabricated within the second through-hole. By utilizing the characteristic that the upper and lower diameters of the first through-hole are inconsistent, when patterning the buffer structure, the smaller diameter end of the first through-hole can be used as a positioning reference to ensure that the second through-hole and the first through-hole automatically remain coaxial, thereby improving the problem of center misalignment between the first and second through-holes caused by two independent alignments. Because the first and second axes are collinear, the thickness distribution of the buffer structure around the conductive structure is uniform, effectively buffering the stress caused by the difference in thermal expansion coefficients between the substrate and the conductive structure, reducing the risk of cracking, and improving the reliability and service life of the packaging substrate. At the same time, this solution simplifies the process steps, achieving a concentric structure without additional alignment, thus reducing fabrication difficulty and cost. Attached Figure Description

[0020] Other features, objects, and advantages of this application will become more apparent from the following detailed description of non-limiting embodiments with reference to the accompanying drawings, in which the same or similar reference numerals denote the same or similar features, and the drawings are not drawn to scale.

[0021] Figure 1 This is a flowchart illustrating the fabrication process of a packaging substrate provided in an embodiment of this application; Figure 2 This is a process diagram illustrating the fabrication of a packaging carrier provided in an embodiment of this application; Figure 3 This is a process diagram illustrating the fabrication of a packaging carrier provided in an embodiment of this application; Figure 4 This is a process diagram illustrating the fabrication of a packaging carrier provided in an embodiment of this application; Figure 5 This is a process diagram illustrating the fabrication of a packaging carrier provided in an embodiment of this application; Figure 6 This is a process diagram illustrating the fabrication of a packaging carrier provided in an embodiment of this application; Figure 7 This is a process diagram illustrating the fabrication of a packaging carrier provided in an embodiment of this application; Figure 8 This is a process diagram illustrating the fabrication of a packaging carrier provided in an embodiment of this application; Figure 9 This is a process diagram illustrating the fabrication of a packaging carrier provided in an embodiment of this application; Figure 10 This is a partial top view of a packaging carrier provided in an embodiment of this application; Figure 11 A partial top view of the encapsulation carrier in another embodiment; Figure 12 A partial top view of the packaging carrier in another embodiment; Figure 13 A partial top view of the encapsulation carrier in another embodiment.

[0022] Explanation of reference numerals in the attached figures: 10. Packaging carrier board; 11. First side; 12. Second side; 100, Substrate; 110, First through hole; 111, First opening; 112, Second opening; 120, Recess; 200. Buffer structure; 210. Second through hole; 300. Conductive structure; 400, wiring layer; 500, protective layer; L1, first axis; L2, second axis; D1, first thickness; D2, second thickness. Detailed Implementation

[0023] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, the technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. The components of the embodiments of this application described and shown in the accompanying drawings can generally be arranged and designed in various different configurations.

[0024] Therefore, the following detailed description of the embodiments of this application provided in the accompanying drawings is not intended to limit the scope of the claimed application, but merely to illustrate selected embodiments of the application. All other embodiments obtained by those skilled in the art based on the embodiments of this application without inventive effort are within the scope of protection of this application.

[0025] It should be noted that similar reference numerals and letters in the following figures indicate similar items; therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures. It should be noted that, unless otherwise specified, different features in the embodiments of this application can be combined with each other.

[0026] For certain elements, terms like "above" or "over" are sometimes used when describing their location, while "below" or "under" is used when describing the location of an element in the opposite direction. Furthermore, when using terms like "above," "over," "below," "under," or "relative" to define the positional relationship between two elements, this includes not only situations where the two elements are directly adjacent but also situations where they are separated by gaps or other elements. Additionally, terms like "first," "second," and "third" are used only for descriptive distinction and should not be interpreted as indicating or implying relative importance.

[0027] With the development of high-performance chips, chip integration is increasing, and interconnect density is becoming increasingly dense. Traditional organic substrates can no longer meet the requirements in terms of flatness, fine circuitry, and signal transmission speed. During the packaging process, glass can withstand higher temperatures better than organic substrates, and its coefficient of thermal expansion is similar to silicon, thus reducing stress warping problems caused by thermal mismatch. Furthermore, the higher flatness and lower roughness of the glass surface allow for denser wiring. Its extremely low dielectric constant and dielectric loss improve signal transmission speed and signal integrity. Simultaneously, its excellent chemical stability effectively resists corrosion from moisture, acids, and alkalis. With its superior physical, chemical, and electrical properties, glass can replace organic substrates.

[0028] The most crucial part of the glass substrate is the fabrication of TGV (Through-Glass Via). Glass is a brittle material, and after the TGV is filled with metal, the thermal expansion coefficients of the glass and the metal are inconsistent, which can easily lead to cracks due to stress.

[0029] In existing glass substrate fabrication processes, to address the stress issues arising from the difference in thermal expansion coefficients between glass and metal, a common approach is to fill the glass vias with a buffer material. The conventional method involves first forming vias in the glass substrate, then filling the vias with buffer material, and finally creating an opening at the center of the buffer material and filling it with metal. This process requires two alignment operations: the first is forming the via, and the second is creating the opening in the buffer material.

[0030] However, the existing technology's two independent alignment processes are prone to misalignment of the central axes of the two holes. When the two holes are not aligned, it leads to uneven thickness distribution of the buffer material around the metal conductor, and even the absence of buffer material on one side. This uneven distribution of the buffer layer is difficult to effectively alleviate the thermal stress between the glass and the metal, and may instead cause local stress concentration at the interface, increasing the risk of cracks in the glass substrate, thereby affecting the reliability and service life of the packaging structure.

[0031] This application provides a packaging substrate, its preparation method, and a chip packaging structure. The following description, in conjunction with the accompanying drawings, will illustrate various embodiments of the packaging substrate, its preparation method, and the chip packaging structure.

[0032] Please refer to the following: Figures 1 to 9 , Figure 1 This is a flowchart illustrating the fabrication process of a packaging substrate provided in an embodiment of this application; Figure 2 This is a process diagram illustrating the fabrication of a packaging carrier provided in an embodiment of this application; Figure 3 This is a process diagram illustrating the fabrication of a packaging carrier provided in an embodiment of this application; Figure 4 This is a process diagram illustrating the fabrication of a packaging carrier provided in an embodiment of this application; Figure 5 This is a process diagram illustrating the fabrication of a packaging carrier provided in an embodiment of this application; Figure 6 This is a process diagram illustrating the fabrication of a packaging carrier provided in an embodiment of this application; Figure 7 This is a process diagram illustrating the fabrication of a packaging carrier provided in an embodiment of this application; Figure 8 This is a process diagram illustrating the fabrication of a packaging carrier provided in an embodiment of this application; Figure 9 This is a process diagram of the preparation of a packaging substrate provided in an embodiment of this application.

[0033] like Figures 1 to 9 As shown, the first aspect of this application provides a method for preparing a packaging carrier 10, comprising: Step S01: Provide a substrate 100 and pattern the substrate 100 to form a first through hole 110. The first through hole 110 is disposed through the substrate 100 in the thickness direction. The first through hole 110 has a first axis L1 and a first opening 111 and a second opening 112 disposed opposite to each other in the thickness direction. The diameter of the first opening 111 is smaller than the diameter of the second opening 112. Step S02: Fill the first through hole 110 with a buffer structure 200 and pattern the buffer structure 200 to form a second through hole 210. The second through hole 210 is disposed through the buffer structure 200 in the thickness direction. The second through hole 210 has a second axis L2, and the first axis L1 and the second axis L2 are collinear. Step S03: Prepare conductive structure 300, which is located inside the second through hole 210.

[0034] The method for preparing a packaging substrate 10 according to an embodiment of this application is as follows: First, a substrate 100 is provided in step S01, and the substrate 100 is patterned to form a first through-hole 110. The first through-hole 110 penetrates the substrate 100 in the thickness direction and has a first axis L1. The first through-hole 110 has a first opening 111 and a second opening 112 that are opposite to each other in the thickness direction. The diameter of the first opening 111 is smaller than the diameter of the second opening 112. Then, in step S02, a buffer structure 200 is filled into the first through-hole 110, and the buffer structure 200 is patterned to form a second through-hole 210. The second through-hole 210 penetrates the buffer structure 200 in the thickness direction and has a second axis L2. The first axis L1 and the second axis L2 are collinear. Finally, in step S03, a conductive structure 300 is prepared and is located within the second through-hole 210. By utilizing the inconsistent diameters of the upper and lower holes of the first through-hole 110, the smaller diameter end of the first through-hole 110 can be used as a positioning reference during the patterning process of the buffer structure 200. This ensures that the second through-hole 210 automatically remains coaxial with the first through-hole 110, thereby improving the problem of center misalignment between the first through-hole 110 and the second through-hole 210 caused by two independent alignments. Since the first axis L1 and the second axis L2 are collinear, the thickness distribution of the buffer structure 200 around the conductive structure 300 is uniform, effectively buffering the stress caused by the difference in thermal expansion coefficients between the substrate 100 and the conductive structure 300, reducing the risk of crack formation, and improving the reliability and service life of the packaging carrier 10. Simultaneously, this solution simplifies the process steps, achieving a concentric structure without additional alignment, reducing manufacturing difficulty and cost.

[0035] In the embodiments of this application, the aperture refers to the diameter or effective width of the hole or opening.

[0036] Optionally, the step of providing a substrate 100 and patterning the substrate 100 to form the first through-hole 110 includes: A substrate 100 is provided, and a modified portion is formed on the substrate 100 by laser induction. The modified part is etched by single-sided wet etching to form the first through hole 110.

[0037] In some optional embodiments, the substrate 100 has a first side 11 and a second side 12 opposite to each other in the thickness direction, a first opening 111 located on the first side 11, and a second opening 112 located on the second side 12. In the step of filling the first through-hole 110 with a buffer material and patterning the buffer material, the method further includes: The buffer material on the first side 11 is patterned to form a second through hole 210.

[0038] In these optional embodiments, taking advantage of the fact that the aperture of the first opening 111 is smaller than that of the second opening 112, the first side 11 where the smaller aperture is located is used as the incident surface or mask reference surface for patterning. This allows the first opening 111 to naturally play a limiting and positioning role when the buffer material is exposed or etched, ensuring that the formed second through hole 210 is automatically aligned with the first axis L1 of the first through hole 110. This improves the positioning deviation that may occur when patterning is performed from the side with the larger aperture, as well as the positioning deviation that may occur when patterning is performed because the apertures of the first side 11 and the second side 12 are the same. This further ensures the collinearity of the first axis L1 and the second axis L2, thereby improving the thickness uniformity of the buffer structure 200 around the conductive structure 300.

[0039] Optionally, ultraviolet light or laser light can be used to pattern the buffer material on the first side 11 to form the second through-hole 210. After exposing the buffer material with ultraviolet light, a developing solution is also needed to develop and remove the exposed area to form the second through-hole 210.

[0040] Optionally, the buffer structure 200 may include organic materials, such as photosensitive organic materials, such as photosensitive polyimide.

[0041] like Figure 9 As shown, in some optional embodiments, prior to the step of filling the first through-hole 110 with a buffer material and patterning the buffer material, the method further includes: A protective layer 500 is prepared on the surface of the substrate 100. The protective layer 500 is located at least on the first side 11 of the substrate 100. The transmittance of the protective layer 500 is less than the transmittance of the buffer structure 200, or the laser damage threshold of the protective layer 500 is greater than the laser damage threshold of the buffer structure 200.

[0042] Laser damage threshold is an important parameter characterizing the resistance of a medium irradiated by a laser to laser damage. High concentrations of laser energy can cause localized deformation or even complete damage to the medium, either internally or on its surface.

[0043] In these optional embodiments, by providing a protective layer 500 on the first side 11, when the buffer material is patterned by means of ultraviolet light irradiation or laser ablation, the protective layer 500 can block or withstand the irradiation energy, preventing the surface of the substrate 100, especially the area around the small aperture, from being accidentally etched or damaged. At the same time, it only allows energy to act on the buffer material to form the second through hole 210, which improves the selectivity of the process and the patterning accuracy, further ensuring the concentricity of the second through hole 210 and the first through hole 110, and improving the thickness uniformity of the buffer structure 200 around the conductive structure 300.

[0044] Optionally, the protective layer 500 covers the surface of the substrate 100 facing the first side 11, and / or, the protective layer 500 covers the surface of the substrate 100 facing the second side 12, and / or, the protective layer 500 covers the surface of the substrate 100 facing the first through hole 110.

[0045] Optionally, a protective layer 500 may be sputtered using a PVD (Physical Vapor Deposition) process. Optionally, the material of the protective layer 500 may include metals, such as titanium.

[0046] like Figures 1 to 9 As shown, in some optional embodiments, the substrate 100 has a first side 11 and a second side 12 opposite each other in the thickness direction, and the steps for fabricating the conductive structure 300 include: A seed conductive layer is prepared on the surface of the buffer structure 200, and the seed conductive layer is located at least on the surface of the buffer structure 200 within the first through hole 110. A conductive material is prepared, which fills the second through-hole 210 and covers the surfaces of the substrate 100 on the first side 11 and the second side 12. The substrate 100 is polished on the first side 11 and the second side 12 to form a conductive structure 300 located in the second through hole 210.

[0047] In these optional embodiments, the second through-hole 210 is filled by electroplating with a seed conductive layer to ensure the density and continuity of the conductive material filling the second through-hole 210, avoiding void defects. Subsequently, the excess protective layer 500, conductive material and seed conductive layer on both sides of the substrate 100 are removed by double-sided grinding. At the same time, the substrate 100 can be thinned as needed until the buffer structure 200 is exposed, so that the surface of the substrate 100 and the two ends of the conductive structure 300 are flush with the surface of the buffer structure 200, forming a flat end face, which facilitates the subsequent fabrication of wiring layers and improves the planarity of the packaging carrier 10 and the reliability of electrical connections.

[0048] Optionally, the seed conductive layer may be made of a metallic material, such as Cu. Optionally, the material of the seed conductive layer may be the same as that of the conductive structure 300. Optionally, the seed conductive layer may be formed within the first via 110 using a PVD process. Optionally, the conductive structure 300 may be filled using an electroplating process.

[0049] Optionally, the seed conductive layer can be reused as the protective layer 500, eliminating the need for additional preparation of the protective layer 500 and simplifying the preparation process.

[0050] Optionally, after step S03, the method further includes: A wiring layer 400 is formed on a first side 11 and / or a second side 12 of the substrate 100, and the wiring layer 400 and the conductive structure 300 are electrically connected.

[0051] Optionally, the step of fabricating the wiring layer 400 on the first side 11 and / or the second side 12 of the substrate 100 includes: A wiring seed layer is prepared on the first side 11 and / or the second side 12 of the substrate 100; A wiring material is prepared on the side of the wiring seed layer away from the substrate 100, and the wiring material is patterned to form a wiring layer 400.

[0052] Patterning of trace materials includes, but is not limited to, processes such as coating, photolithography, development, electroplating, resist removal, and etching.

[0053] Optionally, the trace layer 400 may include one or more sublayers. Optionally, the material of the trace layer 400 may include metallic materials, such as Cu, Al, Ni, Au, etc.

[0054] Optionally, a dielectric layer may be provided between two adjacent trace layers. The dielectric layer may be prepared by coating or lamination methods.

[0055] Optionally, the material of the conductive structure 300 may include metallic materials, such as Cu.

[0056] Optionally, the material of the substrate 100 may include glass.

[0057] Please see Figure 10 , Figure 10 This is a partial top view of a packaging carrier provided in an embodiment of this application.

[0058] like Figure 10 As shown, a second aspect embodiment of this application provides a packaging carrier 10, which includes: a substrate 100, on which a first through hole 110 is formed, the first through hole 110 penetrating the substrate 100 in the thickness direction, the first through hole 110 having a first axis L1, the first through hole 110 having a first opening 111 and a second opening 112 disposed opposite to each other in the thickness direction, the diameter of the first opening 111 being smaller than the diameter of the second opening 112; a buffer structure 200 located within the first through hole 110, on which a second through hole 210 is formed, the second through hole 210 penetrating the buffer structure 200 in the thickness direction, the second through hole 210 having a second axis L2, the first axis L1 and the second axis L2 being collinear; and a conductive structure 300 located within the second through hole 210.

[0059] According to an embodiment of this application, the packaging carrier 10 includes a substrate 100, a buffer structure 200, and a conductive structure 300. Utilizing the characteristic that the upper and lower apertures of the first through-hole 110 are not the same, when patterning the buffer structure 200, the smaller aperture end of the first through-hole 110 can be used as a positioning reference to ensure that the second through-hole 210 automatically remains coaxial with the first through-hole 110. This improves the problem of center misalignment between the first through-hole 110 and the second through-hole 210 caused by two independent alignments. Since the first axis L1 and the second axis L2 are collinear, the thickness distribution of the buffer structure 200 around the conductive structure 300 is uniform, effectively buffering the stress caused by the difference in thermal expansion coefficients between the substrate 100 and the conductive structure 300, reducing the risk of crack formation, and improving the reliability and service life of the packaging carrier 10. Simultaneously, a concentric structure can be achieved without additional alignment, simplifying the manufacturing process.

[0060] In some alternative embodiments, the diameter of the first through hole 110 gradually increases along the direction from the first opening 111 to the second opening 112.

[0061] In these optional embodiments, the diameter of the first through hole 110 gradually increases along the direction from the first opening 111 to the second opening 112, so that the first through hole 110 forms a smooth conical hole wall, which is conducive to the uniform filling of the buffer material in the first through hole 110 and avoids stress concentration or filling voids at steps or abrupt changes. At the same time, when the conical structure is patterned on the buffer structure 200, the small-diameter end can be used as a natural mask to help form the second through hole 210 coaxial with the first through hole 110, further ensuring the thickness uniformity and concentricity of the buffer structure 200.

[0062] In some alternative embodiments, the thickness of the buffer structure 200 gradually increases in the circumferential direction of the second axis L2 along the direction from the first opening 111 to the second opening 112.

[0063] In these alternative embodiments, the thickness of the buffer structure 200 gradually increases in the circumferential direction along the second axis L2 in the direction from the first opening 111 to the second opening 112, so that the thickness of the buffer layer matches the aperture variation of the tapered hole of the substrate 100. In the large aperture region near the second opening 112, the buffer structure 200 is thicker, which can provide stronger stress buffering capacity, while in the small aperture region near the first opening 111, the buffer structure 200 is thinner, which is beneficial to reduce the lateral dimension of the area through which the conductive structure 300 passes, and realize denser wiring. The thickness gradient design also reduces the risk of abrupt stress generation inside the buffer layer and improves the mechanical stability of the structure.

[0064] In some optional embodiments, the diameter of the second through hole 210 is less than or equal to the diameter of the first opening 111, and / or the diameter of the first through hole 110 is greater than or equal to the diameter of the first opening 111.

[0065] In these optional embodiments, when the diameter of the second through hole 210 is equal to the diameter of the first opening 111, that is, the thickness of the buffer structure 200 at the second opening 112 is 0; when the diameter of the second through hole 210 is smaller than the diameter of the first opening 111, the buffer structure 200 at the first opening 111 has a certain thickness, which can provide a certain stress buffering capacity. The diameter of the first through hole 110 is greater than or equal to the diameter of the first opening 111, ensuring that the tapered hole has sufficient space to accommodate the buffer structure 200 and the conductive structure 300, avoiding filling difficulties due to excessively small hole diameter; these dimensional relationships together optimize the spatial layout of the internal structure, improving process feasibility and electrical performance. Furthermore, the diameter of the first through hole 110 is greater than or equal to the diameter of the first opening 111. That is, the diameter of the first through hole 110 at any position is greater than or equal to the diameter of the first opening 111. This improves the problem that when the diameter of the first through hole 110 at a certain position is smaller than the diameter of the first opening 111, the buffer material is completely removed at that position, the substrate 100 is accidentally etched or damaged, and stress concentration occurs.

[0066] In some alternative embodiments, the thickness of the buffer structure 200 is equal in the circumferential direction of the second axis L2 in a cross section of the buffer structure 200 perpendicular to the thickness direction.

[0067] In these alternative embodiments, in the cross section of the buffer structure 200 perpendicular to the thickness direction, the thickness of the buffer structure 200 in the circumferential direction of the second axis L2 is equal, indicating that on the same plane perpendicular to the thickness direction, the buffer material is uniformly distributed in a ring around the conductive structure 300 with equal thickness everywhere. This structure makes thermal stress uniformly buffered around the conductive structure 300, improves the local stress concentration caused by uneven thickness of the buffer layer, further reduces the risk of crack formation, and improves the reliability of the encapsulation carrier 10 under thermal cycling conditions.

[0068] Please see Figure 11 , Figure 11 A partial top view of the encapsulation carrier in another embodiment.

[0069] like Figure 11As shown, in some optional embodiments, on the plane where the first opening 111 is located, the thickness of the buffer structure 200 in the circumferential direction of the second axis L2 is a first thickness D1, and on the plane where the second opening 112 is located, the thickness of the buffer structure 200 in the circumferential direction of the second axis L2 is a second thickness D2, and the first thickness D1 and the second thickness D2 are different.

[0070] In these alternative embodiments, the buffer layer has different thicknesses at both ends in the thickness direction, which can be used to make differentiated buffer designs according to the actual stress distribution in different areas of the substrate 100. For example, a thicker buffer layer is provided on the side of the second opening 112 where the stress is greater, providing stronger stress relief capability, while a thinner buffer layer is provided on the side of the first opening 111 where the wiring is dense, which is beneficial to reduce the wiring spacing and achieves a balance between stress buffering and high-density wiring.

[0071] In some alternative embodiments, the diameter of the second through hole 210 remains unchanged in the thickness direction along the direction from the first opening 111 to the second opening 112.

[0072] In these optional embodiments, the conductive structure 300 is columnar in the thickness direction and has a uniform cross-sectional area, which is conducive to uniform current distribution and reduces skin effect and local heating. At the same time, the equal-diameter holes facilitate the filling of conductive material and can avoid uneven filling or void defects caused by changes in hole diameter, thereby improving the compactness and conductivity of the conductive structure 300.

[0073] Please see Figure 12 , Figure 12 A partial top view of the encapsulation carrier in another embodiment.

[0074] like Figure 12 As shown, in some optional embodiments, the encapsulation carrier 10 further includes at least a protective layer 500 disposed on the substrate 100 facing the first through hole 110, wherein the transmittance of the protective layer 500 is less than the transmittance of the buffer structure 200, or the laser damage threshold of the protective layer 500 is greater than the laser damage threshold of the buffer structure 200.

[0075] In these alternative embodiments, the protective layer 500 acts as a mask or protector during the patterning process, blocking the adverse effects of irradiation energy on the surface of the substrate 100 and allowing energy to act only on the buffer material to form the second through hole 210. This improves the forming accuracy of the second through hole 210, ensures its concentricity with the first through hole 110, and protects the integrity of the surface of the substrate 100, especially the small aperture opening area, thereby improving the manufacturing yield and structural reliability of the packaging carrier 10.

[0076] Please see Figure 13 , Figure 13 A partial top view of the encapsulation carrier in another embodiment.

[0077] like Figure 13 As shown, optionally, the inner wall surface of the substrate 100 facing the first through hole 110 is provided with a plurality of recesses 120. By providing a plurality of recesses 120 on the inner wall surface of the substrate 100 facing the first through hole 110, the contact area between the substrate 100 and the buffer structure 200 is increased, which helps to improve the bonding force between the two; at the same time, these recesses 120 form a microscopic mechanical interlocking structure between the substrate 100 and the buffer structure 200, which is beneficial to disperse the thermal stress at the interface and reduce the risk of interface delamination or crack initiation due to the difference in thermal expansion coefficients.

[0078] In some alternative embodiments, the distribution density of the plurality of recesses 120 gradually increases along the direction from the first opening 111 to the second opening 112.

[0079] "Distribution density" refers to the number or area proportion of recesses 120 per unit area on the inner wall surface of the substrate 100 facing the first through hole 110. Since the first through hole 110 is a tapered hole (the diameter of the first opening 111 is smaller than the diameter of the second opening 112), the inner wall surface is a three-dimensional tapered surface. Therefore, along the direction from the first opening 111 to the second opening 112, i.e., along the generatrix of the tapered hole, the distribution density of the recesses 120 can exhibit different variation patterns, including gradually increasing, gradually decreasing, or remaining constant. These different distribution patterns can be specifically designed according to the stress distribution characteristics or process requirements of different areas of the tapered hole to achieve different technical effects.

[0080] In these alternative embodiments, along the direction from the first opening 111 to the second opening 112, since the diameter of the first through-hole 110 gradually increases, the thickness of the buffer structure 200 near the second opening 112 is typically also greater, and the accumulated thermal stress in this area may be more complex. By gradually increasing the distribution density of the recesses 120 in this direction, stronger mechanical anchoring and stress dispersion can be provided in areas of high stress, thereby more effectively improving the uniformity of stress distribution throughout the inner wall of the first through-hole 110 and reducing the risk of local stress concentration.

[0081] Optionally, the distribution density of the multiple recesses 120 gradually decreases along the direction from the first opening 111 to the second opening 112. Along the direction from the first opening 111 to the second opening 112, as the diameter of the first through-hole 110 gradually increases, the hole wall area near the second opening 112 is larger. By gradually reducing the distribution density of the recesses 120 in this direction, a denser number of recesses 120 can be retained in the small-diameter area near the first opening 111, which helps to provide stronger mechanical anchoring in this area and improve the interfacial bonding strength. Simultaneously, a slightly sparse distribution in the large-diameter area helps to reduce the weakening effect that excessive recesses 120 may have on the strength of the substrate 100, thereby balancing the relationship between the interfacial bonding force and the structural integrity of the substrate 100 overall.

[0082] Optionally, the spacing between two adjacent recesses 120 is equal along the direction from the first opening 111 to the second opening 112. Maintaining equal spacing between adjacent recesses 120 along the direction from the first opening 111 to the second opening 112 allows for the formation of a uniformly distributed stress-buffering lattice on the entire inner wall surface of the first through-hole 110. This equidistant arrangement helps provide a balanced stress dispersion effect in different areas of the tapered hole, allowing thermal stress to be released relatively uniformly at the interface, improving the uniformity of stress distribution, and thus reducing the risk of separation between the buffer structure 200 and the substrate 100 due to localized stress concentration. Simultaneously, the regular, equidistant arrangement facilitates precise control and mass production during the fabrication process.

[0083] Optionally, the inner surface roughness of the recess 120 is greater than the roughness of other surfaces of the substrate 100. This relatively high roughness of the inner surface of the recess 120 further enhances the adhesion of the cushioning material when filling the recess 120, forming a microscale mechanical interlock. This roughening treatment helps improve the bonding effect between the cushioning material and the substrate 100 in local areas, thereby reducing the risk of fretting or debonding at the interface between the cushioning structure 200 and the substrate 100 under thermal cycling or mechanical shock conditions, and improving the long-term stability of the overall structure.

[0084] Optionally, the elastic modulus of the buffer structure 200 is less than that of the conductive structure 300. Alternatively, the elastic modulus of the buffer structure 200 is less than that of the substrate 100. Young's modulus (elastic modulus) is a physical quantity describing the resistance of a solid material to deformation, defined as the ratio of stress to strain, and its value depends only on the physical properties of the material itself. By making the elastic modulus of the buffer structure 200 less than that of the conductive structure 300, when temperature changes cause thermal expansion or contraction of the material, the relatively soft buffer structure 200 can act as a stress-absorbing layer between the conductive structure 300 and the substrate 100. By making the elastic modulus of the buffer structure 200 less than that of the substrate 100, the buffer structure 200 can form a modulus transition layer between the more rigid substrate 100 and the conductive structure 300. When the elastic modulus of the buffer structure 200 is less than that of both the conductive structure 300 and the substrate 100, the buffer structure 200 can form a complete stress-buffering interface in the encapsulation carrier 10. This arrangement helps to create a mechanical property gradient between the substrate 100 and the conductive structure 300, so that thermal stress is gradually relieved during the transmission process, improving the stress distribution of the overall structure and reducing the risk of interface damage caused by differences in material properties.

[0085] In some possible implementations, this application also provides a chip packaging structure, which includes the packaging carrier 10 described in this application. Because this chip packaging structure includes the packaging carrier 10 described in this application, its reliability is higher.

[0086] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0087] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the invention patent. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these all fall within the protection scope of the present invention. Therefore, the protection scope of this invention patent should be determined by the appended claims.

[0088] Although this application has been described with reference to preferred embodiments, various modifications can be made thereto and components can be replaced with equivalents without departing from the scope of this application. In particular, the technical features mentioned in the various embodiments can be combined in any manner, provided there is no structural conflict. This application is not limited to the specific embodiments disclosed herein, but includes all technical solutions falling within the scope of the claims.

Claims

1. A method for preparing a packaging carrier, characterized in that, include: A substrate is provided, and the substrate is patterned to form a first through hole. The first through hole extends through the substrate in the thickness direction. The first through hole has a first axis and has a first opening and a second opening disposed opposite to each other in the thickness direction. The diameter of the first opening is smaller than the diameter of the second opening. The substrate has a first side and a second side opposite to each other in the thickness direction. The first opening is located on the first side and the second opening is located on the second side. A protective layer is prepared on the surface of the substrate, the protective layer covering the surface of the substrate facing the first side, the second side, and the first through hole, the transmittance of the protective layer is less than the transmittance of the buffer structure, or the laser damage threshold of the protective layer is greater than the laser damage threshold of the buffer structure. A buffer structure is filled in the first through hole, and the buffer structure is patterned on the first side to form a second through hole. The second through hole penetrates the buffer structure in the thickness direction and has a second axis. The first axis and the second axis are collinear. A conductive structure is prepared, wherein the conductive structure is located within the second through hole.

2. The preparation method according to claim 1, characterized in that, The substrate has a first side and a second side opposite to each other in the thickness direction, and the step of fabricating the conductive structure includes: A seed conductive layer is prepared on the surface of the buffer structure, and the seed conductive layer is located at least on the surface of the buffer structure within the first through hole; A conductive material is prepared, which fills the second through-hole and covers the surfaces of the substrate on the first side and the second side; The substrate is ground on the first and second sides to form a conductive structure located within the second through hole.

3. A packaging carrier board, characterized in that, The packaging carrier includes: A substrate having a first through hole extending through the substrate in the thickness direction, the first through hole having a first axis, and having a first opening and a second opening opposite to each other in the thickness direction, the diameter of the first opening being smaller than the diameter of the second opening, the substrate having a first side and a second side opposite to each other in the thickness direction, the first opening being located on the first side and the second opening being located on the second side. A buffer structure is located inside the first through hole. The buffer structure has a second through hole, which penetrates the buffer structure in the thickness direction. The second through hole has a second axis, and the first axis and the second axis are collinear. A conductive structure is located within the second through-hole; The packaging carrier further includes a protective layer that covers the surface of the substrate facing the first side, the second side, and the first through hole. The transmittance of the protective layer is less than that of the buffer structure, or the laser damage threshold of the protective layer is greater than that of the buffer structure.

4. The packaging carrier board according to claim 3, characterized in that, Along the direction from the first opening to the second opening, the diameter of the first through hole gradually increases.

5. The packaging carrier board according to claim 4, characterized in that, Along the direction from the first opening to the second opening, the thickness of the buffer structure gradually increases in the circumferential direction of the second axis.

6. The packaging carrier board according to claim 5, characterized in that, The diameter of the second through hole is less than or equal to the diameter of the first opening, and / or the diameter of the first through hole is greater than or equal to the diameter of the first opening.

7. The packaging carrier board according to claim 3, characterized in that, On a cross-section of the buffer structure perpendicular to the thickness direction, the thickness of the buffer structure is equal in the circumferential direction along the second axis.

8. The packaging carrier board according to claim 3, characterized in that, On the plane where the first opening is located, the thickness of the buffer structure in the circumferential direction of the second axis is a first thickness, and on the plane where the second opening is located, the thickness of the buffer structure in the circumferential direction of the second axis is a second thickness. The first thickness and the second thickness are different.

9. The packaging carrier board according to claim 3, characterized in that, In the thickness direction, along the direction from the first opening to the second opening, the diameter of the second through hole remains unchanged.

10. A chip packaging structure, characterized in that, This includes a packaging substrate prepared by the method for preparing a packaging substrate according to any one of claims 1 or 2, or a packaging substrate according to any one of claims 3-9.

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