A transformer short-circuit impedance three-phase synchronous testing method and system
By using a second-order generalized integrator phase-locked loop and Morlet wavelet basis function dynamic adjustment, combined with a Res-FCN deep learning network, the problems of synchronous acquisition and noise interference in transformer short-circuit impedance testing were solved, achieving high-precision, real-time fault diagnosis.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- STATE GRID LIAONING ELECTRIC POWER CO LTD
- Filing Date
- 2026-02-04
- Publication Date
- 2026-05-29
AI Technical Summary
Existing transformer short-circuit impedance testing methods face difficulties in synchronous acquisition in environments without satellite signals, leading to misalignment of three-phase data and introducing phase errors. The FFT algorithm causes spectral leakage and picket fence effect under asynchronous sampling, and traditional noise reduction methods are too smooth, filtering out fault characteristics. The AC current zero-crossing signal is weak and easily submerged by noise, and the direct division calculation results diverge.
A second-order generalized integrator phase-locked loop is used to lock the frequency, the Morlet wavelet basis function is dynamically adjusted, and a Res-FCN deep learning network is used for signal decomposition and noise cancellation. The short-circuit impedance is calculated using the least squares method, and an OCXO timekeeping mechanism is introduced to ensure synchronous acquisition. The results are corrected by temperature and frequency.
It achieves strict alignment of three-phase data under complex electromagnetic environments, reduces spectral leakage error, improves fault feature identification accuracy, avoids numerical divergence and oversmoothing, and ensures real-time performance and measurement stability.
Smart Images
Figure CN122109928A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of power equipment condition monitoring technology, and more specifically, relates to a method and system for synchronous three-phase testing of transformer short-circuit impedance. Background Technology
[0002] As a core component of the power system, the mechanical stability of the winding structure of a power transformer directly affects the safe operation of the power grid. After being subjected to short-circuit current surges, transportation disturbances, or prolonged vibrations, the windings are highly susceptible to deformation faults such as localized twisting, bulging, or displacement. Short-circuit impedance (Zk) is the most sensitive characteristic parameter reflecting changes in the winding geometry. Therefore, achieving high-precision, online monitoring of short-circuit impedance is of paramount engineering value for early fault warning.
[0003] Currently, the main methods for testing transformer short-circuit impedance are the offline low-voltage pulse method and the online monitoring method. With the increasing demand for intelligent operation and maintenance, three-phase synchronous online monitoring technology based on voltage / current transformer (PT / CT) sampling has become the mainstream trend.
[0004] However, in actual substation applications, the aforementioned traditional technical solutions have revealed the following four significant technical bottlenecks, which severely restrict measurement accuracy and reliability: Existing three-phase synchronization testers heavily rely on a single GPS satellite signal for timing. However, test points in large substations are often located in basements, metal-shielded rooms, or areas with severe electromagnetic interference. Once the satellite signal is lost, the clock drift of a common crystal oscillator accumulates rapidly (typically on the order of milliseconds), causing the acquisition times of three-phase voltage and current data to be out of sync. This asynchronous acquisition directly introduces huge phase errors, rendering impedance analysis based on three-phase asymmetry ineffective.
[0005] Current technologies generally rely on the FFT algorithm to extract the fundamental amplitude and phase. Based on the signal stationarity assumption, FFT requires the sampling frequency to be strictly synchronized with the signal frequency. However, actual power grid frequencies often fluctuate slightly around 50Hz (e.g., 49.8Hz-50.2Hz). FFT processing at a fixed sampling rate leads to "asynchronous sampling," resulting in severe spectral leakage and the picket fence effect, leading to large errors in fundamental parameter extraction. Furthermore, as a global transform, FFT cannot effectively capture transient time-varying characteristics caused by minor winding deformations. The electromagnetic environment at substation sites is extremely complex, with broadband background noise and pulse interference often superimposed on the measured signals. Traditional denoising methods (such as low-pass filters or wavelet hard / soft thresholding) often produce "over-smoothing" while suppressing noise. Since fault characteristics caused by slight winding deformations often manifest as weak high-frequency transient distortions, traditional algorithms easily misjudge and filter them out as noise, leading to the dilemma that "the cleaner the denoising, the more severe the loss of fault information." This is the most easily overlooked flaw in existing technology. Traditional algorithms typically calculate impedance by directly dividing the voltage phasor by the current phasor Z=U / I. However, the AC current signal crosses zero twice in each cycle. Near the zero-crossing point, the effective signal energy is extremely low and easily submerged by background noise (signal-to-noise ratio approaches 0). At this point, the current value in the denominator approaches zero or is extremely noisy, and direct division can lead to numerical divergence or drastic random jumps in the calculation result. While existing windowed averaging methods can alleviate this problem, they reduce the dynamic response speed of the system, making it difficult to meet real-time requirements. Summary of the Invention
[0006] To address the shortcomings of existing technologies, this invention provides a method and system for synchronous three-phase testing of transformer short-circuit impedance.
[0007] The present invention adopts the following technical solution.
[0008] The first aspect of this invention proposes a three-phase synchronous test method for transformer short-circuit impedance, comprising, specifically: Different signals from the high-voltage side of the transformer are acquired synchronously; these different signals include three-phase voltage signals and three-phase current signals. The real-time frequency is locked and obtained by a second-order generalized integrator phase-locked loop; the center frequency and bandwidth parameters of the Morlet wavelet basis function are dynamically adjusted based on the real-time frequency; and the complex wavelet coefficient matrix corresponding to different signals is obtained by wavelet decomposition based on the adjusted Morlet wavelet basis function. The complex wavelet coefficient matrix of each signal is decomposed into the corresponding modulus matrix and phase matrix. The modulus matrix is normalized and then input into the pre-trained Res-FCN model. The Res-FCN model outputs the predicted noise component matrix. The noise component matrix is subtracted from the modulus matrix to obtain the cleaned modulus matrix. The phase matrix is then phase-jumped to obtain the corrected phase matrix. The cleaned modulus matrix and the corrected phase matrix are used to synthesize the cleaned complex wavelet coefficient matrix of the corresponding signal. The effective calculation interval is selected based on the ridge region of the maximum value of the purified modulus matrix of different signals. The optimal estimate of the short-circuit impedance is obtained by least squares method based on the elements of the purified complex wavelet coefficient matrix of different signals within the effective calculation interval. The calculated short-circuit impedance value is corrected for temperature and frequency.
[0009] Preferably, the three-phase voltage signal and three-phase current signal on the high-voltage side of the transformer are acquired synchronously, specifically as follows: If the satellite signal is detected to be locked, the satellite navigation system receiving module receives the external timing signal transmitted by the satellite navigation system, synchronizes the local clock through the external timing signal, and controls the A / D acquisition circuit to synchronously acquire the three-phase voltage signal and three-phase current signal on the high-voltage side of the transformer. If satellite signal loss is detected, a temperature-controlled crystal oscillator is used to generate a PPS second pulse signal to synchronize the local clock, and the A / D acquisition circuit is controlled to synchronously acquire the three-phase voltage signal and three-phase current signal on the high-voltage side of the transformer. If no satellite signal is detected, the local clock is used to control the A / D acquisition circuit to synchronously acquire the three-phase voltage and three-phase current signals on the high-voltage side of the transformer.
[0010] Preferably, the step of dynamically adjusting the center frequency and bandwidth parameters of the Morlet wavelet basis function based on real-time frequency specifically involves: The center frequency equals a preset scaling factor multiplied by the fundamental real-time frequency; the bandwidth parameter equals the preset number of complete fundamental cycles covered within the wavelet window divided by... Then multiply by the real-time fundamental frequency.
[0011] Preferably, the Res-FCN model is as follows: The Res-FCN model does not include max pooling or average pooling layers. The first layer of the Res-FCN model uses a 3*3 convolutional kernel to extract shallow texture features. The middle layers use multiple cascaded dilated residual blocks, and the dilation rate of each layer increases exponentially with a set exponential, combined with residual connections. The output layer of the Res-FCN model uses a 1*1 convolutional layer instead of a fully connected layer.
[0012] Preferably, the step of performing phase jump elimination on the phase matrix to obtain the corrected phase matrix specifically involves: The phase matrix is unwound. The phase matrix is traversed. If the absolute value of the phase difference between adjacent time points exceeds π, the current and subsequent phase values are increased or decreased by an integer multiple of 2π until the absolute value of the phase difference between all adjacent time points does not exceed π. Then, the unwound phase matrix is weighted and averaged based on a set sliding window to obtain a smoothed phase matrix. The weights used for weighting are set values. Map each phase value in the smoothed phase matrix back to the interval (-π, π) to obtain the corrected phase matrix.
[0013] Preferably, the ridge region of the purified modulus matrix based on different signals is selected within an effective computation time interval, specifically: Obtain the maximum voltage magnitude in the purified three-phase voltage magnitude matrix and the maximum current magnitude in the purified three-phase current magnitude matrix; select the time points corresponding to the elements in the purified three-phase voltage magnitude matrix that are greater than the maximum voltage magnitude by a set ratio to form the effective voltage range; The time points corresponding to the elements in the purified three-phase current magnitude matrix that are greater than the set proportion of the maximum current magnitude are selected to form the effective current range; Obtain the intersection of the effective voltage range and the effective current range as the final effective calculation range.
[0014] Preferably, the objective function of the least squares method is: For each time point in the effective calculation interval, the element corresponding to the time point in the complex wavelet coefficient matrix of the purified three-phase voltage is subtracted from the product of the element corresponding to the time point in the complex wavelet coefficient matrix of the purified three-phase current and the short-circuit impedance to obtain the subtraction result. The sum of the squares of the subtraction results of all time points in the effective calculation interval is used as the objective function.
[0015] Preferably, the step of correcting the calculated short-circuit impedance value using temperature and frequency specifically involves: The real part of the short-circuit impedance is resistance, and the imaginary part is reactance. The temperature correction factor is obtained by dividing the sum of the set conductor material-related temperature constant and the rated reference temperature by the sum of the set conductor material-related temperature constant and the average temperature of the winding at the time of data acquisition. The resistance is then multiplied by the temperature correction factor to obtain the temperature-corrected resistance. The frequency correction factor is obtained by dividing the rated frequency by the real-time frequency, and the reactance is multiplied by the frequency correction factor to obtain the reactance after frequency correction. The corrected short-circuit impedance magnitude is obtained by taking the square root of the sum of the squares of the temperature-corrected resistance and the frequency-corrected reactance.
[0016] The second aspect of this invention proposes a three-phase synchronous test system for transformer short-circuit impedance based on the method described in the first aspect of this invention, comprising a synchronization and communication module, a field test terminal, and a main control chip module, specifically: Synchronization and Communication Module: Controls the synchronous data acquisition of the device under test in the field; On-site test terminal: used to acquire different signals from the high-voltage side of the transformer; the different signals include three-phase voltage signals and three-phase current signals; The main control chip module is used to lock and acquire the real-time frequency through a second-order generalized integrator phase-locked loop; dynamically adjust the center frequency and bandwidth parameters of the Morlet wavelet basis function based on the real-time frequency; perform wavelet decomposition on different signals based on the adjusted Morlet wavelet basis function to obtain the complex wavelet coefficient matrix corresponding to each signal; decompose the complex wavelet coefficient matrix of each signal into the corresponding modulus matrix and phase matrix; input the normalized modulus matrix into the pre-trained Res-FCN model, and the Res-FCN model outputs the predicted noise component matrix. The purified modulus matrix is obtained by subtracting the noise component matrix from the modulus matrix. A phase transition elimination process is performed on the phase matrix to obtain a corrected phase matrix. The purified modulus matrix and the corrected phase matrix are then used to synthesize the purified complex wavelet coefficient matrix of the corresponding signal. An effective calculation interval is selected based on the maxima ridge region of the purified modulus matrix for different signals. The optimal estimate of the short-circuit impedance is obtained using the least squares method based on the elements of the purified complex wavelet coefficient matrix within the effective calculation interval for different signals. The calculated short-circuit impedance value is then corrected using temperature and frequency.
[0017] A third aspect of the present invention provides an apparatus comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, the processor performing the steps of the three-phase synchronous test method for transformer short-circuit impedance described in the first aspect of the present invention.
[0018] A fourth aspect of the present invention provides a computer-readable storage medium storing a computer program, which is executed by a processor using the steps of the three-phase synchronous test method for transformer short-circuit impedance described in the first aspect of the present invention.
[0019] The beneficial effects of the present invention are that, compared with the prior art, (1) by introducing the OCXO timekeeping mechanism, the problem of synchronous acquisition in environments without satellite signals, such as underground substations, is solved, ensuring strict alignment of three-phase data and effectively supporting fault diagnosis based on three-phase imbalance.
[0020] (2) The least squares method is used to replace the traditional direct division method for impedance calculation. The statistical optimal estimate over a period of time is used to effectively avoid the risk of numerical divergence caused by small signals near the zero point of AC current, making the measurement results more stable and reliable.
[0021] (3) Eliminating spectral leakage: A strict linkage model between wavelet bandwidth parameters and real-time power grid frequency was established. Regardless of the fluctuation of the power grid frequency, the system can maintain a constant periodic coverage, avoiding spectral leakage errors caused by asynchronous sampling.
[0022] (4) By utilizing the nonlinear feature extraction capability of the Res-FCN deep learning network and combining it with the dilated convolution structure, it can accurately identify and retain the millisecond-level transient change features caused by the small deformation of the winding in a strong noise background, avoiding the over-smoothing effect of traditional filters and significantly reducing the missed detection rate of early faults. Attached Figure Description
[0023] Figure 1 This is a block diagram of the overall hardware principle of the transformer short-circuit impedance testing system; Figure 2 The main flowchart of the three-phase synchronous test method for transformer short-circuit impedance; Figure 3 This is a diagram of the Res-FCN deep residual fully convolutional network model structure suitable for this method; Figure 4 This is a simulation comparison of the signal processing effects of the method of the present invention and traditional denoising methods; Figure 4 (a) is the waveform of the original voltage signal superimposed with typical Gaussian white noise in the field; Figure 4 (b) is the waveform after traditional hard threshold wavelet denoising; Figure 4 (c) Waveform after denoising using the wavelet transform and CNN fusion algorithm proposed in this invention. Detailed Implementation
[0024] To make the objectives, technical solutions, and advantages of this invention clearer, the technical solutions of this invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of this invention. The embodiments described in this application are merely some embodiments of this invention, and not all embodiments. Based on the spirit of this invention, all other embodiments obtained by those skilled in the art without creative effort are within the protection scope of this invention.
[0025] like Figure 2 As shown, Embodiment 1 of the present invention proposes a three-phase synchronous test method for transformer short-circuit impedance, comprising: Different signals from the high-voltage side of the transformer are acquired synchronously; these different signals include three-phase voltage signals and three-phase current signals. The real-time frequency is locked and obtained by a second-order generalized integrator phase-locked loop (SOGI-PLL); the center frequency and bandwidth parameters of the Morlet wavelet basis function are dynamically adjusted based on the real-time frequency; and the complex wavelet coefficient matrix corresponding to different signals is obtained by wavelet decomposition based on the adjusted Morlet wavelet basis function. The complex wavelet coefficient matrix of each signal is decomposed into the corresponding modulus matrix and phase matrix. The modulus matrix is normalized and then input into the pre-trained Res-FCN model. The Res-FCN model outputs the predicted noise component matrix. The noise component matrix is subtracted from the modulus matrix to obtain the cleaned modulus matrix. The phase matrix is then phase-jumped to obtain the corrected phase matrix. The cleaned modulus matrix and the corrected phase matrix are used to synthesize the cleaned complex wavelet coefficient matrix of the corresponding signal. The effective calculation interval is selected based on the ridge region of the maximum value of the purified modulus matrix of different signals. The optimal estimate of the short-circuit impedance is obtained by least squares method based on the elements of the purified complex wavelet coefficient matrix of different signals within the effective calculation interval. The calculated short-circuit impedance value is corrected for temperature and frequency.
[0026] In this preferred embodiment, the three-phase voltage signal and three-phase current signal on the high-voltage side of the transformer are acquired synchronously, specifically as follows: If the satellite signal is detected to be locked, the satellite navigation system receiving module receives the external timing signal transmitted by the satellite navigation system, synchronizes the local clock through the external timing signal, and controls the A / D acquisition circuit to synchronously acquire the three-phase voltage signal and three-phase current signal on the high-voltage side of the transformer. If satellite signal loss is detected, a temperature-controlled crystal oscillator is used to generate a PPS second pulse signal to synchronize the local clock, and the A / D acquisition circuit is controlled to synchronously acquire the three-phase voltage signal and three-phase current signal on the high-voltage side of the transformer. If no satellite signal is detected, the local clock is used to control the A / D acquisition circuit to synchronously acquire the three-phase voltage and three-phase current signals on the high-voltage side of the transformer.
[0027] It should be noted that this invention is controlled by a main control chip module, which adopts a heterogeneous computing architecture of "FPGA+NPU+ARM". The FPGA high-speed sampling control unit is responsible for timing control and low-level signal processing. It integrates the SOGI-PLL algorithm to lock the fundamental frequency of the power grid in real time under strong harmonic interference, providing an accurate frequency reference for subsequent wavelet transform. The NPU processing unit, as a deep learning hardware acceleration engine, is specifically used to perform parallel computing of CNN denoising algorithms, solving the problem of low efficiency in processing high-dimensional matrices by traditional CPUs. The ARM data communication control module is responsible for overall system scheduling, impedance calculation, and communication with the human-machine interface. The field test terminal includes the power system voltage / current signal access point, the transformer under test, and the high-precision AD acquisition circuit. Under the control of the synchronous trigger pulse issued by the FPGA, the high-precision AD circuit performs 6-channel parallel acquisition of the three-phase voltage and current on the high-voltage side of the transformer, converting the analog signal into a high-speed digital stream and transmitting it to the main control chip.
[0028] In this preferred embodiment, the step of dynamically adjusting the center frequency and bandwidth parameters of the Morlet wavelet basis function based on real-time frequency specifically involves: The center frequency equals a preset scaling factor multiplied by the fundamental real-time frequency; the bandwidth parameter equals the preset number of complete fundamental cycles covered within the wavelet window divided by... Then multiply by the real-time fundamental frequency.
[0029] The formula is:
[0030] in, The center frequency; For bandwidth parameters; This is a preset proportionality coefficient, with a value range of 0.8-1.2; The value is the complete fundamental period covered within the preset wavelet window, ranging from 3 to 6.
[0031] In this preferred embodiment, the Res-FCN model is specifically: like Figure 3 As shown, the Res-FCN model does not include max pooling or average pooling layers. The first layer of the Res-FCN model uses a 3*3 convolutional kernel to extract shallow texture features, and the intermediate layers use multiple cascaded voided residual blocks, with the void ratio of each layer increasing exponentially according to a set exponential, combined with residual connections. The output layer of the Res-FCN model uses a 1*1 convolutional layer instead of a fully connected layer. This design can capture the fundamental characteristics of the long-period power grid while fully preserving the details of transient changes caused by winding deformation, avoiding feature loss caused by traditional pooling operations.
[0032] In this preferred embodiment, the step of performing phase jump elimination on the phase matrix to obtain the corrected phase matrix specifically involves: The phase matrix is unwound. The phase matrix is traversed. If the absolute value of the phase difference between adjacent time points exceeds π, the current and subsequent phase values are increased or decreased by an integer multiple of 2π until the absolute value of the phase difference between all adjacent time points does not exceed π. Then, the unwound phase matrix is weighted and averaged based on a set sliding window to obtain a smoothed phase matrix. The weights used for weighting are set values. Map each phase value in the smoothed phase matrix back to the interval (-π, π) to obtain the corrected phase matrix.
[0033] In this preferred embodiment, the maximum ridge region of the purified modulus matrix based on different signals is selected within an effective calculation time interval, specifically: Obtain the maximum voltage magnitude in the purified three-phase voltage magnitude matrix and the maximum current magnitude in the purified three-phase current magnitude matrix; select the time points corresponding to the elements in the purified three-phase voltage magnitude matrix that are greater than the maximum voltage magnitude by a set ratio to form the effective voltage range; The time points corresponding to the elements in the purified three-phase current magnitude matrix that are greater than the set proportion of the maximum current magnitude are selected to form the effective current range; Obtain the intersection of the effective voltage range and the effective current range as the final effective calculation range.
[0034] In this preferred embodiment, the objective function of the least squares method is: For each time point in the effective calculation interval, the element corresponding to the time point in the magnitude matrix of the purified three-phase voltage is subtracted from the product of the element corresponding to the time point in the magnitude matrix of the purified three-phase current and the short-circuit impedance to obtain the subtraction result. The sum of the squares of the subtraction results of all time points in the effective calculation interval is used as the objective function.
[0035] The formula is:
[0036] in, For the effective calculation interval; The elements corresponding to the nth time point within the effective calculation interval of the complex wavelet coefficient matrix of the purified three-phase voltage; The elements corresponding to the nth time point within the effective calculation interval of the complex wavelet coefficient matrix of the purified three-phase current; It is the short-circuit impedance; The objective function is... Taking the partial derivative of the objective function and setting it to zero yields the optimal estimate of the short-circuit impedance. Specifically:
[0037] in, It is the conjugate of the complex wavelet coefficients of the current.
[0038] like Figure 4 The simulation results shown are compared between the method of this invention and traditional denoising methods. Figure 4 (a) is the original voltage signal superimposed with typical Gaussian white noise in the field, whose weak fault change characteristics are completely submerged by the noise. Figure 4 (b) This shows that while traditional hard-threshold wavelet denoising filters out background noise, it also results in an "overly smooth" waveform. This causes key transient features of winding deformation (circled out in the figure) to be incorrectly treated as noise and filtered out, leading to signal distortion. In contrast, Figure 4 (c) The wavelet transform and CNN fusion algorithm proposed in this invention not only effectively suppresses strong background noise, but also fully preserves the transient oscillation characteristics at the peak of the waveform by utilizing the nonlinear feature extraction capability of the Res-FCN network. This verifies that the method has excellent feature fidelity and extraction capability for early weak fault signals of transformers under strong interference environment, and effectively avoids the problem of missed detection in traditional methods.
[0039] The calculated short-circuit impedance value is corrected using temperature and frequency, specifically as follows: The real part of the short-circuit impedance is resistance, and the imaginary part is reactance. The temperature correction factor is obtained by dividing the sum of the set conductor material-related temperature constant and the rated reference temperature by the sum of the set conductor material-related temperature constant and the average temperature of the winding at the time of data acquisition. The resistance is then multiplied by the temperature correction factor to obtain the temperature-corrected resistance. The frequency correction factor is obtained by dividing the rated frequency by the real-time frequency, and the reactance is multiplied by the frequency correction factor to obtain the reactance after frequency correction. The corrected short-circuit impedance magnitude is obtained by taking the square root of the sum of the squares of the temperature-corrected resistance and the frequency-corrected reactance.
[0040] The formula is:
[0041] in, This is the average temperature of the winding at the time of data collection; For resistance; For reactance; This is the temperature-corrected resistance; The reactance is after frequency correction; The temperature constant related to the conductor material is set; This is the rated reference temperature; The rated frequency; for This is the corrected short-circuit impedance magnitude.
[0042] like Figure 1 As shown, Embodiment 2 of the present invention proposes a three-phase synchronous test system for transformer short-circuit impedance based on the method described in Embodiment 1, including a synchronization and communication module, a field test terminal, and a main control chip module: Synchronization and Communication Module: Controls the synchronous data acquisition of the device under test in the field; On-site test terminal: used to acquire different signals from the high-voltage side of the transformer; the different signals include three-phase voltage signals and three-phase current signals; The main control chip module is used to lock and acquire the real-time frequency through a second-order generalized integrator phase-locked loop; dynamically adjust the center frequency and bandwidth parameters of the Morlet wavelet basis function based on the real-time frequency; perform wavelet decomposition on different signals based on the adjusted Morlet wavelet basis function to obtain the complex wavelet coefficient matrix corresponding to each signal; decompose the complex wavelet coefficient matrix of each signal into the corresponding modulus matrix and phase matrix; input the normalized modulus matrix into the pre-trained Res-FCN model, and the Res-FCN model outputs the predicted noise component matrix. The purified modulus matrix is obtained by subtracting the noise component matrix from the modulus matrix. A phase transition elimination process is performed on the phase matrix to obtain a corrected phase matrix. The purified modulus matrix and the corrected phase matrix are then used to synthesize the purified complex wavelet coefficient matrix of the corresponding signal. An effective calculation interval is selected based on the maxima ridge region of the purified modulus matrix for different signals. The optimal estimate of the short-circuit impedance is obtained using the least squares method based on the elements of the purified complex wavelet coefficient matrix within the effective calculation interval for different signals. The calculated short-circuit impedance value is then corrected using temperature and frequency.
[0043] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and not to limit it. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that modifications or equivalent substitutions can still be made to the specific implementation of the present invention. Any modifications or equivalent substitutions that do not depart from the spirit and scope of the present invention should be covered within the protection scope of the claims of the present invention.
Claims
1. A method for synchronous three-phase testing of transformer short-circuit impedance, characterized in that, include: Different signals from the high-voltage side of the transformer are acquired synchronously; these different signals include three-phase voltage signals and three-phase current signals. The real-time frequency is locked and obtained by a second-order generalized integrator phase-locked loop; the center frequency and bandwidth parameters of the Morlet wavelet basis function are dynamically adjusted based on the real-time frequency; and the complex wavelet coefficient matrix corresponding to different signals is obtained by wavelet decomposition based on the adjusted Morlet wavelet basis function. The complex wavelet coefficient matrix of each signal is decomposed into the corresponding modulus matrix and phase matrix. The modulus matrix is normalized and then input into the pre-trained Res-FCN model. The Res-FCN model outputs the predicted noise component matrix. The noise component matrix is subtracted from the modulus matrix to obtain the cleaned modulus matrix. The phase matrix is then phase-jumped to obtain the corrected phase matrix. The cleaned modulus matrix and the corrected phase matrix are used to synthesize the cleaned complex wavelet coefficient matrix of the corresponding signal. The effective calculation interval is selected based on the ridge region of the maximum value of the purified modulus matrix of different signals. The optimal estimate of the short-circuit impedance is obtained by least squares method based on the elements of the purified complex wavelet coefficient matrix of different signals within the effective calculation interval. The calculated short-circuit impedance value is corrected for temperature and frequency.
2. The method for synchronous three-phase testing of transformer short-circuit impedance according to claim 1, characterized in that: The three-phase voltage and three-phase current signals on the high-voltage side of the transformer are synchronously acquired, specifically as follows: If the satellite signal is detected to be locked, the satellite navigation system receiving module receives the external timing signal transmitted by the satellite navigation system, synchronizes the local clock through the external timing signal, and controls the A / D acquisition circuit to synchronously acquire the three-phase voltage signal and three-phase current signal on the high-voltage side of the transformer. If satellite signal loss is detected, a temperature-controlled crystal oscillator is used to generate a PPS second pulse signal to synchronize the local clock, and the A / D acquisition circuit is controlled to synchronously acquire the three-phase voltage signal and three-phase current signal on the high-voltage side of the transformer. If no satellite signal is detected, the local clock is used to control the A / D acquisition circuit to synchronously acquire the three-phase voltage and three-phase current signals on the high-voltage side of the transformer.
3. The method for synchronous three-phase testing of transformer short-circuit impedance according to claim 1, characterized in that: The method of dynamically adjusting the center frequency and bandwidth parameters of the Morlet wavelet basis function based on real-time frequency is as follows: The center frequency equals a preset scaling factor multiplied by the fundamental real-time frequency; the bandwidth parameter equals the preset number of complete fundamental cycles covered within the wavelet window divided by... Then multiply by the real-time fundamental frequency.
4. The method for synchronous three-phase testing of transformer short-circuit impedance according to claim 1, characterized in that: The Res-FCN model is specifically as follows: The Res-FCN model does not include max pooling or average pooling layers. The first layer of the Res-FCN model uses a 3*3 convolutional kernel to extract shallow texture features. The middle layers use multiple cascaded dilated residual blocks, and the dilation rate of each layer increases exponentially with a set exponential, combined with residual connections. The output layer of the Res-FCN model uses a 1*1 convolutional layer instead of a fully connected layer.
5. The method for synchronous three-phase testing of transformer short-circuit impedance according to claim 1, characterized in that: The process of eliminating phase jumps in the phase matrix to obtain the corrected phase matrix is as follows: The phase matrix is unwound. The phase matrix is traversed. If the absolute value of the phase difference between adjacent time points exceeds π, the current and subsequent phase values are increased or decreased by an integer multiple of 2π until the absolute value of the phase difference between all adjacent time points does not exceed π. Then, the unwound phase matrix is weighted and averaged based on a set sliding window to obtain a smoothed phase matrix. The weights used for weighting are set values. Map each phase value in the smoothed phase matrix back to the interval (-π, π) to obtain the corrected phase matrix.
6. The method for synchronous three-phase testing of transformer short-circuit impedance according to claim 5, characterized in that: The effective computation time interval is selected for the maxima ridge region of the purified modulus matrix based on different signals, specifically: Obtain the maximum voltage magnitude in the purified three-phase voltage magnitude matrix and the maximum current magnitude in the purified three-phase current magnitude matrix; select the time points corresponding to the elements in the purified three-phase voltage magnitude matrix that are greater than the maximum voltage magnitude by a set ratio to form the effective voltage range; The time points corresponding to the elements in the purified three-phase current magnitude matrix that are greater than the set proportion of the maximum current magnitude are selected to form the effective current range; Obtain the intersection of the effective voltage range and the effective current range as the final effective calculation range.
7. The method for synchronous three-phase testing of transformer short-circuit impedance according to claim 6, characterized in that: The objective function of the least squares method is: For each time point in the effective calculation interval, the element corresponding to the time point in the complex wavelet coefficient matrix of the purified three-phase voltage is subtracted from the product of the element corresponding to the time point in the complex wavelet coefficient matrix of the purified three-phase current and the short-circuit impedance to obtain the subtraction result. The sum of the squares of the subtraction results of all time points in the effective calculation interval is used as the objective function.
8. The method for synchronous three-phase testing of transformer short-circuit impedance according to claim 1, characterized in that: The calculated short-circuit impedance value is corrected using temperature and frequency, specifically as follows: The real part of the short-circuit impedance is resistance, and the imaginary part is reactance. The temperature correction factor is obtained by dividing the sum of the set conductor material-related temperature constant and the rated reference temperature by the sum of the set conductor material-related temperature constant and the average temperature of the winding at the time of data acquisition. The resistance is then multiplied by the temperature correction factor to obtain the temperature-corrected resistance. The frequency correction factor is obtained by dividing the rated frequency by the real-time frequency, and the reactance is multiplied by the frequency correction factor to obtain the reactance after frequency correction. The corrected short-circuit impedance magnitude is obtained by taking the square root of the sum of the squares of the temperature-corrected resistance and the frequency-corrected reactance.
9. A transformer short-circuit impedance three-phase synchronous testing system based on the method of any one of claims 1-8, comprising a synchronization and communication module, a field test terminal, and a main control chip module, characterized in that: Synchronization and Communication Module: Controls the synchronous data acquisition of the device under test in the field; On-site test terminal: used to acquire different signals from the high-voltage side of the transformer; the different signals include three-phase voltage signals and three-phase current signals; The main control chip module is used to lock and acquire the real-time frequency through a second-order generalized integrator phase-locked loop; dynamically adjust the center frequency and bandwidth parameters of the Morlet wavelet basis function based on the real-time frequency; perform wavelet decomposition on different signals based on the adjusted Morlet wavelet basis function to obtain the complex wavelet coefficient matrix corresponding to each signal; decompose the complex wavelet coefficient matrix of each signal into the corresponding modulus matrix and phase matrix; input the normalized modulus matrix into the pre-trained Res-FCN model, and the Res-FCN model outputs the predicted noise component matrix. The purified modulus matrix is obtained by subtracting the noise component matrix from the modulus matrix. A phase transition elimination process is performed on the phase matrix to obtain a corrected phase matrix. The purified modulus matrix and the corrected phase matrix are then used to synthesize the purified complex wavelet coefficient matrix of the corresponding signal. An effective calculation interval is selected based on the maxima ridge region of the purified modulus matrix for different signals. The optimal estimate of the short-circuit impedance is obtained using the least squares method based on the elements of the purified complex wavelet coefficient matrix within the effective calculation interval for different signals. The calculated short-circuit impedance value is then corrected using temperature and frequency.
10. An apparatus comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, the processor performing the steps of the three-phase synchronous test method for transformer short-circuit impedance according to any one of claims 1 to 8.
11. A computer-readable storage medium storing a computer program, the computer program being executed by a processor of the steps of the three-phase synchronous test method for transformer short-circuit impedance according to any one of claims 1 to 8.