Image detection method and device, storage medium and computer device

Abstract

The image detection method and device, the storage medium and the computer device provided in the application avoid repeated copying of image data by using a memory block allocation mechanism of a shared memory pool, significantly reduce memory occupation and data transmission delay, and have obvious advantages when high-resolution and large-size images are processed. Dynamic determination of a target scheduling strategy combines resource requirements (such as CPU / GPU algorithms) of a detection algorithm and real-time states (such as CPU / GPU utilization) of a system, and can intelligently allocate execution resources. For example, for a deep learning detection algorithm with intensive computing power, a GPU idle execution unit is preferentially scheduled, and a CPU core is allocated to a lightweight traditional algorithm, so that maximum utilization of system resources is ensured. The design that an execution unit sequentially obtains tasks from a task queue and directly accesses a shared memory block further guarantees concurrency and real-time performance of a detection process, and effectively improves overall detection efficiency in a multi-task scenario.

Description

Technical Field

[0001] This application relates to the fields of computer vision and image processing technology, and in particular to an image detection method, apparatus, storage medium and computer equipment. Background Technology

[0002] In the fields of computer vision and image processing, image detection technology, as a core component, is widely used in various scenarios such as security monitoring, autonomous driving, and industrial quality inspection. However, existing image detection methods still have significant shortcomings in terms of multi-algorithm collaborative processing and resource scheduling.

[0003] On the one hand, traditional methods often use an independent allocation model for memory allocation of images to be processed. When faced with parallel detection by multiple algorithms, this easily leads to problems such as repeated creation of memory blocks and frequent data copying, which not only increases the system's memory overhead but also reduces detection efficiency due to multiple data transfers. On the other hand, the lack of a unified scheduling and coordination mechanism among the detection algorithms results in an unpredictable execution order and disordered resource preemption, which can easily lead to some algorithms monopolizing system resources and causing delays in the execution of critical tasks. In addition, when multiple execution units process concurrently, the repeated reading of image data by each unit further exacerbates the consumption of memory bandwidth, restricting the improvement of overall detection throughput.

[0004] These problems make it difficult for existing image detection schemes to meet the demands for real-time performance and efficiency in complex scenarios. Therefore, there is an urgent need for a technical solution that can optimize memory management and dynamically adjust scheduling strategies to overcome these bottlenecks. Summary of the Invention

[0005] The purpose of this application is to at least address one of the aforementioned technical deficiencies, particularly the technical deficiency that existing image detection schemes are unable to meet the demands for real-time performance and efficiency in complex scenarios.

[0006] This application provides an image detection method, the method comprising:

[0007] Obtain the image to be processed, allocate a memory block for the image to be processed from a preset shared memory pool, and write the image to be processed into the memory block;

[0008] Determine at least one target detection algorithm corresponding to the image to be processed, and determine a target scheduling strategy based on the attribute information of the at least one target detection algorithm and / or the system state;

[0009] According to the target scheduling strategy, a corresponding detection task is created for the at least one target detection algorithm, and the detection task is added to the task queue;

[0010] The execution unit retrieves the detection task from the task queue, accesses the image to be processed in the memory block, executes the detection task, and obtains the detection result.

[0011] Optionally, determining at least one target detection algorithm corresponding to the image to be processed includes:

[0012] Determine the target acquisition source corresponding to the image to be processed, and obtain the pre-configured association table between the image acquisition source and the detection algorithm;

[0013] The target acquisition source is matched with the image acquisition source in the association configuration table, and at least one target detection algorithm associated with the target acquisition source is determined based on the matching result.

[0014] The at least one target detection algorithm is used as at least one target detection algorithm corresponding to the image to be processed.

[0015] Optionally, determining the target scheduling strategy based on the attribute information of the at least one target detection algorithm and / or the system state includes:

[0016] Determine whether the at least one target detection algorithm has attribute information, or whether the attribute information meets the preset strategy determination conditions;

[0017] If attribute information exists and / or the policy determination conditions are met, then the target scheduling policy is determined based on the attribute information of the at least one target detection algorithm.

[0018] If no attribute information exists, the target scheduling strategy is determined based on the system status.

[0019] If the policy determination conditions are not met, then the target scheduling policy is determined based on the attribute information of the at least one target detection algorithm and the system state.

[0020] Optionally, when there are multiple target detection algorithms, the attribute information includes algorithm dependencies and / or algorithm priorities, and the policy determination condition is that the priorities of each target detection algorithm are different, the step of determining a target scheduling policy based on the attribute information of at least one target detection algorithm if attribute information exists and / or the policy determination condition is met includes:

[0021] If there is an algorithm dependency among the various target detection algorithms, then the target scheduling strategy is determined based on the algorithm dependency among the various target detection algorithms;

[0022] If there are algorithm dependencies and algorithm priorities among the various target detection algorithms, and the algorithm priorities of the various target detection algorithms are different, then the target scheduling strategy is determined according to the algorithm dependencies and algorithm priorities of the various target detection algorithms.

[0023] If there are algorithm priorities among the various target detection algorithms, and the algorithm priorities of the various target detection algorithms are different, then the target scheduling strategy is determined according to the algorithm priorities of the various target detection algorithms.

[0024] Optionally, the step of creating corresponding detection tasks for the at least one target detection algorithm according to the target scheduling strategy and adding the detection tasks to the task queue includes:

[0025] Based on the algorithmic dependencies between the various target detection algorithms, a separate detection task is created for each of the target detection algorithms, and each detection task is added to the corresponding task queue.

[0026] Alternatively, based on the algorithm dependencies and priorities among the various target detection algorithms, a separate detection task can be created for each target detection algorithm, and each detection task can be added to a corresponding task queue.

[0027] Alternatively, each of the target detection algorithms may be assigned a separate detection task based on its algorithm priority, and each detection task may be added to its corresponding task queue.

[0028] Optionally, when there are multiple target detection algorithms, the attribute information includes algorithm priority, and the policy determination condition is that the priorities of each target detection algorithm are different, if the policy determination condition is not met, then determining the target scheduling policy based on the attribute information of at least one target detection algorithm and the system state includes:

[0029] If there are algorithm priorities among the various target detection algorithms, but the algorithm priorities of the various target detection algorithms are the same, then the target scheduling strategy is determined according to the algorithm priorities of the various target detection algorithms and the system state.

[0030] Optionally, the step of creating corresponding detection tasks for the at least one target detection algorithm according to the target scheduling strategy and adding the detection tasks to the task queue includes:

[0031] Based on the algorithm priority and system status of each target detection algorithm, a detection task is created for each target detection algorithm, and each detection task is added to the corresponding task queue.

[0032] Optionally, the system status includes the resource occupancy of multiple computing devices and the load of each execution thread within each computing device. Determining the target scheduling strategy based on the system status includes:

[0033] If the resource occupancy of each of the computing devices meets the preset resource distribution conditions, then the target scheduling strategy is determined based on the resource requirements of the at least one target detection algorithm and the resource occupancy of each of the computing devices.

[0034] If the resource occupancy of each execution unit does not meet the resource distribution conditions, a target scheduling strategy is determined based on the resource requirements of the at least one target detection algorithm and the load of each execution thread in each computing device.

[0035] Optionally, the step of creating corresponding detection tasks for the at least one target detection algorithm according to the target scheduling strategy and adding the detection tasks to the task queue includes:

[0036] Based on the resource requirements of the at least one target detection algorithm and the resource usage of each computing device, a detection task is created for each target detection algorithm, and each detection task is added to the corresponding task queue.

[0037] Based on the resource requirements of the at least one target detection algorithm and the load of each execution thread in each computing device, a detection task is created for each target detection algorithm, and each detection task is added to the corresponding task queue.

[0038] Optionally, when there are multiple target detection algorithms and multiple execution units, with each target detection algorithm corresponding to a task queue, the step of obtaining the detection task from the task queue through the execution unit, accessing the image to be processed in the memory block, and then executing the detection task to obtain the detection result includes:

[0039] Multiple execution units concurrently retrieve corresponding detection tasks from their respective task queues, and after reading the image to be processed from the memory block with zero copy, execute the corresponding detection task to obtain multiple detection results.

[0040] Optionally, the method further includes:

[0041] After aggregating the individual test results, the aggregated result is obtained;

[0042] The aggregation results are output and displayed according to a preset output method.

[0043] Optionally, the method further includes:

[0044] During the execution of the corresponding detection tasks, the execution status of each detection task is monitored;

[0045] If any detection task times out, the timed-out detection task will be removed.

[0046] If any detection task fails, the failure information will be written to the log.

[0047] Optionally, the method further includes:

[0048] An initial reference count is set for the memory block, and the value of the initial reference count is the same as the number of target detection algorithms corresponding to the image to be processed.

[0049] Once the detection task corresponding to any target detection algorithm has been completed, the reference count of the memory block is decremented by one.

[0050] The memory is automatically released when the reference count of the memory block reaches zero.

[0051] This application also provides an image detection apparatus, comprising:

[0052] The memory allocation module is used to acquire the image to be processed, allocate a memory block for the image to be processed from a preset shared memory pool, and write the image to be processed into the memory block;

[0053] The scheduling strategy determination module is used to determine at least one target detection algorithm corresponding to the image to be processed, and to determine the target scheduling strategy based on the attribute information of the at least one target detection algorithm and / or the system state.

[0054] The task creation module is used to create corresponding detection tasks for the at least one target detection algorithm according to the target scheduling strategy, and add the detection tasks to the task queue;

[0055] The image detection module is used to obtain the detection task from the task queue through the execution unit, and after accessing the image to be processed in the memory block, execute the detection task to obtain the detection result.

[0056] This application also provides a computer-readable storage medium storing computer-readable instructions that, when executed by one or more processors, cause the one or more processors to perform the steps of the image detection method as described in any of the above embodiments.

[0057] This application also provides a computer device, including: one or more processors, and memory;

[0058] The memory stores computer-readable instructions, which, when executed by the one or more processors, perform the steps of the image detection method as described in any of the above embodiments.

[0059] As can be seen from the above technical solutions, the embodiments of this application have the following advantages:

[0060] The image detection method, apparatus, storage medium, and computer device provided in this application, after acquiring the image to be processed, can allocate a memory block for the image from a preset shared memory pool and write the image to be processed into the memory block; then, determine at least one target detection algorithm corresponding to the image to be processed, and determine a target scheduling strategy based on the attribute information of the at least one target detection algorithm and / or the system state; create corresponding detection tasks for the at least one target detection algorithm according to the target scheduling strategy, and add the detection tasks to the task queue; the execution unit retrieves the detection tasks from the task queue, accesses the image to be processed in the memory block, executes the detection tasks, and thus obtains the detection results. Through the above steps, this application achieves efficient storage of the image to be processed in a shared memory pool and flexible scheduling of multiple detection tasks. The memory block allocation mechanism of the shared memory pool avoids repeated copying of image data, significantly reducing memory usage and data transmission latency, especially when processing high-resolution, large-size images; the dynamic determination of the target scheduling strategy combines the resource requirements of the detection algorithm (such as CPU / GPU algorithms) and the real-time system state (such as CPU / GPU utilization and task queue length), and can intelligently allocate execution resources. For example, computationally intensive deep learning detection algorithms are prioritized for scheduling to idle GPU execution units, while lightweight traditional algorithms are allocated to CPU cores, ensuring maximum utilization of system resources. The design of execution units sequentially retrieving tasks from the task queue and directly accessing shared memory blocks further guarantees the concurrency and real-time performance of the detection process, effectively improving the overall detection efficiency in multi-task scenarios. Attached Figure Description

[0061] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0062] Figure 1 A schematic flowchart of an image detection method provided in an embodiment of this application;

[0063] Figure 2 A schematic diagram illustrating the process of determining at least one target detection algorithm corresponding to an image to be processed, as provided in an embodiment of this application;

[0064] Figure 3 This is a schematic diagram illustrating the process of determining a target scheduling strategy provided in an embodiment of this application;

[0065] Figure 4 This is a schematic diagram illustrating the automatic memory block reclamation process provided in an embodiment of this application.

[0066] Figure 5 This is a schematic diagram of the structure of an image detection device provided in an embodiment of this application;

[0067] Figure 6 This is a schematic diagram of the internal structure of a computer device provided in an embodiment of this application. Detailed Implementation

[0068] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0069] In one embodiment, such as Figure 1 As shown, Figure 1 This is a flowchart illustrating an image detection method provided in an embodiment of this application; this application provides an image detection method, which may include:

[0070] S110: Obtain the image to be processed, allocate a memory block for the image to be processed from the preset shared memory pool, and write the image to be processed into the memory block.

[0071] In this step, during image detection, the image to be processed can be acquired first. This image can originate from various image acquisition devices, including real-time video from a camera, image files, RTSP streams, image upload interfaces, etc. Each frame contains information such as a timestamp, source ID, and frame number.

[0072] Upon acquiring the image to be processed, this application can allocate a memory block for the image from a pre-defined shared memory pool and write the image into the memory block. The shared memory pool is a pre-initialized, configurable, contiguous physical memory region. A memory pool management mechanism is used to uniformly allocate and reclaim memory blocks, avoiding memory fragmentation issues caused by frequent dynamic memory allocation and deallocation. When allocating a memory block for the image to be processed, the system can calculate the required memory size based on parameters such as the image's resolution and number of color channels, match a suitable free memory block from the shared memory pool, and allocate it to the image through pointer mapping.

[0073] Furthermore, the memory blocks in this application are allocated using contiguous addresses and employ mmap or System V shared memory technology. The memory pool is internally partitioned based on fixed-size or variable-size memory blocks, forming a memory block management table. Each memory block is described using metadata, which includes information such as start address, end address, data length, occupancy flag, and reference count. This application also supports zero-copy, ensuring that no memory copying occurs when image data is accessed by the algorithm. After allocation, this application can directly write the pixel data of the image to be processed into the memory block as a binary stream, without intermediate buffering, thus achieving efficient image data storage.

[0074] Furthermore, this application allows for preprocessing of the image before it is written to the memory block, including JPEG decoding, format conversion, scaling, normalization, and noise reduction. This allows all subsequent detection algorithms to share the preprocessing results, thus avoiding redundant execution.

[0075] S120: Determine at least one target detection algorithm corresponding to the image to be processed, and determine a target scheduling strategy based on the attribute information of the at least one target detection algorithm and / or the system state.

[0076] In this step, after allocating a memory block for the image to be processed from the preset shared memory pool in S110 and writing the image to be processed into the memory block, this application can determine at least one target detection algorithm corresponding to the image to be processed, and determine the target scheduling strategy based on the attribute information of at least one target detection algorithm and / or the system state. In this way, the target detection algorithms can be scheduled in an orderly manner according to the target scheduling strategy.

[0077] Understandably, due to the lack of a unified scheduling and coordination mechanism among the various detection algorithms in existing technologies, the execution order of algorithms is not fixed and resource preemption is disordered. This can easily lead to some algorithms crowding out system resources, causing delays in the execution of critical tasks. In addition, the timestamps of detection results from different algorithms cannot be guaranteed to be consistent, making it difficult to perform multi-algorithm result fusion and correlation analysis. Once an algorithm malfunctions, such as timeout or crash, there is a lack of fault tolerance and isolation mechanisms, which may affect the overall system stability.

[0078] Based on this, this application effectively solves the above problems by associating target detection algorithms with the images to be processed and dynamically determining the scheduling strategy. Specifically, the matching of target detection algorithms can be achieved based on the source type of the image, the application scenario, or preset configuration rules: for example, if the image to be processed comes from a traffic camera, the system can automatically associate three types of algorithms: vehicle detection, pedestrian detection, and license plate recognition; if it comes from an industrial quality inspection scenario, it can associate two types of algorithms: defect detection and size measurement. The attribute information of the target detection algorithm includes algorithm type (such as traditional machine learning algorithm, deep learning algorithm), computing power requirements (such as CPU single-core / multi-core, GPU memory usage), real-time requirements (such as millisecond-level response, second-level response), dependencies (such as the output of algorithm A needs to be used as the input of algorithm B), and priority weights, etc.; the system status includes real-time monitoring data such as current CPU utilization, GPU memory remaining, load of each computing node, network bandwidth utilization, and task queue length.

[0079] Furthermore, this application provides a unified algorithm management system, with various detection algorithms integrated into the system as plug-ins. Each algorithm provides parameters during the registration phase, including algorithm name, version number, input data specifications, output format, resource requirements, predicted execution time, priority, and dependencies. Algorithms can be dynamically loaded and unloaded, allowing for the addition or updating of algorithms without requiring a system restart.

[0080] Furthermore, when determining the target scheduling strategy, the system can make multi-dimensional decisions by combining attribute information and system status: if the computing power requirement of a certain deep learning algorithm (such as YOLOv8) is detected to be ≥4GB of GPU memory, and the current system's GPU node has 6GB of remaining memory and a load rate of 30%, then the detection task of this algorithm will be prioritized and scheduled to that GPU node; if a certain traditional algorithm (such as Haar feature detection) has a low computing power requirement but a high real-time requirement (response time ≤50ms), then it will be scheduled to an idle CPU core to reduce latency. If there is a dependency between algorithms, such as "execute the image enhancement algorithm first, then execute the target recognition algorithm", then the system will generate a serial scheduling strategy, and start the subsequent task after the preceding algorithm task is completed; if there is no dependency between algorithms and the system resources are sufficient, then a parallel scheduling strategy will be generated, and multiple execution units will process different algorithm tasks simultaneously. In addition, when system resources are scarce, resources can be tilted according to the algorithm priority weight: for example, 80% of the GPU resources can be allocated to the "key area intrusion detection algorithm" with a priority of 10, and only 20% of the resources can be reserved for the "background object classification algorithm" with a priority of 5.

[0081] S130: Create corresponding detection tasks for at least one target detection algorithm according to the target scheduling strategy, and add the detection tasks to the task queue.

[0082] In this step, after determining at least one target detection algorithm corresponding to the image to be processed through S120, and determining the target scheduling strategy based on the attribute information of at least one target detection algorithm and / or the system state, this application can create corresponding detection tasks for at least one target detection algorithm according to the target scheduling strategy, and add the detection tasks to the task queue.

[0083] In this application, a corresponding number of detection tasks can be created based on the number of target detection algorithms. Each detection task includes metadata such as task ID, associated target detection algorithm identifier, memory block pointer of the image to be processed, task priority, expected execution time, and dependent task ID (if it exists).

[0084] Specifically, this application can generate task creation instructions based on the target scheduling strategy: for serially scheduled algorithm tasks, the completion status of preceding dependent tasks can be explicitly marked in the task metadata; subsequent tasks will only be activated after the preceding task has been completed and returned a success signal. For parallel-scheduled algorithm tasks, an independent task is directly generated for each algorithm, with no dependency constraints between tasks. The task queue can adopt a hybrid structure combining a priority queue and a FIFO queue: high-priority tasks (such as intrusion detection tasks in real-time security scenarios) enter the priority queue and are sorted according to their priority weights; ordinary tasks enter the FIFO queue and wait for execution in the order of their creation time.

[0085] Furthermore, this application can maintain independent task sub-queues for different types of computing devices (such as CPU clusters and GPU nodes). For example, the CPU task queue only accepts detection tasks that require CPU computing power, while the GPU task queue only accepts tasks that require GPU acceleration, avoiding resource waste caused by cross-device scheduling. When a detection task is added to the queue, this application can also synchronously update the task status table, recording information such as the task's creation time, the queue it belongs to, and its current status (pending execution / in execution / completed / abnormal), facilitating subsequent monitoring and management.

[0086] S140: The execution unit retrieves the detection task from the task queue, accesses the image to be processed in the memory block, executes the detection task, and obtains the detection result.

[0087] In this step, after creating a detection task through S130 and adding the detection task to the task queue, this application can obtain the detection task from the character queue through the execution unit, access the image to be processed in the memory block, and then execute the detection task to obtain the corresponding detection results.

[0088] In this application, the execution unit can be an independent computing node in the system, including CPU cores, GPU cores, and dedicated acceleration chips (such as FPGAs and NPUs). Each execution unit corresponds to one or more task sub-queues. The execution unit can use a "pull" mechanism to retrieve tasks from the task queue. For example, when the execution unit is idle, it will actively scan its corresponding task sub-queue and extract the first executable task according to the queue's priority or FIFO rule. For example, the GPU execution unit can prioritize retrieving high-priority deep learning detection tasks from the priority sub-queue of the GPU task queue. If the priority sub-queue is empty, tasks will be extracted sequentially from the FIFO sub-queue.

[0089] After acquiring a detection task, the execution unit can directly access the image data to be processed in the shared memory pool through the memory block pointer in the task metadata, without needing to copy the data. For example, the memory block pointer of a YOLOv8 detection task points to the region at address 0x10000000 in the shared memory pool. The execution unit can directly read the RGB pixel data of the image through this pointer, avoiding the time-consuming operation of "copying from memory to GPU memory" in the traditional method, and greatly improving data access efficiency.

[0090] During the execution of the detection task, the execution unit can process the image data according to the logic of the target detection algorithm: if the algorithm is Haar feature detection, the execution unit will traverse the sliding window of the image, calculate the Haar feature value of each window and match it with the trained classifier to output the bounding box of the face or target object; if the algorithm is YOLOv8, the execution unit will input the image data into the pre-trained neural network model, extract features through operations such as convolution, pooling, and upsampling, and finally output the target category, confidence score, and bounding box coordinates. During execution, the system can monitor the task's resource consumption (such as CPU / GPU utilization, memory read / write speed) and execution progress (such as the percentage of processed image pixels, number of remaining steps) in real time. If a task execution timeout is detected (such as exceeding the preset 100ms threshold) or abnormal resource consumption is detected (such as GPU memory usage suddenly rising to over 95%), a task interruption and retry mechanism can be triggered to prevent a single task failure from affecting the entire system.

[0091] After the detection task is completed, the execution unit can generate structured data containing the detection results. This data typically includes the task ID, the source ID and timestamp of the image to be processed, the target detection algorithm identifier, a list of detected targets (each target includes information such as category, confidence score, bounding box coordinates, and pixel area), task execution time, and resource consumption statistics. The execution unit can write the detection results to a preset result cache and update the task status table to "completed".

[0092] Furthermore, this application can also support collaborative work among multiple execution units: when multiple GPU execution units exist in the system, high-priority deep learning detection tasks can be split and executed in parallel on different GPU nodes. Each node processes different regions of the image or different batches of targets. Finally, the result merging module summarizes the detection results of each node, achieving efficient detection under distributed computing. For example, for a 4K resolution image to be processed, the system can divide it into four 1080P sub-image regions, assign them to four GPU execution units to run the YOLOv8 algorithm respectively. After each unit outputs the target detection results of the sub-region, the result merging module maps the bounding box coordinates back to the original image based on the position information of the sub-region, forming a complete detection result.

[0093] In the above embodiments, after acquiring the image to be processed, a memory block can be allocated for the image from a preset shared memory pool, and the image to be processed can be written into the memory block. Next, at least one target detection algorithm corresponding to the image to be processed is determined, and a target scheduling strategy is determined based on the attribute information of the at least one target detection algorithm and / or the system state. A corresponding detection task is created for the at least one target detection algorithm according to the target scheduling strategy, and the detection task is added to the task queue. The execution unit retrieves the detection task from the task queue, accesses the image to be processed in the memory block, executes the detection task, and then obtains the detection result. Through the above steps, this application achieves efficient storage of the image to be processed in a shared memory pool and flexible scheduling of multiple detection tasks. The memory block allocation mechanism of the shared memory pool avoids repeated copying of image data, significantly reducing memory usage and data transmission latency, especially when processing high-resolution, large-size images. The dynamic determination of the target scheduling strategy combines the resource requirements of the detection algorithm (such as CPU / GPU algorithms) with the real-time system state (such as CPU / GPU utilization and task queue length), and can intelligently allocate execution resources. For example, computationally intensive deep learning detection algorithms are prioritized for scheduling to idle GPU execution units, while lightweight traditional algorithms are allocated to CPU cores, ensuring maximum utilization of system resources. The design of execution units sequentially retrieving tasks from the task queue and directly accessing shared memory blocks further guarantees the concurrency and real-time performance of the detection process, effectively improving the overall detection efficiency in multi-task scenarios.

[0094] In one embodiment, such as Figure 2 As shown, Figure 2 This is a schematic diagram illustrating the process of determining at least one target detection algorithm corresponding to the image to be processed, as provided in the embodiments of this application; S120, determining at least one target detection algorithm corresponding to the image to be processed, may include:

[0095] S121: Determine the target acquisition source corresponding to the image to be processed, and obtain the pre-configured association table between the image acquisition source and the detection algorithm.

[0096] S122: Match the target acquisition source with the image acquisition source in the associated configuration table, and determine at least one target detection algorithm associated with the target acquisition source based on the matching result.

[0097] S123: Use at least one object detection algorithm as the object detection algorithm corresponding to the image to be processed.

[0098] In this embodiment, when determining at least one target detection algorithm corresponding to the image to be processed, the target acquisition source corresponding to the image to be processed can be determined first, and a pre-configured association configuration table of image acquisition sources and detection algorithms can be obtained. The target acquisition source in this application refers to the source identifier of the image to be processed, such as a high-definition camera at a traffic intersection (number CAM-001), a quality inspection camera on an industrial production line (number LINE-02), or a security monitoring device in a shopping mall (number SEC-05). The system can determine the corresponding target acquisition source by parsing the metadata of the image to be processed (such as the device model in the EXIF ​​information and the source IP address in the network transmission protocol) or by receiving the device identifier reported by the image acquisition terminal. The association configuration table is a mapping relationship table pre-built by technical personnel according to business needs. Each record in the table contains fields such as image acquisition source ID, acquisition scene description, a list of associated detection algorithms, and algorithm activation status. For example, for a configuration record with the data acquisition source "CAM-001 (Urban Main Road Traffic Camera)," the associated detection algorithm list may include "Vehicle Detection Algorithm (VDA-01)," "Pedestrian Detection Algorithm (PDA-03)," and "Traffic Light Recognition Algorithm (TSRA-05)," and all algorithms are enabled. For a record with the data acquisition source "LINE-02 (Electronic Component Surface Inspection Camera)," the associated algorithm list is "Surface Scratch Detection Algorithm (SDA-02)" and "Pin Offset Measurement Algorithm (POMA-04)," and the enabled status is also "Enabled."

[0099] Next, this application can precisely match the determined target acquisition source ID with the acquisition source ID in the associated configuration table. If the match is successful, the associated detection algorithm list corresponding to the acquisition source is directly extracted; if the target acquisition source is a newly added device and is not recorded in the configuration table, the system can trigger the "default algorithm matching mechanism", that is, select the algorithm based on the similarity of the acquisition scene. For example, if the newly added "CAM-002 (urban secondary road traffic camera)" is similar to the already configured "CAM-001" scene, the system will automatically associate the same three types of detection algorithms as CAM-001 and mark it as "pending confirmation" to remind technicians to supplement the formal configuration later. In addition, if the enabled status of some algorithms corresponding to a certain acquisition source in the associated configuration table is "off", then those algorithms will not be included in the target detection algorithm list. For example, if the enabled status of "crowd density analysis algorithm (CDAA-06)" in the associated configuration of "SEC-05 (shopping mall security monitoring)" is "off", then the system will only use "abnormal personnel behavior detection algorithm (ABDA-07)" as the target detection algorithm.

[0100] Through the above steps, this application achieves "scenario-based automatic association" between the image to be processed and the detection algorithm, avoiding the tedious operation of manually selecting algorithms, while ensuring the accuracy and business relevance of algorithm matching. For example, when the image to be processed comes from a quality inspection camera on an industrial production line, the system will not incorrectly associate it with a detection algorithm for a traffic scene, but will accurately match algorithms directly related to the quality inspection scene, such as surface defect detection and dimensional measurement, laying the foundation for efficient scheduling and detection in the future.

[0101] In one embodiment, such as Figure 3 As shown, Figure 3 This is a schematic diagram illustrating the process of determining a target scheduling strategy provided in an embodiment of this application; S120, determining the target scheduling strategy based on the attribute information of the at least one target detection algorithm and / or the system state, may include:

[0102] S124: Determine whether at least one target detection algorithm has attribute information, or whether the attribute information meets the preset policy determination conditions.

[0103] S125: If attribute information exists and / or the policy determination conditions are met, then the target scheduling policy is determined based on the attribute information of at least one target detection algorithm.

[0104] S126: If no attribute information exists, the target scheduling strategy is determined based on the system state.

[0105] S127: If the policy determination conditions are not met, then the target scheduling policy is determined based on the attribute information of at least one target detection algorithm and the system state.

[0106] In this embodiment, when determining the target scheduling strategy, this application can first verify the attribute information of the target detection algorithm to determine whether it exists or meets the preset strategy determination conditions. The attribute information of the target detection algorithm includes algorithm type (e.g., traditional feature extraction, deep learning), computing power requirement level (low / medium / high), resource dependency type (CPU only, GPU acceleration required, dedicated NPU required), algorithm priority (P0 level for core business algorithms, P1 level for auxiliary analysis algorithms), and execution time constraints (e.g., real-time detection requires ≤50ms, non-real-time detection requires ≤500ms), etc. The preset strategy determination conditions are set according to business rules. For example, if the algorithm attribute information contains a clear computing power requirement level and resource dependency type, it is determined that the strategy determination conditions are met; if the attribute information only lacks the non-critical field of execution time constraint, it can also be considered as meeting the conditions.

[0107] If attribute information is determined to exist and the policy determination conditions are met, this application will directly generate a target scheduling policy based on the attribute information. For example, if the attribute information of a certain object detection algorithm is "deep learning type, high computing power requirement, resource dependent on GPU, priority P0, execution time constraint ≤50ms", then the target scheduling policy can be set as "prioritizing allocation to the priority task queue of idle GPU execution units; if the GPU queue is not idle, a resource preemption mechanism is triggered to suspend the P1 level task currently being executed on the GPU to ensure the real-time performance of the P0 level task". As another example, if the algorithm attributes are "traditional feature extraction type (Haar detection), low computing power requirement, resource dependent on CPU, priority P1", then the policy is "allocated to the FIFO sub-queue of the CPU task queue, and executed in the order of creation time with other P1 level CPU tasks".

[0108] If it is determined that no attribute information exists (e.g., the algorithm is a newly added test algorithm without configured attributes), this application will determine the scheduling strategy entirely based on the system state. The system state includes the current resource utilization of each execution unit (total CPU utilization, GPU memory utilization), task queue length (number of tasks to be executed in the CPU queue, number of tasks to be executed in the GPU queue), and resource load trend (e.g., predicted CPU utilization value in the next 10 seconds). For example, if the system detects that the current total CPU utilization is 30%, GPU memory utilization is 25%, the number of tasks to be executed in the CPU task queue is 5, and the number of tasks to be executed in the GPU task queue is 2, then the attributeless algorithm will be scheduled to the FIFO subqueue of the GPU task queue to balance the load of each execution unit; if the system detects that the CPU utilization has reached 85% and is showing an upward trend, then it will be scheduled to a spare CPU core with a lower load.

[0109] If the attribute information exists but does not meet the policy determination conditions (e.g., the attribute information only contains "algorithm type is deep learning," lacking key fields such as computing power requirements and resource dependencies), this application will combine the attribute information with the system status to jointly determine the target scheduling policy. For example, if the algorithm attribute is only clearly defined as "deep learning," and the system status shows that the memory utilization of GPU execution unit A is 40%, the memory utilization of GPU execution unit B is 70%, and the CPU utilization is 60%, then the target scheduling policy can be set as "prioritizing allocation to the FIFO subqueue of GPU execution unit A; if allocation fails (e.g., unit A is suddenly occupied), then downgrading allocation to the high-priority subqueue of the CPU execution unit." Simultaneously, the system can also record any missing attribute information for the algorithm, reminding technicians to complete the attribute configuration for more accurate subsequent scheduling.

[0110] Furthermore, the scheduler in this application can dynamically adjust the scheduling strategy based on system resources, pausing low-priority algorithms under high load and resuming execution once resources are restored. For example, when the system detects that the total GPU memory usage consistently exceeds 90%, it will automatically adjust the execution status of all P1-level deep learning algorithms to "paused," prioritizing the resource needs of P0-level core algorithms; once the GPU memory usage drops below 60%, the execution of P1-level algorithms will resume in the order of their pause times. Simultaneously, the scheduler also supports a "dynamic resource reservation" mechanism: if the system receives a notification in advance that a large number of P0-level detection tasks will occur within the next 5 minutes, it will reserve 30% of the GPU memory and 2 CPU cores in advance to avoid task delays due to temporary resource shortages.

[0111] By determining the scheduling strategy according to this scenario, this application ensures that algorithms with clear attributes can receive targeted resource allocation, and also enables flexible load balancing scheduling for algorithms with missing or unconfigured attributes, effectively improving the system's resource utilization and task execution stability in complex scenarios.

[0112] In one embodiment, when there are multiple target detection algorithms, the attribute information includes algorithm dependencies and / or algorithm priorities, and the policy determination condition is that the priorities of each target detection algorithm are different, if in S125 there is attribute information and / or the policy determination condition is met, then determining the target scheduling policy based on the attribute information of the at least one target detection algorithm may include:

[0113] S1251: If there is an algorithm dependency relationship between the various target detection algorithms, then the target scheduling strategy is determined according to the algorithm dependency relationship between the various target detection algorithms.

[0114] S1252: If there are algorithm dependencies and algorithm priorities among the various target detection algorithms, and the algorithm priorities of the various target detection algorithms are different, then the target scheduling strategy is determined according to the algorithm dependencies and algorithm priorities of the various target detection algorithms.

[0115] S1253: If there are algorithm priorities among the various target detection algorithms, and the algorithm priorities of the various target detection algorithms are different, then the target scheduling strategy is determined according to the algorithm priorities of the various target detection algorithms.

[0116] In this embodiment, when the attribute information of each target detection algorithm includes algorithm dependency and / or algorithm priority, and the strategy determination condition is that the priorities of each target detection algorithm are different, this application will generate a scheduling strategy that is more in line with business logic based on the combination of the dependency relationship and priority between the algorithms.

[0117] For example, the target detection algorithms for a given image may include "face detection algorithm (FD-01)," "face feature extraction algorithm (FFE-02)," and "authentication algorithm (IA-03)." The dependency relationship among these three algorithms is "FD-01→FFE-02→IA-03," meaning face detection must be completed first before feature extraction can be performed on the detected face regions, and finally, authentication is completed based on the feature extraction results. In this case, the target scheduling strategy is set to "serial execution scheduling": first, a detection task is created for FD-01 and resources are allocated for execution. After FD-01 outputs the face region coordinates, the creation of the FFE-02 task is triggered. FFE-02 only extracts features from the face regions detected by FD-01. After completion, the feature data is written to a specified address in a shared memory block. Finally, the IA-03 task is triggered to read the feature data and compare it with the identity database. This dependency-driven serial scheduling avoids resource waste and ensures the logical coherence of algorithm execution.

[0118] If the three algorithms mentioned above have dependencies and different priorities, for example, FD-01 has a priority of P0 (core business), FFE-02 has a priority of P1 (auxiliary analysis), and IA-03 has a priority of P2 (non-core), then the target scheduling strategy will optimize resource allocation based on the dependencies and priorities. Specifically, when FD-01 is executed, the highest priority GPU resources are allocated first to ensure that it is completed within a real-time constraint of ≤50ms. After FD-01 is completed, FFE-02 is allocated to the CPU for execution if there are idle CPU resources available. If the CPU load is high, it waits for the GPU to become idle before execution, but must meet the execution constraint of ≤100ms. After FFE-02 is completed, IA-03 is allocated to the low-priority CPU task queue, allowing it to complete within ≤500ms. At the same time, if the system receives a higher-priority P0-level task (such as emergency face detection) during execution, the execution of the current IA-03 will be paused to prioritize the resources of the new P0 task. The execution of IA-03 will be resumed after the new task is completed.

[0119] If multiple object detection algorithms differ only in priority and have no dependency, such as the algorithms for the image being processed being "vehicle detection (P0)," "pedestrian detection (P1)," and "traffic sign recognition (P2)," then the target scheduling strategy will adopt "priority-based preemptive parallel scheduling." The system first allocates GPU core resources to the P0-level vehicle detection algorithm to ensure its real-time execution. Then, it allocates remaining GPU memory or idle CPU cores to the P1-level pedestrian detection algorithm, allowing it to execute in parallel with vehicle detection. The P2-level traffic sign recognition algorithm is added to a low-priority CPU queue and only starts execution when CPU utilization is below 50%. If the P0-level algorithm requires more resources during execution, the system will pause the execution of the P1-level algorithm, allocate resources to the P0-level algorithm, and resume the P1-level algorithm after the P0 algorithm completes, thus ensuring the priority of core business operations.

[0120] In this way, this application realizes priority-based hierarchical scheduling in multi-algorithm scenarios, which not only meets the real-time requirements of core business, but also maximizes the use of system resources to process auxiliary algorithm tasks.

[0121] In one embodiment, S130, which involves creating a corresponding detection task for the at least one target detection algorithm according to the target scheduling strategy and adding the detection task to the task queue, may include:

[0122] S131: Create a detection task for each of the target detection algorithms according to the algorithm dependency relationship between them, and add each detection task to the corresponding task queue.

[0123] S132: Alternatively, create a detection task for each of the target detection algorithms based on the algorithm dependencies and algorithm priorities, and add each detection task to the corresponding task queue.

[0124] S133: Alternatively, create a detection task for each of the target detection algorithms according to the algorithm priority among the respective target detection algorithms, and add each detection task to the corresponding task queue.

[0125] In this embodiment, when the attribute information of each target detection algorithm contains algorithm dependencies, the system can generate independent detection tasks for each algorithm according to the order of dependencies, and add a "dependency identifier" and a "preceding task ID" to the task. For example, in the dependency chain of "face detection → feature extraction → identity verification", the system can first create task T1 for "face detection algorithm (FD-01)", with task T1 having a "dependency identifier" of "no precedent" and being added to the GPU high-priority queue; after T1 is executed, the system automatically generates task T2 for "feature extraction algorithm (FFE-02)" based on the task ID of T1, with the "preceding task ID" of T2 bound to T1, and it will only be activated and added to the CPU priority queue after T1 outputs valid face region data; similarly, the "preceding task ID" of task T3 (identity verification algorithm IA-03) is bound to T2, and it will be added to the CPU low-priority queue after T2 outputs feature vectors. This "dependency-driven task creation mechanism" avoids meaningless tasks starting in advance and reduces the ineffective occupation of system resources.

[0126] If object detection algorithms have both dependencies and priority differences, the system can allocate better task queue resources to higher-priority algorithms while adhering to the dependency order. For example, if FD-01 is P0, FFE-02 is P1, and IA-03 is P2 in the dependency chain, task T1 will be added to the GPU's "P0 dedicated queue" (which has the highest resource preemption rights), task T2 will be added to the CPU's "P1 priority queue," and task T3 will be added to the CPU's "P2 normal queue." Simultaneously, the system can set a "priority inheritance rule" for each task: if the preceding task T1 is delayed due to insufficient resources, the priorities of subsequent tasks T2 and T3 will temporarily inherit T1's P0 priority, ensuring that the execution progress of the entire dependency chain is not excessively affected by the delay of a single task. After T1 completes execution, the priorities of T2 and T3 will be restored to their original levels.

[0127] When object detection algorithms differ only in priority and have no dependencies, the system can create tasks sequentially from highest to lowest priority and assign them to the corresponding priority task queues. For example, a P0-level "vehicle detection algorithm" task would be added to the GPU's P0 queue, a P1-level "pedestrian detection algorithm" task to the GPU's P1 queue, and a P2-level "traffic sign recognition algorithm" task to the CPU's P2 queue. If multiple tasks exist at the same priority, the system will further sort them based on either "task creation time" or "predicted algorithm execution time": tasks with shorter execution times will be inserted at the front of the queue for priority execution, thus shortening the overall average waiting time. For example, if the P1-level "pedestrian detection algorithm" predicts an execution time of 20ms, while the P1-level "non-motorized vehicle detection algorithm" predicts an execution time of 30ms, the system will first create the pedestrian detection task and add it to the front of the queue, then create the non-motorized vehicle detection task and add it afterward.

[0128] In addition, the system supports "task merging optimization": if multiple low-priority algorithm tasks with no dependencies have similar execution resource requirements (e.g., all are lightweight CPU tasks), the system can merge them into a "batch task," sharing the same set of CPU core resources and reducing the overhead of task switching. For example, three P2-level algorithm tasks—"traffic sign recognition," "road marking detection," and "roadside obstacle recognition"—each require only one CPU core and have similar execution times. The system will merge them into a batch task, allocating two CPU cores for parallel execution, improving overall execution efficiency by approximately 25% compared to creating three separate tasks. Simultaneously, the batch task will be marked as "splitable." If the system subsequently receives a high-priority task, it can split the batch task at any time and pause any unexecuted subtasks, prioritizing the resource requirements of the high-priority task.

[0129] In one embodiment, when there are multiple target detection algorithms, the attribute information includes algorithm priority, and the policy determination condition is that the priorities of each target detection algorithm are different, if the policy determination condition is not met in S127, then determining the target scheduling policy based on the attribute information of the at least one target detection algorithm and the system state may include:

[0130] If there are algorithm priorities among the various target detection algorithms, but the algorithm priorities of the various target detection algorithms are the same, then the target scheduling strategy is determined according to the algorithm priorities of the various target detection algorithms and the system state.

[0131] In this embodiment, when multiple target detection algorithms have the same priority (e.g., all are P1 level), the system will dynamically allocate execution units based on the core objective of "load balancing + maximizing resource utilization" and in conjunction with the real-time system status.

[0132] For example, the three P1-level algorithms corresponding to the image to be processed are "product label recognition," "product packaging defect detection," and "product production date reading," and these three are independent of each other. The system status shows that the CPU utilization is 55%, the GPU memory utilization is 30%, the number of tasks waiting to be executed in the CPU task queue is 3, and the number of tasks waiting to be executed in the GPU task queue is 1. At this time, the system can first quickly evaluate the resource requirements of each algorithm: "product label recognition" is a lightweight CPU task (prediction time 15ms), "product packaging defect detection" is a GPU-accelerated task (relying on convolution operations, prediction time 25ms), and "product production date reading" is a medium-load CPU task (prediction time 20ms). Based on the evaluation results, the target scheduling strategy can allocate "product packaging defect detection" to the FIFO subqueue of the GPU task queue (utilizing idle GPU resources), allocate "product label recognition" and "product production date reading" to two idle CPU cores respectively, and use a "time-slice round-robin" scheduling method to ensure that the two CPU tasks are executed in parallel without significant delay.

[0133] Furthermore, if the system state undergoes dynamic changes, such as during the execution of the three P1-level algorithms mentioned above, when the GPU suddenly receives a P0-level core task causing a sharp increase in memory usage to 85%, the system can immediately trigger "dynamic migration of tasks of the same priority": migrating the "product packaging defect detection" task, which is still in the queue, from the GPU queue to the CPU's high-priority sub-queue, while adjusting the CPU's time slice allocation ratio to reserve 50% of CPU core resources for the migrated task, ensuring its completion within a constraint of ≤40ms. After the migration is completed, the system can record this resource fluctuation and update the algorithm's "resource adaptation tag" (marked as "CPU / GPU dual compatibility") so that its execution feasibility on the CPU is given priority during subsequent scheduling.

[0134] This dynamic scheduling mechanism based on the same priority algorithm allows the system to quickly adjust task allocation when resources fluctuate, ensuring the real-time performance of core business operations while avoiding execution blockage caused by resource preemption for tasks of the same priority.

[0135] In one embodiment, S130, which involves creating a corresponding detection task for the at least one target detection algorithm according to the target scheduling strategy and adding the detection task to the task queue, may include:

[0136] S134: Create detection tasks for each of the target detection algorithms according to their algorithm priorities and system status, and add each detection task to its corresponding task queue.

[0137] In this embodiment, when the system creates a detection task based on algorithm priority and real-time system status, it can first use the built-in "resource requirement prediction model" to pre-evaluate the hardware resource consumption (such as the number of CPU cores, GPU memory usage, and memory bandwidth requirements) and execution time of each target detection algorithm, and then dynamically allocate the task queue and execution unit in combination with the current system resource utilization (CPU load, GPU memory usage, task queue length, etc.).

[0138] For example, a certain image to be processed corresponds to two P1-level algorithms: "Document Text Recognition (CPU-lightweight, prediction time 18ms)" and "Document Stamp Detection (GPU-dependent, prediction time 22ms)". The real-time system status is: CPU utilization 40%, GPU memory utilization 25%, CPU task queue with 2 pending tasks, and GPU task queue with 0 pending tasks. At this time, the system will first create task T4 for "Document Stamp Detection", marking its resource requirement as "2GB GPU memory + 10 CUDA cores", and add T4 to the GPU's P1 queue; simultaneously, it will create task T5 for "Document Text Recognition", marking its resource requirement as "1 CPU core + 512MB RAM", and add it to the CPU's P1 queue. Since there are currently no pending tasks in the GPU queue, T4 will start execution immediately; since there are already two low-load tasks in the CPU queue, the system will insert T5 at the front of the queue, utilizing idle CPU resources for parallel execution, reducing the overall task completion time to 22ms (determined by the time of T4), saving approximately 18ms compared to executing the two tasks separately.

[0139] If resource conflicts occur in the system, for example, if three P1-level algorithm tasks are received simultaneously: "Food Appearance Detection (GPU heavy load, prediction time 35ms)," "Food Barcode Recognition (CPU light load, 15ms)," and "Food Expiration Date Detection (CPU medium load, 25ms)," while the current GPU memory utilization is 70% and CPU utilization is 60%, the system can first calculate the remaining GPU resources: the remaining 30% of memory can support approximately one heavy-load GPU task. Therefore, task T6 for "Food Appearance Detection" is created first and added to the GPU P1 queue. For the two CPU tasks, the system will assess the CPU core idle status (assuming a total of 8 cores, currently 4.8 occupied, 3.2 remaining), create task T7 for "Food Barcode Recognition" (allocating 1 core) and task T8 for "Food Expiration Date Detection" (allocating 1 core), and add T7 and T8 to the "parallel sub-queue" of the CPU P1 queue for simultaneous execution using a "multi-core parallel scheduling" method. At this point, the CPU utilization rate increased to around 85%, which did not exceed the safe threshold of 90%, while the GPU was running T6 at full load with a utilization rate of 70%+, achieving saturated resource utilization.

[0140] By using the task creation and queue allocation methods based on algorithm priority and system status, the system can maximize parallel execution efficiency when resources are sufficient, and ensure the overall execution progress of tasks through dynamic adjustment when resources are scarce, effectively balancing the real-time performance of detection tasks with the utilization rate of system resources.

[0141] In one embodiment, the system state includes the resource usage of multiple computing devices and the load of each execution thread within each computing device. Determining the target scheduling strategy based on the system state in step S126 may include:

[0142] S1261: If the resource occupancy of each of the computing devices meets the preset resource distribution conditions, then a target scheduling strategy is determined based on the resource requirements of the at least one target detection algorithm and the resource occupancy of each of the computing devices.

[0143] S1262: If the resource occupancy of each of the execution units does not meet the resource distribution conditions, then a target scheduling strategy is determined based on the resource requirements of the at least one target detection algorithm and the load of each execution thread in each of the computing devices.

[0144] In this embodiment, when the system status includes the resource utilization of multiple computing devices and the load of each execution thread within each computing device, this application can first determine whether the resource utilization of each computing device meets preset resource distribution conditions. These preset resource distribution conditions can be pre-set based on the system's hardware configuration and business requirements. For example, when the CPU utilization of all computing devices is ≤80% and the GPU memory utilization is ≤75%, and the difference in resource utilization between a single computing device and other devices is ≤20%, it is determined that the resource distribution conditions are met. At this point, the system can determine the target scheduling strategy based on the principle of "proximity allocation + load balancing".

[0145] For example, the system contains two GPU servers (GPU-A and GPU-B) and one CPU cluster (CPU-C). The target detection algorithm to be processed is a P0-level "medical image lesion detection algorithm" (heavy GPU load, requiring 4GB of video memory). Currently, GPU-A's video memory utilization is 60% (2.4GB remaining, less than 4GB), GPU-B's video memory utilization is 50% (3.2GB remaining, still insufficient), and CPU-C's CPU utilization is 30% but has no GPU resources. At this point, the system will determine that the resource distribution conditions are not met (insufficient GPU resources and uneven distribution), and will instead execute S1262.

[0146] In S1262, the system further analyzes the load of execution threads within each computing device, such as thread CPU utilization, GPU core utilization, and memory bandwidth utilization. Regarding the aforementioned "medical image lesion detection algorithm," the system found three execution threads in GPU-A, two of which had GPU core utilization of only 40% (light load). These two threads were executing a P2-level "medical image auxiliary labeling algorithm" (which could be paused or downgraded). Based on this, the target scheduling strategy can trigger "thread resource preemption and migration": first, pause the two lightly loaded P2-level threads in GPU-A, releasing approximately 2GB of GPU memory and 50% of GPU core resources; then, allocate the "medical image lesion detection algorithm" task to an idle thread in GPU-A, and migrate the paused P2-level thread to an idle core in CPU-C to continue execution. This approach satisfies the resource requirements of the P0-level core algorithm while avoiding task blocking due to insufficient GPU resources, and minimizes the execution loss of auxiliary tasks through thread migration.

[0147] If the resource usage of computing devices in the system meets the distribution conditions, for example, if the algorithm to be processed is a P1-level "Industrial Product Surface Defect Detection Algorithm" (GPU load, requiring 2GB of VRAM), and the current GPU-A VRAM utilization is 50% (3.2GB remaining) and GPU-B VRAM utilization is 45% (3.6GB remaining), with a resource usage difference of 5% (≤20%), then the system will select GPU-B with more remaining resources to allocate the task based on the algorithm's resource requirements and the device's resource usage. Simultaneously, the system will bind the task to the lowest-loaded execution thread on GPU-B (thread utilization 30%) to ensure the task can be executed with maximum efficiency.

[0148] By combining the resource consumption of computing devices with the load of execution threads, the system can achieve efficient load distribution when resources are evenly distributed, and meet the core algorithm requirements through thread-level resource adjustment when resources are unevenly distributed, thereby further improving the flexibility of resource utilization and the reliability of task execution in multi-device scenarios.

[0149] In one embodiment, S130, which involves creating a corresponding detection task for the at least one target detection algorithm according to the target scheduling strategy and adding the detection task to the task queue, may include:

[0150] S135: Based on the resource requirements of the at least one target detection algorithm and the resource occupancy of each of the computing devices, create a detection task for each of the target detection algorithms and add each detection task to the corresponding task queue.

[0151] S136: Based on the resource requirements of the at least one target detection algorithm and the load of each execution thread in each of the computing devices, create a detection task for each of the target detection algorithms and add each detection task to the corresponding task queue.

[0152] In this embodiment, when creating a detection task, the task creation and queue allocation can be completed in layers based on the resource requirements of the target detection algorithm and the resource usage of the computing device, combined with the load details of the execution thread.

[0153] For example, the system includes GPU servers (GPU-1, GPU-2) and a CPU cluster (CPU-Cluster). The two P1-level algorithms to be processed are "Automotive Part Surface Scratch Detection" (medium load on GPUs, requiring 2.5GB of VRAM and 15 CUDA cores) and "Part Size Measurement" (medium load on CPUs, requiring 2 CPU cores and 1GB of RAM). Currently, GPU-1's VRAM utilization is 40% (3.6GB remaining), GPU-2's VRAM utilization is 55% (2.2GB remaining), and the CPU-Cluster's CPU utilization is 35% (12 cores remaining). First, S135 is executed: the system determines that "Automotive Part Surface Scratch Detection" requires 2.5GB of VRAM. GPU-1 has sufficient remaining VRAM and lower resource consumption, so task T9 is created for it, marked with resource requirements of "GPU-1 VRAM 2.5GB + 15 CUDA cores", and added to GPU-1's P1 queue; "Part Size Measurement" relies on CPU resources, so task T10 is created for it, marked with "CPU cores 2 + 1GB of RAM", and added to the CPU-Cluster's P1 queue. Since there are no tasks waiting to be executed in the GPU-1 queue, T9 starts immediately; with sufficient idle cores in the CPU-Cluster, T10 also executes synchronously, and the time taken for both to complete in parallel is reduced by about 40% compared to serial execution.

[0154] If the system determines that the computing device resource usage does not meet the distribution conditions, such as the P0-level "satellite remote sensing image cloud segmentation" algorithm to be processed (heavy GPU load, requiring 5GB of video memory), the current GPU-1 video memory utilization is 65% (2.1GB remaining) and the GPU-2 video memory utilization is 60% (2.4GB remaining), neither of which can meet the requirements individually. At this time, S136 is triggered: the system analyzes the execution thread load within GPU-1 and finds that there are 4 threads, 3 of which are P2-level "remote sensing image coordinate annotation" threads. Each thread has a GPU core utilization of only 35%, and the total video memory usage is 1.8GB. The system creates task T11 for "satellite remote sensing image cloud segmentation". First, it pauses two lightly loaded P2-level threads in GPU-1, freeing up 1.2GB of video memory and 50% of GPU core resources. Then, it allocates T11 to an idle thread in GPU-1, marking the resource requirement as "2.1GB of remaining video memory in GPU-1 + 1.2GB of freed video memory + 50% of GPU cores". The algorithm requirements are met through thread-level resource integration. At the same time, the two paused P2-level threads are migrated to an idle core in the CPU-Cluster, and tasks T12 and T13 are created for them, marked as "1 CPU core / thread", and added to the CPU's P2 queue to continue execution.

[0155] This approach ensures the real-time execution of the P0-level core algorithm while minimizing the impact of low-priority task execution interruptions through dynamic adjustment and migration of thread resources, thus achieving elastic scheduling of system resources.

[0156] In one embodiment, when there are multiple target detection algorithms and multiple execution units, with each target detection algorithm corresponding to a task queue, in step S140, the execution unit retrieves the detection task from the task queue, accesses the image to be processed in the memory block, executes the detection task, and obtains the detection result. This may include:

[0157] Multiple execution units concurrently retrieve corresponding detection tasks from their respective task queues, and after reading the image to be processed from the memory block with zero copy, execute the corresponding detection task to obtain multiple detection results.

[0158] In this embodiment, when there are multiple target detection algorithms and execution units, and each algorithm corresponds to an independent task queue, the system supports multiple execution units to concurrently pull detection tasks from their respective associated task queues, and directly access the image data to be processed in the shared memory block through "zero copy" technology, without the need for data copying operations between memory and execution units, which greatly reduces the time consumption of data transmission.

[0159] For example, in an industrial quality inspection scenario, the image to be processed needs to simultaneously perform three tasks: "metal surface crack detection (GPU algorithm, corresponding to GPU queue Q1)," "part dimension measurement (CPU algorithm, corresponding to CPU queue Q2)," and "thread defect recognition (FPGA algorithm, corresponding to FPGA queue Q3)." The system is configured with one GPU execution unit, two CPU execution units, and one FPGA execution unit. After the three tasks are added to their respective queues, the GPU execution unit pulls the crack detection task from Q1 and reads the original 4K×4K resolution image from memory using zero-copy. The two CPU execution units simultaneously pull two sub-tasks (such as length measurement and diameter measurement) from Q2 for the dimension measurement task, sharing access to the same image memory. The FPGA execution unit pulls the thread recognition task from Q3, utilizing hardware acceleration to quickly read local texture regions of the image. Because zero-copy technology avoids redundant data loading, the three types of execution units can concurrently complete all tasks in a very short time, significantly saving transmission time compared to traditional data copying methods. Furthermore, since the image data is stored only once in memory, memory usage is reduced.

[0160] Furthermore, when multiple execution units execute concurrently, the system can ensure resource matching through a "task-execution unit binding mechanism": for GPU-dependent algorithms, it binds to CUDA-supporting GPU execution units; for CPU-parallel algorithms, it binds to multi-core CPU execution units; and for FPGA-accelerated algorithms, it binds to dedicated FPGA execution units. Simultaneously, the system can monitor the task execution progress of each execution unit in real time. If an execution unit experiences excessive load (e.g., CPU execution unit utilization exceeds 90%), it automatically migrates unexecuted low-priority tasks in that queue to other idle execution units. For example, if CPU queue Q2 contains two tasks: P1-level "part dimension measurement" and P2-level "surface stain detection," and the utilization rate of the two CPU execution units reaches 95% while executing the dimension measurement task, the system can migrate the P2-level stain detection task to an idle FPGA execution unit (where the FPGA's current utilization is only 20%), and use a hardware adaptation layer to convert the CPU algorithm into an FPGA-executable instruction set, ensuring the task continues to execute.

[0161] This approach, which combines concurrent execution with dynamic migration, not only fully leverages the hardware advantages of different types of execution units but also achieves cross-unit load balancing, significantly improving the overall detection efficiency in multi-algorithm scenarios.

[0162] In one embodiment, the method may further include:

[0163] S150: After aggregating the individual detection results, the aggregated result is obtained.

[0164] S151: Output and display the aggregation result according to the preset output method.

[0165] In this embodiment, after multiple execution units concurrently complete the detection task, the system can perform unified aggregation processing on the detection results scattered across different execution units. For example, in an industrial quality inspection scenario, the "metal surface crack detection result" output by the GPU execution unit includes the location coordinates of the crack (e.g., (x1, y1, x2, y2)), the crack length (e.g., 5.2 mm), and the confidence level (e.g., 98.5%). The "part size measurement result" output by the two CPU execution units is a length of 120.3 mm (confidence level 99.2%) and a diameter of 25.1 mm (confidence level 99.0%). The "thread defect identification result" output by the FPGA execution unit includes the number of defective areas (2 locations), the percentage of defective area (1.8%), and the confidence level (97.8%). The system first standardizes the format of these results, converting all data into JSON format and supplementing metadata such as task ID, execution unit identifier, and execution timestamp. Then, it verifies the "result correlation" by checking whether the crack location overlaps with the thread defect area (if there is an overlap, it is marked as a "high-risk defect area") and whether the dimensional measurement value is within the preset tolerance range (e.g., length tolerance ±0.5mm, 120.3mm meets the requirements). Finally, it generates an aggregated report containing all defect types, locations, parameters, and risk levels. High-risk defects (such as areas where cracks and thread defects overlap) are highlighted in red, medium-risk defects (such as isolated thread defects) are highlighted in yellow, and no-defect items are highlighted in green.

[0166] When aggregating detection results, this application also supports fusion strategies, including weighted fusion, NMS (Non-Maximum Suppression), and confidence filtering. For example, when multiple execution units output different detection results for the same region of the same image, the system can adopt a weighted fusion strategy: if the GPU execution unit outputs a region with a confidence level of 98.5% for "cracks exist" and the FPGA execution unit outputs a region with a confidence level of 97.8% for "thread defects," the weights can be set according to the historical accuracy of the algorithm (e.g., if the GPU accuracy is 95% and the FPGA accuracy is 93%, the weights are 0.51 and 0.49 respectively). After fusion, the overall risk value of the region is (98.5% × 0.51 + 97.8% × 0.49) ≈ 98.17%, further improving the reliability of the results. To address the problem of duplicate bounding boxes in object detection, the system can use the NMS (Non-Maximum Suppression) algorithm to filter overlapping detection boxes output by multiple execution units, retaining the box with the highest confidence and the most accurate location, thus avoiding result redundancy. Confidence filtering can eliminate detection results with confidence levels below a preset threshold (such as 80%), reducing the interference of invalid information on the aggregated report.

[0167] In the output display stage, the system supports diverse preset output methods to adapt to different scenario requirements. For on-site operators in industrial quality inspection, the system can display the aggregated inspection results in real time through a visual interface: defect marker boxes are overlaid on the original view of the image to be inspected, with different colored boxes corresponding to different risk levels of defects. Detailed parameters of the defects (such as type, location, confidence level, and risk level) are displayed in a list on the right side of the interface, and the system supports clicking on defect list items to quickly locate the corresponding area in the image. For remote monitoring managers, the system can generate PDF inspection reports, including image thumbnails, defect statistical charts (such as pie charts showing the proportion of different defect types), trend analysis of key parameters (such as dimensional deviation curves for consecutive batches), and close-up images of high-risk defects, facilitating managers to quickly grasp the production quality status. Furthermore, the system also supports pushing the aggregated results to the enterprise's MES (Manufacturing Execution System) or ERP (Enterprise Resource Planning) system via API, achieving seamless integration of inspection data with the production process and providing data support for subsequent production adjustments. For example, when the proportion of crack defects in a batch of parts exceeds 5%, the MES system can automatically trigger a shutdown inspection command for the production line to promptly identify and address any abnormalities in the production equipment.

[0168] Furthermore, the system supports storing the aggregated results in a distributed database for subsequent data mining tasks such as defect trend analysis and algorithm model optimization. Through this multi-dimensional result aggregation and flexible output methods, the system can provide accurate and efficient detection information support for users with different roles, further improving the business value conversion efficiency of image detection tasks.

[0169] In one embodiment, the method may further include:

[0170] S160: During the execution of the corresponding detection tasks, monitor the execution status of each detection task.

[0171] S161: If any detection task times out, the timed-out detection task will be removed.

[0172] S162: If any detection task fails, the failure information will be written to the log.

[0173] In this embodiment, during the execution of the corresponding detection task, the system can perform full-link monitoring of the execution time, resource consumption, and intermediate result output of the detection task through a real-time monitoring module. For example, in the vehicle violation detection scenario of intelligent transportation, the preset timeout threshold of the "red light violation vehicle recognition" algorithm (P1 level) is 200ms. The system can start timing from the time task T15 enters the execution unit, collecting GPU core utilization, memory usage, and intermediate feature map generation progress every 10ms. If T15 has not output a preliminary detection box after 190ms, the monitoring module determines that it is about to time out and immediately triggers an early warning mechanism; if it has not been completed after 210ms, the system automatically removes T15 from the execution unit and marks it as a "timeout task", while recording information such as task ID, algorithm type, timeout duration, and peak resource usage in the system log.

[0174] For tasks that fail to detect errors, the system can first locate the cause of the failure, then categorize and write it into the log and trigger the corresponding processing logic. For example, when the "pedestrian facial feature extraction" algorithm (P2 level) is executed, the feature extraction function will report an error due to corrupted image data (black blocks with all pixel values ​​of zero). The system will identify the error type "invalid data format" through the exception capture mechanism, mark task T16 as a "failed task", and record detailed error stack information (such as function call path, specific error line number), image storage path, data check code and other key information in the log. If the failure is due to a hardware failure of the execution unit (such as a sudden power failure of the GPU), the system will record the hardware device ID, the time of failure, real-time temperature and voltage data, and trigger the hardware self-test process.

[0175] This monitoring and anomaly handling mechanism not only promptly clears blocked tasks in the system, preventing resources from being ineffectively occupied for extended periods, but also provides precise data for subsequent algorithm optimization and hardware maintenance through detailed log recording. For example, by analyzing the logs of timed-out tasks, it was found that the execution time of the "nighttime vehicle recognition" algorithm generally exceeded the threshold under low-light images, allowing developers to optimize the algorithm's lighting adaptation module accordingly. By statistically analyzing failure logs related to hardware faults, maintenance personnel can proactively replace GPU devices with high failure rates, reducing the risk of system downtime.

[0176] In one embodiment, such as Figure 4 As shown, Figure 4 This is a schematic diagram illustrating the automatic memory block reclamation process provided in an embodiment of this application; the method may further include:

[0177] S170: Set an initial reference count for the memory block. The value of the initial reference count is the same as the number of object detection algorithms corresponding to the image to be processed.

[0178] S171: When the detection task corresponding to any target detection algorithm is completed, decrement the reference count of the memory block by one.

[0179] S172: Automatically release memory when the reference count of a memory block reaches zero.

[0180] In this embodiment, to avoid repeated storage of image data in memory or long-term occupation of memory resources, the system introduces an automatic memory block reclamation mechanism based on reference counting. Specifically, when an image to be processed is written to a shared memory block, the system sets an initial reference count for the memory block based on the number of target detection algorithms that need to be executed for the image. For example, if an image to be processed needs to execute three algorithms simultaneously—"crack detection," "dimensional measurement," and "thread recognition"—the initial reference count is set to 3. When the detection task corresponding to the "dimensional measurement" algorithm is completed, the system detects that the task has released access to the memory block and automatically decrements the reference count by 1 (the count is now 2). After the "crack detection" and "thread recognition" tasks are completed in sequence, the reference count will gradually decrease to 0. When the reference count reaches zero, the system determines that the memory block is no longer accessed by any task and immediately triggers an automatic release operation, reclaiming the memory space to the system memory pool for subsequent new image data storage.

[0181] This mechanism ensures efficient memory utilization when multiple tasks share image data, while also avoiding memory leaks, further enhancing the system's memory management flexibility and stability.

[0182] The image detection apparatus provided in the embodiments of this application will be described below. The image detection apparatus described below can be referred to in correspondence with the image detection method described above.

[0183] In one embodiment, such as Figure 5 As shown, Figure 5 This is a schematic diagram of the structure of an image detection device provided in an embodiment of this application; this application also provides an image detection device, which may include a memory allocation module 210, a scheduling strategy determination module 220, a task creation module 230, and an image detection module 240, specifically including the following:

[0184] The memory allocation module 210 is used to acquire the image to be processed, allocate a memory block for the image to be processed from a preset shared memory pool, and write the image to be processed into the memory block.

[0185] The scheduling strategy determination module 220 is used to determine at least one target detection algorithm corresponding to the image to be processed, and to determine the target scheduling strategy based on the attribute information of the at least one target detection algorithm and / or the system state.

[0186] The task creation module 230 is used to create corresponding detection tasks for the at least one target detection algorithm according to the target scheduling strategy, and add the detection tasks to the task queue.

[0187] The image detection module 240 is used to obtain the detection task from the task queue through the execution unit, access the image to be processed in the memory block, execute the detection task, and obtain the detection result.

[0188] In the above embodiments, after acquiring the image to be processed, a memory block can be allocated for the image from a preset shared memory pool, and the image to be processed can be written into the memory block. Next, at least one target detection algorithm corresponding to the image to be processed is determined, and a target scheduling strategy is determined based on the attribute information of the at least one target detection algorithm and / or the system state. A corresponding detection task is created for the at least one target detection algorithm according to the target scheduling strategy, and the detection task is added to the task queue. The execution unit retrieves the detection task from the task queue, accesses the image to be processed in the memory block, executes the detection task, and then obtains the detection result. Through the above steps, this application achieves efficient storage of the image to be processed in a shared memory pool and flexible scheduling of multiple detection tasks. The memory block allocation mechanism of the shared memory pool avoids repeated copying of image data, significantly reducing memory usage and data transmission latency, especially when processing high-resolution, large-size images. The dynamic determination of the target scheduling strategy combines the resource requirements of the detection algorithm (such as CPU / GPU algorithms) with the real-time system state (such as CPU / GPU utilization and task queue length), and can intelligently allocate execution resources. For example, computationally intensive deep learning detection algorithms are prioritized for scheduling to idle GPU execution units, while lightweight traditional algorithms are allocated to CPU cores, ensuring maximum utilization of system resources. The design of execution units sequentially retrieving tasks from the task queue and directly accessing shared memory blocks further guarantees the concurrency and real-time performance of the detection process, effectively improving the overall detection efficiency in multi-task scenarios.

[0189] In one embodiment, this application also provides a computer-readable storage medium storing computer-readable instructions that, when executed by one or more processors, cause the one or more processors to perform the steps of the image detection method as described in any of the above embodiments.

[0190] In one embodiment, this application also provides a computer device, including: one or more processors, and memory.

[0191] The memory stores computer-readable instructions, which, when executed by the one or more processors, perform the steps of the image detection method as described in any of the above embodiments.

[0192] Indicatively, such as Figure 6 As shown, Figure 6 This is a schematic diagram of the internal structure of a computer device 300 provided in an embodiment of this application. The computer device 300 can be provided as a server. (Refer to...) Figure 6 The computer device 300 includes a processing component 302, which further includes one or more processors, and memory resources represented by memory 301 for storing instructions, such as application programs, that can be executed by the processing component 302. The application programs stored in memory 301 may include one or more modules, each corresponding to a set of instructions. Furthermore, the processing component 302 is configured to execute instructions to perform the image detection method of any of the above embodiments.

[0193] The computer device 300 may also include a power supply component 303 configured to perform power management of the computer device 300, a wired or wireless network interface 304 configured to connect the computer device 300 to a network, and an input / output (I / O) interface 305. The computer device 300 may operate on an operating system stored in memory 301, such as Windows Server™, Mac OS X™, Unix™, Linux™, Free BSD™, or similar.

[0194] Those skilled in the art will understand that Figure 6 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0195] Finally, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0196] The various embodiments in this specification are described in a progressive manner. Each embodiment focuses on the differences from other embodiments. The various embodiments can be combined as needed, and the same or similar parts can be referred to each other.

[0197] The above description of the disclosed embodiments enables those skilled in the art to make or use this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. An image detection method, characterized in that, The method includes: Obtain the image to be processed, allocate a memory block for the image to be processed from a preset shared memory pool, and write the image to be processed into the memory block; Determine at least one target detection algorithm corresponding to the image to be processed, and determine a target scheduling strategy based on the attribute information of the at least one target detection algorithm and / or the system state; According to the target scheduling strategy, a corresponding detection task is created for the at least one target detection algorithm, and the detection task is added to the task queue; The execution unit retrieves the detection task from the task queue, accesses the image to be processed in the memory block, executes the detection task, and obtains the detection result.

2. The image detection method according to claim 1, characterized in that, The method for determining at least one target detection algorithm corresponding to the image to be processed includes: Determine the target acquisition source corresponding to the image to be processed, and obtain the pre-configured association table between the image acquisition source and the detection algorithm; The target acquisition source is matched with the image acquisition source in the association configuration table, and at least one target detection algorithm associated with the target acquisition source is determined based on the matching result. The at least one target detection algorithm is used as at least one target detection algorithm corresponding to the image to be processed.

3. The image detection method according to claim 1, characterized in that, The step of determining the target scheduling strategy based on the attribute information of the at least one target detection algorithm and / or system state includes: Determine whether the at least one target detection algorithm has attribute information, or whether the attribute information meets the preset strategy determination conditions; If attribute information exists and / or the policy determination conditions are met, then the target scheduling policy is determined based on the attribute information of the at least one target detection algorithm. If no attribute information exists, the target scheduling strategy is determined based on the system status. If the policy determination conditions are not met, then the target scheduling policy is determined based on the attribute information of the at least one target detection algorithm and the system state.

4. The image detection method according to claim 3, characterized in that, When there are multiple target detection algorithms, the attribute information includes algorithm dependencies and / or algorithm priorities, and the policy determination condition is that the priorities of each target detection algorithm are different, the step of determining a target scheduling policy based on the attribute information of at least one target detection algorithm if attribute information exists and / or the policy determination condition is met includes: If there is an algorithm dependency among the various target detection algorithms, then the target scheduling strategy is determined based on the algorithm dependency among the various target detection algorithms; If there are algorithm dependencies and algorithm priorities among the various target detection algorithms, and the algorithm priorities of the various target detection algorithms are different, then the target scheduling strategy is determined according to the algorithm dependencies and algorithm priorities of the various target detection algorithms. If there are different algorithm priorities among the target detection algorithms, then the target scheduling strategy is determined based on the algorithm priorities of each target detection algorithm.

5. The image detection method according to claim 4, characterized in that, The step of creating corresponding detection tasks for the at least one target detection algorithm according to the target scheduling strategy and adding the detection tasks to the task queue includes: Based on the algorithmic dependencies between the various target detection algorithms, a separate detection task is created for each of the target detection algorithms, and each detection task is added to the corresponding task queue. Alternatively, based on the algorithm dependencies and priorities among the various target detection algorithms, a separate detection task can be created for each target detection algorithm, and each detection task can be added to a corresponding task queue. Alternatively, each of the target detection algorithms may be assigned a separate detection task based on its algorithm priority, and each detection task may be added to its corresponding task queue.

6. The image detection method according to claim 3, characterized in that, The system status includes the resource usage of multiple computing devices and the load of each execution thread within each computing device. Determining the target scheduling strategy based on the system status includes: If the resource occupancy of each of the computing devices meets the preset resource distribution conditions, then the target scheduling strategy is determined based on the resource requirements of the at least one target detection algorithm and the resource occupancy of each of the computing devices. If the resource occupancy of each execution unit does not meet the resource distribution conditions, a target scheduling strategy is determined based on the resource requirements of the at least one target detection algorithm and the load of each execution thread in each computing device.

7. The image detection method according to claim 6, characterized in that, The step of creating corresponding detection tasks for the at least one target detection algorithm according to the target scheduling strategy and adding the detection tasks to the task queue includes: Based on the resource requirements of the at least one target detection algorithm and the resource usage of each computing device, a detection task is created for each target detection algorithm, and each detection task is added to the corresponding task queue. Based on the resource requirements of the at least one target detection algorithm and the load of each execution thread in each computing device, a detection task is created for each target detection algorithm, and each detection task is added to the corresponding task queue.

8. An image detection device, characterized in that, include: The memory allocation module is used to acquire the image to be processed, allocate a memory block for the image to be processed from a preset shared memory pool, and write the image to be processed into the memory block; The scheduling strategy determination module is used to determine at least one target detection algorithm corresponding to the image to be processed, and to determine the target scheduling strategy based on the attribute information of the at least one target detection algorithm and / or the system state. The task creation module is used to create corresponding detection tasks for the at least one target detection algorithm according to the target scheduling strategy, and add the detection tasks to the task queue; The image detection module is used to obtain the detection task from the task queue through the execution unit, and after accessing the image to be processed in the memory block, execute the detection task to obtain the detection result.

9. A computer-readable storage medium, characterized in that, The computer-readable storage medium stores computer-readable instructions that, when executed by one or more processors, cause the one or more processors to perform the steps of the image detection method as described in any one of claims 1 to 7.

10. A computer device, characterized in that, include: One or more processors, and memory; The memory stores computer-readable instructions that, when executed by the one or more processors, perform the steps of the image detection method as described in any one of claims 1 to 7.

Images