A method and system for constructing a global coordinate system of a micro LED wafer

Abstract

The application provides a global coordinate system construction method and system for a MicroLED wafer, which comprises the following steps: obtaining local image coordinates corresponding to each mark point on the wafer based on the symmetric or approximately symmetric distribution characteristics of each mark point; calculating the overall attitude of the wafer based on the directional prior relationship that should be met between each mark point, and simultaneously completing the wafer alignment processing; determining the corresponding reference die in the coordinate system after the wafer alignment is completed, and simultaneously constructing the initial wafer global coordinate system; based on the periodic structure characteristics in a plurality of local fields of view, performing sub-pixel level fitting and error compensation on the initial wafer global coordinate system to generate the corresponding target wafer global coordinate system, and simultaneously constructing the unified mapping relationship between the image coordinates and the device coordinates based on the target wafer global coordinate system. The application can effectively avoid the deviation accumulation problem and guarantee the precision and long-term stability of wafer processing and detection.

Description

Technical Field

[0001] This invention relates to the field of [field], and particularly to a method and system for constructing a global coordinate system for a MicroLED wafer. Background Technology

[0002] MicroLED display technology is a next-generation core display technology, with wafer-level products boasting pixel counts in the tens to hundreds of millions. Core processes such as wafer inspection, repair, and mass transfer place extremely high demands on global coordinate consistency, sub-pixel alignment accuracy, and processing efficiency. The precise and rapid establishment of the global coordinate system is a crucial prerequisite for ensuring the stability and reliability of these processes and improving product yield.

[0003] There are three main methods for establishing a global coordinate system for MicroLED wafers: one is to generate a global image by high-resolution scanning and stitching across the entire wafer, thereby completing coordinate calibration; the second is to achieve positioning based on a complete and fixed reference layout on the wafer (such as diemaps, scribe lines, and alignment mark arrays); and the third is to establish a coordinate system through simple translation or rotation correction of a small number of alignment points. These methods met the needs of low-to-medium pixel density wafers in the early stages of the technology, laying the foundation for industrialization.

[0004] However, with the increase in pixel density and the upgrading of high-end application requirements, the shortcomings of existing methods have become increasingly prominent: full-wafer scanning is time-consuming and involves a large amount of data, making it unsuitable for high-throughput production; it is highly dependent on the reference layout, making it difficult to cope with scenarios without a reference or with a damaged reference layout; the pose correction accuracy is insufficient, failing to meet sub-pixel level alignment requirements; and it lacks a stable mapping model between image coordinates and device coordinates, easily leading to the accumulation of deviations. Therefore, there is an urgent need for a method that does not require full scanning, is suitable for scenarios without a reference layout, and combines the characteristics of rapid establishment and high-precision alignment, thus breaking through the current technical bottlenecks. Summary of the Invention

[0005] Based on this, the purpose of this invention is to provide a method and system for constructing a global coordinate system for MicroLED wafers, so as to provide a method that does not require complete scanning, is adapted to scenarios without reference layout, and has the characteristics of rapid establishment and high-precision alignment.

[0006] The first aspect of the present invention proposes: A method for constructing a global coordinate system for a MicroLED wafer, wherein the method includes: Based on the symmetrical or approximately symmetrical distribution characteristics of each mark point on the wafer, the local image coordinates corresponding to each mark point are obtained; Based on the prior directional relationship that should be satisfied between each of the mark points, the overall orientation of the wafer is calculated, and the wafer orientation process is completed simultaneously. Under the coordinate system after the wafer is uprighted, the corresponding reference die is determined, and the corresponding initial global coordinate system of the wafer is constructed simultaneously. Based on the periodic structural features within several local fields of view, the initial wafer global coordinate system is fitted and error compensated at the sub-pixel level to generate the corresponding target wafer global coordinate system. Simultaneously, based on the target wafer global coordinate system, a unified mapping relationship between image coordinates and device coordinates is constructed.

[0007] The beneficial effects of this invention are as follows: This solution effectively solves many defects of the existing technology. It obtains local image coordinates based on the symmetrical or nearly symmetrical distribution characteristics of wafer mark points, eliminating the need for full wafer scanning, significantly reducing detection time and data volume, and is suitable for high-throughput production scenarios. It completes wafer orientation correction based on the directional prior between mark points, reducing the strong dependence on the reference layout and making it compatible with complex working conditions without a reference or with a damaged reference layout. It completes sub-pixel-level fitting and error compensation through periodic structural features within the local field of view, significantly improving coordinate alignment accuracy and meeting sub-pixel-level alignment requirements. At the same time, it constructs a unified mapping relationship between image coordinates and device coordinates, effectively avoiding the problem of deviation accumulation and ensuring the accuracy and long-term stability of wafer processing and inspection.

[0008] Furthermore, the step of calculating the overall orientation of the wafer and simultaneously completing the wafer orientation process includes: At least one local field of view containing a mark point is selected on the wafer, and the geometric or texture features of the mark point are extracted simultaneously in the local field of view to generate a corresponding mark template; Based on the design rules, process specifications, or preset mark layout type of the wafer, the potential symmetric or approximately symmetric relationship of the mark points on the wafer is determined accordingly. The wafer is converted to its correct position based on the potential or approximate symmetry relationship.

[0009] Furthermore, the step of completing the wafer orientation process according to the potential symmetry or approximate symmetry relationship includes: Within one or more regions where the mark point satisfies the potential symmetry or approximate symmetry relationship, corresponding local images are acquired, and template matching processing is performed synchronously to obtain the image coordinates of multiple mark points. Based on the process priors of the wafer, the direction of the connection between multiple mark points is constrained to satisfy a horizontal or vertical relationship, or a combination relationship. Based on the directional constraints of multiple mark points, the overall rotation angle of the wafer is calculated through consistency evaluation or the principle of minimum deviation. Simultaneously, the image coordinates of the wafer or its corresponding physical coordinate system are uniformly rotated and corrected according to the overall rotation angle to complete the wafer straightening process.

[0010] Furthermore, the step of determining the corresponding reference die and simultaneously constructing the corresponding initial global wafer coordinate system in the coordinate system after the wafer is uprighted includes: When an input reference layout is detected, at least one identifiable die is selected from the reference layout, and the geometric offset relationship of the die relative to the mark point is recorded simultaneously. After the wafer is detected to have completed the orientation process, the absolute position of the die in the orientation coordinate system is calculated according to the geometric offset relationship. Simultaneously, the die is defined as the reference die based on the absolute position, and the coordinates of the reference die are used as the reference point or origin of the wafer global coordinate system. Based on the row and column relationships of each die in the reference layout, the theoretical global coordinates of the remaining dies are derived accordingly, so as to construct the initial wafer global coordinate system.

[0011] Furthermore, the step of determining the corresponding reference die and simultaneously constructing the corresponding initial global wafer coordinate system in the coordinate system after the wafer is uprighted also includes: When no reference layout is detected, an identifiable die located within a stable periodic array region is selected on the wafer. Based on the periodic structure of the local region where the identifiable die is located, the main direction and row and column directions of the stable periodic array are estimated accordingly, and the global coordinate values ​​and indexing rules of the identifiable die are determined simultaneously. Based on the identifiable die, and according to the global coordinate values ​​and the indexing rules, the theoretical global coordinates of the remaining dies are derived according to the estimated period direction and period parameters, so as to construct a virtual reference layout and generate the initial wafer global coordinate system.

[0012] Furthermore, the step of performing sub-pixel-level fitting and error compensation on the initial wafer global coordinate system based on periodic structural features within several local fields of view to generate the corresponding target wafer global coordinate system includes: Within multiple local fields of view of the wafer, periodic structural features inside the corresponding MicroLED array or die are detected, and the periodic structural features are simultaneously subjected to precise positioning processing to obtain the corresponding local image coordinates. The local image coordinates are associated with their theoretical coordinates in the initial global coordinate system to form multiple sets of correspondences; Based on the multiple sets of correspondences, an overall error model of the wafer is constructed to fit translation, rotation, scaling and local distortion errors. Simultaneously, the initial global coordinate system is corrected according to the fitting results to generate the target global coordinate system.

[0013] Furthermore, the step of constructing a unified mapping relationship between image coordinates and device coordinates based on the target wafer global coordinate system includes: After obtaining the target global coordinate system, multiple sets of image coordinates of the wafer and the correspondence between the wafer global coordinates and device coordinates are collected. Based on the equipment's accuracy and application requirements, a rigid model or a weak affine model is selected as the mapping model, and the parameters of the mapping model are solved simultaneously to output the corresponding solution results. Based on the solution results, a unified mapping relationship between the image coordinates and the device coordinates is constructed.

[0014] The second aspect of the present invention proposes: A global coordinate system construction system for a MicroLED wafer, wherein the system comprises: The processing module is used to obtain the local image coordinates corresponding to each of the mark points based on the symmetrical or approximately symmetrical distribution characteristics of each mark point on the wafer; The calculation module is used to calculate the overall orientation of the wafer based on the prior orientation relationship that should be satisfied between each of the mark points, and simultaneously complete the wafer orientation process. The construction module is used to determine the corresponding reference die in the coordinate system after the wafer is uprighted, and to simultaneously construct the corresponding initial global coordinate system of the wafer. The compensation module is used to perform sub-pixel-level fitting and error compensation on the initial wafer global coordinate system based on the periodic structural features in several local fields of view, so as to generate the corresponding target wafer global coordinate system, and simultaneously construct a unified mapping relationship between image coordinates and device coordinates based on the target wafer global coordinate system.

[0015] Furthermore, the calculation module is specifically used for: At least one local field of view containing a mark point is selected on the wafer, and the geometric or texture features of the mark point are extracted simultaneously in the local field of view to generate a corresponding mark template; Based on the design rules, process specifications, or preset mark layout type of the wafer, the potential symmetric or approximately symmetric relationship of the mark points on the wafer is determined accordingly. The wafer is converted to its correct position based on the potential or approximate symmetry relationship.

[0016] Furthermore, the calculation module is specifically used for: Within one or more regions where the mark point satisfies the potential symmetry or approximate symmetry relationship, corresponding local images are acquired, and template matching processing is performed synchronously to obtain the image coordinates of multiple mark points. Based on the process priors of the wafer, the direction of the connection between multiple mark points is constrained to satisfy a horizontal or vertical relationship, or a combination relationship. Based on the directional constraints of multiple mark points, the overall rotation angle of the wafer is calculated through consistency evaluation or the principle of minimum deviation. Simultaneously, the image coordinates of the wafer or its corresponding physical coordinate system are uniformly rotated and corrected according to the overall rotation angle to complete the wafer straightening process.

[0017] Furthermore, the building module is specifically used for: When an input reference layout is detected, at least one identifiable die is selected from the reference layout, and the geometric offset relationship of the die relative to the mark point is recorded simultaneously. After the wafer is detected to have completed the orientation process, the absolute position of the die in the orientation coordinate system is calculated according to the geometric offset relationship. Simultaneously, the die is defined as the reference die based on the absolute position, and the coordinates of the reference die are used as the reference point or origin of the wafer global coordinate system. Based on the row and column relationships of each die in the reference layout, the theoretical global coordinates of the remaining dies are derived accordingly, so as to construct the initial wafer global coordinate system.

[0018] Furthermore, the building module is specifically used for: When no reference layout is detected, an identifiable die located within a stable periodic array region is selected on the wafer. Based on the periodic structure of the local region where the identifiable die is located, the main direction and row and column directions of the stable periodic array are estimated accordingly, and the global coordinate values ​​and indexing rules of the identifiable die are determined simultaneously. Based on the identifiable die, and according to the global coordinate values ​​and the indexing rules, the theoretical global coordinates of the remaining dies are derived according to the estimated period direction and period parameters, so as to construct a virtual reference layout and generate the initial wafer global coordinate system.

[0019] Furthermore, the compensation module is specifically used for: Within multiple local fields of view of the wafer, periodic structural features inside the corresponding MicroLED array or die are detected, and the periodic structural features are simultaneously subjected to precise positioning processing to obtain the corresponding local image coordinates. The local image coordinates are associated with their theoretical coordinates in the initial global coordinate system to form multiple sets of correspondences; Based on the multiple sets of correspondences, an overall error model of the wafer is constructed to fit translation, rotation, scaling and local distortion errors. Simultaneously, the initial global coordinate system is corrected according to the fitting results to generate the target global coordinate system.

[0020] Furthermore, the compensation module is specifically used for: After obtaining the target global coordinate system, multiple sets of image coordinates of the wafer and the correspondence between the wafer global coordinates and device coordinates are collected. Based on the equipment's accuracy and application requirements, a rigid model or a weak affine model is selected as the mapping model, and the parameters of the mapping model are solved simultaneously to output the corresponding solution results. Based on the solution results, a unified mapping relationship between the image coordinates and the device coordinates is constructed.

[0021] The third aspect of the present invention proposes: A computer includes a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor, when executing the computer program, implements the global coordinate system construction method for a MicroLED wafer as described above.

[0022] The fourth aspect of the present invention proposes: A readable storage medium having a computer program stored thereon, wherein the program, when executed by a processor, implements the global coordinate system construction method for a MicroLED wafer as described above.

[0023] Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention. Attached Figure Description

[0024] Figure 1 A flowchart illustrating the method for constructing a global coordinate system for a MicroLED wafer according to the first embodiment of the present invention; Figure 2 This is a structural block diagram of the global coordinate system construction system for MicroLED wafers provided in the third embodiment of the present invention.

[0025] The following detailed description, in conjunction with the accompanying drawings, will further illustrate the present invention. Detailed Implementation

[0026] To facilitate understanding of the present invention, a more complete description will be given below with reference to the accompanying drawings. Several embodiments of the invention are illustrated in the drawings. However, the invention can be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.

[0027] It should be noted that when a component is said to be "fixed to" another component, it can be directly on the other component or there may be an intervening component. When a component is said to be "connected to" another component, it can be directly connected to the other component or there may be an intervening component. The terms "vertical," "horizontal," "left," "right," and similar expressions used in this document are for illustrative purposes only.

[0028] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein in the specification of this invention is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. The term "and / or" as used herein includes any and all combinations of one or more of the associated listed items.

[0029] Please see Figure 1 The diagram shows a method for constructing a global coordinate system for a MicroLED wafer according to the first embodiment of the present invention. The method for constructing a global coordinate system for a MicroLED wafer provided in this embodiment can effectively avoid the problem of deviation accumulation and ensure the accuracy and long-term stability of wafer processing and inspection.

[0030] Specifically, this embodiment provides: A method for constructing a global coordinate system for a MicroLED wafer, wherein the method includes: Step S10: Based on the symmetrical or approximately symmetrical distribution characteristics of each mark point on the wafer, obtain the local image coordinates corresponding to each mark point; It is important to note that during the design and manufacturing process of MicroLED wafers, the marker points used for positioning follow the layout rules of central symmetry, axial symmetry, or row-column symmetry. This is a core process prerequisite in wafer manufacturing. Traditional coordinate system construction methods only treat marker points as isolated positioning anchors, failing to utilize their inherent symmetrical distribution characteristics. This makes them highly susceptible to positioning deviations due to process defects or imaging interference from individual marker points. This step fully utilizes the symmetrical / approximate symmetrical distribution characteristics of the marker points, selectively acquiring local images of the marker points to obtain their precise local image coordinates. This provides core anchor point data for subsequent wafer attitude calculations and, through the constraint of symmetry, avoids positioning error interference from individual marker points in advance, laying a reliable positioning foundation for the construction of the entire coordinate system.

[0031] Step S20: Based on the prior orientation relationship that should be satisfied between each of the mark points, calculate the overall orientation of the wafer and simultaneously complete the wafer orientation process; It's important to note that when MicroLED wafers are placed onto the equipment stage, rotational offset is unavoidable. The die array and mark point layout on the wafer are strictly arranged along its inherent horizontal and vertical principal directions. If the wafer's orientation isn't corrected first, the subsequently constructed coordinate system will have inherent rotational deviations, directly leading to global positioning errors. This step is based on the prior directional relationship between the mark points. Specifically, the process priori requirement that the lines connecting symmetrically distributed mark points should be strictly parallel or perpendicular to the wafer's principal direction (the row and column directions of the die array) accurately calculates the overall rotation angle of the wafer relative to the equipment's reference coordinate system. Then, through coordinate rotation transformation, the wafer is corrected, ensuring that the wafer's inherent principal direction is perfectly aligned with the horizontal and vertical axes of the equipment's reference coordinate system. This eliminates the rotational deviation caused by wafer placement at its source, providing a unified orientation reference for the subsequent determination of the reference die and the construction of the global coordinate system.

[0032] Step S30: In the coordinate system after the wafer is uprighted, determine the corresponding reference die and simultaneously construct the corresponding initial global wafer coordinate system; It's important to note that after the wafer is aligned correctly, rotational deviations are eliminated. At this point, it's necessary to determine the reference anchor point of the entire wafer's global coordinate system, also known as the reference die. This is the origin or reference point of the entire coordinate system. All dies on a MicroLED wafer are arranged in a regular, periodic array. Once the coordinates of the reference die and the row and column rules of the array are determined, the theoretical coordinates of all dies can be derived. In this step, under the unified coordinate system after alignment, the corresponding reference die is determined based on different scenarios with or without a reference layout. Then, using the reference die as the anchor point, and based on the row and column periodic relationship of the die array, the theoretical global coordinates of all remaining dies on the wafer are derived, thus constructing an initial wafer global coordinate system. This initial coordinate system already possesses the global coordinate framework of the wafer, clearly defining the theoretical position of each die, providing a basic framework for subsequent accuracy optimization.

[0033] Step S40: Based on the periodic structural features within several local fields of view, the initial wafer global coordinate system is fitted and error compensated at the sub-pixel level to generate the corresponding target wafer global coordinate system. Simultaneously, based on the target wafer global coordinate system, a unified mapping relationship between image coordinates and device coordinates is constructed.

[0034] It should be noted that the initial global coordinate system is only constructed based on the theoretical arrangement of the mark points and the reference die. It cannot cover the dimensional deviations, warping-induced local distortions, and array deformations that occur during wafer manufacturing. For micron-level MicroLED processes, these errors will directly lead to serious problems such as mass transfer failures and detection positioning deviations. At the same time, the constructed wafer global coordinate system must ultimately serve the processing equipment, and must achieve a precise mapping between the image coordinates acquired by the microscope, the wafer global coordinates, and the physical coordinates of the equipment's motion platform. This step fully leverages the core prior characteristics of MicroLED wafers, specifically the strictly periodic structure of the die array or pixel array. Within the local field of view of multiple different regions of the wafer, sub-pixel-level coordinates of the periodic structural features are accurately extracted. These actual coordinates are then correlated with the theoretical coordinates in the initial coordinate system to construct a global error model for the wafer. This model comprehensively fits and compensates for translation, rotation, scaling, and local distortion errors in the initial coordinate system, improving the accuracy of the coordinate system to the sub-pixel level and generating the final target wafer global coordinate system. Simultaneously, based on the target coordinate system, the mapping model parameters between image coordinates and device coordinates are solved, constructing a unified mapping relationship between the two. This allows the high-precision wafer global coordinate system to be directly applied to the entire process of equipment processing, inspection, and transfer, completing the closed loop of the entire coordinate system construction.

[0035] Second Embodiment Furthermore, the step of calculating the overall orientation of the wafer and simultaneously completing the wafer orientation process includes: At least one local field of view containing a mark point is selected on the wafer, and the geometric or texture features of the mark point are extracted simultaneously in the local field of view to generate a corresponding mark template; Based on the design rules, process specifications, or preset mark layout type of the wafer, the potential symmetric or approximately symmetric relationship of the mark points on the wafer is determined accordingly. The wafer is converted to its correct position based on the potential or approximate symmetry relationship.

[0036] It's important to note that accurate mark point identification is fundamental to wafer orientation calculations. MicroLED wafers have fixed geometric shapes (cross-shaped, square, circular, etc.) and texture features for their mark points. Generating standardized mark templates in advance is a prerequisite for rapid and accurate mark point identification across the entire wafer. This step selects a local field of view containing clear mark points, extracts their unique geometric or texture features, and generates corresponding matching templates. This allows for rapid location of all mark points during subsequent full-wafer scanning via template matching, and also filters out interference from pseudo-mark points caused by process defects and contaminants through feature matching, ensuring high accuracy in mark point identification.

[0037] The layout of marker points on MicroLED wafers is not random, but strictly follows the wafer design rules and process specifications. Common layout types include wafer-centric symmetry, top-bottom symmetry, left-right symmetry, and four-corner symmetry. These fixed symmetry relationships are inherent prerequisites in wafer manufacturing and are the core basis for subsequent wafer attitude calculations. This step, based on the wafer design documents, process specifications, or preset marker layout types, pre-determines the potential symmetry / approximate symmetry relationships between marker points. This is equivalent to setting strong constraints for subsequent marker point matching and attitude calculations, avoiding errors caused by irregular marker point matching. For example, for four-corner symmetrical marker points, the four marker points can be constrained to be symmetrically distributed in a rectangle, thereby filtering out incorrect identification results that do not conform to the symmetry relationship and further improving the reliability of marker point positioning.

[0038] After determining the symmetry constraints of the mark points, the overall rotation angle of the wafer can be calculated based on the position coordinates of multiple mark points that conform to the symmetry relationship, thus completing the wafer orientation process. This step transforms the prior symmetry distribution of the mark points into the actual operation of wafer orientation correction, ensuring that the wafer orientation process fully conforms to the inherent design rules of the wafer and fundamentally guarantees that the coordinate system after orientation is completely aligned with the inherent principal direction of the wafer.

[0039] Furthermore, the step of completing the wafer orientation process according to the potential symmetry or approximate symmetry relationship includes: Within one or more regions where the mark point satisfies the potential symmetry or approximate symmetry relationship, corresponding local images are acquired, and template matching processing is performed synchronously to obtain the image coordinates of multiple mark points. Based on the process priors of the wafer, the direction of the connection between multiple mark points is constrained to satisfy a horizontal or vertical relationship, or a combination relationship. Based on the directional constraints of multiple mark points, the overall rotation angle of the wafer is calculated through consistency evaluation or the principle of minimum deviation. Simultaneously, the image coordinates of the wafer or its corresponding physical coordinate system are uniformly rotated and corrected according to the overall rotation angle to complete the wafer straightening process.

[0040] It should be noted that after determining the potential symmetry relationship of the mark points, local images need to be acquired within the corresponding symmetric region. Template matching is then performed using a pre-generated mark template to accurately obtain the image coordinates of multiple mark points that conform to the symmetry relationship. The coordinate data of multiple mark points can effectively offset the positioning error of a single mark point. For example, local deformation of a single mark point due to process defects will not affect the overall orientation judgment of multiple mark points, providing sufficient and reliable sample data for subsequent rotation angle calculation.

[0041] In the process specifications of MicroLED wafers, the lines connecting symmetrically distributed mark points must be completely parallel or perpendicular to the row and column directions of the wafer die array. For example, the line connecting two vertically symmetrical mark points must be perpendicular to the row direction of the die array, and the line connecting two horizontally symmetrical mark points must be parallel to the column direction of the die array. This is a core process prior in wafer design and a core constraint for calculating wafer rotation angles. This step, through this strong process prior, constrains the direction of the lines connecting multiple mark points to satisfy a horizontal or vertical combination relationship. This is equivalent to setting a clear benchmark for calculating rotation angles, completely binding the wafer's main direction to the direction of the mark point connection lines, and avoiding benchmark deviations in rotation angle calculations.

[0042] Connecting multiple mark points yields multiple candidate rotation angles. This step uses consistency evaluation to select the rotation angle with the smallest deviation, or fits the optimal overall rotation angle using the least squares minimum deviation principle, minimizing the impact of the positioning error of a single mark point on the overall rotation angle. After obtaining the accurate overall rotation angle, a unified rotation transformation correction is performed on the image coordinates or corresponding physical coordinate system of the entire wafer, ensuring that the direction of the mark point connection on the wafer is completely aligned with the horizontal and vertical axes of the device reference coordinate system. This accurately completes the wafer alignment process, completely eliminating the rotation deviation caused by wafer placement, and providing a completely unified attitude reference for the subsequent determination of the reference die.

[0043] Furthermore, the step of determining the corresponding reference die and simultaneously constructing the corresponding initial global wafer coordinate system in the coordinate system after the wafer is uprighted includes: When an input reference layout is detected, at least one identifiable die is selected from the reference layout, and the geometric offset relationship of the die relative to the mark point is recorded simultaneously. After the wafer is detected to have completed the orientation process, the absolute position of the die in the orientation coordinate system is calculated according to the geometric offset relationship. Simultaneously, the die is defined as the reference die based on the absolute position, and the coordinates of the reference die are used as the reference point or origin of the wafer global coordinate system. Based on the row and column relationships of each die in the reference layout, the theoretical global coordinates of the remaining dies are derived accordingly, so as to construct the initial wafer global coordinate system.

[0044] It's important to note that the reference layout is typically the wafer's GDS design file and process layout diagram. This file clearly records the layout, dimensions, and cycle times of all dies, as well as the precise geometric offset between the dies and the mark point. This is known prior data for mass production. This step selects a distinctive and easily identifiable die from the reference layout as a candidate reference die. Simultaneously, it precisely records the geometric offset of this die relative to the mark point. Specifically, this means the lateral and longitudinal offsets between the origin of this die and the origin of the mark point in the wafer's design coordinate system. This offset relationship is fixed and will not change due to wafer rotation or translation, providing a core basis for subsequently calculating the absolute position of the reference die.

[0045] After the wafer is uprighted, the mark point has precise absolute coordinates in the uprighted coordinate system. The geometric offset relationship between the candidate reference die and the mark point is fixed and known. Therefore, the absolute position of the die in the uprighted coordinate system can be directly calculated by simple coordinate superposition, without having to perform a full scan of the entire wafer to find the reference die, which greatly improves the efficiency of reference determination. At the same time, the die is defined as the reference die, and its coordinates are set as the origin or reference point of the wafer's global coordinate system, which determines a unique reference anchor point for the entire coordinate system, ensuring the uniqueness and reproducibility of the coordinate system.

[0046] The reference layout clearly records the row and column periods, number of rows and columns, and arrangement rules of the die array. After determining the coordinates of the reference die, the theoretical global coordinates of all remaining dies on the wafer can be derived sequentially based on the row and column periods. For example, for the adjacent die to the right of the reference die, the horizontal coordinate increases by one row period, while the vertical coordinate remains unchanged. For the adjacent die below, the vertical coordinate increases by one column period, while the horizontal coordinate remains unchanged. And so on, the theoretical coordinate matrix of all dies on the entire wafer can be generated, thereby constructing a complete initial global coordinate system for the wafer. This coordinate system perfectly matches the wafer design layout, providing an accurate theoretical coordinate reference for subsequent error compensation.

[0047] Furthermore, the step of determining the corresponding reference die and simultaneously constructing the corresponding initial global wafer coordinate system in the coordinate system after the wafer is uprighted also includes: When no reference layout is detected, an identifiable die located within a stable periodic array region is selected on the wafer. Based on the periodic structure of the local region where the identifiable die is located, the main direction and row and column directions of the stable periodic array are estimated accordingly, and the global coordinate values ​​and indexing rules of the identifiable die are determined simultaneously. Based on the identifiable die, and according to the global coordinate values ​​and the indexing rules, the theoretical global coordinates of the remaining dies are derived according to the estimated period direction and period parameters, so as to construct a virtual reference layout and generate the initial wafer global coordinate system.

[0048] It should be noted that in the scenario without a reference layout, there are no known die layout rules. Therefore, it is necessary to first select an identifiable die within a stable periodic array region as a candidate benchmark. The stable periodic array region is usually the central region of the wafer. The die array in this region is complete, free of process defects, and has obvious periodic characteristics, which can provide reliable samples for subsequent array period estimation and avoid interference from incomplete or defective dies at the wafer edge on the array rule estimation.

[0049] The die array of a MicroLED wafer is a strictly two-dimensional periodic structure. Even without a reference layout, the main direction, row and column directions, and row and column periodic parameters of the array can be estimated through images of local areas using Fourier transform, autocorrelation algorithms, and other methods. These parameters are the core arrangement rules of the die array. At the same time, assuming that the wafer has been uprighted, the estimated row and column directions of the array are already aligned with the horizontal and vertical axes of the uprighted coordinate system. Therefore, the coordinates of the candidate reference die can be set as the origin of the global coordinate system, and the indexing rules of the array can be determined. Specifically, for example, with the reference die as die number (0,0), the row index increases to the right, and the column index increases downwards, providing a unified indexing rule for the coordinate derivation of all subsequent dies.

[0050] After determining the coordinates of the baseline die, the row and column period parameters of the array, and the indexing rules, the theoretical global coordinates of all remaining dies on the wafer can be derived sequentially, just like in scenarios with a reference layout. Based on these derived coordinates and array rules, a corresponding virtual reference layout is constructed. This virtual reference layout perfectly matches the actual array arrangement of the wafer, replacing the real design file, thereby completing the construction of the initial wafer global coordinate system. This allows the entire method to still be used normally in scenarios without a reference layout, greatly improving the adaptability and robustness of the method.

[0051] Furthermore, the step of performing sub-pixel-level fitting and error compensation on the initial wafer global coordinate system based on periodic structural features within several local fields of view to generate the corresponding target wafer global coordinate system includes: Within multiple local fields of view of the wafer, periodic structural features inside the corresponding MicroLED array or die are detected, and the periodic structural features are simultaneously subjected to precise positioning processing to obtain the corresponding local image coordinates. The local image coordinates are associated with their theoretical coordinates in the initial global coordinate system to form multiple sets of correspondences; Based on the multiple sets of correspondences, an overall error model of the wafer is constructed to fit translation, rotation, scaling and local distortion errors. Simultaneously, the initial global coordinate system is corrected according to the fitting results to generate the target global coordinate system.

[0052] It's important to note that a core characteristic of MicroLED wafers is the strict two-dimensional periodicity of both the overall die array arrangement and the pixel array within the die. These periodic structural feature points (such as pixel centers and die corners) are numerous and distributed across the entire wafer, providing denser and more precise positioning anchors than mark points. This step selects multiple local fields of view in different areas of the wafer, covering the center, edges, and corners, detecting periodic structural features within these fields. Then, sub-pixel level corner detection and centroid localization algorithms are used to precisely locate these features, obtaining sub-pixel level local image coordinates. These dense, high-precision feature coordinates provide ample sample data for subsequent error model construction, capturing both global and local errors in different areas of the wafer.

[0053] In the initial global coordinate system, each periodic structural feature point has a corresponding theoretical coordinate, while the actual image coordinate of the feature point is obtained through local field of view detection. By mapping the two one by one, multiple sets of "theoretical coordinates - actual coordinates" correspondences are formed. These correspondences directly reflect the error of the initial coordinate system. Specifically, for example, the deviation between the actual coordinates and the theoretical coordinates is the positioning error of the initial coordinate system at that position. Multiple sets of correspondences cover different areas of the wafer and can comprehensively reflect the overall translation, rotation, and scale errors of the wafer, as well as local distortion errors.

[0054] Based on multiple sets of "theoretical-actual" coordinate correspondences, a global error model for the wafer can be constructed. This error model can cover all common error types of wafers, including translation error, rotation error, overall scale scaling error, and local nonlinear distortion error caused by wafer warpage and process deformation. Through algorithms such as least squares fitting and thin plate spline fitting, the optimal parameters of the error model are solved. Based on the solved error model, the initial global coordinate system is comprehensively corrected to compensate for all global and local errors. The final target global coordinate system has a positioning accuracy that can reach the sub-pixel level, fully meeting the ultra-high precision positioning requirements of MicroLED mass transfer, micron-level detection and repair processes.

[0055] Furthermore, the step of constructing a unified mapping relationship between image coordinates and device coordinates based on the target wafer global coordinate system includes: After obtaining the target global coordinate system, multiple sets of image coordinates of the wafer and the correspondence between the wafer global coordinates and device coordinates are collected. Based on the equipment's accuracy and application requirements, a rigid model or a weak affine model is selected as the mapping model, and the parameters of the mapping model are solved simultaneously to output the corresponding solution results. Based on the solution results, a unified mapping relationship between the image coordinates and the device coordinates is constructed.

[0056] It's important to note that the target global coordinate system is constructed based on images acquired through a microscope. However, during actual processing, the equipment needs to precisely move the processing head and inspection head to the target die using the physical coordinates of the motion platform. Therefore, it's essential to establish the correspondence between the microscope image coordinates, the wafer global coordinates, and the physical coordinates of the equipment's motion platform. This step involves acquiring multiple mark points or feature points at different locations on the wafer using the mobile device platform. Simultaneously, it records the image coordinates of each point under the microscope, its wafer global coordinates in the target global coordinate system, and the physical coordinates of the equipment platform, forming multiple sets of corresponding sample data. This provides sufficient samples for subsequent mapping model solving.

[0057] Different equipment precision and application scenarios require different coordinate mappings: For high-precision motion platforms, there is no scaling or shear deformation, only translation and rotation. In this case, a rigid transformation model is sufficient, offering fewer model parameters, faster solution speed, and high robustness. For equipment or scenarios with slight scaling or shear deformation, a weak affine transformation model is needed to cover more error types and improve mapping accuracy. This step selects the most suitable mapping model based on the actual equipment precision and application requirements. Then, based on the previously collected sets of corresponding coordinate data, the optimal parameters of the mapping model are solved using the least squares algorithm to obtain accurate model solution results.

[0058] After obtaining the optimal parameters of the mapping model, a precise mapping relationship between image coordinates and device coordinates is established. Through this mapping relationship, the target position in the wafer global coordinate system can be directly converted into the physical coordinates of the device motion platform, enabling the device to move precisely to the target position. Alternatively, the physical coordinates collected by the device can be converted into image coordinates and wafer global coordinates, achieving closed-loop verification of the positioning results. This allows the high-precision target wafer global coordinate system to be truly applied to the entire manufacturing process of MicroLED wafers, completing the final closed loop of the entire coordinate system construction method.

[0059] Please see Figure 2 The third embodiment of the present invention provides: A global coordinate system construction system for a MicroLED wafer, wherein the system comprises: The processing module is used to obtain the local image coordinates corresponding to each of the mark points based on the symmetrical or approximately symmetrical distribution characteristics of each mark point on the wafer; The calculation module is used to calculate the overall orientation of the wafer based on the prior orientation relationship that should be satisfied between each of the mark points, and simultaneously complete the wafer orientation process. The construction module is used to determine the corresponding reference die in the coordinate system after the wafer is uprighted, and to simultaneously construct the corresponding initial global coordinate system of the wafer. The compensation module is used to perform sub-pixel-level fitting and error compensation on the initial wafer global coordinate system based on the periodic structural features in several local fields of view, so as to generate the corresponding target wafer global coordinate system, and simultaneously construct a unified mapping relationship between image coordinates and device coordinates based on the target wafer global coordinate system.

[0060] Furthermore, the calculation module is specifically used for: At least one local field of view containing a mark point is selected on the wafer, and the geometric or texture features of the mark point are extracted simultaneously in the local field of view to generate a corresponding mark template; Based on the design rules, process specifications, or preset mark layout type of the wafer, the potential symmetric or approximately symmetric relationship of the mark points on the wafer is determined accordingly. The wafer is converted to its correct position based on the potential or approximate symmetry relationship.

[0061] Furthermore, the calculation module is specifically used for: Within one or more regions where the mark point satisfies the potential symmetry or approximate symmetry relationship, corresponding local images are acquired, and template matching processing is performed synchronously to obtain the image coordinates of multiple mark points. Based on the process priors of the wafer, the direction of the connection between multiple mark points is constrained to satisfy a horizontal or vertical relationship, or a combination relationship. Based on the directional constraints of multiple mark points, the overall rotation angle of the wafer is calculated through consistency evaluation or the principle of minimum deviation. Simultaneously, the image coordinates of the wafer or its corresponding physical coordinate system are uniformly rotated and corrected according to the overall rotation angle to complete the wafer straightening process.

[0062] Furthermore, the building module is specifically used for: When an input reference layout is detected, at least one identifiable die is selected from the reference layout, and the geometric offset relationship of the die relative to the mark point is recorded simultaneously. After the wafer is detected to have completed the orientation process, the absolute position of the die in the orientation coordinate system is calculated according to the geometric offset relationship. Simultaneously, the die is defined as the reference die based on the absolute position, and the coordinates of the reference die are used as the reference point or origin of the wafer global coordinate system. Based on the row and column relationships of each die in the reference layout, the theoretical global coordinates of the remaining dies are derived accordingly, so as to construct the initial wafer global coordinate system.

[0063] Furthermore, the building module is specifically used for: When no reference layout is detected, an identifiable die located within a stable periodic array region is selected on the wafer. Based on the periodic structure of the local region where the identifiable die is located, the main direction and row and column directions of the stable periodic array are estimated accordingly, and the global coordinate values ​​and indexing rules of the identifiable die are determined simultaneously. Based on the identifiable die, and according to the global coordinate values ​​and the indexing rules, the theoretical global coordinates of the remaining dies are derived according to the estimated period direction and period parameters, so as to construct a virtual reference layout and generate the initial wafer global coordinate system.

[0064] Furthermore, the compensation module is specifically used for: Within multiple local fields of view of the wafer, periodic structural features inside the corresponding MicroLED array or die are detected, and the periodic structural features are simultaneously subjected to precise positioning processing to obtain the corresponding local image coordinates. The local image coordinates are associated with their theoretical coordinates in the initial global coordinate system to form multiple sets of correspondences; Based on the multiple sets of correspondences, an overall error model of the wafer is constructed to fit translation, rotation, scaling and local distortion errors. Simultaneously, the initial global coordinate system is corrected according to the fitting results to generate the target global coordinate system.

[0065] Furthermore, the compensation module is specifically used for: After obtaining the target global coordinate system, multiple sets of image coordinates of the wafer and the correspondence between the wafer global coordinates and device coordinates are collected. Based on the equipment's accuracy and application requirements, a rigid model or a weak affine model is selected as the mapping model, and the parameters of the mapping model are solved simultaneously to output the corresponding solution results. Based on the solution results, a unified mapping relationship between the image coordinates and the device coordinates is constructed.

[0066] The fourth embodiment of the present invention provides a computer, including a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein the processor executes the computer program to implement the global coordinate system construction method for MicroLED wafers as described above.

[0067] The fifth embodiment of the present invention provides a readable storage medium storing a computer program thereon, wherein the program, when executed by a processor, implements the global coordinate system construction method for MicroLED wafers as described above.

[0068] In summary, the global coordinate system construction method and system for MicroLED wafers provided in the above embodiments of the present invention can effectively avoid the problem of deviation accumulation and ensure the accuracy and long-term stability of wafer processing and inspection.

[0069] It should be noted that the above modules can be functional modules or program modules, and can be implemented through software or hardware. For modules implemented through hardware, the above modules can reside in the same processor; or the above modules can be located in different processors in any combination.

[0070] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as a sequenced list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by, or in conjunction with, an instruction execution system, apparatus, or device (such as a computer-based system, a processor-including system, or other system that can fetch and execute instructions from, an instruction execution system, apparatus, or device). For the purposes of this specification, "computer-readable medium" can be any means that can contain, store, communicate, propagate, or transmit programs for use by, or in conjunction with, an instruction execution system, apparatus, or device.

[0071] More specific examples of computer-readable media (a non-exhaustive list) include: electrical connections (electronic devices) having one or more wires, portable computer disk drives (magnetic devices), random access memory (RAM), read-only memory (ROM), erasable and editable read-only memory (EPROM or flash memory), fiber optic devices, and portable optical disc read-only memory (CDROM). Furthermore, computer-readable media can even be paper or other suitable media on which the program can be printed, because the program can be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, interpreting, or otherwise processing as necessary, and then stored in computer memory.

[0072] It should be understood that various parts of the present invention can be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, multiple steps or methods can be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, it can be implemented using any one or a combination of the following techniques known in the art: discrete logic circuits having logic gates for implementing logical functions on data signals, application-specific integrated circuits (ASICs) having suitable combinational logic gates, programmable gate arrays (PGAs), field-programmable gate arrays (FPGAs), etc.

[0073] In the description of this specification, references to terms such as "one embodiment," "some embodiments," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0074] The embodiments described above are merely illustrative of several implementations of the present invention, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of the invention. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of the present invention, and these modifications and improvements all fall within the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be determined by the appended claims.

Claims

1. A method for constructing a global coordinate system for a MicroLED wafer, characterized in that, The method includes: Based on the symmetrical or approximately symmetrical distribution characteristics of each mark point on the wafer, the local image coordinates corresponding to each mark point are obtained; Based on the prior directional relationship that should be satisfied between each of the mark points, the overall orientation of the wafer is calculated, and the wafer orientation process is completed simultaneously. Under the coordinate system after the wafer is uprighted, the corresponding reference die is determined, and the corresponding initial global coordinate system of the wafer is constructed simultaneously. Based on the periodic structural features within several local fields of view, the initial wafer global coordinate system is fitted and error compensated at the sub-pixel level to generate the corresponding target wafer global coordinate system. Simultaneously, based on the target wafer global coordinate system, a unified mapping relationship between image coordinates and device coordinates is constructed.

2. The method for constructing a global coordinate system for a MicroLED wafer according to claim 1, characterized in that, The steps of calculating the overall orientation of the wafer and simultaneously completing the wafer orientation process include: At least one local field of view containing a mark point is selected on the wafer, and the geometric or texture features of the mark point are extracted simultaneously in the local field of view to generate a corresponding mark template; Based on the design rules, process specifications, or preset mark layout type of the wafer, the potential symmetric or approximately symmetric relationship of the mark points on the wafer is determined accordingly. The wafer is converted to its correct position based on the potential or approximate symmetry relationship.

3. The method for constructing a global coordinate system for a MicroLED wafer according to claim 2, characterized in that, The step of completing the wafer orientation process according to the potential symmetry or approximate symmetry relationship includes: Within one or more regions where the mark point satisfies the potential symmetry or approximate symmetry relationship, corresponding local images are acquired, and template matching processing is performed synchronously to obtain the image coordinates of multiple mark points. Based on the process priors of the wafer, the direction of the connection between multiple mark points is constrained to satisfy a horizontal or vertical relationship, or a combination relationship. Based on the directional constraints of multiple mark points, the overall rotation angle of the wafer is calculated through consistency evaluation or the principle of minimum deviation. Simultaneously, the image coordinates of the wafer or its corresponding physical coordinate system are uniformly rotated and corrected according to the overall rotation angle to complete the wafer straightening process.

4. The method for constructing a global coordinate system for a MicroLED wafer according to claim 1, characterized in that, The steps of determining the corresponding reference die and simultaneously constructing the corresponding initial global wafer coordinate system in the coordinate system after the wafer is uprighted include: When an input reference layout is detected, at least one identifiable die is selected from the reference layout, and the geometric offset relationship of the die relative to the mark point is recorded simultaneously. After the wafer is detected to have completed the orientation process, the absolute position of the die in the orientation coordinate system is calculated according to the geometric offset relationship. Simultaneously, the die is defined as the reference die based on the absolute position, and the coordinates of the reference die are used as the reference point or origin of the wafer global coordinate system. Based on the row and column relationships of each die in the reference layout, the theoretical global coordinates of the remaining dies are derived accordingly, so as to construct the initial wafer global coordinate system.

5. The method for constructing a global coordinate system for a MicroLED wafer according to claim 1, characterized in that, The step of determining the corresponding reference die and simultaneously constructing the corresponding initial global wafer coordinate system in the coordinate system after the wafer is uprighted also includes: When no reference layout is detected, an identifiable die located within a stable periodic array region is selected on the wafer. Based on the periodic structure of the local region where the identifiable die is located, the main direction and row and column directions of the stable periodic array are estimated accordingly, and the global coordinate values ​​and indexing rules of the identifiable die are determined simultaneously. Based on the identifiable die, and according to the global coordinate values ​​and the indexing rules, the theoretical global coordinates of the remaining dies are derived according to the estimated period direction and period parameters, so as to construct a virtual reference layout and generate the initial wafer global coordinate system.

6. The method for constructing a global coordinate system for a MicroLED wafer according to claim 1, characterized in that, The step of performing sub-pixel-level fitting and error compensation on the initial wafer global coordinate system based on periodic structural features within several local fields of view to generate the corresponding target wafer global coordinate system includes: Within multiple local fields of view of the wafer, periodic structural features inside the corresponding MicroLED array or die are detected, and the periodic structural features are simultaneously subjected to precise positioning processing to obtain the corresponding local image coordinates. The local image coordinates are associated with their theoretical coordinates in the initial global coordinate system to form multiple sets of correspondences; Based on the multiple sets of correspondences, an overall error model of the wafer is constructed to fit translation, rotation, scaling and local distortion errors. Simultaneously, the initial global coordinate system is corrected according to the fitting results to generate the target global coordinate system.

7. The method for constructing a global coordinate system for a MicroLED wafer according to claim 1, characterized in that, The step of constructing a unified mapping relationship between image coordinates and device coordinates based on the target wafer global coordinate system includes: After obtaining the target global coordinate system, multiple sets of image coordinates of the wafer and the correspondence between the wafer global coordinates and device coordinates are collected. Based on the equipment's accuracy and application requirements, a rigid model or a weak affine model is selected as the mapping model, and the parameters of the mapping model are solved simultaneously to output the corresponding solution results. Based on the solution results, a unified mapping relationship between the image coordinates and the device coordinates is constructed.

8. A global coordinate system construction system for a MicroLED wafer, characterized in that, The system includes: The processing module is used to obtain the local image coordinates corresponding to each of the mark points based on the symmetrical or approximately symmetrical distribution characteristics of each mark point on the wafer; The calculation module is used to calculate the overall orientation of the wafer based on the prior orientation relationship that should be satisfied between each of the mark points, and simultaneously complete the wafer orientation process. The construction module is used to determine the corresponding reference die in the coordinate system after the wafer is uprighted, and to simultaneously construct the corresponding initial global coordinate system of the wafer. The compensation module is used to perform sub-pixel-level fitting and error compensation on the initial wafer global coordinate system based on the periodic structural features in several local fields of view, so as to generate the corresponding target wafer global coordinate system, and simultaneously construct a unified mapping relationship between image coordinates and device coordinates based on the target wafer global coordinate system.

9. A computer comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that, When the processor executes the computer program, it implements the global coordinate system construction method for MicroLED wafers as described in any one of claims 1 to 7.

10. A readable storage medium having a computer program stored thereon, characterized in that, When executed by a processor, the program implements the global coordinate system construction method for MicroLED wafers as described in any one of claims 1 to 7.

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