Pixel circuit, driving method thereof and display panel

Abstract

Embodiments of the present application disclose a pixel circuit, a driving method thereof and a display panel. The pixel circuit comprises a driving module, a signal providing end, a compensation module and a coupling module. The compensation module is configured to compensate threshold voltage of the driving module in a compensation stage. The signal providing end is configured to provide a fixed voltage to the coupling module in an initialization stage, and provide a data voltage to the coupling module in a data writing stage. The coupling module is configured to couple a voltage containing data voltage information to a control end of the driving module through the compensation module in the data writing stage. The data writing stage is later than the compensation stage. The scheme is beneficial to improving the difference in display brightness, improving the uniformity of display quality and improving display quality.

Description

[0001] This application is a divisional application of application number 202311282413.9, filed on 2023-09-28. Technical Field

[0002] This invention relates to the field of display technology, and more particularly to a pixel circuit, its driving method, and a display panel. Background Technology

[0003] With the continuous development of display technology, people have increasingly higher requirements for display quality.

[0004] Display panels typically include multiple pixel circuits, each containing a driving transistor that generates a driving signal to drive the light-emitting element to emit light. However, existing display panels suffer from uneven display, severely impacting display quality. Summary of the Invention

[0005] This invention provides a pixel circuit, its driving method, and a display panel to improve display quality.

[0006] According to one aspect of the present invention, a pixel circuit is provided, comprising: a driving module, a signal providing terminal, a compensation module, and a coupling module; The compensation module is used to compensate the threshold voltage of the drive module during the compensation phase. The signal providing terminal provides a fixed voltage to the coupling module during the initialization phase and a data voltage to the coupling module during the data writing phase. The coupling module is used to couple the voltage containing the data voltage information to the control terminal of the driving module via the compensation module during the data writing phase. The data writing phase is later than the compensation phase.

[0007] According to another aspect of the present invention, a pixel circuit is provided, comprising: a driving module, a signal providing terminal, a compensation module, and a coupling module; The compensation module is connected between the control terminal and the first terminal of the drive module, and the compensation module is used to compensate the threshold voltage of the drive module. The coupling module is connected between the first end of the drive module and the signal providing end. The signal providing end is used to provide a fixed voltage and a data voltage. The coupling module is used to couple the voltage containing the data voltage information to the control end of the drive module via the compensation module.

[0008] According to another aspect of the present invention, a pixel circuit is provided, comprising: a driving module, a voltage writing module, a compensation module, and a coupling module; The compensation module is connected between the control terminal and the first terminal of the drive module, and the compensation module is used to compensate the threshold voltage of the drive module. The coupling module is connected between the first end of the driving module and the voltage writing module. The voltage writing module is used to output a fixed voltage to the coupling module and to output a data voltage to the coupling module. The coupling module is used to couple the voltage containing the data voltage information to the control end of the driving module via the compensation module.

[0009] According to another aspect of the present invention, a pixel circuit is provided, comprising: a driving module, a data writing module, a first initialization module, a compensation module, and a coupling module; The compensation module is connected between the control terminal and the first terminal of the drive module, and the compensation module is used to compensate the threshold voltage of the drive module. The data writing module and the first initialization module are connected to the first node; The coupling module is connected between the first end of the driving module and the first node. The first initialization module is used to transmit a fixed voltage to the coupling module. The coupling module is used to couple the voltage containing the data voltage information transmitted by the data writing module to the control end of the driving module via the compensation module.

[0010] According to another aspect of the present invention, a method for driving a pixel circuit is provided, comprising: During the initialization phase, a fixed voltage is provided to the coupling module; During the compensation phase, the control compensation module compensates for the threshold voltage of the drive module; During the data writing phase, a data voltage is provided to the coupling module, and the coupling module is controlled to couple the voltage containing the data voltage information to the control terminal of the drive module via the compensation module.

[0011] The technical solution provided by this invention sets the data writing stage later than the compensation stage, so that the threshold compensation and data writing of the driving module are not performed simultaneously. Threshold compensation is performed before writing data voltage to the control terminal of the driving module, so that the compensation stage and the data writing stage do not affect each other. Thus, the threshold compensation time is not affected by the data writing stage. Even at high refresh rates, the threshold voltage of the driving module can be fully compensated, thereby reducing the differences in driving module characteristics corresponding to different pixels. This is beneficial to improving the difference in display brightness and enhancing the uniformity of display quality.

[0012] It should be understood that the description in this section is not intended to identify key or essential features of the embodiments of the present invention, nor is it intended to limit the scope of the invention. Other features of the invention will become readily apparent from the following description. Attached Figure Description

[0013] To more clearly illustrate the technical solutions in the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0014] Figure 1 This is a schematic diagram of the signal flow of a pixel circuit provided in an embodiment of the present invention; Figure 2 This is a schematic diagram of the signal flow of another pixel circuit provided in an embodiment of the present invention; Figure 3 This is a schematic diagram of the signal flow of another pixel circuit provided in an embodiment of the present invention; Figure 4 This is a schematic diagram of a pixel circuit provided in an embodiment of the present invention; Figure 5 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention; Figure 6 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention; Figure 7 A schematic diagram of the driving timing of a pixel circuit provided in an embodiment of the present invention; Figure 8 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention; Figure 9 A schematic diagram of the driving timing of another pixel circuit provided in an embodiment of the present invention; Figure 10 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention; Figure 11 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention; Figure 12 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention; Figure 13 A schematic diagram of the driving timing of another pixel circuit provided in an embodiment of the present invention; Figure 14 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention; Figure 15A schematic diagram of the driving timing of another pixel circuit provided in an embodiment of the present invention; Figure 16 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention; Figure 17 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention; Figure 18 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention; Figure 19 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention; Figure 20 A schematic diagram of the driving timing of another pixel circuit provided in an embodiment of the present invention; Figure 21 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention; Figure 22 A schematic diagram of the driving timing of another pixel circuit provided in an embodiment of the present invention; Figure 23 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention; Figure 24 A schematic diagram of the driving timing of another pixel circuit provided in an embodiment of the present invention; Figure 25 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention; Figure 26 A schematic diagram of the driving timing of another pixel circuit provided in an embodiment of the present invention; Figure 27 A schematic diagram of the driving timing of another pixel circuit provided in an embodiment of the present invention; Figure 28 A flowchart illustrating a pixel circuit driving method provided in an embodiment of the present invention; Figure 29 A flowchart of another pixel circuit driving method provided in an embodiment of the present invention; Figure 30 A flowchart of another pixel circuit driving method provided in an embodiment of the present invention; Figure 31 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention. Detailed Implementation

[0015] To enable those skilled in the art to better understand the present invention, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort should fall within the scope of protection of the present invention.

[0016] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this invention are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of the invention described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover a non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0017] As described in the background section, existing display panels suffer from poor display quality. The inventors have discovered that this problem stems from the fact that the driving transistors in the pixel circuits exhibit threshold voltage drift due to their inherent characteristics. Different pixel circuits exhibit varying degrees of threshold voltage drift, leading to differences in driving current and consequently, uneven display performance, thus reducing display uniformity. Existing technologies typically employ threshold compensation to mitigate the impact of threshold voltage drift in the driving transistors. However, the threshold compensation time in existing technologies is relatively short, insufficient to fully compensate the threshold voltage of the driving transistors, or potential coupling may cause compensation losses, resulting in poor overall compensation effectiveness and persistent issues such as poor brightness uniformity and severe image retention.

[0018] To address the above problems, the present invention provides a pixel circuit. Figure 1 This is a schematic diagram of the signal flow of a pixel circuit provided in an embodiment of the present invention, wherein, Figure 1 This only shows the signal flow between modules and does not represent the connection relationship. (Reference) Figure 1 The pixel circuit provided in this embodiment of the invention includes a driving module 110, a signal providing terminal, a compensation module 130, and a coupling module 140; The compensation module 130 is used to compensate the threshold voltage Vth1 of the drive module 110 during the compensation phase. The signal providing end provides a fixed voltage Vcom to the coupling module 140 during the initialization phase and a data voltage Vdata to the coupling module 140 during the data writing phase. The coupling module 140 is used to couple the voltage containing the data voltage Vdata information to the control end of the drive module 110 via the compensation module 130 during the data writing phase. The data writing phase is later than the compensation phase.

[0019] Specifically, the operation of the pixel circuit provided in this embodiment includes at least a compensation stage and a data writing stage.

[0020] During the compensation phase, the signal providing terminal provides a fixed voltage Vcom to the first terminal of the coupling module 140 to keep the voltage at the first terminal of the coupling module 140 constant. The compensation module 130 transmits the voltage at the first terminal of the drive module 110 to the control terminal of the drive module. The drive module 110 generates a current flowing from its first terminal to its second terminal until the voltage difference between the control terminal and the second terminal of the drive module 110 equals the threshold voltage Vth of the drive module 110, at which point the drive module 110 is turned off. The second terminal of the coupling module 140 stores a voltage associated with the threshold voltage Vth of the drive module 110, and the compensation module 130 transmits this voltage to the control terminal of the drive module 110, making the voltage at the control terminal of the drive module 110 the voltage associated with its threshold voltage Vth, thus achieving threshold compensation for the drive module 110.

[0021] During the data writing phase, the signal providing terminal supplies a data voltage Vdata to the first terminal of the coupling module 140. The voltage at the first terminal of the coupling module 140 transitions from a fixed voltage Vcom to the data voltage Vdata. The coupling module 140 then couples the voltage containing the data voltage Vdata information to the control terminal of the drive module 110 via the compensation module 130, thus associating the voltage at the control terminal of the drive module 110 with the data voltage Vdata, thereby achieving data writing. The voltage containing the data voltage Vdata information can be the difference between the data voltage Vdata and the fixed voltage Vcom.

[0022] In this embodiment, the data writing phase follows the compensation phase. That is, threshold compensation for the driving module and data writing are not performed simultaneously. Threshold compensation is performed before writing data voltage to the driving module control terminal, ensuring that the compensation phase and the data writing phase do not interfere with each other. This means that the threshold compensation time is unaffected by the data writing phase, allowing the threshold voltage of the driving module to be fully compensated even at high refresh rates. This reduces the differences in driving module characteristics for different pixels, thereby improving display brightness differences and enhancing the uniformity of display quality.

[0023] Furthermore, in this embodiment, the start time of the data writing phase is later than the end time of the compensation phase, which allows the data writing phase and the compensation phase to be completely separated and do not affect each other, thereby making the threshold compensation time not limited by the row time.

[0024] Figure 2 This is a schematic diagram of the signal flow of another pixel circuit provided in an embodiment of the present invention, with reference to... Figure 2 Based on the above technical solution, the pixel circuit may optionally include a second initialization module 180. The second initialization module 180 is used to control the first end of the driving module 110 to discharge through the driving module 110 and the second initialization module 180 during the compensation phase. The compensation module 130 is used to compensate the threshold voltage Vth of the driving module 110 according to the voltage after the first end of the driving module 110 is discharged during the compensation phase.

[0025] The second initialization module 180 is turned on during the compensation phase, providing a discharge path for the discharge of the drive module 110. Specifically, the control terminal of the drive module 110 is connected to the first terminal, and the first terminal of the drive module 110 is discharged through the drive module 110 and the second initialization module 180 until the voltage difference between the control terminal and the second terminal of the drive module 110 is equal to the threshold voltage Vth of the drive module 110. Then, the drive module 110 is turned off, completing the threshold voltage compensation of the drive module 110.

[0026] Continue to refer to Figure 2 The pixel circuit also includes a light-emitting module 150, and the second initialization module 180 is further configured to transmit an initialization voltage Vref to the light-emitting module 150 at least during the initialization phase, so as to initialize the residual voltage on the light-emitting module 150.

[0027] Figure 3 This is a schematic diagram of the signal flow of another pixel circuit provided in an embodiment of the present invention, with reference to... Figure 3 Based on the above technical solution, optionally, the pixel circuit further includes a first light-emitting control module 161 and a second light-emitting control module 162. The first light-emitting control module 161 is used to transmit the first power supply voltage VDD to the first terminal of the driving module 110 during the initialization phase and the light-emitting phase, and to stop transmitting the first power supply voltage VDD to the first terminal of the driving module 110 during the compensation phase, so that the voltage stored at the first terminal of the driving module 110 can be discharged through the driving module 110 and the second initialization module 180.

[0028] The second light-emitting control module 162 is used to transmit the voltage at the first terminal of the driving module 110 to the second initialization module 180 for discharge during the compensation phase; the second light-emitting control module 162 is also used to transmit the driving current I generated by the driving module 110 to the light-emitting module 150 during the light-emitting phase to drive the light-emitting module 150 to emit light.

[0029] In another optional embodiment provided by the present invention Figure 4 This is a schematic diagram of a pixel circuit provided in an embodiment of the present invention, with reference to... Figure 4 The pixel circuit provided in this embodiment includes a driving module 110, a signal providing terminal, a compensation module 130, and a coupling module 140. The compensation module 130 is connected between the control terminal G and the first terminal D of the driving module 110, and is used to compensate the threshold voltage Vth of the driving module 110. The coupling module 140 is connected between the first terminal D of the driving module 110 and the signal providing terminal. The signal providing terminal is used to provide a fixed voltage Vcom and a data voltage Vdata. The coupling module 140 is used to couple the voltage containing the data voltage Vdata information to the control terminal G of the driving module 110 via the compensation module 130.

[0030] by Figure 4 Taking the pixel circuit shown as an example, the working process of the pixel circuit includes at least an initialization stage, a compensation stage, a data writing stage, and a light emission stage.

[0031] During the initialization phase, the control compensation module 130 is turned on, and the first power supply voltage VDD initializes the first terminal D and the control terminal G of the drive module 110. At the same time, the signal providing terminal provides a fixed voltage Vcom to the first terminal of the coupling module 140 to initialize the first terminal of the coupling module 140.

[0032] During the compensation phase, the compensation module 130 remains continuously on, connecting the control terminal G and the first terminal D of the drive module 110. Under the influence of the first power supply voltage VDD, the drive module 110 generates a current flowing from its first terminal D to its second terminal S. The current continues until the voltage difference between the control terminal G and the second terminal S of the drive module 110 equals the threshold voltage Vth of the drive module 110. At this point, the drive module 110 is turned off. Therefore, the voltage at the control terminal G of the drive module 110 is associated with its threshold voltage Vth, thus achieving threshold compensation for the drive module 110. During this process, the signal providing terminal continues to provide a fixed voltage Vcom.

[0033] During the data writing phase, the signal providing terminal provides a data voltage Vdata to the first terminal of the coupling module 140. The voltage at the first terminal of the coupling module 140 changes from a fixed voltage Vcom to the data voltage Vdata. The coupling module 140 couples the voltage associated with the data voltage Vdata to the control terminal G of the drive module 110 via the compensation module 130, so that the voltage at the control terminal G of the drive module 110 is associated with the data voltage Vdata, thereby realizing data writing.

[0034] During the light-emitting stage, the driving module 110 generates a driving current based on the voltage of its control terminal G, driving the light-emitting module 150 to emit light.

[0035] The technical solution provided by this invention provides a compensation module between the control terminal and the first terminal of the driving module. During the compensation phase, the compensation module is turned on, and it compensates the threshold voltage of the driving module based on the voltage at the first terminal after discharge. During the data writing phase, the voltage transmitted from the control signal providing terminal to the first terminal of the coupling module changes from a fixed voltage to a data voltage. This data voltage is then coupled to the control terminal of the driving module via the compensation module, thus writing the data voltage. In this solution, since threshold compensation and data writing are not performed simultaneously, threshold compensation is performed before writing the data voltage to the control terminal of the driving module. This ensures that the threshold compensation phase and the data writing phase are independent of each other, and the threshold compensation time is unaffected by the data writing phase. Even at high refresh rates, the threshold voltage of the driving module can be fully compensated, thereby reducing the differences in driving module characteristics for different pixels. This, in turn, helps improve display brightness differences and enhances the uniformity of display quality.

[0036] Continue to refer to Figure 4 Optionally, the pixel circuit provided in this embodiment further includes a light-emitting control module 160. The light-emitting control module 160, the driving module 110, and the light-emitting module 150 are connected between the first power supply voltage terminal and the second power supply voltage terminal. The light-emitting control module 160 can be used to disconnect the connection between the first terminal D of the driving module 110 and the first power supply voltage terminal during the compensation phase, so that the voltage of the first terminal D of the driving module 110 can be discharged through the driving module 110. Of course, in other embodiments, the light-emitting control module 160 may not be provided between the first terminal D of the driving module 110 and the first power supply voltage terminal. The voltage of the first terminal D of the driving module 110 can be controlled by controlling whether the first power supply voltage terminal is connected to the first power supply voltage VDD, which can achieve the same effect.

[0037] Optionally, the pixel circuit further includes a second initialization module 180, which is connected between the initialization signal line and the first terminal of the light-emitting module 150, and is used to initialize the potential of the first terminal of the light-emitting module 150. During the compensation phase, the second initialization module 180 is turned on to provide a discharge path for the first terminal D of the driving module 110.

[0038] Specifically, the second initialization module 180 transmits the initialization voltage Vref to the first terminal of the light-emitting module 150 during the initialization phase to initialize the potential of the first terminal of the light-emitting module 150. The initialization voltage Vref is lower than the starting voltage of the light-emitting module 150; for example, the initialization voltage Vref can be negative. During the compensation phase, the second initialization module 180 and the compensation module 130 remain in a conducting state. The control terminal G of the driving module 110 is connected to the first terminal D. The voltage at the first terminal D of the driving module 110 is discharged through the driving module 110 and the second initialization module 180 until the voltage between the control terminal G and the first terminal D of the driving module 110 is Vref + Vth. At this point, the driving module 110 is turned off. This completes the threshold voltage compensation of the driving module 110 while also initializing the control terminal G of the driving module 110. Furthermore, since the potential of the first terminal of the light-emitting module 150 is maintained at the initialization voltage Vref during the initialization and compensation phases, it prevents the light-emitting module 150 from "stealing light" during non-light-emitting phases.

[0039] In one specific embodiment provided by the present invention Figure 5 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention, with reference to... Figure 5 Based on the above technical solutions, optionally, the pixel circuit provided in this embodiment further includes a first light-emitting control module 161 and a second light-emitting control module 162. The first light-emitting control module 161 is connected between a first power supply voltage terminal and a first terminal D of the driving module 110. The second light-emitting control module 162 is connected between a second terminal S of the driving module 110 and a first terminal of the light-emitting module 150. The second terminal of the light-emitting module 150 is connected to a second power supply voltage terminal. The control terminal of the first light-emitting control module 161 is connected to a first light-emitting control signal line, and the control terminal of the second light-emitting control module 162 is connected to a second light-emitting control signal line. Specifically, the first light-emitting control module 161 is used to respond to the first light-emitting control signal EM1 on the first light-emitting control signal line, which is turned on at least during the light-emitting phase and turned off during the compensation phase and the data writing phase. The second light-emitting control module 162 is used to respond to the second light-emitting control signal EM2 on the second light-emitting control signal line, which is turned on at least during the compensation phase and the light-emitting phase.

[0040] Optionally, the pixel circuit also includes a storage module 170, which is connected between the control terminal G of the driving module 110 and the first terminal of the light-emitting module 150, and is used to store the voltage difference between the control terminal G of the driving module 110 and the first terminal of the light-emitting module 150.

[0041] Figure 6 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention, specifically... Figure 5 The pixel circuit shown is a detailed structural diagram of the device, in which the control terminal of the second initialization module 180 is connected to the third scan line, and the control terminal of the compensation module 130 is also connected to the third scan line. (Reference) Figure 6 Optionally, the driving module 110 includes a first transistor T1, the first light-emitting control module 161 includes a fourth transistor T4, the second light-emitting control module 162 includes a fifth transistor T5, and the light-emitting module 150 includes a light-emitting diode D1. The gate of the fourth transistor T4 is connected to the first light-emitting control signal line, the first terminal of the fourth transistor T4 is connected to the first power supply voltage terminal, the second terminal of the fourth transistor T4 is connected to the first terminal of the first transistor T1, the second terminal of the first transistor T1 is connected to the first terminal of the fifth transistor T5, the second terminal of the fifth transistor T5 is connected to the first terminal of the light-emitting diode D1, the second terminal of the light-emitting diode D1 is connected to the second power supply voltage terminal, and the gate of the fifth transistor T5 is connected to the second light-emitting control signal line.

[0042] The coupling module 140 includes a first capacitor C1, the compensation module 130 includes a sixth transistor T6, and the second initialization module 180 includes a seventh transistor T7. The first terminal of the first capacitor C1 is connected to the signal providing terminal, the second terminal of the first capacitor C1 is connected to the first terminal of the first transistor T1, the first terminal of the sixth transistor T6 is connected to the first terminal of the first transistor T1, the second terminal of the sixth transistor T6 is connected to the gate of the first transistor T1, the gate of the sixth transistor T6 is connected to the third scan line, the first terminal of the seventh transistor T7 is connected to the initialization signal line, the second terminal of the seventh transistor T7 is connected to the first terminal of the light-emitting diode D1, and the gate of the seventh transistor T7 is connected to the third scan line.

[0043] The storage module 170 includes a second capacitor C2. The first terminal of the second capacitor C2 is connected to the control terminal G of the driving module 110, and the second terminal of the second capacitor C2 is connected to the first terminal of the light-emitting module 150.

[0044] Figure 7 This is a driving timing diagram of a pixel circuit provided in an embodiment of the present invention, which can be applied to... Figure 6 The pixel circuit shown is used to Figure 6 Taking the example of N-type transistors shown, the specific working process of the pixel circuit provided in this embodiment of the invention will be explained. (Combined with...) Figure 6 and Figure 7The working process of the pixel circuit provided in this embodiment includes an initialization stage t1, a compensation stage t2, a data writing stage t3, and a light emission stage t4.

[0045] During initialization phase t1, the third scan signal S3 is at an on level (e.g., high); the first light-emitting control signal EM1 is at an on level (e.g., high); and the second light-emitting control signal EM2 is at an off level (e.g., low). Therefore, the fourth transistor T4, the sixth transistor T6, and the seventh transistor T7 are turned on. A fixed voltage Vcom is provided to the first terminal of the first capacitor C1. The first power supply voltage VDD is transmitted to point D via the fourth transistor T4 and to point G via the sixth transistor T6. The initialization voltage Vref is transmitted to the second terminal of the second capacitor C2 via the seventh transistor T7. Therefore, the voltage at the first terminal of the first capacitor C1 is Vcom, and the voltage at the second terminal is VDD. The voltage at the first terminal of the second capacitor C2 is VDD, and the voltage at the second terminal is Vref. The voltages at both the first terminal and the gate of the first transistor T1 are VDD, thus initializing the first capacitor C1, the second capacitor C2, and the light-emitting diode D1.

[0046] During compensation phase t2, the third scan signal S3 is at an on level (e.g., high); the first light-emitting control signal EM1 is at an off level (e.g., low); and the second light-emitting control signal EM2 is at an on level (e.g., high). Therefore, the fifth transistor T5, the sixth transistor T6, and the seventh transistor T7 are turned on. The gate and first electrode of the first transistor T1 are shorted to form a diode structure, and a discharge path is formed between point D and the seventh transistor T7. When the voltage at point D drops to Vref + Vth1, the first transistor T1 is turned off, where Vth1 is the threshold voltage of the first transistor T1 (i.e., the threshold voltage Vth of the driving module 110). At this time, the voltage at the gate (point G) of the first transistor T1 is also Vref + Vth1. While achieving threshold compensation, the initialization voltage Vref is also transmitted to the gate of the first transistor T1, thus initializing the gate of the first transistor T1. Furthermore, during compensation phase t2, the voltage at the first electrode of the light-emitting diode D1 is maintained at the initialization voltage Vref, preventing the light-emitting diode D1 from emitting light. The second capacitor C2 stores the gate voltage of the first transistor T1.

[0047] During the data writing phase t3, the third scan signal S3 is at the on level (e.g., high level); the first light-emitting control signal EM1 is at the off level (e.g., low level); and the second light-emitting control signal EM2 is at the off level (e.g., low level). Therefore, the sixth transistor T6 and the seventh transistor T7 are turned on. The signal providing terminal provides the data voltage Vdata to the first terminal of the first capacitor C1. The voltage at the first terminal of the first capacitor C1 jumps from the fixed voltage Vcom to the data voltage Vdata. The voltage change at the first terminal of the first capacitor C1 is Vdata-Vcom. Since the sixth transistor T6 is in the on state, under the coupling effect of the first capacitor C1, the gate voltage of the first transistor T1 becomes Vref+Vth+c1(Vdata-Vcom) / (c1+c2+cgs), and is stored on the second capacitor C2. The voltage at the second terminal of the second capacitor C2 is maintained at the initial voltage Vref under the holding effect of the seventh transistor T7. The voltage difference across the second capacitor C2 is Vth1+c1(Vdata-Vcom) / (c1+c2+cgs).

[0048] Specifically, when the third scan signal S3 changes from the on level to the off level, it will couple to the gate of the first transistor T1, pulling down the gate voltage of the first transistor T1. This promotes the maintenance of a low gate potential for the first transistor T1 and does not cause a loss of threshold compensation. This eliminates the problem of gate voltage loss of the driving transistor caused by potential coupling in the prior art.

[0049] During the light-emitting stage t4, the third scan signal S3 is at an off level (e.g., low); the first light-emitting control signal EM1 is at an on level (e.g., high); and the second light-emitting control signal EM2 is at an on level (e.g., high). Therefore, the fourth transistor T4 and the fifth transistor T5 are turned on. The first power supply voltage VDD is transmitted to point D via the fourth transistor T4. Because the sixth transistor T6 is off, the gate voltage of the first transistor T1 does not change. The first transistor T1 generates a driving current I based on its gate voltage and the voltage at point D, driving the light-emitting diode D1 to emit light. The driving current I can be expressed as: Where μ is the electron mobility of the first transistor T1, Cox is the channel capacitance per unit area of ​​the first transistor T1, W / L is the aspect ratio of the first transistor T1, Vth1 is the threshold voltage of the first transistor T1, c1 is the capacitance of the first capacitor C1, c2 is the capacitance of the second capacitor C2, and cgs is the capacitance of the parasitic capacitance between the gate and the second electrode of the first transistor T1.

[0050] According to the formula for the driving current I, it is known that the driving current I is independent of the first power supply voltage VDD, the second power supply voltage VSS, and the threshold voltage Vth1 of the first transistor T1. Therefore, the pixel circuit provided in this embodiment can compensate for display unevenness caused by the threshold voltage of the first transistor T1, the voltage drop (IR drop) of the first power supply voltage VDD and the second power supply voltage VSS, which is beneficial to improving display quality. Furthermore, since the start time of the data writing stage t3 is later than the end time of the compensation stage t2, the data writing stage t3 and the compensation stage t2 can be completely separated, and the compensation stage t2 and the data writing stage t3 do not affect each other. This allows the threshold compensation time to be unrestricted by the line time, which is beneficial to improving the compensation effect.

[0051] Optionally, the display panel can display at either a low refresh rate or a high refresh rate. The low refresh rate is achieved by skipping frames based on the high refresh rate. One display cycle includes write frames and hold frames. For example, at a refresh rate of 120Hz, all 120 data frames are write frames, and data is written in each write frame. At a refresh rate of 1Hz, based on 120Hz, one data frame is used as a write frame, and the others are used as hold frames. Data is written only in the write frames and not in the hold frames, allowing the pixel circuitry to be adapted for low-frequency driving.

[0052] Figure 8 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention, and... Figure 6 The difference in the pixel circuits shown lies in the signal line connected to the gate of the sixth transistor T6. (Reference) Figure 8 The gate of the sixth transistor T6 is connected to the first scan line to receive the first scan signal S1 output by the first scan line. By configuring the sixth transistor T6 and the seventh transistor T7 to be connected to different signal lines, the pixel circuit can operate under low-frequency conditions and achieve high-frequency reset of the first electrode of the light-emitting diode D1, which helps to improve the phenomenon of low-frequency flicker.

[0053] Figure 9 This is a driving timing diagram of another pixel circuit provided in an embodiment of the present invention, which can be applied to... Figure 8 The pixel circuit shown, combined with Figure 8 and Figure 9 The operation of the pixel circuit provided in this embodiment includes: During the write frame, in the initialization phase t1, the first scan signal S1 is at an on level (e.g., high); the third scan signal S3 is at an on level (e.g., high); the first light emission control signal EM1 is at an on level (e.g., high); and the second light emission control signal EM2 is at an off level (e.g., low). Figure 7The driving timing shown is the same during the initialization phase t1.

[0054] During compensation phase t2, the first scan signal S1 is at an on level (e.g., high); the third scan signal S3 is at an on level (e.g., high); the first light-emitting control signal EM1 is at an off level (e.g., low); and the second light-emitting control signal EM2 is at an on level (e.g., high). Therefore, the fifth transistor T5, the sixth transistor T6, and the seventh transistor T7 are turned on. Figure 7 The driving timing shown is the same during the compensation phase t2.

[0055] During the data writing phase t3, the first scan signal S1 is at an on level (e.g., high); the third scan signal S3 is at an on level (e.g., high); the first light-emitting control signal EM1 is at an off level (e.g., low); and the second light-emitting control signal EM2 is at an off level (e.g., low). Figure 7 The driving timing shown is the same during the data writing phase t3.

[0056] During the light-emitting phase t4, the first scan signal S1 is at an off level (e.g., low); the third scan signal S3 is at an off level (e.g., low); the first light-emitting control signal EM1 is at an on level (e.g., high); and the second light-emitting control signal EM2 is at an on level (e.g., high). Figure 7 The driving timing shown is the same during the light emission stage t4.

[0057] During the hold frame, the first scan signal S1 remains off, and the sixth transistor T6 remains off. In the initialization phase t5 of the hold frame, the first scan signal S1 is off (e.g., low); the third scan signal S3 is off (e.g., low); the first light-emitting control signal EM1 is on (e.g., high); and the second light-emitting control signal EM2 is off (e.g., low). Therefore, the fourth transistor T4 and the seventh transistor T7 are on. The first power supply voltage VDD is transmitted to point D via the fourth transistor T4, and the initialization voltage Vref is transmitted via the seventh transistor T7 to the second terminal of the second capacitor C2 and the first terminal of the light-emitting diode D1, thus initializing the first terminal of the light-emitting diode D1. During this process, the signal providing terminal can provide a fixed voltage Vcom to the first terminal of the first capacitor C1.

[0058] The process of holding the frame during the light emission phase t6 is the same as that of writing the frame during the light emission phase t4.

[0059] The pixel circuit provided in this embodiment also possesses the beneficial effects described in any of the above embodiments.

[0060] In another embodiment of the present invention, the fixed voltage Vcom and data voltage Vdata provided by the signal providing terminal can be provided by a specific module and / or power line. Figure 10 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention, with reference to... Figure 10 The pixel circuit provided in this embodiment includes a driving module 110, a voltage writing module 120, a compensation module 130, and a coupling module 140. The compensation module 130 is connected between the control terminal G and the first terminal D of the driving module 110. The compensation module 130 is used to compensate the threshold voltage Vth of the driving module 110. The coupling module 140 is connected between the first terminal D of the driving module 110 and the voltage writing module 120. The voltage writing module 120 is used to output a fixed voltage Vcom to the coupling module 140 and to output a data voltage Vdata to the coupling module 140. The coupling module 140 is used to couple the voltage containing the data voltage Vdata information to the control terminal G of the driving module 110 via the compensation module 130.

[0061] Specifically, the driving module 110 and the light-emitting module 150 are connected between the first power supply voltage terminal and the second power supply voltage terminal. The driving module 110 is used to drive the light-emitting module 150 to emit light during the light-emitting stage. The first power supply voltage terminal is used to connect to the first power supply voltage VDD, and the second power supply voltage terminal is used to connect to the second power supply voltage VSS. The first power supply voltage VDD can be a positive voltage, and the second power supply voltage VSS can be a negative voltage.

[0062] by Figure 10 Taking the pixel circuit shown as an example, the working process of the pixel circuit includes at least an initialization stage, a compensation stage, a data writing stage, and a light emission stage.

[0063] During the initialization phase, the control compensation module 130 is turned on, and the first power supply voltage VDD initializes the first terminal D and the control terminal G of the drive module 110. Simultaneously, the voltage writing module 120 transmits a fixed voltage Vcom to the first terminal of the coupling module 140 to initialize the first terminal of the coupling module 140. Here, the first power supply voltage VDD is the voltage that enables the drive module 110 to conduct.

[0064] During the compensation phase, the control compensation module 130 remains continuously on, connecting the control terminal G and the first terminal D of the drive module 110. Under the influence of the first power supply voltage VDD, the drive module 110 generates a current flowing from its first terminal D to its second terminal S. The current continues until the voltage difference between the control terminal G and the second terminal S of the drive module 110 equals the threshold voltage Vth of the drive module 110. At this point, the drive module 110 is turned off. Therefore, the voltage at the control terminal G of the drive module 110 is associated with its threshold voltage Vth, thus achieving threshold compensation for the drive module 110. During this process, the voltage writing module 120 continues to transmit a fixed voltage Vcom.

[0065] During the data writing phase, the control voltage writing module 120 transmits the data voltage Vdata to the first terminal of the coupling module 140. The voltage at the first terminal of the coupling module 140 changes from the fixed voltage Vcom to the data voltage Vdata. The coupling module couples the voltage associated with the data voltage Vdata to the control terminal G of the drive module 110 via the compensation module 130, so that the voltage at the control terminal G of the drive module 110 is associated with the data voltage Vdata.

[0066] During the light-emitting stage, the driving module 110 generates a driving current based on the voltage of its control terminal G, driving the light-emitting module 150 to emit light.

[0067] The technical solution provided by this invention involves setting a compensation module between the control terminal and the first terminal of the driving module. During the compensation phase, the compensation module is turned on, and the first power supply voltage at the first power supply voltage terminal is transmitted to the control terminal of the driving module, enabling the driving module to turn on. The compensation module compensates for the threshold voltage of the driving module based on the voltage at the first terminal of the driving module. During the data writing phase, the first terminal of the coupling module is controlled to switch from a fixed voltage to a data voltage, and the data voltage is coupled to the control terminal of the driving module through the coupling module, thus realizing the writing of the data voltage. In this solution, since the threshold compensation and data writing of the driving module are not performed simultaneously, the threshold compensation is performed before writing the data voltage to the control terminal of the driving module, ensuring that the threshold compensation phase and the data writing phase do not affect each other. This means that the threshold compensation time is not affected by the data writing phase, and even at high refresh rates, the threshold voltage of the driving module can be fully compensated. This reduces the differences in driving module characteristics corresponding to different pixels, thereby improving the difference in display brightness and enhancing the uniformity of display quality.

[0068] Optionally, continue to refer to Figure 10The pixel circuit provided in this embodiment also includes a second initialization module 180, which is connected to the first terminal of the light-emitting module 150 and is used to initialize the potential of the first terminal of the light-emitting module 150. During the compensation phase, the second initialization module 180 is controlled to be turned on, so that the voltage of the first terminal D of the driving module 110 is discharged through the driving module 110 and the second initialization module 180, thereby achieving threshold compensation for the driving module 110.

[0069] Optionally, continue to refer to Figure 10 The pixel circuit provided in this embodiment also includes a light-emitting control module 160. The light-emitting control module 160, the driving module 110, and the light-emitting module 150 are connected between the first power supply voltage terminal and the second power supply voltage terminal. The light-emitting control module 160 can be used to disconnect the connection between the first terminal D of the driving module 110 and the first power supply voltage terminal during the compensation phase, so that the voltage of the first terminal D of the driving module 110 can be discharged through the driving module 110 and the second initialization module 180. Of course, in other embodiments, the light-emitting control module 160 may not be provided between the first terminal D of the driving module 110 and the first power supply voltage terminal. The voltage of the first terminal D of the driving module 110 can be controlled by controlling whether the first power supply voltage terminal is connected to the first power supply voltage, which can achieve the same effect.

[0070] Figure 11 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention, with reference to... Figure 11 Optionally, based on the above technical solutions, the pixel circuit provided in this embodiment may further include a first light-emitting control module 161 and a second light-emitting control module 162. The first light-emitting control module 161 is connected between a first power supply voltage terminal and a first terminal D of the driving module 110. The second light-emitting control module 162 is connected between a second terminal S of the driving module 110 and a first terminal of the light-emitting module 150. The second terminal of the light-emitting module 150 is connected to a second power supply voltage terminal. The control terminal of the first light-emitting control module 161 is connected to a first light-emitting control signal line, and the control terminal of the second light-emitting control module 162 is connected to a second light-emitting control signal line. The first light-emitting control module 161 is used to respond to the first light-emitting control signal EM1 on the first light-emitting control signal line, which is turned on at least during the light-emitting phase and turned off during the compensation phase and the data writing phase. The second light-emitting control module 162 is used to respond to the second light-emitting control signal EM2 on the second light-emitting control signal line, which is turned on at least during the compensation phase and the light-emitting phase.

[0071] Continue to refer to Figure 11The control terminal of the voltage writing module 120 is connected to the first scan line, the first terminal of the voltage writing module 120 is connected to the data line DATA, the second terminal of the voltage writing module 120 is connected to the first terminal of the coupling module 140, and the second terminal of the coupling module 140 is connected to the first terminal D of the driving module 110. The data line DATA is used to transmit a fixed voltage Vcom at least during the compensation phase and a data voltage Vdata during the data writing phase. For example, during the initialization phase, the voltage writing module 120 is turned on in response to the first scan signal S1 transmitted on the first scan line, outputting the fixed voltage Vcom transmitted on the data line DATA to the first terminal of the coupling module 140. Simultaneously, the first power supply voltage VDD is transmitted to the second terminal of the coupling module 140 (i.e., the first terminal D of the driving module 110) to maintain voltage stability across the coupling module 140. During the initialization phase, the first power supply voltage VDD is also transmitted to the control terminal of the driving module 110 via the turned-on compensation module 130, turning on the driving module 110 to compensate for the threshold voltage of the driving module 110 during the compensation phase.

[0072] During the compensation phase, the data line DATA still transmits a fixed voltage Vcom. The compensation module 130 compensates the threshold voltage Vth of the drive module 110 based on the voltage after the first terminal D of the drive module 110 is discharged.

[0073] During the data writing phase, the voltage transmitted on the data line DATA becomes the data voltage Vdata. The voltage writing module 120 responds to the first scan signal S1 transmitted on the first scan line and remains on, outputting the data voltage Vdata transmitted on the data line DATA to the first terminal of the coupling module 140. The voltage at the first terminal of the coupling module 140 jumps. Under the coupling action of the coupling module 140, the difference between the data voltage Vdata and the fixed voltage Vcom is coupled to the control terminal G of the drive module 110, realizing the writing of the data voltage Vdata to the control terminal G of the drive module 110.

[0074] In this implementation, by multiplexing the data line DATA to transmit the fixed voltage Vcom and the data voltage Vdata in a time-division manner, the data voltage Vdata can be written to the control terminal G of the driver module 110 during the data writing stage, which helps to save the number of signal lines and achieve high PPI.

[0075] Optionally, continue to refer to Figure 11 The pixel circuit also includes a storage module 170, which is connected between the control terminal G of the driving module 110 and the first terminal of the light-emitting module 150. The second light-emitting control module 162 is also used to shut down in response to the second light-emitting control signal EM2 during the data writing stage to improve the charging efficiency of the driving module 110. Its specific working principle will be explained in detail in subsequent embodiments.

[0076] In one optional implementation of this embodiment, the control terminal of the compensation module 130 and the control terminal of the second initialization module 180 can be connected to the same scan line. Figure 12 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention, specifically... Figure 11 The pixel circuit shown is a detailed structural diagram of the device, for reference. Figure 12 Optionally, the driving module 110 includes a first transistor T1, the first electrode of the first transistor T1 is the first terminal D of the driving module 110, the second electrode of the first transistor T1 is the second terminal S of the driving module 110, and the gate of the first transistor T1 is the control terminal G of the driving module 110. The data writing module 120 includes a second transistor T2, and the coupling module 140 includes a first capacitor C1. The gate of the second transistor T2 is connected to the first scan line, the first electrode of the second transistor T2 is connected to the data line DATA, the second electrode of the second transistor T2 is connected to the first electrode of the first capacitor C1, and the second electrode of the first capacitor C1 is connected to the first electrode of the first transistor T1.

[0077] The first light-emitting control module 161 includes a fourth transistor T4, the second light-emitting control module 162 includes a fifth transistor T5, and the light-emitting module 150 includes a light-emitting diode D1. The gate of the fourth transistor T4 is connected to the first light-emitting control signal line, the first terminal of the fourth transistor T4 is connected to the first power supply voltage terminal, the second terminal of the fourth transistor T4 is connected to the first terminal D of the driving module 110, the second terminal of the driving module 110 is connected to the first terminal of the fifth transistor T5, the second terminal of the fifth transistor T5 is connected to the first terminal of the light-emitting diode D1, the second terminal of the light-emitting diode D1 is connected to the second power supply voltage terminal, and the gate of the fifth transistor T5 is connected to the second light-emitting control signal line.

[0078] The storage module 170 includes a second capacitor C2. The first terminal of the second capacitor C2 is connected to the control terminal G of the driving module 110, and the second terminal of the second capacitor C2 is connected to the first terminal of the light-emitting module 150.

[0079] Optionally, the control terminal of the compensation module 130 is connected to the third scan line, and the sixth transistor T6 included in the compensation module 130 remains on in response to the third scan signal S3 transmitted on the third scan line during the initialization phase, the compensation phase, and the data writing phase.

[0080] The control terminal of the second initialization module 180 can also be connected to the third scan line, and can be turned on simultaneously with the compensation module 130. The first terminal of the second initialization module 180 is connected to the initialization signal line, which is used to transmit the initialization voltage Vref. The second terminal of the second initialization module 180 is connected to the first terminal of the light-emitting module 150. The second initialization module 180 is used to transmit the initialization voltage Vref on the initialization signal line to the first terminal of the light-emitting module 150 during the initialization phase. The second initialization module 180 includes a seventh transistor T7. The gates of the sixth transistor T6 and the seventh transistor T7 are both connected to the third scan line. The first terminal of the sixth transistor T6 is connected to the first terminal D of the driving module 110, and the second terminal of the sixth transistor T6 is connected to the control terminal G of the driving module 110. The first terminal of the seventh transistor T7 is connected to the initialization signal line, and the second terminal of the seventh transistor T7 is connected to the first terminal of the light-emitting module 150.

[0081] Figure 13 This is a driving timing diagram of another pixel circuit provided in an embodiment of the present invention, which can be applied to... Figure 12 The pixel circuit shown is used to Figure 12 Taking the example of N-type transistors shown, the specific working process of the pixel circuit provided in this embodiment of the invention will be explained. (Combined with...) Figure 12 and Figure 13 The working process of the pixel circuit provided in this embodiment includes an initialization stage t1, a compensation stage t2, a data writing stage t3, and a light emission stage t4.

[0082] During the initialization phase t1, the first scan signal S1 is at the on level (e.g., high level); the third scan signal S3 is at the on level (e.g., high level); the first light-emitting control signal EM1 is at the on level (e.g., high level); and the second light-emitting control signal EM2 is at the off level (e.g., low level). Therefore, the second transistor T2, the fourth transistor T4, the sixth transistor T6, and the seventh transistor T7 are turned on. The fixed voltage Vcom transmitted on the data line DATA is transmitted to the first terminal of the first capacitor C1 via the second transistor T2. The first power supply voltage VDD is transmitted to point D via the fourth transistor T4 and to point G via the sixth transistor T6. The initialization voltage Vref is transmitted to the second terminal of the second capacitor C2 via the seventh transistor T7. Therefore, the voltage at the first terminal of the first capacitor C1 is Vcom, and the voltage at the second terminal is VDD. The voltage at the first terminal of the second capacitor C2 is VDD, and the voltage at the second terminal is Vref. The voltages at both the first terminal and the gate of the first transistor T1 are VDD, and the first transistor T1 is turned on.

[0083] During compensation phase t2, the first scan signal S1 is at a conducting level (e.g., high level); the third scan signal S3 is at a conducting level (e.g., high level); the first light-emitting control signal EM1 is at a turning-off level (e.g., low level); and the second light-emitting control signal EM2 is at a conducting level (e.g., high level). Therefore, the second transistor T2, the fifth transistor T5, the sixth transistor T6, and the seventh transistor T7 are turned on. The gate and first electrode of the first transistor T1 are shorted to form a diode structure. A discharge path is formed between point D and the seventh transistor T7. When the voltage at point D drops to Vref + Vth1, the first transistor T1 is turned off, where Vth1 is the threshold voltage of the first transistor T1. At this time, the voltage at the gate (point G) of the first transistor T1 is also Vref + Vth1. While achieving threshold compensation, the initialization voltage Vref is also transmitted to the gate of the first transistor T1, initializing the gate of the first transistor T1. Furthermore, during compensation phase t2, the voltage at the first electrode of the light-emitting diode D1 is maintained at the initialization voltage Vref, preventing the light-emitting diode D1 from emitting light. The second capacitor C2 stores the gate voltage of the first transistor T1.

[0084] During the data writing phase t3, the first scan signal S1 is at the on level (e.g., high level); the third scan signal S3 is at the on level (e.g., high level); the first light emission control signal EM1 is at the off level (e.g., low level); and the second light emission control signal EM2 is at the off level (e.g., low level). Therefore, the second transistor T2, the sixth transistor T6, and the seventh transistor T7 are turned on. The data voltage Vdata on the data line DATA is transmitted to the first terminal of the first capacitor C1 via the second transistor T2. The voltage at the first terminal of the first capacitor C1 changes from a fixed voltage Vcom to the data voltage Vdata, with the voltage change being Vdata - Vcom. Since the sixth transistor T6 is in the on state, under the coupling effect of the first capacitor C1, the gate voltage of the first transistor T1 becomes Vref + Vth1 + c1(Vdata - Vcom) / (c1 + c2 + cgs), and is stored on the second capacitor C2. The voltage at the second terminal of the second capacitor C2 is maintained at the initial voltage Vref under the holding effect of the seventh transistor T7. The voltage difference across the second capacitor C2 is Vth1 + c1(Vdata - Vcom) / (c1 + c2 + cgs). Where c1 is the capacitance of the first capacitor C1, c2 is the capacitance of the second capacitor C2, and cgs is the parasitic capacitance between the gate and the second terminal of the first transistor T1.

[0085] Furthermore, during the data writing stage t3, since the fifth transistor T5 included in the second light-emitting control module 162 is in the off state, the first capacitor C1 and the second capacitor C2 are connected in series, which helps to improve the charging efficiency of the first transistor T1 during the data writing stage, so as to ensure the display quality of the pixel circuit at high frequencies.

[0086] During the light-emitting stage t4, the first scan signal S1 is at an off level (e.g., low); the third scan signal S3 is at an off level (e.g., low); the first light-emitting control signal EM1 is at an on level (e.g., high); and the second light-emitting control signal EM2 is at an on level (e.g., high). Therefore, the fourth transistor T4 and the fifth transistor T5 are turned on. The first power supply voltage VDD is transmitted to point D via the fourth transistor T4. Because the sixth transistor T6 remains off, the gate voltage of the first transistor T1 does not change. The first transistor T1 generates a driving current I based on its gate voltage and the voltage at point D, driving the light-emitting diode D1 to emit light. The driving current I can be expressed as: Where μ is the electron mobility of the first transistor T1, Cox is the channel capacitance per unit area of ​​the first transistor T1, W / L is the width-to-length ratio of the first transistor T1, and Vth1 is the threshold voltage of the first transistor T1.

[0087] According to the formula for the driving current I, the driving current I is independent of the first power supply voltage VDD, the second power supply voltage VSS, and the threshold voltage Vth1 of the first transistor T1. Therefore, the pixel circuit provided in this embodiment can compensate for the display unevenness caused by the voltage drop (IR drop) of the threshold voltage Vth1 of the first transistor T1, the first power supply voltage VDD, and the second power supply voltage VSS, which is beneficial to improving the display quality.

[0088] Figure 14 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention. The control terminal of the compensation module 130 and the control terminal of the voltage writing module 120 can be connected to the same first scan line, and the control terminal of the second initialization module 180 is connected to the third scan line to meet the display effect of the pixel circuit under low frequency driving.

[0089] Figure 15 This is a driving timing diagram of another pixel circuit provided in an embodiment of the present invention, which can be applied to... Figure 14 The pixel circuit shown is for reference. Figure 14 and Figure 15 In writing frames, Figure 15 The driving timing shown is Figure 13 The driving timing shown is the same, so it will not be described again.

[0090] During the hold frame, the first scan signal S1 remains off, and the second transistor T2 and the sixth transistor T6 remain off. During the initialization phase t5 of the hold frame, the first scan signal S1 is off (e.g., low level); the third scan signal S3 is off (e.g., low level); the first light-emitting control signal EM1 is on (e.g., high level); and the second light-emitting control signal EM2 is off (e.g., low level). Therefore, the fourth transistor T4 and the seventh transistor T7 are on. The first power supply voltage VDD is transmitted to point D via the fourth transistor T4, and the initialization voltage Vref is transmitted to the second terminal of the second capacitor C2 and the first terminal of the light-emitting diode D1 via the seventh transistor T7, achieving a high-frequency reset of the first terminal of the light-emitting diode D1, which helps to improve the flickering phenomenon of the light-emitting diode D1.

[0091] The process of holding the frame during the light emission phase t6 is the same as that of writing the frame during the light emission phase t4.

[0092] The pixel circuit provided in this embodiment also possesses the beneficial effects described in any of the above embodiments.

[0093] In another optional embodiment provided by the present invention, the data voltage Vdata and the fixed voltage Vcom can be transmitted using different signal lines to prevent interference between them. Figure 16 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention, with reference to... Figure 16 The pixel circuit provided in this embodiment includes a driving module 110, a data writing module 121, a first initialization module 122, a compensation module 130, and a coupling module 140. The compensation module 130 is connected between the control terminal G and the first terminal D of the driving module 110, and is used to compensate the threshold voltage Vth of the driving module 110. The data writing module 121 and the first initialization module 122 are connected to the first node N1. The coupling module 140 is connected between the first terminal D and the first node N1 of the driving module 110. The first initialization module 122 is used to transmit a fixed voltage Vcom to the coupling module 140, and the coupling module 140 is used to couple the voltage containing data voltage Vdata information transmitted by the data writing module 121 to the control terminal G of the driving module 110 via the compensation module 130.

[0094] In this system, the first terminal of the first initialization module 122 is connected to a fixed voltage Vcom. The second terminal of the first initialization module 122 is connected to the first terminal of the coupling module 140, and the second terminal of the coupling module 140 is connected to the first terminal of the drive module 110. The first terminal of the coupling module 140 is also connected to the second terminal of the data writing module 121. The first terminal of the data writing module 121 is connected to the data line DATA. The control terminal of the data writing module 121 is connected to the first scan line, and the control terminal of the first initialization module 122 is connected to the second scan line. The first initialization module 122 is used to transmit the fixed voltage Vcom to the first terminal of the coupling module 140 during the initialization phase. The compensation module 130 is also used to transmit the first power supply voltage VDD from the first power supply voltage terminal to the control terminal G of the drive module 110 during the initialization phase. The first scan line is used to transmit the first scan signal S1, and the second scan line is used to transmit the second scan signal S2. Here, the fixed voltage Vcom can be provided by the power supply line, and the data line DATA is only used to transmit the data voltage Vdata, and at least during the data writing phase.

[0095] Figure 17 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention, with reference to... Figure 17 Based on the above technical solution, optionally, the first power supply voltage VDD connected to the first power supply voltage terminal is the same as the fixed voltage Vcom. That is, the first terminal of the first initialization unit 122 is connected to the first power supply voltage terminal, and the first power supply voltage VDD is multiplexed as the fixed voltage Vcom, which can save the number of power lines.

[0096] Figure 18 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention, with reference to... Figure 18 Based on the above technical solution, optionally, the pixel circuit provided in this embodiment further includes a first light-emitting control module 161 and a second light-emitting control module 162. The first light-emitting control module 161 is connected between a first power supply voltage terminal and a first terminal D of the driving module 110. The second light-emitting control module 162 is connected between a second terminal S of the driving module 110 and a first terminal of the light-emitting module 150. The second terminal of the light-emitting module 150 is connected to a second power supply voltage terminal. The control terminal of the first light-emitting control module 161 is connected to a first light-emitting control signal line, and the control terminal of the second light-emitting control module 162 is connected to a second light-emitting control signal line. The first light-emitting control module 161 is used to respond to the first light-emitting control signal EM1 on the first light-emitting control signal line, which is turned on at least during the light-emitting phase and turned off during the compensation phase and the data writing phase. The second light-emitting control module 162 is used to respond to the second light-emitting control signal EM2 on the second light-emitting control signal line, which is turned on at least during the compensation phase and the light-emitting phase.

[0097] Specifically, during the initialization phase, the first initialization module 122 turns on in response to the second scan signal S2, and the data writing module 121 turns off in response to the first scan signal S1. The fixed voltage Vcom is transmitted to the first terminal of the coupling module 140 via the first initialization module 122. The first light-emitting control module 161 turns on in response to the first light-emitting control signal EM1, and the second light-emitting control module 162 turns off in response to the second light-emitting control signal EM2. The first power supply voltage VDD is transmitted to the first terminal D of the driving module 110 via the first light-emitting control module 161, thus initializing the coupling module 140. Simultaneously, the compensation module 130 is turned on, connecting the control terminal G of the driving module 110 to the first terminal D, ensuring that the control terminal G and the first terminal D of the driving module 110 have the same voltage, and thus turning on the driving module 110. Furthermore, the second initialization module 180 can also be turned on, transmitting the initialization voltage Vref to the first terminal of the light-emitting module 150 to initialize the first terminal of the light-emitting module 150.

[0098] During the compensation phase, the first initialization module 122 and the compensation module 130 remain on. The data writing module 121 turns off in response to the first scan signal S1, the first light emission control module 161 turns off in response to the first light emission control signal EM1, and the second light emission control module 162 turns on in response to the second light emission control signal EM2. A discharge path is formed between the first terminal D of the driving module 110 and the second initialization module 180. When the voltage of the first terminal D of the driving module 110 drops to Vref+Vth, the driving module 110 turns off, where Vth is the threshold voltage of the driving module 110. At this time, the voltage of the control terminal G of the driving module 110 is also Vref+Vth. While achieving threshold compensation, the initialization voltage Vref can also be transmitted to the control terminal of the driving module 110, thus initializing the control terminal of the driving module 110. In this embodiment, there is no need to set up a separate module to initialize the control terminal G of the driving module 110, which helps to reduce the number of transistors in the pixel circuit.

[0099] During the data writing phase, the first initialization module 122 turns off in response to the second scan signal S2, the data writing module 121 turns on in response to the first scan signal S1, the first light emission control module 161 and the second light emission control module 162 both turn off in response to their respective light emission control signals, and the compensation module 130 remains on. The data writing module 121 outputs the data voltage Vdata transmitted on the data line DATA to the first terminal of the coupling module 140. The voltage at the first terminal of the coupling module 140 changes from a fixed voltage Vcom to the data voltage Vdata. The coupling module 140 couples the voltage associated with the data voltage Vdata to the control terminal G of the drive module 110 via the compensation module 130, so that the voltage at the control terminal G of the drive module 110 is associated with the data voltage Vdata.

[0100] During the light-emitting stage, both the first light-emitting control module 161 and the second light-emitting control module 162 are turned on in response to the corresponding light-emitting control signal. The driving module 110 generates a driving current according to the voltage of its control terminal G, and drives the light-emitting module 150 to emit light.

[0101] Figure 19 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention, specifically... Figure 18 The pixel circuit shown is a detailed structural diagram of the device, for reference. Figure 19 Based on the above technical solution, optionally, the driving module 110 includes a first transistor T1, the first electrode of the first transistor T1 is the first terminal D of the driving module 110, the second electrode of the first transistor T1 is the second terminal S of the driving module 110, the gate of the first transistor T1 is the control terminal G of the driving module 110, the data writing module 121 includes a second transistor T2, the coupling module 140 includes a first capacitor C1, the gate of the second transistor T2 is connected to the first scan line, the first electrode of the second transistor T2 is connected to the data line DATA, the second electrode of the second transistor T2 is connected to the first electrode of the first capacitor C1, and the second electrode of the first capacitor C1 is connected to the first electrode of the first transistor T1.

[0102] The first initialization module 122 includes a third transistor T3. The gate of the third transistor T3 is connected to the second scan line. The first terminal of the third transistor T3 is connected to a fixed voltage Vcom. The second terminal of the third transistor T3 is connected to the first terminal of the coupling module 140 (i.e., connected to the first terminal of the first capacitor C1).

[0103] The first light-emitting control module 161 includes a fourth transistor T4, the second light-emitting control module 162 includes a fifth transistor T5, and the light-emitting module 150 includes a light-emitting diode D1. The gate of the fourth transistor T4 is connected to the first light-emitting control signal line, the first terminal of the fourth transistor T4 is connected to the first power supply voltage terminal, the second terminal of the fourth transistor T4 is connected to the first terminal D of the driving module 110, the second terminal of the driving module 110 is connected to the first terminal of the fifth transistor T5, the second terminal of the fifth transistor T5 is connected to the first terminal of the light-emitting diode D1, the second terminal of the light-emitting diode D1 is connected to the second power supply voltage terminal, and the gate of the fifth transistor T5 is connected to the second light-emitting control signal line.

[0104] Optionally, the pixel circuit also includes a storage module 170, which is connected between the control terminal G of the driving module 110 and the first terminal of the light-emitting module 150; the second light-emitting control module 162 is also used to turn off in response to the second light-emitting control signal EM2 during the data writing phase.

[0105] The storage module 170 includes a second capacitor C2. The first terminal of the second capacitor C2 is connected to the control terminal G of the driving module 110, and the second terminal of the second capacitor C2 is connected to the first terminal of the light-emitting module 150.

[0106] Figure 20 This is a driving timing diagram of another pixel circuit provided in an embodiment of the present invention, which can be applied to... Figure 19 The pixel circuit shown is used to Figure 19 Taking the example of N-type transistors shown, the specific working process of the pixel circuit provided in this embodiment of the invention will be explained. (Combined with...) Figure 19 and Figure 20 The working process of the pixel circuit provided in this embodiment includes an initialization stage t1, a compensation stage t2, a data writing stage t3, and a light emission stage t4.

[0107] During the initialization phase t1, the first scan signal S1 is at an off level (e.g., low); the second scan signal S2 is at an on level (e.g., high); the third scan signal S3 is at an on level (e.g., high); the first light-emitting control signal EM1 is at an on level (e.g., high); and the second light-emitting control signal EM2 is at an off level (e.g., low). Therefore, the third transistor T3, the fourth transistor T4, the sixth transistor T6, and the seventh transistor T7 are turned on. The fixed voltage Vcom is transmitted to the first terminal of the first capacitor C1 via the third transistor T3, the first power supply voltage VDD is transmitted to point D via the fourth transistor T4, and to point G via the sixth transistor T6, and the initialization voltage Vref is transmitted to the second terminal of the second capacitor C2 via the seventh transistor T7. Therefore, the voltage at the first terminal of the first capacitor C1 is Vcom, and the voltage at the second terminal is VDD; the voltage at the first terminal of the second capacitor C2 is VDD, and the voltage at the second terminal is Vref; the voltage at both the first terminal and the gate of the first transistor T1 is VDD, and the first transistor T1 is turned on.

[0108] During compensation phase t2, the first scan signal S1 is at a low level (off); the second scan signal S2 is at a high level (on); the third scan signal S3 is at a high level (on); the first light-emitting control signal EM1 is at a low level (off); and the second light-emitting control signal EM2 is at a high level (on). Therefore, the third transistor T3, the fifth transistor T5, the sixth transistor T6, and the seventh transistor T7 are turned on. The gate and first electrode of the first transistor T1 are shorted to form a diode structure. A discharge path is formed between point D and the seventh transistor T7. When the voltage at point D drops to Vref + Vth1, the first transistor T1 is turned off, where Vth1 is the threshold voltage of the first transistor T1. At this time, the voltage at the gate (point G) of the first transistor T1 is also Vref + Vth. While achieving threshold compensation, the initialization voltage Vref is also transmitted to the gate of the first transistor T1, initializing the gate of the first transistor T1. Furthermore, during compensation phase t2, the voltage at the first electrode of the light-emitting diode D1 is maintained at the initialization voltage Vref, preventing the light-emitting diode D1 from emitting light. The second capacitor C2 stores the gate voltage of the first transistor T1.

[0109] During the data writing phase t3, the first scan signal S1 is at an on level (e.g., high); the second scan signal S2 is at an off level (e.g., low); the third scan signal S3 is at an on level (e.g., high); the first light-emitting control signal EM1 is at an off level (e.g., low); and the second light-emitting control signal EM2 is at an off level (e.g., low). Therefore, the second transistor T2, the sixth transistor T6, and the seventh transistor T7 are turned on. The data voltage Vdata on the data line DATA is transmitted to the first terminal of the first capacitor C1 via the second transistor T2. The voltage at the first terminal of the first capacitor C1 changes from the fixed voltage Vcom to the data voltage Vdata. The voltage change at the first terminal of the first capacitor C1 is Vdata-Vcom. Since the sixth transistor T6 is in the on state, under the coupling effect of the first capacitor C1, the gate voltage of the first transistor T1 becomes Vref+Vth+c1(Vdata-Vcom) / (c1+c2+cgs), and is stored on the second capacitor C2. The voltage at the second terminal of the second capacitor C2 is maintained at the initial voltage Vref under the holding effect of the seventh transistor T7. The voltage difference across the second capacitor C2 is Vth+c1(Vdata-Vcom) / (c1+c2+cgs).

[0110] Specifically, when the third scan signal S3 changes from the on level to the off level, it will couple to the gate of the first transistor T1, pulling down the gate voltage of the first transistor T1. This promotes the maintenance of a low gate potential for the first transistor T1 and does not cause a loss of threshold compensation. This eliminates the problem of gate voltage loss of the driving transistor caused by potential coupling in the prior art.

[0111] During the light-emitting stage t4, the first scan signal S1 is at an off level (e.g., low); the second scan signal S2 is at an off level (e.g., low); the third scan signal S3 is at an off level (e.g., low); the first light-emitting control signal EM1 is at an on level (e.g., high); and the second light-emitting control signal EM2 is at an on level (e.g., high). Therefore, the fourth transistor T4 and the fifth transistor T5 are turned on. The first power supply voltage VDD is transmitted to point D via the fourth transistor T4. Because the sixth transistor T6 remains off, the gate voltage of the first transistor T1 does not change. The first transistor T1 generates a driving current I based on its gate voltage and the voltage at point D, driving the light-emitting diode D1 to emit light. The driving current I can be expressed as: Where μ is the electron mobility of the first transistor T1, Cox is the channel capacitance per unit area of ​​the first transistor T1, W / L is the aspect ratio of the first transistor T1, Vth1 is the threshold voltage of the first transistor T1, c1 is the capacitance of the first capacitor C1, c2 is the capacitance of the second capacitor C2, and cgs is the capacitance of the parasitic capacitance between the gate and the second electrode of the first transistor T1.

[0112] According to the formula for the driving current I, the driving current I is independent of the first power supply voltage VDD, the second power supply voltage VSS, and the threshold voltage Vth1 of the first transistor T1. Therefore, the pixel circuit provided in this embodiment can compensate for the display unevenness caused by the voltage drop (IR drop) of the threshold voltage Vth1 of the first transistor T1, the first power supply voltage VDD, and the second power supply voltage VSS, which is beneficial to improving the display quality.

[0113] As another optional implementation provided by the present invention, the second light emission control signal line can be reused as the second scan line connected to the control terminal of the first initialization module 122, so as to save the number of signal lines and achieve high PPI. Figure 21 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention, with reference to... Figure 21 The gates of the third transistor T3 and the fifth transistor T5 are both connected to the second light emission control signal EM2, which allows the initialization stage to coincide with the light emission stage, thereby increasing the threshold compensation time and ensuring that the first transistor T1 can be fully compensated. Figure 22 This is a driving timing diagram of another pixel circuit provided in an embodiment of the present invention, which can be applied to... Figure 21 The pixel circuit shown is for reference. Figure 21 and Figure 22 The operation of the pixel circuit includes a compensation stage t2, a data writing stage t3, and a light emission stage t4.

[0114] In the initial stage t0, the light-emitting diode D1 is in the light-emitting state, the voltage of the first terminal of the first capacitor C1 is a fixed voltage Vcom, and the voltage of the second terminal is the first power supply voltage VDD.

[0115] Compensation phase t2 and data writing phase t3 and Figure 19 The operation of the pixel circuit shown is the same, so it will not be described again here.

[0116] During the light-emitting stage t4, the first scan signal S1 is at an off level (e.g., low); the third scan signal S3 is at an off level (e.g., low); the first light-emitting control signal EM1 is at an on level (e.g., high); and the second light-emitting control signal EM2 is at an on level (e.g., high). Therefore, the third transistor T3, the fourth transistor T4, and the fifth transistor T5 are turned on. The first power supply voltage VDD is transmitted to point D via the fourth transistor T4. The first transistor T1 generates a driving current I based on the voltage between its gate and point D, driving the light-emitting diode D1 to emit light. Simultaneously, the third transistor T3 transmits a fixed voltage Vcom to the first terminal of the first capacitor C1, initializing the first capacitor C1.

[0117] In this embodiment, when the display panel displays at a low refresh rate, because no data writing and threshold compensation operations are performed during the hold frame, the seventh transistor T7 and the sixth transistor T6 are in a turned-off state during the hold frame, making it impossible to reset the first electrode of the light-emitting diode D1. This can easily lead to flickering during the light-emitting phase. To solve this problem and make the pixel circuit suitable for low-frequency driving, the first electrode of the light-emitting diode D1 can be reset separately by other modules, or the scanning signal connected to the gate of the seventh transistor T7 can be changed.

[0118] Figure 23 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention, with reference to... Figure 23 Based on the above technical solution, optionally, the control terminal of the second initialization module 180 is connected to the fifth scan line, that is, the gate of the seventh transistor T7 is connected to the fifth scan line to receive the fifth scan signal transmitted by the fifth scan line. The fifth scan signal S5 is different from the third scan signal S3. Figure 24 This is a driving timing diagram of another pixel circuit provided in an embodiment of the present invention, which can be applied to... Figure 23 The pixel circuit shown. (Reference) Figure 23 and Figure 24 The operation of this pixel circuit includes: During the write frame, in the initialization phase t1, the first scan signal S1 is at an off level (e.g., low); the third scan signal S3 is at an off level (e.g., low); the fifth scan signal S5 is at an on level (e.g., high); the first light-emitting control signal EM1 is at an off level (e.g., low); and the second light-emitting control signal EM2 is at an off level (e.g., low). Therefore, the seventh transistor T7 is turned on. The initialization voltage Vref is transmitted to the first terminal of the light-emitting diode D1 via the seventh transistor T7, initializing the first terminal of the light-emitting diode D1.

[0119] During compensation phase t2, the first scan signal S1 is at an off level (e.g., low); the third scan signal S3 is at an on level (e.g., high); the fifth scan signal S5 is at an on level (e.g., high); the first light-emitting control signal EM1 is at an off level (e.g., low); and the second light-emitting control signal EM2 is at an on level (e.g., high). Therefore, the third transistor T3, the fifth transistor T5, the sixth transistor T6, and the seventh transistor T7 are turned on. The compensation phase t2 can be referenced from... Figure 19 The working process of the pixel circuit shown will not be repeated here.

[0120] During the data writing phase t3, the first scan signal S1 is at an on level (e.g., high); the third scan signal S3 is at an on level (e.g., high); the fifth scan signal S5 is at an on level (e.g., high); the first light-emitting control signal EM1 is at an off level (e.g., low); and the second light-emitting control signal EM2 is at an off level (e.g., low). Therefore, the second transistor T2, the sixth transistor T6, and the seventh transistor T7 are turned on. Simultaneously with writing the data voltage Vdata to the gate of the first transistor T1, the first terminal of the light-emitting diode D1 is initialized through the seventh transistor T7.

[0121] During the light-emitting stage t4, the first scan signal S1 is at an off level (e.g., low); the third scan signal S3 is at an off level (e.g., low); the fifth scan signal S5 is at an off level (e.g., low); the first light-emitting control signal EM1 is at an on level (e.g., high); and the second light-emitting control signal EM2 is at an on level (e.g., high). The first transistor T1 generates a driving current I based on the voltage between its gate and point D, driving the light-emitting diode D1 to emit light. Simultaneously, the third transistor T3 transmits a fixed voltage Vcom to the first terminal of the first capacitor C1, initializing the first capacitor C1.

[0122] During the initialization phase t5 of the holding frame, the first scan signal S1 is at an off level (e.g., low); the third scan signal S3 is at an off level (e.g., low); the fifth scan signal S5 is at an on level (e.g., high); the first light-emitting control signal EM1 is at an off level (e.g., low); and the second light-emitting control signal EM2 is at an off level (e.g., low). Therefore, the seventh transistor T7 is turned on. The initialization voltage Vref is transmitted to the first terminal of the light-emitting diode D1 via the seventh transistor T7, initializing the first terminal of the light-emitting diode D1.

[0123] The process of holding the frame during the light emission phase t6 is the same as that of writing the frame during the light emission phase t4.

[0124] This solution can perform high-frequency reset of the first electrode of LED D1 within the holding frame, which helps to improve the flickering problem that easily occurs during the light emission stage.

[0125] Figure 25 This is a schematic diagram of another pixel circuit structure provided in an embodiment of the present invention, with reference to... Figure 25 Optionally, when the control terminal of the compensation module 130 and the control terminal of the second initialization module 180 are connected to the same scan line, the pixel circuit may further include a third initialization module 190. The control terminal of the third initialization module 190 is connected to the fourth scan line, the first terminal of the third initialization module 190 is connected to the initialization signal line, and the second terminal of the third initialization module 190 is connected to the first terminal of the light-emitting module 150. The third initialization module 190 is used to transmit the initialization voltage Vref to the first terminal of the light-emitting module 150 within a write frame in a display cycle, and to transmit the initialization voltage Vref to the first terminal of the light-emitting module 150 within a hold frame in the same display cycle.

[0126] The third initialization module 190 includes an eighth transistor T8, the gate of which is connected to the fourth scan line, the first electrode of which is connected to the initialization signal line, and the second electrode of which is connected to the first terminal of the light-emitting module 150.

[0127] Figure 26 This is a driving timing diagram of another pixel circuit provided in an embodiment of the present invention, which can be applied to... Figure 25 The pixel circuit shown. (Reference) Figure 25 and Figure 26 The writing process includes an initialization phase t1, a compensation phase t2, a data writing phase t3, and a light emission phase t4. The holding frame includes an initialization phase t5 and a light emission phase t6.

[0128] During the write frame, in the initialization phase t1, the first scan signal S1 is at an off level (e.g., low); the third scan signal S3 is at an off level (e.g., low); the fourth scan signal S4 is at an on level (e.g., high); the first light-emitting control signal EM1 is at an off level (e.g., low); and the second light-emitting control signal EM2 is at an off level (e.g., low). Therefore, the eighth transistor T8 is turned on. The initialization voltage Vref is transmitted through the eighth transistor T8 to the first terminal of the light-emitting diode D1, initializing the first terminal of the light-emitting diode D1.

[0129] During compensation phase t2, the first scan signal S1 is at a low level (off); the third scan signal S3 is at a high level (on); the fourth scan signal S4 is at a low level (off); the first light-emitting control signal EM1 is at a low level (off); and the second light-emitting control signal EM2 is at a high level (on). Therefore, the third transistor T3, the fifth transistor T5, the sixth transistor T6, and the seventh transistor T7 are turned on.

[0130] During the data writing phase t3, the first scan signal S1 is at an on level (e.g., high); the third scan signal S3 is at an on level (e.g., high); the fourth scan signal S4 is at an off level (e.g., low); the first light-emitting control signal EM1 is at an off level (e.g., low); and the second light-emitting control signal EM2 is at an off level (e.g., low). Therefore, the second transistor T2, the sixth transistor T6, and the seventh transistor T7 are turned on.

[0131] Among them, the compensation phase t2 and the data writing phase t3 can be referenced from the above. Figure 19 The working process of the pixel circuit shown will not be repeated here.

[0132] During the light-emitting stage t4, the first scan signal S1 is at an off level (e.g., low); the third scan signal S3 is at an off level (e.g., low); the fourth scan signal S4 is at an off level (e.g., low); the first light-emitting control signal EM1 is at an on level (e.g., high); and the second light-emitting control signal EM2 is at an on level (e.g., high). Therefore, the third transistor T3, the fourth transistor T4, and the fifth transistor T5 are turned on. The first power supply voltage VDD is transmitted to point D via the fourth transistor T4. The first transistor T1 generates a driving current I based on the voltage between its gate and point D, driving the light-emitting diode D1 to emit light. Simultaneously, the third transistor T3 transmits a fixed voltage Vcom to the first terminal of the first capacitor C1, initializing the first capacitor C1.

[0133] During the initialization phase t5 of the holding frame, the first scan signal S1 is at an off level (e.g., low); the third scan signal S3 is at an off level (e.g., low); the fourth scan signal S4 is at an on level (e.g., high); the first light-emitting control signal EM1 is at an off level (e.g., low); and the second light-emitting control signal EM2 is at an off level (e.g., low). Therefore, the eighth transistor T8 is turned on. The initialization voltage Vref is transmitted through the eighth transistor T8 to the first terminal of the light-emitting diode D1, initializing the first terminal of the light-emitting diode D1.

[0134] During the light-emitting phase t6 of the holding frame, the first scan signal S1 is at an off level (e.g., low); the third scan signal S3 is at an off level (e.g., low); the fourth scan signal S4 is at an off level (e.g., low); the first light-emitting control signal EM1 is at an on level (e.g., high); and the second light-emitting control signal EM2 is at an on level (e.g., high). Therefore, the third transistor T3, the fourth transistor T4, and the fifth transistor T5 are turned on. The first power supply voltage VDD is transmitted to point D via the fourth transistor T4, and the first transistor T1 drives the light-emitting diode D1 to emit light again. Simultaneously, the third transistor T3 transmits the fixed voltage Vcom to the first terminal of the first capacitor C1, thus initializing the first capacitor C1.

[0135] Optionally, continue to refer to Figure 25 The gate of the eighth transistor T8 can also be connected to the first scan signal S1, sharing the same first scan line with the gate of the second transistor T2. Figure 27 This is a driving timing diagram of another pixel circuit provided in an embodiment of the present invention, which can be applied to... Figure 25 The pixel circuit shown in the figure has a first scan line multiplexed as a fourth scan line.

[0136] During the write frame, in the initialization phase t1, the first scan signal S1 is at an on level (e.g., high); the third scan signal S3 is at an off level (e.g., low); the first light emission control signal EM1 is at an off level (e.g., low); and the second light emission control signal EM2 is at an off level (e.g., low). Therefore, the second transistor T2 and the eighth transistor T8 are turned on. The initialization voltage Vref is transmitted to the first terminal of the light-emitting diode D1 via the eighth transistor T8, initializing the first terminal of D1. Since the sixth transistor T6 is off, even if the second transistor T2 is turned on, it will not affect the gate potential of the first transistor T1.

[0137] During the data writing phase t3, the first scan signal S1 is at an on level (e.g., high); the third scan signal S3 is at an on level (e.g., high); the first light-emitting control signal EM1 is at an off level (e.g., low); and the second light-emitting control signal EM2 is at an off level (e.g., low). Therefore, the second transistor T2, the sixth transistor T6, the seventh transistor T7, and the eighth transistor T8 are turned on. Simultaneously with writing the data voltage Vdata to the gate of the first transistor T1, the first terminal of the light-emitting diode D1 is initialized through the eighth transistor T8.

[0138] The work process for other stages can be referenced. Figure 26 The relevant descriptions of the driving timing shown will not be repeated here. The pixel circuit provided in this embodiment also possesses the beneficial effects described in any of the above embodiments.

[0139] According to the inventor's experimental verification, the pixel circuit provided in any of the above embodiments can cover the driving current corresponding to gray levels 0-255 when the data voltage Vdata is in the range of 1-7V, which is beneficial to the expansion of gray levels.

[0140] This invention also provides a method for driving a pixel circuit, which can be used to drive the pixel circuit provided in any embodiment of this invention. Figure 28 A flowchart of a pixel circuit driving method provided in an embodiment of the present invention is shown below. Figure 28 The driving method for this pixel circuit includes: S110. During the initialization phase, a fixed voltage is provided to the coupling module.

[0141] S120. During the compensation phase, the control compensation module compensates the threshold voltage of the drive module.

[0142] S130. During the data writing stage, a data voltage is provided to the coupling module, and the coupling module is controlled to couple the voltage containing the data voltage information to the control terminal of the drive module via the compensation module.

[0143] The pixel circuit driving method provided in this invention compensates the threshold voltage of the driving module based on the voltage after discharge at the first terminal of the driving module during the compensation phase. During the data writing phase, the voltage transmitted from the control signal providing terminal to the first terminal of the coupling module changes from a fixed voltage to a data voltage. This data voltage is then coupled to the control terminal of the driving module via the compensation module through the coupling module, thus writing the data voltage. In this solution, since the threshold compensation and data writing of the driving module are not performed simultaneously, the threshold compensation is performed before writing the data voltage to the control terminal of the driving module. This ensures that the threshold compensation phase and the data writing phase do not interfere with each other, and the threshold compensation time is unaffected by the data writing phase. Even at high refresh rates, the threshold voltage of the driving module can be fully compensated, thereby reducing the differences in driving module characteristics for different pixels. This, in turn, helps improve the difference in display brightness and enhances the uniformity of display quality.

[0144] Optionally, combined Figure 19 The pixel circuit also includes a second initialization module 180 and a light-emitting module 150. The driving method also includes: at least during the compensation phase, controlling the second initialization module 180 to transmit the initialization voltage Vref to the first terminal of the light-emitting module 150.

[0145] Optionally, the pixel circuit also includes a data writing module 121 and a first initialization module 122. Figure 29 A flowchart of another pixel circuit driving method provided in an embodiment of the present invention is shown below. Figure 28 and Figure 29 Step S110 specifically includes: S1101. During the initialization phase, the first initialization module is controlled to provide a fixed voltage to the first end of the coupling module, the second initialization module is controlled to transmit the second initialization voltage to the first end of the light-emitting module, and the compensation module is controlled to transmit the potential of the first end of the driving module to the control end of the driving module.

[0146] Step S120 specifically includes: S1201. During the compensation phase, the control compensation module compensates the threshold voltage of the drive module based on the voltage after the first end of the drive module is discharged through the drive module and the second initialization module, and controls the first initialization module to continue transmitting a fixed voltage to the first end of the coupling module.

[0147] Specifically, the first terminal of the control drive module discharges through the drive module, the second light-emitting control module, and the second initialization module until the drive module is turned off. The compensation module transmits the voltage after the first terminal of the drive module is discharged to the control terminal of the drive module to compensate for the threshold voltage of the drive module.

[0148] Step S130 specifically includes: S1301. During the data writing stage, the control data writing module provides data voltage to the first end of the coupling module, and controls the coupling module to couple the voltage containing data voltage information to the control end of the drive module through the compensation module, and controls the second initialization module to transmit the initialization voltage to the first end of the light-emitting module.

[0149] Figure 30 A flowchart of another pixel circuit driving method provided in an embodiment of the present invention is shown below. Figure 30 After step S130, the method further includes: S140. During the light-emitting stage, the control and drive module drives the light-emitting module to emit light according to the voltage of its own control terminal.

[0150] The pixel circuit driving method provided in this embodiment can be used to drive the pixel circuit provided in any of the above embodiments. Therefore, the pixel circuit driving method also has the beneficial effects described in any of the above embodiments.

[0151] This invention also provides a display panel that includes the pixel circuit provided in the above embodiments. Therefore, this display panel also has the beneficial effects described in any of the above embodiments. Figure 31 This is a schematic diagram of the structure of a display panel provided in an embodiment of the present invention. In this embodiment, the display panel 200 can be applied to mobile phones or any electronic product with display function, including but not limited to the following categories: televisions, laptops, desktop monitors, tablets, digital cameras, smart bracelets, smart glasses, in-vehicle displays, medical devices, industrial control equipment, touch interactive terminals, etc. The present invention does not impose any special limitations on these.

[0152] It should be understood that the various forms of processes shown above can be used, with steps reordered, added, or deleted. For example, the steps described in this invention can be executed in parallel, sequentially, or in different orders, as long as the desired result of the technical solution of this invention can be achieved, and this is not limited herein.

[0153] The specific embodiments described above do not constitute a limitation on the scope of protection of this invention. Various modifications, combinations, sub-combinations, and substitutions can be made according to design requirements and other factors. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of this invention should be included within the scope of protection of this invention.

Claims

1. A pixel circuit, characterized in that, include: The module consists of a drive module, a signal supply terminal, a compensation module, and a coupling module. The compensation module is used to compensate the threshold voltage of the drive module during the compensation phase. The signal providing terminal provides a fixed voltage to the coupling module during the initialization phase and a data voltage to the coupling module during the data writing phase. The coupling module is used to transmit a voltage containing the data voltage information to the control terminal of the driving module during the data writing phase. The data writing phase is later than the compensation phase, and the duration of the compensation phase is longer than the duration of the data writing phase.

2. The pixel circuit according to claim 1, characterized in that, The start time of the data writing phase is later than the end time of the compensation phase.

3. The pixel circuit according to claim 1, characterized in that, The pixel circuit further includes a second initialization module, which is used to control the first terminal of the driving module to discharge through the driving module and the second initialization module during the compensation phase. The compensation module is used to compensate the threshold voltage of the driving module according to the voltage after the first terminal of the driving module is discharged during the compensation phase. Preferably, the pixel circuit further includes a light-emitting module, and the second initialization module is also used to transmit an initialization voltage to the light-emitting module at least during the initialization phase.

4. The pixel circuit according to claim 3, characterized in that, The pixel circuit further includes a first light-emitting control module and a second light-emitting control module. The first light-emitting control module is used to transmit a first power supply voltage to the first end of the driving module during the initialization phase and the light-emitting phase. The second light-emitting control module is used to transmit the voltage at the first terminal of the driving module to the second initialization module for discharge during the compensation phase; the second light-emitting control module is also used to transmit the driving current generated by the driving module to the light-emitting module during the light-emitting phase. Preferably, the pixel circuit further includes a storage module for storing the voltage difference between the control terminal of the driving module and the first terminal of the light-emitting module.

5. The pixel circuit according to claim 1, characterized in that, The driving module includes a first transistor, which is an N-type transistor.

6. A pixel circuit, characterized in that, include: The module consists of a drive module, a signal supply terminal, a compensation module, and a coupling module. The compensation module is connected between the control terminal and the first terminal of the drive module, and the compensation module is used to compensate the threshold voltage of the drive module during the compensation phase. The coupling module is connected between the first end of the driving module and the signal providing end. The signal providing end is used to provide a fixed voltage and a data voltage. The coupling module is used to transmit a voltage containing the data voltage information to the control end of the driving module during the data writing phase. The duration of the compensation phase is longer than the duration of the data writing phase.

7. The pixel circuit according to claim 6, characterized in that, The pixel circuit also includes a first light-emitting control module, a second light-emitting control module, and a light-emitting module; The first light-emitting control module is connected between the first power supply voltage terminal and the first terminal of the driving module; the second light-emitting control module is connected between the second terminal of the driving module and the first terminal of the light-emitting module; the second terminal of the light-emitting module is connected to the second power supply voltage terminal; the control terminal of the first light-emitting control module is connected to the first light-emitting control signal line; and the control terminal of the second light-emitting module is connected to the second light-emitting control signal line. The driving module includes a first transistor, the first light-emitting control module includes a fourth transistor, the second light-emitting control module includes a fifth transistor, and the light-emitting module includes a light-emitting diode. The gate of the fourth transistor is connected to the first light-emitting control signal line, the first terminal of the fourth transistor is connected to the first power supply voltage terminal, the second terminal of the fourth transistor is connected to the first terminal of the first transistor, the second terminal of the first transistor is connected to the first terminal of the fifth transistor, the second terminal of the fifth transistor is connected to the first terminal of the light-emitting diode, the second terminal of the light-emitting diode is connected to the second power supply voltage terminal, and the gate of the fifth transistor is connected to the second light-emitting control signal line.

8. The pixel circuit according to claim 7, characterized in that, The pixel circuit further includes a second initialization module, which is connected between the initialization signal line and the first end of the light-emitting module, and the control terminal of the second initialization module is connected to the third scan line; the control terminal of the compensation module is connected to the first scan line. The coupling module includes a first capacitor, the compensation module includes a sixth transistor, and the second initialization module includes a seventh transistor. The first terminal of the first capacitor is connected to the signal providing terminal, the second terminal of the first capacitor is connected to the first terminal of the first transistor, the first terminal of the sixth transistor is connected to the first terminal of the first transistor, the second terminal of the sixth transistor is connected to the gate of the first transistor, the gate of the sixth transistor is connected to the first scan line, the first terminal of the seventh transistor is connected to the initialization signal line, the second terminal of the seventh transistor is connected to the first terminal of the light-emitting diode, and the gate of the seventh transistor is connected to the third scan line.

9. The pixel circuit according to claim 7, characterized in that, The pixel circuit further includes a second initialization module, which is connected between the initialization signal line and the first end of the light-emitting module. The control terminal of the second initialization module is connected to the third scan line. The control terminal of the compensation module is connected to the third scan line.

10. The pixel circuit according to claim 8 or 9, characterized in that, The pixel circuit also includes a storage module, which is connected between the control terminal of the driving module and the first terminal of the light-emitting module; The storage module includes a second capacitor, the first terminal of which is connected to the control terminal of the driving module, and the second terminal of which is connected to the first terminal of the light-emitting module.

11. The pixel circuit according to claim 6, characterized in that, The driving module includes a first transistor, which is an N-type transistor.

12. A pixel circuit, characterized in that, include: The module consists of a driver module, a data writing module, a first initialization module, a compensation module, and a coupling module. The compensation module is connected between the control terminal and the first terminal of the drive module, and the compensation module is used to compensate the threshold voltage of the drive module during the compensation phase. The data writing module and the first initialization module are connected to the first node; The coupling module is connected between the first end of the driving module and the first node. The first initialization module is used to transmit a fixed voltage to the coupling module. The coupling module is used to transmit the voltage containing data voltage information transmitted by the data writing module to the control end of the driving module during the data writing phase. The data writing phase is later than the compensation phase, and the duration of the compensation phase is longer than the duration of the data writing phase.

13. The pixel circuit according to claim 12, characterized in that, The data writing module includes a second transistor, the gate of which is connected to a first scan line, the first electrode of which is connected to a data line, and the second electrode of which is connected to the first node; The first initialization module includes a third transistor, the gate of which is connected to a second scan line, the first terminal of which is connected to the fixed voltage, and the second terminal of which is connected to the first node; Preferably, both the second transistor and the third transistor are N-type transistors; Preferably, the pixel circuit further includes a light-emitting module, and the driving module and the light-emitting module are connected between a first power supply voltage terminal and a second power supply voltage terminal. The driving module is used to drive the light-emitting module to emit light. Preferably, the first power supply voltage connected to the first power supply voltage terminal is the same as the fixed voltage.

14. The pixel circuit according to claim 13, characterized in that, The pixel circuit also includes a first light-emitting control module and a second light-emitting control module. The first light-emitting control module is connected between the first power supply voltage terminal and the first terminal of the driving module; the second light-emitting control module is connected between the second terminal of the driving module and the first terminal of the light-emitting module; the second terminal of the light-emitting module is connected to the second power supply voltage terminal; the control terminal of the first light-emitting control module is connected to the first light-emitting control signal line; and the control terminal of the second light-emitting module is connected to the second light-emitting control signal line. Preferably, the second light emission control signal line is multiplexed as the second scan line; Preferably, the driving module includes a first transistor, the first light-emitting control module includes a fourth transistor, the second light-emitting control module includes a fifth transistor, and the light-emitting module includes a light-emitting diode; The gate of the fourth transistor is connected to the first light-emitting control signal line, the first terminal of the fourth transistor is connected to the first power supply voltage terminal, the second terminal of the fourth transistor is connected to the first terminal of the first transistor, the second terminal of the first transistor is connected to the first terminal of the fifth transistor, the second terminal of the fifth transistor is connected to the first terminal of the light-emitting diode, the second terminal of the light-emitting diode is connected to the second power supply voltage terminal, and the gate of the fifth transistor is connected to the second light-emitting control signal line.

15. The pixel circuit according to claim 13, characterized in that, The control terminal of the compensation module is connected to the third scan line; The pixel circuit further includes a second initialization module. The control terminal of the second initialization module is connected to the third scan line, the first terminal of the second initialization module is connected to the initialization signal line, and the second terminal of the second initialization module is connected to the first terminal of the light-emitting module. The second initialization module is used to transmit the initialization voltage on the initialization signal line to the first terminal of the light-emitting module. Preferably, the pixel circuit further includes a third initialization module, the control terminal of the third initialization module is connected to the fourth scan line, the first terminal of the third initialization module is connected to the initialization signal line, and the second terminal of the third initialization module is connected to the first terminal of the light-emitting module. The third initialization module is used to transmit the initialization voltage to the first terminal of the light-emitting module within a write frame in a display cycle, and to transmit the initialization voltage to the first terminal of the light-emitting module within a hold frame in the same display cycle. Preferably, the compensation module includes a sixth transistor, the second initialization module includes a seventh transistor, the gate of the sixth transistor and the gate of the seventh transistor are both connected to the third scan line, the first terminal of the sixth transistor is connected to the first terminal of the driving module, the second terminal of the sixth transistor is connected to the control terminal of the driving module, the first terminal of the seventh transistor is connected to the initialization signal line, and the second terminal of the seventh transistor is connected to the first terminal of the light-emitting module. Preferably, the third initialization module includes an eighth transistor, the gate of the eighth transistor is connected to the fourth scan line, the first terminal of the eighth transistor is connected to the initialization signal line, and the second terminal of the eighth transistor is connected to the first terminal of the light-emitting module; Preferably, the first scan line is multiplexed as the fourth scan line.

16. The pixel circuit according to claim 13, characterized in that, The control terminal of the compensation module is connected to the third scan line; The pixel circuit further includes a second initialization module. The control terminal of the second initialization module is connected to the fifth scan line, the first terminal of the second initialization module is connected to the initialization signal line, and the second terminal of the second initialization module is connected to the first terminal of the light-emitting module. The second initialization module is used to transmit the initialization voltage on the initialization signal line to the first terminal of the light-emitting module.

17. The pixel circuit according to claim 13, characterized in that, The pixel circuit also includes a storage module, which is connected between the control terminal of the driving module and the first terminal of the light-emitting module; Preferably, the storage module includes a second capacitor, the first terminal of which is connected to the control terminal of the driving module, and the second terminal of which is connected to the first terminal of the light-emitting module.

18. A pixel circuit, characterized in that, include: The module consists of a driver module, a data writing module, a first initialization module, and a storage module. One end of the storage module is connected to the control terminal of the drive module, and the storage module is used to store the threshold voltage of the drive module during the compensation phase; The data writing module and the first initialization module are connected to the first node; The first initialization module is used to transmit a fixed voltage to the first node, and the data writing module is used to transmit a data voltage to the first node during the data writing phase. The data writing phase is later than the compensation phase, and the duration of the compensation phase is longer than the duration of the data writing phase.

19. The pixel circuit according to claim 18, characterized in that, The driving module includes a first transistor, which is an N-type transistor; The data writing module includes a second transistor, which is an N-type transistor; The first initialization module includes a third transistor, which is an N-type transistor.

20. The pixel circuit according to claim 18, characterized in that, The pixel circuit further includes a coupling module, which is connected between the first end of the driving module and the first node. The coupling module is used to couple the voltage containing data voltage information to the control end of the driving module via the compensation module during the data writing stage.

21. The pixel circuit according to claim 18, characterized in that, The first initialization module is used to provide a fixed voltage to the first node during the initialization phase, and the first initialization module is also used to provide a fixed voltage to the first node during the compensation phase.

22. The pixel circuit according to claim 18, characterized in that, The pixel circuit also includes a light-emitting module, a first light-emitting control module, and a second light-emitting control module; The first light-emitting control module is connected between the first power supply voltage terminal and the first terminal of the driving module, and the second light-emitting control module is connected between the second terminal of the driving module and the first terminal of the light-emitting module. The second terminal of the light-emitting module is connected to the second power supply voltage terminal. The control terminal of the first light-emitting control module is connected to the first light-emitting control signal line, and the control terminal of the second light-emitting module is connected to the second light-emitting control signal line. The first light-emitting control signal and the second light-emitting control signal are different.

23. The pixel circuit according to claim 18, characterized in that, The pixel circuit further includes a second initialization module and a light-emitting module. The first end of the second initialization module is connected to an initialization signal line, and the second end of the second initialization module is connected to the first end of the light-emitting module. The second initialization module is used to transmit the initialization voltage on the initialization signal line to the first end of the light-emitting module.

24. A driving method for a pixel circuit, characterized in that, include: During the compensation phase, a fixed voltage is provided to the first terminal of the first capacitor; During the data writing phase, a data voltage is provided to the first terminal of the first capacitor; During the light-emitting stage, the control and driving module drives the light-emitting module to emit light according to the voltage at its own control terminal; The data writing phase is later than the compensation phase, and the duration of the compensation phase is longer than the duration of the data writing phase.

25. The driving method for a pixel circuit according to claim 24, characterized in that, The pixel circuit also includes a data writing module and a first initialization module; Providing a fixed voltage to the first terminal of the first capacitor includes: The first initialization module is controlled to provide a fixed voltage to the first terminal of the first capacitor. Providing a data voltage to the first terminal of the first capacitor includes: The data writing module is controlled to provide a data voltage to the first terminal of the first capacitor; Preferably, the pixel circuit further includes a second initialization module and a compensation module, and the driving method of the pixel circuit further includes: during the initialization phase, controlling the second initialization module to transmit the initialization voltage to the first terminal of the light-emitting module, and controlling the compensation module to transmit the potential of the first terminal of the driving module to the control terminal of the driving module.

26. The driving method for a pixel circuit according to claim 24, characterized in that, The pixel circuit further includes a second initialization module and a compensation module; the driving method of the pixel circuit further includes: During the compensation phase, the control compensation module compensates the threshold voltage of the drive module based on the voltage after the first terminal of the drive module is discharged through the drive module and the second initialization module.

27. The driving method for a pixel circuit according to claim 24, characterized in that, The driving method for the pixel circuit further includes: during the data writing stage, transmitting a voltage containing the data voltage information to the control terminal of the driving module; Preferably, the pixel circuit further includes a compensation module, and the step of transmitting the voltage containing the data voltage information to the control terminal of the driving module during the data writing stage includes: During the data writing phase, the first capacitor is controlled to couple the voltage containing the data voltage information to the control terminal of the drive module via the compensation module.

28. The driving method for a pixel circuit according to claim 25, characterized in that, The driving method for the pixel circuit further includes: during the initialization phase, controlling the first initialization module to provide a fixed voltage to the first terminal of the first capacitor.

29. A display panel, characterized in that, Includes the pixel circuit as described in any one of claims 1-23.

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