A solid-state circuit breaker based on a gate-connected transistor and a control method thereof
By employing a combination of gate-connected transistors and monitoring, control, and buffer energy absorption modules in solid-state circuit breakers, the problems of high conduction loss and poor stability of voltage-controlled power devices under high voltage and high current scenarios are solved, achieving low-cost and high-stability circuit breaker performance.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- NAVAL UNIV OF ENG PLA
- Filing Date
- 2026-04-30
- Publication Date
- 2026-05-29
AI Technical Summary
In existing solid-state circuit breakers, voltage-controlled power devices such as IGBTs and MOSFETs suffer from high conduction losses, poor stability, and high cost in high-voltage and high-current scenarios.
By using a gate-connected transistor as the core switching element, combined with a monitoring module, a control module, and a buffer energy absorption module, real-time monitoring and precise control of the main power circuit can be achieved. The current control characteristics of the gate-connected transistor reduce conduction losses, and the energy absorption module absorbs energy during the switching process, thereby improving stability and reliability.
It reduces conduction losses, improves the long-term operational stability and reliability of the system, and reduces costs, achieving high-efficiency and low-cost circuit breaker performance.
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Figure CN122118616A_ABST
Abstract
Description
Technical Field
[0001] This application belongs to the field of solid-state circuit breakers, specifically relating to a solid-state circuit breaker based on interlocking transistors and its control method. Background Technology
[0002] Currently, direct current (DC) systems are widely used in various fields, such as data centers, electric vehicles, rail transportation, ships, and photovoltaic energy storage. However, DC systems have a rapid short-circuit current rise rate, while traditional mechanical circuit breakers have a slow operating speed, typically on the order of milliseconds. This makes it difficult to interrupt the circuit before the current reaches the device's tolerance limit, easily leading to equipment damage or even serious accidents such as fires. Therefore, developing a new type of circuit breaker that can quickly and reliably protect DC systems is of crucial practical significance.
[0003] Solid-state circuit breakers (SSDs) have become an ideal replacement for traditional mechanical circuit breakers due to their significant advantages, including ultra-fast microsecond-level operation, absence of mechanical contacts, long lifespan, and high reliability. Power devices are the core of SSDs, and their characteristics directly determine their performance to a certain extent. Key factors to consider in SSD development include conduction losses, breaking capacity, withstand capability, turning-off time, and price. However, current SSDs primarily employ voltage-controlled power devices such as Insulated-Gate Bipolar Transistors (IGBTs) and Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs), which suffer from high conduction losses, poor stability, and high cost in high-voltage, high-current scenarios. Summary of the Invention
[0004] In view of the shortcomings of the prior art, the purpose of this application is to provide a solid-state circuit breaker based on interlocking transistors and its control method, which aims to solve the problems of high conduction loss, poor stability and high cost of current solid-state circuit breakers due to the limitation of voltage-controlled power device selection.
[0005] The first aspect of this application relates to a solid-state circuit breaker based on a gate-connected transistor, comprising: a power module, a monitoring module, a control module, and a buffer energy absorption module; the power module includes at least one gate-connected transistor device, and one or more gate-connected transistor devices are connected in series to form a main power loop; the output terminal of the control module is connected to the base of the gate-connected transistor device; the detection terminal of the monitoring module is disposed in the main power loop, and the output terminal of the monitoring module is connected to the input terminal of the control module; the buffer energy absorption module is disposed in the main power loop; the monitoring module is configured to monitor the operating status signal of the main power loop and output it to the control module; the control module is configured to control the gate-connected transistor device to switch from a conducting state to an open state when the operating status signal does not meet a preset threshold condition; the buffer energy absorption module is configured to absorb the energy during the opening and closing process of the gate-connected transistor device.
[0006] In one embodiment, the power module includes a switching unit; the switching unit includes a first gate transistor device and a second gate transistor device; the emitter of the first gate transistor device is connected to the emitter of the second gate transistor device; the collector of the first gate transistor device is connected to a first port of the main circuit; and the collector of the second gate transistor device is connected to a second port of the main circuit.
[0007] In one embodiment, the power module includes: at least two switching units; each switching unit includes: a first gate transistor device and a second gate transistor device; the collectors of the first gate transistor devices of the multiple switching units are interconnected to form a parallel first terminal; the collectors of the second gate transistor devices of the multiple switching units are interconnected to form a parallel second terminal; the parallel first terminal is connected to a first port of the main circuit; and the parallel second terminal is connected to a second port of the main circuit.
[0008] In one embodiment, when the current in the main circuit is bidirectional DC or single-phase AC, the control module is configured to control the gate transistor device corresponding to the current flow direction to turn off according to the current direction detected by the monitoring module when the operating status signal does not meet the preset threshold condition; when the current in the main circuit is multi-phase AC, the control module is configured to control the gate transistor device of the corresponding branch to turn off according to the current direction and phase of each phase detected by the monitoring module in a preset order when the operating status signal does not meet the preset threshold condition.
[0009] In one embodiment, the control module includes: a drive unit and a controller, the same number as the gate-connected transistor devices; the output of the controller is connected to the input of the drive unit; the output of the drive unit is connected to the base of the gate-connected transistor devices; the drive unit includes: a drive circuit containing power switching devices; the controller is used to generate a control signal based on the signal from the monitoring module and output it to the drive unit; the drive unit is configured to respond to the control signal by controlling the on / off state of the power switching devices to turn on or off the drive current flowing to the base of the gate-connected transistors.
[0010] In one embodiment, the drive unit further includes an isolation drive device; the isolation drive device is connected between the output of the controller and the controlled terminal of the power switching device to achieve electrical isolation and signal amplification.
[0011] In one embodiment, the monitoring module includes: a temperature monitoring unit, a current monitoring unit, and a voltage monitoring unit; the temperature monitoring unit is disposed on the surface of the gate transistor device or on a heat sink and is configured to monitor the junction temperature or case temperature; the current monitoring unit is disposed in the main power circuit and is configured to monitor the magnitude and direction of the circuit current; the voltage monitoring unit is connected in parallel across the two ends of the power module and is configured to monitor the voltage.
[0012] In one embodiment, the buffer energy absorption module includes: a metal oxide varistor and / or a transient voltage suppressor diode; the metal oxide varistor and / or transient voltage suppressor diode are connected in parallel across the two ends of the power module to absorb the energy generated during the turn-off process of the gate transistor device and limit the turn-off overvoltage by clamping voltage.
[0013] The second aspect of this application relates to a solid-state circuit breaker control method based on gate-connected transistors, applying the solid-state circuit breaker based on gate-connected transistors of the first aspect. The method includes: acquiring the operating status signal of the main power circuit in real time through a monitoring module; determining whether the operating status signal meets a preset threshold condition through a control module; and controlling the gate-connected transistors to perform a disconnection operation in response to the operating status signal not meeting the preset threshold condition.
[0014] In one embodiment, the disconnection operation includes: when the current flowing in the main power circuit is bidirectional DC or single-phase AC, the control module turns off the gate transistor device corresponding to the current direction according to the current direction indicated by the current signal; when the current flowing in the main power circuit is multi-phase AC, the control module turns off the gate transistor device corresponding to each phase branch in sequence according to the current direction and phase of each phase indicated by the current signal and in a preset shutdown sequence.
[0015] Overall, the technical solutions conceived in this application have the following beneficial effects compared with the prior art: The technical solution proposed in this application replaces commonly used voltage-controlled devices such as IGBTs and MOSFETs in the prior art by employing a gate-connected transistor, a current-controlled bipolar power device, as the core switching element of a solid-state circuit breaker. This gate-connected transistor exhibits a low on-state voltage drop characteristic with conductivity modulation effect when turned on, thereby directly reducing the conduction loss of the main power circuit during normal operation and solving the problem of high on-state loss of existing voltage-controlled devices in high-voltage, high-current applications.
[0016] Meanwhile, its bipolar conductivity mechanism and unique interconnected gate structure endow the device with inherent high robustness, such as strong shock resistance and a positive temperature coefficient. The latter enables automatic current balancing when multiple transistors are connected in parallel, avoiding the risk of local overheating and thermal runaway caused by uneven current, fundamentally improving the long-term operational stability of the system. In addition, this device can usually be manufactured using relatively simple planar processes or mature processes similar to IGBTs. When achieving similar voltage and current levels, it has a potential cost advantage compared to some high-voltage voltage-controlled devices that require complex termination technologies or epitaxial processes.
[0017] Meanwhile, the monitoring module collects the operating status of the main power circuit in real time and responds quickly through the control module. In the event of a fault, it precisely controls the base drive of the gate transistor to switch its switching state. This closed-loop design enhances the accuracy and response speed of the protection and improves the overall stability. In addition, the buffer energy absorption module absorbs the energy generated during the interruption process in a timely manner, avoiding damage to the gate transistor by voltage spikes, and further ensuring reliability and lifespan.
[0018] Compared with existing technologies, this solution not only reduces losses and costs through the inherent performance advantages of gate-connected transistors, but also optimizes the dynamic performance of circuit breakers through modular collaborative operation, achieving high efficiency, high stability and low cost. Attached Figure Description
[0019] Figure 1 This is a structural block diagram of a solid-state circuit breaker based on interlocking transistors provided in an embodiment of this application; Figure 2 This is a schematic diagram of the solid-state circuit breaker based on interlocking transistors provided in the embodiments of this application; Figure 3 A schematic diagram of the GAT topology for a solid-state circuit breaker based on gate-connected transistors (GAT) provided in this application embodiment; Figure 4 A schematic diagram of the low-power driving scheme topology for a solid-state circuit breaker based on interlocking transistors provided in this application embodiment; Figure 5 A control and protection logic block diagram of a solid-state circuit breaker based on interlocking transistors provided for embodiments of this application; Figure 6 This is a flowchart illustrating the solid-state circuit breaker control method based on interlocking transistors provided in an embodiment of this application.
[0020] In all the accompanying drawings, the same reference numerals are used to denote the same elements or structures, wherein: 10 is the power module; 20 is the monitoring module; 30 is the control module; and 40 is the buffer energy absorption module. Detailed Implementation
[0021] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.
[0022] In this application, the term "and / or" describes the relationship between related objects, indicating that three relationships can exist. For example, A and / or B can represent three cases: A existing alone, A and B existing simultaneously, and B existing alone. In this application, the symbol " / " indicates that the related objects are in an "or" relationship, for example, A / B means A or B.
[0023] In this application, the terms "first" and "second," etc., are used to distinguish different objects, not to describe a specific order of objects. For example, "first response message" and "second response message," etc., are used to distinguish different response messages, not to describe a specific order of response messages. The term "electrical connection" in this application can refer to a direct circuit connection or signal transmission via a communication protocol.
[0024] In the embodiments of this application, the terms "exemplary" or "for example" are used to indicate that something is an example, illustration, or description. Any embodiment or design that is described as "exemplary" or "for example" in the embodiments of this application should not be construed as being more preferred or advantageous than other embodiments or design. Specifically, the use of the terms "exemplary" or "for example" is intended to present the relevant concepts in a specific manner.
[0025] In the description of the embodiments of this application, unless otherwise stated, "multiple" means two or more, for example, multiple processing units means two or more processing units, multiple elements means two or more elements, etc.
[0026] It should be noted that, unlike voltage-controlled power devices such as IGBTs and MOSFETs, Gate Associated Transisters (GATs) raise the voltage rating of transistors to the level of one kilovolt. As a current-controlled power device, it has outstanding features such as ultra-low on-resistance, self-current limiting, latch-up-free operation, high thermal stability, high avalanche tolerance, and low cost. Solid-state circuit breakers based on GATs can significantly reduce system costs while ensuring high performance, thereby better meeting the needs of practical engineering applications.
[0027] Based on this, this application proposes an embodiment of a solid-state circuit breaker based on interlocking transistors. Please refer to... Figure 1 , Figure 1 This is a structural block diagram of a solid-state circuit breaker based on interlocking transistors provided in an embodiment of this application.
[0028] In this embodiment, the solid-state circuit breaker based on gate-connected transistors includes a power module 10, a monitoring module 20, a control module 30, and a buffer energy absorption module 40. These modules work together through electrical connections to jointly realize the normal conduction and fault interruption functions of the circuit.
[0029] The power module 10 includes at least one gate-connected transistor device, and one or more gate-connected transistor devices are connected to the main circuit to form the main power loop.
[0030] It should be noted that a gate-connected transistor is a current-controlled bipolar power semiconductor device. Its base is the current-driven terminal, and the on / off state between the collector and emitter is controlled by injecting or extracting base current.
[0031] As can be understood, the main circuit refers to the complete electrical system consisting of a power source, load, and necessary wires; it is the original path for electrical energy transmission. The power module 10 controls the on / off state of the main circuit by connecting its gate-connected transistor devices to this path. Specifically, this connection means connecting the collector and emitter terminals of the gate-connected transistor devices in series or parallel to the phase lines or DC positive and negative terminals of the main circuit, thus making it the necessary path for the main circuit current to flow.
[0032] Understandably, when using a single gate-connected transistor (GMT) device, it alone assumes all the responsibility of system interruption. When using more than one device, they are connected in series or in parallel, forming a physical link consisting of multiple GMT transistors.
[0033] It should be noted that the current path formed by one or more series-connected gate transistors is defined as the main power loop. It is the core section in the main circuit that carries all operating current. The core purpose of series connection is voltage division: in the off state, the total system voltage is distributed across the collector-emitter terminals of each series-connected gate transistor. For example, if the rated blocking voltage of a single device is 800V, then two such devices connected in series can theoretically withstand a system voltage of 1600V, thus meeting the application requirements for higher voltage levels. This series structure is the basic means by which this scheme extends the voltage rating of the circuit breaker.
[0034] In alternative implementations, the gate-connected transistor devices can be of the same type and specifications, or they can be devices of different voltage and current ratings but designed to work together. Furthermore, the main power circuit is not limited to being composed solely of gate-connected transistor devices; it can also include small series components such as sampling resistors (shunts) for current sensing or auxiliary contacts for status indication, as long as they do not substantially affect the current-carrying and disconnecting functions of the main circuit.
[0035] It should be noted that the output terminal of the control module 30 is connected to the base of the gate transistor device; the detection terminal of the monitoring module 20 is located in the main power circuit, and the output terminal of the monitoring module 20 is connected to the input terminal of the control module 30; the buffer energy absorption module 40 is located in the main power circuit.
[0036] Understandably, the output of the control module 30 is connected to the base of the gate transistor device, and this connection constitutes a direct drive path for the power switch.
[0037] Specifically, the output terminal of control module 30 refers to the output pin of the final power drive stage inside control module 30. It is ultimately connected to the base pin on the gate transistor device package via wires, PCB traces, or the secondary winding of the isolation drive transformer. The purpose of this connection is to transmit drive current: when conduction is required, the output terminal provides sufficient forward base current to saturate the device; when turn-off is required, the output terminal provides a low-impedance path or applies a reverse bias voltage to quickly remove the stored charge in the base and collector regions, achieving rapid turn-off.
[0038] It is understandable that setting the detection end of the monitoring module 20 in the main power circuit means that its sensor element is physically or electrically connected or coupled to the main power circuit to directly or indirectly sense the circuit status. Common setup methods include: for monitoring current, placing the magnetic core of a Hall effect current sensor on the wires of the main circuit, or connecting a precision shunt resistor in series with a gate-connected transistor; for monitoring voltage, directly connecting a high-voltage differential probe or a resistor divider network in parallel between the collector and emitter of the gate-connected transistor.
[0039] It is understandable that connecting the output of the monitoring module 20 to the input of the control module 30 means that the electrical signal converted by the sensor, usually a standardized voltage signal such as 0-3.3V, is transmitted to the signal acquisition port of the control module 30, for example, connected to the input channel of the analog-to-digital converter or the input of the comparator.
[0040] It is understandable that the placement of the buffer energy absorption module 40 in the main power circuit primarily refers to its parallel connection with the nodes in the main power circuit that require protection. The most typical placement is a direct parallel connection across the two ends of a gate-connected transistor device, i.e., between the collector and emitter, or a parallel connection across a component in the main circuit that has significant parasitic inductance or load inductance. This parallel connection ensures that the buffer energy absorption module 40 provides a low-impedance bypass path when voltage spikes occur during switching operations.
[0041] Furthermore, the monitoring module 20 is configured to monitor the operating status signal of the main power circuit and output it to the control module 30; the control module 30 is configured to control the gate transistor device to switch from the on state to the off state when the operating status signal does not meet the preset threshold condition; the buffer energy absorption module 40 is configured to absorb the energy during the switching process of the gate transistor device.
[0042] It is understandable that the configuration of control module 30 defines the protection logic of the circuit breaker. Operating status signals include, but are not limited to, loop current signals, voltage signals, and temperature signals of power devices.
[0043] Specifically, the preset threshold conditions are one or more sets of reference values or algorithm models stored in the control module 30. For example, a fixed overcurrent threshold Ia and an adjustable delay time t are preset. The control module 30 continuously compares the monitored real-time current Ib with the overcurrent threshold Ia. When the logical judgment that Ib is greater than Ia is true, it is determined that the operating status signal does not meet the preset threshold conditions. Subsequently, the execution unit of the control module 30 will immediately, or after an adjustable delay t, change the level or current direction of its output terminal, and send a turn-off command to the base of the gate transistor, forcing it to exit the saturated conduction state and enter the turn-off state. Of course, more complex threshold conditions can also be configured, such as voltage-current combination judgment, etc.
[0044] Understandably, the configuration of the energy buffer module 40 describes its core protection function. At the moment of shutdown, the parasitic inductance in the main power circuit generates an induced voltage due to the sudden change in current; if this energy has nowhere to dissipate, it will form a destructive voltage spike. The energy buffer module 40 absorbs this energy by providing a controlled discharge path.
[0045] Specifically, based on the above, this application proposes a feasible implementation method. Please refer to... Figure 2 , Figure 2 This is a schematic diagram of the solid-state circuit breaker based on interlocking transistors provided in the embodiments of this application.
[0046] In this embodiment, the power module 10 includes a switching unit; the switching unit includes a first gate transistor device and a second gate transistor device; the emitter of the first gate transistor device is connected to the emitter of the second gate transistor device; the collector of the first gate transistor device is connected to the first port of the main circuit; and the collector of the second gate transistor device is connected to the second port of the main circuit.
[0047] It should be noted that the power module 10 is in Figure 2 GAT is used to refer to this. Please refer to the specific structure for details. Figure 3 , Figure 3 A schematic diagram of the GAT topology for a solid-state circuit breaker based on gate-connected transistors provided in this application embodiment.
[0048] exist Figure 3 In this configuration, Q1 and Q2 are Gaussian junction diodes (GATs), and D1 and D2 are their body diodes, thus enabling reverse conduction of a single diode. Using a dual-GAT anti-series topology, bidirectional DC switching or single-phase AC control can be achieved.
[0049] Understandably, this connection method constitutes a special symmetrical series structure, where the emitters of the two devices are electrically common. When the bases of the two gate-connected transistor devices are turned on by the drive current applied by the control module 30, the current path is as follows: from the first port of the main circuit, through the collector of Q1 to its emitter, and then from the common emitter connection point through D2 to the second port of the main circuit. At this time, the main current flows through Q1 and D2 in series. Conversely, it flows through Q2 and D1. This common emitter connection method brings a simplification advantage in drive circuit design.
[0050] For consistency, Q1 and D1 are designated as the upper transistors, and Q2 and D2 as the lower transistors. Current flows sequentially through the upper transistor, with the current in the lower transistor being positive. When the current is positive, the upper transistor is on, and the lower transistor is off, with current flowing through the upper transistor channel and the lower diode. When the current is negative, the upper transistor is off, and the lower transistor is on, with current flowing through the lower transistor channel and the upper diode, thus achieving bidirectional current flow.
[0051] Furthermore, if the power module 10 includes at least two switching units, a parallel expansion structure can be adopted to improve the overall current carrying capacity of the solid-state circuit breaker. The collectors of the first gate transistor devices of the multiple switching units are interconnected to form a parallel first terminal; the collectors of the second gate transistor devices of the multiple switching units are interconnected to form a parallel second terminal; the parallel first terminal is connected to the first port of the main circuit; and the parallel second terminal is connected to the second port of the main circuit.
[0052] Understandably, this connection method achieves pure parallel connection of multiple switching units. Its core purpose is to distribute the total current by introducing multiple parallel current paths when the rated current or short-circuit current that the main circuit needs to carry exceeds the current capacity of a single switching unit. For example, if the continuous current carrying capacity of a single switching unit is 100A, then two such units connected in parallel can theoretically safely carry a total current of approximately 200A. In this structure, after the total current flows in from the first parallel terminal, it is automatically distributed according to the impedance of each parallel branch, flows through each switching unit, and finally converges at the second parallel terminal before flowing out. Inside each switching unit, the current still follows the aforementioned series path: it flows in from the collector of the first device in the unit, flows through its emitter to the common emitter connection point, then flows into the emitter of the second device, and finally flows out from its collector.
[0053] It is worth noting that the parallel connection of multiple switching units can improve the current carrying capacity and reduce power circuit losses, while also achieving device self-current sharing by utilizing the GAT characteristic.
[0054] Understandably, employing a parallel structure of multiple switching units not only achieves a linear increase in current carrying capacity but also effectively reduces the overall on-resistance of the main power circuit by increasing the total conduction cross-sectional area, thereby significantly reducing conduction losses under normal conduction conditions. This is a direct advantage of the parallel structure.
[0055] More importantly, this solution fully utilizes the inherent positive temperature coefficient of gate-connected transistors (GMT transistors) to achieve automatic current sharing at the device level when connected in parallel. The specific principle is as follows: When multiple GMT transistors are operating in parallel, if the current in one branch is temporarily higher due to parameter dispersion, its junction temperature will rise more rapidly due to increased power loss. Because GMT transistors have a positive temperature coefficient, their on-state voltage drop or on-resistance increases with junction temperature. The increased on-resistance of the device in that branch due to temperature rise automatically reduces its share of current; conversely, branches with lower current, due to slower temperature rise and relatively lower resistance, will automatically carry more current. This dynamic negative feedback adjustment process automatically promotes current balance in all parallel branches without the need for external active control circuitry.
[0056] It should be noted that the main circuit can usually adopt a bidirectional or AC topology composed of a bridge structure / half-bridge structure, and there are four cases: unidirectional DC, bidirectional DC, single-phase AC, and multi-phase AC.
[0057] Therefore, when the current in the main circuit is bidirectional DC or single-phase AC, the control module 30 is configured to control the current flow to turn off the corresponding gate transistor device according to the current direction detected by the monitoring module 20 when the operating status signal does not meet the preset threshold condition.
[0058] It is understood that when the solid-state circuit breaker is applied to a bidirectional DC or single-phase AC main circuit, its topology determines that the current has a bidirectional flow path, and the current in different directions is carried by different gate transistor devices, or by switching units composed of them. In this configuration, the control module 30 is configured to execute directional shutdown logic based on the current direction.
[0059] Specifically, the monitoring module 20 not only detects the current amplitude but also the real-time direction of the current. This can be achieved by using a bidirectional current sensor or by detecting the voltage polarity across the shunt resistor connected in series in the circuit. When the operating status signal does not meet the preset threshold condition, the control module 30 first reads the real-time current direction signal provided by the monitoring module 20. If the current is positive, the control module 30 only sends a turn-off command to the base of the gate transistor device carrying the positive current; if the current is reverse, it only sends a turn-off command to the device carrying the reverse current. For example, in a bidirectional DC circuit breaker composed of two switching units connected in reverse parallel, turning off only the unit in the current conduction direction can avoid unnecessary operation on the other non-conducting unit and ensure a fast and accurate interruption of the fault current path.
[0060] Therefore, when the current in the main circuit is multiphase AC, the control module 30 is configured to control the gate transistor devices of the corresponding branch to turn off in a preset order according to the direction and phase of each phase current detected by the monitoring module 20 when the operating status signal does not meet the preset threshold conditions.
[0061] Understandably, when applied to three-phase or multi-phase AC main circuits, the system complexity and protection requirements increase further. In this case, the monitoring module 20 is configured to simultaneously monitor the current of each phase line and obtain the real-time current direction and phase information of each phase. This typically requires multiple current sensors combined with circuits or algorithms such as phase-locked loops to reconstruct the phase relationship of the currents in each phase.
[0062] Specifically, the control module 30 is configured to execute sequential shutdown logic based on phase sequence and phase. When the operating status signal does not meet the preset threshold conditions, the response of the control module 30 is based not only on fault detection but also on system stability. One preset sequence might be: immediately shutting down the phase with the most severe fault, such as the switching unit corresponding to the phase with the largest current; subsequently, according to a preset delay, such as 1 to 2 power frequency cycles, combined with the detected current direction and phase of the remaining phases, shutting down the switching units of the other phases in a specific order, such as prioritizing the shutdown of the lagging phase, to avoid cutting off the large inductor current at non-zero crossing points and generating extremely high overvoltages, or to maintain the temporary power supply of non-faulty phases to support selective protection.
[0063] It should be noted that another possible sequence is to send turn-off commands to the switching units of all phases simultaneously, but to set a small time difference for each phase drive signal based on its current phase angle, so as to achieve a break at an approximate natural zero-crossing point and reduce impact.
[0064] In this embodiment, the control module 30 includes: a drive unit and a controller, the same number as the gate-connected transistor devices; the output terminal of the controller is connected to the input terminal of the drive unit; the output terminal of the drive unit is connected to the base of the gate-connected transistor devices; the drive unit includes: a drive circuit containing power switching devices; the controller is used to generate a control signal based on the signal from the monitoring module 20 and output it to the drive unit; the drive unit is configured to respond to the drive control signal by controlling the on / off state of the power switching devices to turn on or off the drive current flowing to the base of the gate-connected transistor.
[0065] Specifically, this is a modular, distributed drive architecture. At its core, this architecture includes a controller and multiple drive units, the same number as the gate-connected transistors, forming a one-to-many control relationship. The controller's output is connected to the input of each drive unit; and the output of each drive unit is specifically connected to the base of a corresponding gate-connected transistor. This one-to-one correspondence ensures that each power switching device receives independent and dedicated drive control, facilitating precise switching timing control and current sharing management.
[0066] Understandably, the core of each drive unit is a drive circuit containing power switching devices, such as MOSFETs, IGBTs, or bipolar transistors. The function of this unit is to execute commands issued by the controller, specifically by switching the drive current path to the base of the gate-connected transistor on or off. When the drive unit receives a turn-on command from the controller, i.e., the corresponding drive control signal, its internal power switching device closes, thereby providing drive current to the base of the connected gate-connected transistor, causing it to enter a saturated conduction state. Conversely, when a turn-off command is received, the internal power switching device opens, cutting off the base drive current and causing the gate-connected transistor to quickly turn off.
[0067] Understandably, in this architecture, the controller acts as the central processing unit, its core function being to perform real-time calculations and logical judgments based on the operating status signals input from the monitoring module 20. When the operating status does not meet preset threshold conditions, such as overcurrent or short circuit, the controller generates a corresponding control signal, typically a digital logic level or PWM waveform. This signal is transmitted to the corresponding drive unit through its output. The drive unit, acting as both a power interface and actuator, is configured to respond to this control signal. Upon receiving a valid drive control signal, the drive unit immediately activates, controlling the on / off state of the gate transistors in the main circuit through the switching operations of its internal power switching devices, thereby completing the protective disconnection of the circuit.
[0068] Specifically, the controller can be a microcontroller, digital signal processor, programmable logic device, or dedicated protection and control chip. Its output signals can be simple GPIO high / low levels, PWM waves, or more complex serial communication commands. The drive current can be provided by an independent power supply inside the drive unit, or by the power supply on the controller side after switching through a power switching device.
[0069] In addition, the drive unit also includes: an isolation drive device; the isolation drive device is connected between the output of the controller and the controlled terminal of the power switching device to achieve electrical isolation and signal amplification.
[0070] As can be understood, electrical isolation refers to establishing a barrier without direct electrical connection between the controller and the power switching devices and the main power circuit. This is achieved through the internal isolation mechanism of the isolation drive devices. Signal amplification refers to converting the logic level signal output by the controller, which has weak current driving capability, into a strong drive signal required to quickly and reliably drive the gate or base of the power switching devices. The controlled terminals of power switching devices typically have considerable capacitive input impedance, requiring a sufficiently large transient charging and discharging current to achieve rapid turn-on and turn-off.
[0071] Further, please refer to Figure 4 , Figure 4 This is a schematic diagram of the low-power driving scheme topology for a solid-state circuit breaker based on interlocking transistors provided in an embodiment of this application.
[0072] In a preferred embodiment, the driving unit includes: an isolated gate driver, a power supply, a buck converter, and a MOSFET switch as a power switching device. The power supply powers the isolated gate driver and the buck converter; the output of the buck converter powers the drain of the MOSFET switch; the output of the controller is connected to the input of the isolated gate driver; the output of the isolated gate driver is connected to the gate of the MOSFET switch; the source of the MOSFET switch is connected to the base of the gate-connected transistor. The isolated gate driver receives the PWM signal from the controller, performs electrical isolation and power amplification, and then drives the MOSFET switch to switch on and off, thereby controlling the path of the base current.
[0073] Therefore, the isolation power supply powers the MOSFET gate driver and generates a low-voltage current source of approximately 1V through a buck converter. This current source provides positive power to the MOSFET totem pole. When the drive signal is high, the gate driver IC drives the upper MOSFET totem pole to connect to the positive power supply, thereby driving GAT to turn on; when the drive signal is low, the gate driver IC drives the lower MOSFET totem pole to ground, thereby driving GAT to turn off. Figure 4 The solution is to connect two GATs in parallel. If you need to increase the current carrying capacity, you can connect multiple GATs in parallel using the same method.
[0074] Meanwhile, since each circuit's GAT is controlled independently, the number of circuits to be started can be selected according to the actual load current, reducing the overall loss of the circuit breaker and greatly increasing the flexibility of the circuit breaker's use.
[0075] besides, Figure 2 The monitoring module 20 includes a temperature monitoring unit, a current monitoring unit, and a voltage monitoring unit. The temperature monitoring unit is disposed on the surface of the gate transistor device or on the heat sink and is configured to monitor the junction temperature or case temperature. The current monitoring unit is disposed in the main power circuit and is configured to monitor the magnitude and direction of the circuit current. The voltage monitoring unit is connected in parallel across the two ends of the power module 10 and is configured to monitor the voltage.
[0076] Understandably, these three units work together to provide the control module 30 with comprehensive and accurate operating status signals. The control module 30's algorithm can use the combination of these signals to more accurately diagnose fault types, such as overload, short circuit, overheating, and surge, thereby executing more optimized protection strategies, such as distinguishing between transient overloads and permanent faults, or implementing overcurrent protection based on temperature derating.
[0077] In addition, the buffer energy absorption module 40 includes: a metal oxide varistor and / or a transient voltage suppressor diode; the metal oxide varistor and / or transient voltage suppressor diode are connected in parallel across the two ends of the power module 10 to absorb the energy generated during the turn-off process of the gate transistor device and limit the turn-off overvoltage by clamping voltage.
[0078] In summary, please refer to Figure 5 , Figure 5 This is a control and protection logic block diagram of a solid-state circuit breaker based on interlocking transistors provided in an embodiment of this application.
[0079] Understandably, this flowchart illustrates the complete workflow of a solid-state circuit breaker control system based on gate-attached transistors (GATs). After system startup, initialization is performed, followed by a command waiting state. Upon receiving a valid closing command from the host computer, the system controls the GAT to close, thus enabling the main power circuit to conduct.
[0080] During normal operation, the system continuously executes high-priority monitoring and protection logic in a loop: first, it samples the voltage, current, and device temperature of the main circuit in real time, and then simultaneously performs multiple fault judgments. If the most severe fault, a momentary short circuit, is detected, the system will immediately trigger the GAT to disconnect; if an overvoltage or undervoltage fault is detected, it will also perform a direct disconnection. For overcurrent situations, inverse-time protection logic is activated, which dynamically adjusts the delay time according to the degree of overcurrent to achieve a balance between rapid short-circuit protection and overload tolerance.
[0081] After any fault action that causes disconnection is completed, the system will enter the fault recovery state, complete the status recording and alarm. The process does not terminate, but automatically returns and waits for instructions from the host computer, thus forming a closed-loop control system with automatic reset and continuous standby capabilities.
[0082] In this embodiment, dual hardware short-circuit protection based on current sampling comparison and gate driver desaturation is implemented; software protection based on current sampling is implemented to achieve delayed overcurrent protection for main circuit overload; hardware protection based on desaturation serves as backup protection to adapt to the boundary of the safe operating area of the power circuit hardware; software protection based on voltage sampling is implemented to achieve overvoltage and undervoltage protection of the circuit breaker; and software protection based on temperature sampling is implemented to achieve over-temperature protection and thermal management of the entire solid-state circuit breaker.
[0083] In this embodiment, the gate-connected transistor is fully utilized to extend the transistor's operating voltage level to the kilovolt level. When current is applied, it can operate in the deep saturation region, achieving a low on-state voltage drop of no more than 0.3V. This directly reduces the requirements for heat dissipation components, thereby reducing the overall size, weight, and cost of the device. Under a certain driving current, it can automatically limit the short-circuit current level during a fault, reducing damage to load devices and power supply cables. It has supply chain support capabilities, supporting the reduction of solid-state circuit breaker costs. It is economical and practical, easy to promote, and contributes to the safe and large-scale development of the electric transportation industry.
[0084] In addition, this application also proposes an embodiment of a solid-state circuit breaker control method based on interlocking transistors, which applies the solid-state circuit breaker based on interlocking transistors of the first aspect.
[0085] Please refer to Figure 6 , Figure 6 This is a flowchart illustrating a solid-state circuit breaker control method based on interlocking transistors provided in an embodiment of this application. In this embodiment, the method includes: Step S10: The operating status signal of the main power circuit is acquired in real time through the monitoring module.
[0086] Understandably, the monitoring module continuously and in real time collects the operating status signals of the main power circuit, including multi-dimensional parameters such as the magnitude and direction of the circuit current, voltage, and temperature of the gate transistor devices, providing a data basis for status judgment.
[0087] Step S20: The control module determines whether the running status signal meets the preset threshold conditions.
[0088] Understandably, the control module, such as a microcontroller, compares and logically judges the acquired real-time signals with various preset threshold conditions, such as overcurrent threshold, overvoltage / undervoltage threshold, overtemperature threshold, and inverse time protection curve, to accurately identify whether the system has experienced faults such as short circuits, overloads, abnormal voltages, or overheating. When it is determined that the operating status signal does not meet any preset threshold condition, i.e., when a fault is confirmed, step S30 is executed.
[0089] Step S30: In response to the running status signal not meeting the preset threshold condition, control the gate transistor to perform a disconnection operation.
[0090] Understandably, the control module immediately generates a disconnect command. This command, after electrical isolation and power amplification by the drive unit, is applied to the base of the corresponding gate-connected transistor in the power module. By controlling its base current, the transistor is quickly turned off, thereby executing the disconnection operation of the main power circuit. This method, through closed-loop logic, fully utilizes the fast switching characteristics of the gate-connected transistor to achieve fast, accurate, and intelligent circuit protection based on multi-parameter comprehensive judgment.
[0091] Specifically, the disconnection operation includes: when the current flowing in the main power circuit is bidirectional DC or single-phase AC, the control module turns off the gate transistor device corresponding to the current direction according to the current direction indicated by the current signal; when the current flowing in the main power circuit is multi-phase AC, the control module turns off the gate transistor device corresponding to each phase branch in sequence according to the current direction and phase of each phase indicated by the current signal and in a preset shutdown sequence.
[0092] The control method provided in this application's embodiments derives from and fully corresponds to the technical advantages achieved by the aforementioned solid-state circuit breaker embodiments. This method, through a closed-loop control logic, specifically and directly invokes the hardware system constructed from the gate-connected transistor, monitoring module, control module, and buffer energy absorption module. It transforms the inherent low conduction loss, high robustness, positive temperature coefficient, and cost advantages of the gate-connected transistor, as well as the rapid response and reliable protection capabilities brought about by the modular system design, into actual control effects through a programmed sequence of steps. Therefore, this method enables the solid-state circuit breaker to achieve high efficiency, high stability, and low cost during operation. Its beneficial effects are the same as those described in the aforementioned device embodiments and will not be repeated here.
[0093] It should be understood that expressions such as “comprising” and “may include” used in this application indicate the existence of the disclosed functions, operations, or constituent elements, and do not limit one or more additional functions, operations, and constituent elements. In this application, terms such as “comprising” and / or “having” are to be interpreted as indicating a particular characteristic, number, operation, constituent element, component, or combination thereof, but not to exclude the existence or possibility of adding one or more other characteristics, numbers, operations, constituent elements, components, or combinations thereof.
[0094] Furthermore, in this application, the expression "and / or" includes any and all combinations of the associated listed words. For example, the expression "A and / or B" may include A, may include B, or may include both A and B.
[0095] The above description is merely a specific embodiment of this application, but the scope of protection of this application is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this application should be included within the scope of protection of this application. Therefore, the scope of protection of this application should be determined by the scope of the claims.
Claims
1. A solid-state circuit breaker based on interlocking transistors, characterized in that, include: Power module, monitoring module, control module, and buffer energy absorption module; The power module includes at least one gate-connected transistor device, and one or more gate-connected transistor devices are connected to the main circuit to form the main power loop. The output terminal of the control module is connected to the base of the gate transistor device; the detection terminal of the monitoring module is located in the main power circuit, and the output terminal of the monitoring module is connected to the input terminal of the control module; the buffer energy absorption module is located in the main power circuit. The monitoring module is configured to monitor the operating status signal of the main power circuit and output it to the control module; The control module is configured to control the gate transistor device to switch from the on state to the off state when the operating status signal does not meet the preset threshold condition; The buffer energy absorption module is configured to absorb the energy during the switching process of the gate transistor device.
2. The solid-state circuit breaker based on gate-connected transistors as described in claim 1, characterized in that, The power module includes: a switching unit; The switching unit includes: a first gate transistor device and a second gate transistor device; The emitter of the first gate transistor is connected to the emitter of the second gate transistor; the collector of the first gate transistor is connected to the first port of the main circuit; and the collector of the second gate transistor is connected to the second port of the main circuit.
3. The solid-state circuit breaker based on gate-connected transistors as described in claim 2, characterized in that, The power module includes at least two switching units; The switching unit includes: a first gate transistor device and a second gate transistor device; The collectors of the first gate transistors of multiple switching units are interconnected to form a first parallel terminal; the collectors of the second gate transistors of multiple switching units are interconnected to form a second parallel terminal; the first parallel terminal is connected to the first port of the main circuit; the second parallel terminal is connected to the second port of the main circuit.
4. The solid-state circuit breaker based on gate-connected transistors as described in claim 3, characterized in that, When the current in the main circuit is bidirectional DC or single-phase AC, the control module is configured to control the gate transistor device corresponding to the current flow direction to turn off when the operating status signal does not meet the preset threshold condition, based on the current direction detected by the monitoring module. When the current in the main circuit is multiphase AC, the control module is configured to control the gate transistor devices of the corresponding branches to turn off in a preset order according to the direction and phase of each phase current detected by the monitoring module when the operating status signal does not meet the preset threshold conditions.
5. The solid-state circuit breaker based on gate-connected transistors as described in any one of claims 1 to 3, characterized in that, The control module includes: a drive unit and a controller, the same number as the gate-connected transistor devices; The output terminal of the controller is connected to the input terminal of the drive unit; the output terminal of the drive unit is connected to the base of the gate transistor device. The driving unit includes: a driving circuit containing power switching devices; The controller is used to generate control signals based on the signals from the monitoring module and output them to the drive unit; The drive unit is configured to respond to the control signal by controlling the switching of the power switching device to turn on or off the drive current flowing to the base of the gate transistor.
6. The solid-state circuit breaker based on gate-connected transistors as described in claim 5, characterized in that, The drive unit further includes: an isolated drive device; The isolation drive device is connected between the output terminal of the controller and the controlled terminal of the power switch device to achieve electrical isolation and signal amplification.
7. The solid-state circuit breaker based on gate-connected transistors as described in claim 1, characterized in that, The monitoring module includes: a temperature monitoring unit, a current monitoring unit, and a voltage monitoring unit; The temperature monitoring unit is disposed on the surface of the gate transistor device or on the heat sink and is configured to monitor the junction temperature or case temperature. The current monitoring unit is located in the main power circuit and is configured to monitor the magnitude and direction of the circuit current. The voltage monitoring unit is connected in parallel across the two ends of the power module and is configured to monitor the voltage.
8. The solid-state circuit breaker based on gate-connected transistors as described in claim 1, characterized in that, The energy-absorbing buffer module includes: a metal oxide varistor, and / or a transient voltage suppression diode; The metal oxide varistor and / or transient voltage suppressor diode are connected in parallel across the power module to absorb the energy generated during the turn-off process of the gate transistor device and limit the turn-off overvoltage by clamping voltage.
9. A solid-state circuit breaker control method based on interlocking transistors, characterized in that, The method, applied to a solid-state circuit breaker based on a gate-connected transistor as described in any one of claims 1 to 8, comprises: The monitoring module acquires the operating status signal of the main power circuit in real time. The control module determines whether the operating status signal meets the preset threshold condition. In response to the operating status signal not meeting the preset threshold condition, the gate transistor is controlled to perform a disconnection operation.
10. The solid-state circuit breaker control method based on gate-connected transistors as described in claim 9, characterized in that, The segmentation operation includes: When the current flowing in the main power circuit is bidirectional DC or single-phase AC, the control module turns off the gate transistor device corresponding to the current direction according to the current direction indicated by the current signal. When the current flowing in the main power circuit is multiphase AC, the control module turns off the gate transistor devices corresponding to each phase branch in sequence according to the current direction and phase indicated by the current signal and in a preset turn-off order.