Wafer structure and method of manufacturing the same

Abstract

The application provides a wafer structure and a preparation method thereof, relates to the technical field of semiconductor chips, and aims to solve the problem of low alignment accuracy of photolithography in the preparation process of semiconductor devices on a wafer. The wafer structure comprises a chip and a cutting path surrounding the chip. The chip comprises a substrate and a gate pattern layer which are arranged in a stacking mode along a first direction, and further comprises a gate oxide pattern layer arranged between the substrate and the gate pattern layer, wherein the first direction is the thickness direction of the wafer structure. The substrate extends to the cutting path, and the cutting path comprises an alignment structure arranged on the substrate. The alignment structure comprises a first material. The first material in the alignment structure is configured such that, at a preset wavelength, the reflectivity of the alignment structure is greater than the reflectivity of the substrate.

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