An amplitude mapping based sparse array optimization method and related devices

Abstract

This invention discloses a sparse array optimization method and related equipment based on amplitude mapping. The method includes: acquiring array information and preset sparse constraints of an antenna array; initializing an amplitude weight matrix based on the array information and sparse constraints; mapping the amplitude weight matrix to a sparse binary layout; quantizing the sidelobe level based on the sparse binary layout; if the sidelobe level meets preset requirements, the corresponding sparse binary layout is used as a sparse array; otherwise, the amplitude weight matrix is ​​updated through an optimization algorithm, and the step of mapping the amplitude weight matrix to a sparse binary layout is returned to be executed until the sidelobe level meets the preset requirements. This invention transforms the discrete, massive cell position combination search problem into a continuous, relatively low-dimensional amplitude weight optimization problem, which can greatly compress the solution space and thus efficiently complete the optimization of large-scale arrays. It can be widely applied in the field of data processing technology.

Description

Technical Field

[0001] This invention relates to the field of data processing technology, and in particular to a sparse array optimization method and related equipment based on amplitude mapping. Background Technology

[0002] Large-scale antenna arrays have significant applications in radar, communications, and other fields; however, the high cost and power consumption resulting from dense deployments are becoming increasingly prominent issues. Sparse array technology, by selectively activating some elements, can effectively reduce the number of elements while maintaining the aperture, and has become a key technological direction. However, existing sparse array design methods still have significant shortcomings: Direct optimization methods suffer from high computational complexity and are prone to getting trapped in local optima: Metaheuristic direct sparse optimization methods, such as genetic algorithms and particle swarm optimization, treat cell positions as discrete 0 / 1 variables for searching. As the array size increases, the solution space grows exponentially (e.g., for an N-element array, the solution space size is 2^N), resulting in a huge computational burden and excessive time consumption during the optimization process. Furthermore, the algorithms are highly susceptible to getting trapped in local optima, making it difficult to obtain a sparse layout with excellent global performance.

[0003] Methods based on convex optimization or compressed sensing have limited adaptability: These methods transform non-convex sparse optimization problems into convex problems through mathematical reconstruction (such as L1 regularization), which improves computational efficiency, but has inherent limitations: First, they require strict mathematical models and constraints (such as convexity) for the optimization problem, making it difficult to handle complex geometric constraints in practical engineering (such as irregular array shapes or obstacles inside the array); Second, the reconstruction process itself introduces approximation errors, which may affect the electrical performance of the final sparse array. Summary of the Invention

[0004] The main objective of this invention is to propose a sparse array optimization method, apparatus, electronic device, storage medium, and program product based on amplitude mapping, aiming to solve at least one problem in the prior art.

[0005] To achieve the above objectives, one aspect of this invention proposes a sparse array optimization method based on amplitude mapping, the method comprising: Obtain the array information and preset sparse constraints of the antenna array; where the array information includes the total number of array elements and the position information of the array elements; The magnitude weight matrix is ​​initialized based on array information and sparse constraints; the weight matrix includes the magnitude weight of each array element. The magnitude weight matrix is ​​mapped to a sparse binary layout; where the sparse binary layout includes the activation state of each array cell. The sidelobe level is quantized based on a sparse binary layout. If the sidelobe level meets the preset requirements, the corresponding sparse binary layout is used as a sparse array; otherwise... The amplitude weight matrix is ​​updated by optimizing the algorithm, and the process of mapping the amplitude weight matrix to a sparse binary layout is repeated until the sidelobe level meets the preset requirements.

[0006] In some embodiments, the magnitude weight matrix is ​​initialized based on array information and sparse constraints, including the following steps: Determine the number of retained units based on sparse constraints; The amplitude weight of each array unit is assigned a random value within a preset range, and the sum of the amplitude weights of all array units is equal to the number of reserved units.

[0007] In some embodiments, if the sparsity constraint is a sparsity rate, determining the number of retained cells based on the sparsity constraint includes the following steps: The number of cells to be retained is determined by multiplying the total number of cells in the array by the sparsity rate.

[0008] In some embodiments, mapping the magnitude weight matrix to a sparse binary layout includes the following steps: Based on the magnitude of the magnitude weights in the magnitude weight matrix, the array cells with the reserved number of cells are marked as active state values, and the remaining array cells are marked as inactive state values, resulting in a sparse binary layout. The number of retained cells is determined based on sparse constraints.

[0009] In some embodiments, based on the magnitude of the magnitude weights in the magnitude weight matrix, an array of array cells with a reserved number of cells are marked as active state values, including the following steps: The antenna array is divided into multiple array regions; Normalize the amplitude weights corresponding to all array regions to obtain the amplitude weighted value for each array region; Based on the amplitude weighting value and the number of reserved units, the number of active units in each array region is determined proportionally. The array cell with the largest number of active cells in the array region is marked as the active state value.

[0010] In some embodiments, quantizing the sidelobe level based on a sparse binary layout includes the following steps: The radiation pattern is obtained by transforming the sparse binary layout; the radiation pattern includes the main lobe direction and the highest sidelobe direction. The sidelobe level is determined based on the difference between the direction of the highest sidelobe and the direction of the main lobe.

[0011] In some embodiments, the optimization algorithm includes one or more combinations of genetic algorithm, particle swarm optimization, differential evolution, simulated annealing, and gradient descent. When the optimization algorithm is a genetic algorithm, updating the magnitude weight matrix through the optimization algorithm includes the following steps: Population determination based on amplitude weight matrix; Genetic operations are performed based on a preset genetic configuration to update the population as the updated magnitude weight matrix; Genetic operations include one or more combinations of mutation, crossover, and selection operations.

[0012] To achieve the above objectives, another aspect of the present invention proposes a sparse array optimization device based on amplitude mapping, the device comprising: The first module is used to acquire the array information of the antenna array and the preset sparse constraints; wherein, the array information includes the total number of array elements and the position information of the array elements; The second module is used to initialize the magnitude weight matrix based on array information and sparse constraints; wherein the weight matrix includes the magnitude weight of each array cell; The third module is used to map the magnitude weight matrix to a sparse binary layout; wherein the sparse binary layout includes the activation state of each array cell; The fourth module is used to quantize the sidelobe level based on the sparse binary layout. If the sidelobe level meets the preset requirements, the corresponding sparse binary layout is used as a sparse array; otherwise, the operation of the subsequent modules is executed. The fifth module is used to update the amplitude weight matrix through an optimization algorithm, and then return to execute the operation of the third module until the sidelobe level meets the preset requirements.

[0013] To achieve the above objectives, another aspect of the present invention provides an electronic device, which includes a memory and a processor. The memory stores a computer program, and the processor executes the computer program to implement the aforementioned method.

[0014] To achieve the above objectives, another aspect of the present invention provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the aforementioned method.

[0015] To achieve the above objectives, another aspect of the present invention provides a computer program product, including a computer program that, when executed by a processor, implements the aforementioned method.

[0016] The embodiments of the present invention include at least the following beneficial effects: The present invention provides a sparse array optimization method, apparatus, electronic device, storage medium, and program product based on amplitude mapping. This scheme obtains the array information of the antenna array and preset sparse constraints; wherein, the array information includes the total number of array elements and the position information of the array elements; initializes an amplitude weight matrix based on the array information and sparse constraints; wherein, the weight matrix includes the amplitude weight of each array element; maps the amplitude weight matrix to a sparse binary layout; wherein, the sparse binary layout includes the activation state of each array element; quantizes the sidelobe level based on the sparse binary layout; if the sidelobe level meets the preset requirements, the corresponding sparse binary layout is used as a sparse array; otherwise, the amplitude weight matrix is ​​updated through an optimization algorithm, and the step of mapping the amplitude weight matrix to a sparse binary layout is returned to be executed until the sidelobe level meets the preset requirements. This invention transforms the discrete, massive search problem of combining cell positions into a continuous, relatively low-dimensional amplitude weight optimization problem, which greatly compresses the solution space and enables efficient optimization of large-scale arrays. Furthermore, this invention employs a closed-loop iterative framework of "optimization-mapping-evaluation," where the optimization objective is directly based on the performance of the mapped real sparse layout. This ensures that the optimization direction always aims to improve the performance of the final sparse array and effectively avoids the problem of blindly searching in the discrete space and easily getting trapped in local optima, a problem common in traditional methods. Specifically, this invention dynamically couples "amplitude design" and "position selection" through the mapping process, forming a unified optimization flow that provides a flexible framework for handling various array configurations (regular / irregular) and complex constraints. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of an implementation environment for the sparse array optimization method based on amplitude mapping provided in an embodiment of the present invention; Figure 2 This is a flowchart illustrating a sparse array optimization method based on amplitude mapping provided in an embodiment of the present invention. Figure 3 This is a schematic diagram illustrating an example of a sparse mathematical model provided in an embodiment of the present invention; Figure 4 This is a schematic diagram comparing the time-sidelobe example of the sparse framework provided in this embodiment of the invention with that of traditional sparse methods; Figure 5(a) is a schematic diagram of a full array layout example provided in an embodiment of the present invention; Figure 5(b) is a schematic diagram of an amplitude weighting example under a sparse framework provided in an embodiment of the present invention; Figure 5(c) is a schematic diagram of an example of a sparse array layout provided in an embodiment of the present invention; Figure 5(d) is a schematic diagram of an example of a sparse array orientation provided in an embodiment of the present invention; Figure 5(e) is a schematic diagram of a two-dimensional sparse array example provided in an embodiment of the present invention; Figure 5(f) is a schematic diagram of a one-dimensional direction example of u=0 provided in an embodiment of the present invention; Figure 5(g) is a schematic diagram of a one-dimensional direction example of u=sin30°cos30° provided in an embodiment of the present invention; Figure 6 This is a schematic diagram of the structure of a sparse array optimization device based on amplitude mapping provided in an embodiment of the present invention; Figure 7 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present invention. Detailed Implementation

[0018] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention. In the following description, when referring to the accompanying drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the embodiments of this invention; they are merely examples of apparatuses and methods consistent with some aspects of the embodiments of this invention as detailed in the appended claims.

[0019] It is understood that the terms “first,” “second,” etc., used in this invention may be used herein to describe various concepts, but unless specifically stated otherwise, these concepts are not limited by these terms. These terms are used only to distinguish one concept from another. For example, first information may also be referred to as second information without departing from the scope of embodiments of the invention, and similarly, second information may also be referred to as first information. Depending on the context, the words “if,” “when,” or “in response to determination” as used herein may be interpreted as “when…” or “when…” or “in response to determination.”

[0020] The terms “at least one,” “multiple,” “each,” “any,” etc., used in this invention, “at least one” includes one, two, or more than two; “multiple” includes two or more than two; “each” refers to each of the corresponding multiple; and “any” refers to any one of the multiple.

[0021] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention pertains. The terminology used herein is for the purpose of describing embodiments of the invention only and is not intended to limit the invention.

[0022] In related technologies, there is an urgent need for a new sparse array design method that can reduce computational complexity, avoid local optima, flexibly adapt to various array configurations and constraints, and effectively coordinate amplitude optimization and position selection.

[0023] In view of this, this invention provides a sparse array optimization method and related device based on amplitude mapping. This method obtains the array information of the antenna array and preset sparse constraints. The array information includes the total number of array elements and the position information of the array elements. An amplitude weight matrix is ​​initialized based on the array information and sparse constraints. The weight matrix includes the amplitude weight of each array element. The amplitude weight matrix is ​​mapped to a sparse binary layout. The sparse binary layout includes the activation state of each array element. The sidelobe level is quantized based on the sparse binary layout. If the sidelobe level meets preset requirements, the corresponding sparse binary layout is used as a sparse array; otherwise, the amplitude weight matrix is ​​updated using an optimization algorithm, and the process of mapping the amplitude weight matrix to a sparse binary layout is repeated until the sidelobe level meets the preset requirements. This invention transforms the discrete, massive search problem of combining cell positions into a continuous, relatively low-dimensional amplitude weight optimization problem, which greatly compresses the solution space and enables efficient optimization of large-scale arrays. Furthermore, this invention employs a closed-loop iterative framework of "optimization-mapping-evaluation," where the optimization objective is directly based on the performance of the mapped real sparse layout. This ensures that the optimization direction always aims to improve the performance of the final sparse array and effectively avoids the problem of blindly searching in the discrete space and easily getting trapped in local optima, a problem common in traditional methods. Specifically, this invention dynamically couples "amplitude design" and "position selection" through the mapping process, forming a unified optimization flow that provides a flexible framework for handling various array configurations (regular / irregular) and complex constraints.

[0024] It is understood that the sparse array optimization method based on amplitude mapping provided by this invention can be applied to any computer device with data processing and computing capabilities, and this computer device can be various terminals or servers. When the computer device in the embodiment is a server, the server is an independent physical server, or a server cluster or distributed system composed of multiple physical servers, or a cloud server that provides basic cloud computing services such as cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communication, middleware services, domain name services, security services, CDN (Content Delivery Network), and big data and artificial intelligence platforms. Optionally, the terminal can be a smartphone, tablet, laptop, or desktop computer, but it is not limited to these.

[0025] like Figure 1The diagram shown is a schematic representation of an implementation environment provided by an embodiment of the present invention. (Refer to...) Figure 1 The implementation environment includes at least one terminal 102 and a server 101. The terminal 102 and the server 101 can be connected via a network, either wirelessly or via a wired connection, to complete data transmission and exchange.

[0026] Server 101 can be a standalone physical server, a server cluster or distributed system consisting of multiple physical servers, or a cloud server that provides basic cloud computing services such as cloud services, cloud databases, cloud computing, cloud functions, cloud storage, network services, cloud communication, middleware services, domain name services, security services, CDN (Content Delivery Network), and big data and artificial intelligence platforms.

[0027] Additionally, server 101 can also be a node server in a blockchain network. Blockchain is a novel application model of computer technologies such as distributed data storage, peer-to-peer transmission, consensus mechanisms, and encryption algorithms.

[0028] Terminal 102 can be a smartphone, tablet computer, laptop computer, desktop computer, smart speaker, smartwatch, etc., but is not limited to these. Terminal 102 and server 101 can be directly or indirectly connected via wired or wireless communication, and this embodiment of the invention does not impose any limitations.

[0029] For example, based on Figure 1 The implementation environment shown in this embodiment of the invention provides a sparse array optimization method based on amplitude mapping. The following description uses the application of this sparse array optimization method based on amplitude mapping in server 101 as an example. It can be understood that this sparse array optimization method based on amplitude mapping can also be applied to terminal 102.

[0030] Reference Figure 2 , Figure 2 This is an optional flowchart of the sparse array optimization method based on amplitude mapping provided in the embodiments of the present invention. The execution subject of the sparse array optimization method based on amplitude mapping can be any of the aforementioned computer devices (including servers or terminals). Figure 2 The method may include, but is not limited to, steps S100 to S500.

[0031] Step S100: Obtain the array information of the antenna array and the preset sparse constraint conditions; The array information includes the total number of array elements and the position information of the array elements; Step S200: Initialize the magnitude weight matrix based on array information and sparse constraints; The weight matrix includes the magnitude weight of each array unit; It should be noted that in some embodiments, step S200 may include the following steps: determining the number of reserved units based on sparse constraints; assigning an amplitude weight to each array unit by a random value in a preset interval, and making the sum of the amplitude weights of all array units equal to the number of reserved units.

[0032] It should be noted that in some embodiments, if the sparsity constraint is the sparsity rate, determining the number of retained cells based on the sparsity constraint may include the following steps: determining the number of retained cells based on the product of the total number of full array cells and the sparsity rate.

[0033] The sparse constraint can also be directly set as the number of cells to be retained.

[0034] For example, in some specific implementations, taking a total number of cells M=5625 and a sparsity rate of 10% as an example, the number of cells to be retained is determined. =563. During initialization, each unit is randomly assigned an amplitude weight value within the interval [0,1]. Then these weights are scaled as a whole to ensure that their sum is exactly equal to the sum of all weights. ,Right now This generates the initial magnitude weight matrix.

[0035] Specifically, by forcing the sum of initial weights to equal the number of retained units, the embodiments of the present invention can avoid the optimization process from exploring invalid solution regions (i.e., the total number of units does not meet the requirements), thereby improving optimization efficiency and providing a feasible starting point for the iterative process.

[0036] Step S300: Map the magnitude weight matrix to a sparse binary layout; The sparse binary layout includes the activation state of each array element; It should be noted that, in some embodiments, step S300 may include the following steps: based on the magnitude of the magnitude weights in the magnitude weight matrix, the array cells of the number of reserved cells are marked as active state values, and the remaining array cells are marked as inactive state values, to obtain a sparse binary layout; wherein, the number of reserved cells is determined based on sparse constraints.

[0037] For example, in some specific implementations, after obtaining the magnitude weight matrix, the weight values ​​of all units are sorted, and the units with the largest weight values ​​are selected. 563 units (let's assume) are used in a sparse binary layout. The middle cell is marked with "1" (activated), and the remaining cells are marked with "0" (deactivated).

[0038] Specifically, embodiments of the present invention implement a direct and efficient amplitude-to-position mapping mechanism. The method logic of the embodiments of the present invention is simple, and it can clearly transform the "amplitude importance" of optimization concern into "position selection", ensuring that units with large weight values ​​(regions that may contribute more to performance) are more likely to be retained, so that the optimization process has a clear physical orientation.

[0039] It should be noted that in some embodiments, the array element with the number of reserved elements is marked as the active state value based on the magnitude of the amplitude weight in the amplitude weight matrix. This may include the following steps: dividing the antenna array into multiple array regions; normalizing the amplitude weight corresponding to all array regions to obtain the amplitude weighted value of each array region; determining the number of active elements in each array region proportionally based on the amplitude weight and the number of reserved elements; and marking the array element with the largest number of active elements in the array region as the active state value.

[0040] For example, in some specific implementations, it is assumed that a 75×75 array is uniformly divided into multiple sub-regions (such as a 15×15 grid). First, the amplitude weights of all cells within each sub-region are summed and normalized to obtain the "amplitude weighted value" for that region; then, based on the proportion of the weighted value of each region to the global total, the total number of retained cells is determined. The units are allocated proportionally to each region (rounded down); finally, within each region, several units with the largest magnitude weights are independently selected and activated (the number equals the allocated number of units).

[0041] Specifically, the embodiments of the present invention allocate activation units proportionally by partitioning, which can avoid all activation units being overly concentrated in a certain local high-weight region, and promote a more uniform distribution of sparse units within the aperture, which is beneficial for suppressing gate lobes and abnormal sidelobes, thereby improving the engineering feasibility and stability of the results; the mapping rules of the embodiments of the present invention are deterministic, so that the same amplitude distribution will produce the same sparse layout, reducing randomness and facilitating the convergence of the optimization process and the repeatability of the results.

[0042] Step S400: Quantize the sidelobe level based on the sparse binary layout. If the sidelobe level meets the preset requirements, use the corresponding sparse binary layout as a sparse array; otherwise, execute the subsequent steps. It should be noted that, in some embodiments, quantizing the sidelobe level based on a sparse binary layout may include the following steps: obtaining a radiation pattern based on the sparse binary layout; wherein the radiation pattern includes the main lobe direction and the highest sidelobe direction; and determining the sidelobe level based on the difference between the highest sidelobe direction and the main lobe direction.

[0043] For example, in some specific implementations, a sparse binary layout is obtained. Then, the array factor can be calculated based on the antenna theory formula, and thus the three-dimensional radiation pattern can be obtained. Then, find the direction of maximum radiation of the main lobe from the radiation pattern. and the direction of the highest side lobe Sidelobe level Quantified as: (Usually expressed in dB).

[0044] Specifically, the embodiments of the present invention provide accurate performance evaluation indicators that are directly linked to engineering objectives; wherein, by specifying the optimization objective as minimizing the highest sidelobe level, it is completely consistent with the core requirements of low sidelobe array design; and, this quantization method can clearly reflect the true performance of the sparse layout after each iteration, providing a reliable feedback signal for the optimization algorithm.

[0045] Step S500: Update the amplitude weight matrix by optimizing the algorithm, and return to execute the step of mapping the amplitude weight matrix to a sparse binary layout until the sidelobe level meets the preset requirements. It should be noted that the optimization algorithm includes one or more combinations of genetic algorithm, particle swarm optimization, differential evolution, simulated annealing and gradient descent. In some embodiments, when the optimization algorithm is a genetic algorithm, updating the magnitude weight matrix through the optimization algorithm may include the following steps: determining the population based on the magnitude weight matrix; performing genetic operations based on a preset genetic configuration to update the population as the updated magnitude weight matrix; wherein, the genetic operations include one or more combinations of mutation operation, crossover operation and selection operation.

[0046] For example, in some specific implementations, when a genetic algorithm is selected as the optimization engine, the magnitude weight matrix of the current generation is encoded as individuals in the population; for example, the population size can be set to 200, the crossover rate to 0.8, and the mutation rate defined. In each generation, genetic operations such as selection, crossover, and mutation are performed on the population to generate a new magnitude weight matrix (offspring population) for the next round of mapping and evaluation.

[0047] Specifically, the genetic algorithm used in the embodiments of the present invention is a global search algorithm that does not rely on the gradient information of the objective function. It can handle well the complex and non-convex search space brought about by the combination of magnitude weight optimization and discrete mapping in the present invention. In addition, its parallel search characteristics help to escape local optima and find better global or near-global optimal solutions, which is particularly suitable for the optimization framework involved in the present invention.

[0048] To explain in detail the principle of the technical solution of the present invention, the overall process of the present invention will be described below with reference to some specific embodiments. It is easy to understand that the following is an explanation of the technical principle of the present invention and should not be regarded as a limitation of the present invention.

[0049] First, it should be noted that traditional methods suffer from a disconnect in the "amplitude-position" co-optimization: existing methods typically treat amplitude weighting (for suppressing sidelobes) and cell selection (for achieving sparsity) as two relatively independent steps or problems. This separation may lead to a severe degradation in the performance of the optimized amplitude distribution after sparsification, or the need to sacrifice pattern performance to achieve sparsity constraints, making it difficult to achieve an effective balance between low sidelobes and high sparsity.

[0050] Therefore, the purpose of this invention is to overcome the shortcomings of existing sparse array design methods in terms of computational complexity, optimization stability, and geometric adaptability, and to provide an efficient and stable sparse array optimization framework based on amplitude optimization-mapping. This framework transforms the discrete cell position optimization problem into a continuous amplitude weight optimization task, and combines it with a deterministic mapping method to achieve rapid generation and performance improvement of sparse array layouts.

[0051] In some specific embodiments, the present invention can be implemented through the following process steps: Input the position information of the antenna array elements and set the sparse constraints; The amplitude weights of the array cells are optimized using an optimization algorithm, with the objective function being to minimize the sidelobe level. The optimized magnitude weight distribution is converted into a binary layout of a sparse array using a mapping method; A cell position selection mechanism is embedded in the optimization loop to dynamically adjust the sparse layout to improve performance. After each optimization iteration, the magnitude is updated and a mapping is triggered directly, with the mapped layout fed back into the optimization function.

[0052] In some alternative implementations, the amplitude mapping method is applicable to any mapping algorithm capable of converting a continuous amplitude distribution into a sparse binary layout, including but not limited to probabilistic mapping, deterministic mapping, or machine learning-based mapping methods. Preferably, a relatively deterministic mapping method can be used, i.e., the normalized amplitude weighted sum within the same region is the same as the number of cells.

[0053] In some optional implementations, the optimization algorithm includes, but is not limited to, genetic algorithms, particle swarm optimization, differential evolution, simulated annealing, gradient descent, or combinations thereof. Preferably, a genetic algorithm can be used. Other optimization methods (such as convex optimization or compressed sensing) typically require mathematical reconstruction of the original problem (e.g., transforming a non-convex problem into a convex problem or using L1 regularization), which alters the problem properties and introduces approximation errors. Genetic algorithms, as a direct search method, can directly handle the original discrete layout optimization problem, avoiding the additional interference from reconstruction, thus allowing for a fairer comparison of the true performance of different layout strategies (such as QAM and density-weighted methods). For example, with a population size of 200 and a crossover rate of 0.8, it is applicable to both large-scale and small-scale arrays, and the objective function is defined as:

[0054] in, The array factor is the sparse array. In the direction of the main lobe The direction of the highest sidelobe.

[0055] In some optional implementations, the number of iterations can be set to avoid data processing redundancy.

[0056] In some alternative implementations, sparse constraints are not part of the optimization objective but are enforced during the mapping phase. The constraints are as follows:

[0057] in, The total number of units in full formation. For the first The amplitude weight of each array unit, This represents the number of units retained after sparsification.

[0058] In some optional implementations, the framework combines amplitude weight optimization with location selection through a mapping integration strategy. That is, mapping is performed immediately after optimizing the amplitude weights, and the radiation pattern is re-evaluated after obtaining the sparse mapping result. The specific implementation is as follows: like Figure 3 As shown, in each generation of optimization iteration, the current magnitude weight is... Real-time mapping to sparse layout ; Based on sparse results Calculate the radiation pattern and evaluate the sidelobe performance; Adjust the magnitude weight distribution based on performance feedback, and enter the next optimization cycle.

[0059] In some alternative implementations, the framework of this invention supports a variety of array configurations, including regular arrays, irregular arrays, and array layouts with internal barriers, adapting to different geometric constraints through the versatility of amplitude mapping.

[0060] In some specific application scenarios, embodiments of the present invention can achieve the following: 1. Initialize array parameters (cell position, sparsity) ); 2. Optimize amplitude weights ,satisfy ; 3. Call the amplitude mapping algorithm to... Convert to ; 4. Calculate the sidelobe levels of the sparse array. If the termination condition is not met, update the amplitude weights through genetic operations and repeat the mapping process. 5. Output the optimal sparse layout And radiation pattern.

[0061] Specifically, in some embodiments, for example, a sparse design (sparseness ratio of 10%) is performed on a 75×75 rectangular array with a half-wavelength of 0.32mm. Simulations are conducted using a genetic algorithm and a relatively deterministic mapping method, with a minimum array spacing of 0.2mm cells. Figure 4 As shown, this framework achieves a sidelobe level of -21.73 dB within 100 minutes, which is 9.9 dB higher than the traditional method.

[0062] Specifically, in other embodiments, for example, a sparse design (10% sparsity) is performed on a 75×75 rectangular array with a half-wavelength of 0.32mm. Simulations are conducted using a genetic algorithm and a relatively deterministic mapping method, with a minimum array spacing of 0.2mm cells. Figures 5(a) to 5(g) As shown, after applying Taylor weighting, the mapped sparse array achieves a sidelobe level of -22.56 dB, which matches the original Taylor-weighted array (-25 dB). The results are further improved by using the sparse array within the framework, achieving a sidelobe level of -25.38 dB, which is very close to the amplitude-plus array (-24.11 dB) obtained within the framework. This consistency highlights the stability of this framework. Figures 5(a) to 5(g)The figures show the final sparse array results obtained using the proposed sparse framework method, compared with Taylor weighted arrays with an SLL of -25 dB. Specifically, Figure 5(a) shows the full array distribution, while Figure 5(b) shows the amplitude distribution obtained using the framework. Figure 5(c) shows the sparse layout. Figures 5(d) and 5(e) show the radiation patterns of the sparse array designed using the framework. Figures 5(f) and 5(g) present a comparison of one-dimensional radiation modes in the (0°, 0°) and (30°, 30°) beam directions, respectively. Because this framework explicitly optimizes the element placement structure, it offers superior performance in sidelobe suppression. This advantage is particularly valuable when dealing with irregular array shapes or specific design constraints, as traditional weighting methods (such as Taylor or Chebyshev) cannot be directly applied to amplitude-to-sparse mappings. In such cases, the proposed framework offers greater adaptability and practical value.

[0063] In summary, the technical solution of the present invention achieves the following technical features: 1. Amplitude weight optimization: Transform the sparse design problem into continuous amplitude weight optimization, reducing the dimensionality of the search space; 2. Mapping Ensemble: In each optimization iteration, the embedding mapping method distributes the optimized magnitude weights. Real-time conversion to sparse binary layout The mapping algorithm can be a probabilistic mapping, a deterministic mapping, or a machine learning-based method to ensure consistency between the magnitude distribution and the sparse layout. For example, cell location selection can be dynamically adjusted through recursive partitioning and error minimization strategies.

[0064] 3. Based on sparse layout The radiation pattern is calculated to evaluate sidelobe performance. If the termination condition (such as the sidelobe level threshold or the number of iterations) is not met, the amplitude weights are adjusted based on performance feedback, and the process enters the next optimization loop. This dynamic mechanism avoids local optima and improves convergence stability.

[0065] Compared to existing technologies, this invention achieves the following significant advantages through an amplitude optimization-mapping framework: Improved computational efficiency: Compared to traditional direct sparse optimization methods, this framework transforms the discrete search problem into continuous optimization, achieving a sidelobe level of -21.73dB within 100 minutes in a 75×75 large-scale array.

[0066] Enhanced sidelobe suppression: The framework supports arbitrary amplitude distributions (such as Taylor weighting), and the mapped sparse layout can approximate or surpass the performance of the original amplitude-weighted method. The sidelobe level of the sparse array can reach -25.38dB, which is close to -24.11dB of the amplitude-weighted array and outperforms traditional methods.

[0067] Wide geometric adaptability: The frame is suitable for regular arrays (such as rectangles and circles) and irregular arrays (including internal obstacles), and adapts to complex constraints through the versatility of amplitude mapping. Figures 5(a) to 5(g) The results for sparse arrays under rectangular arrays are shown, demonstrating its flexibility.

[0068] High stability: The mapping-guided optimization strategy ensures consistency between the amplitude distribution and the sparse layout, reducing fluctuations caused by randomness, such as... Figure 4 As shown, this framework performs stably in time-side lobe contrast.

[0069] This invention provides an efficient and universal solution for the design of low sidelobes in large-scale antenna arrays, and is particularly suitable for high-resolution applications such as radar and communications.

[0070] like Figure 6 As shown, this embodiment of the invention also provides a sparse array optimization device 900 based on amplitude mapping, which can implement the above-described method. This device may include: The first module 910 is used to acquire the array information of the antenna array and the preset sparse constraints; wherein, the array information includes the total number of array elements and the position information of the array elements; The second module 920 is used to initialize the magnitude weight matrix based on array information and sparse constraints; wherein, the weight matrix includes the magnitude weight of each array cell; The third module 930 is used to map the magnitude weight matrix to a sparse binary layout; wherein the sparse binary layout includes the activation state of each array cell; The fourth module 940 is used to quantize the sidelobe level based on the sparse binary layout. If the sidelobe level meets the preset requirements, the corresponding sparse binary layout is used as a sparse array; otherwise, the operation of the subsequent modules is executed. The fifth module 950 is used to update the amplitude weight matrix through an optimization algorithm and then return to execute the operation of the third module until the sidelobe level meets the preset requirements.

[0071] It is understood that the content of the above method embodiments is applicable to the present device embodiments. The specific functions implemented by the present device embodiments are the same as those of the above method embodiments, and the beneficial effects achieved are also the same as those achieved by the above method embodiments.

[0072] This invention also provides an electronic device, which includes a memory and a processor. The memory stores a computer program, and the processor executes the computer program to implement the method described above. This electronic device can be any smart terminal, including tablet computers, in-vehicle computers, etc.

[0073] It is understood that the content of the above method embodiments is applicable to this device embodiment. The specific functions implemented by this device embodiment are the same as those of the above method embodiments, and the beneficial effects achieved are also the same as those achieved by the above method embodiments.

[0074] like Figure 7 As shown, Figure 7 The hardware structure of an electronic device 1000 according to another embodiment is illustrated. The electronic device 1000 includes: The processor 1001 can be implemented using a general-purpose CPU (Central Processing Unit), microprocessor, application-specific integrated circuit (aSIC), or one or more integrated circuits, and is used to execute relevant programs to implement the technical solutions provided in the embodiments of the present invention. The memory 1002 can be implemented as a read-only memory (ROM), a static storage device, a dynamic storage device, or a random access memory (RaM). The memory 1002 can store the operating system and other application programs. When the technical solutions provided in the embodiments of this specification are implemented through software or firmware, the relevant program code is stored in the memory 1002 and is called and executed by the processor 1001. Input / output interface 1003 is used to implement information input and output; The communication interface 1004 is used to enable communication and interaction between this device and other devices. Communication can be achieved through wired means (such as USB, network cable, etc.) or wireless means (such as mobile network, WIFI, Bluetooth, etc.). Bus 1005 transmits information between various components of the device (e.g., processor 1001, memory 1002, input / output interface 1003, and communication interface 1004); The processor 1001, memory 1002, input / output interface 1003 and communication interface 1004 are connected to each other within the device via bus 1005.

[0075] The electronic device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.

[0076] This invention also provides a computer-readable storage medium storing a computer program that, when executed by a processor, implements the above-described method.

[0077] It is understood that the content of the above method embodiments is applicable to this storage medium embodiment. The specific functions implemented in this storage medium embodiment are the same as those in the above method embodiments, and the beneficial effects achieved are also the same as those achieved in the above method embodiments.

[0078] This invention also provides a computer program product, including a computer program that, when executed by a processor, implements the above-described method.

[0079] It is understood that the content of the above method embodiments is applicable to the embodiments of this program product. The specific functions implemented by the embodiments of this program product are the same as those of the above method embodiments, and the beneficial effects achieved are also the same as those achieved by the above method embodiments.

[0080] Memory, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs and non-transitory computer-executable programs. Furthermore, memory may include high-speed random access memory, and may also include non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid-state storage device. In some embodiments, memory may optionally include memory remotely located relative to the processor, and these remote memories can be connected to the processor via a network. Examples of such networks include, but are not limited to, the Internet, intranets, local area networks, mobile communication networks, and combinations thereof.

[0081] The present invention provides a sparse array optimization method, apparatus, electronic device, storage medium, and program product based on amplitude mapping. This method acquires array information of an antenna array and preset sparse constraints. The array information includes the total number of array elements and the position information of the array elements. An amplitude weight matrix is ​​initialized based on the array information and sparse constraints. The weight matrix includes the amplitude weight of each array element. The amplitude weight matrix is ​​mapped to a sparse binary layout. The sparse binary layout includes the activation state of each array element. The sidelobe level is quantized based on the sparse binary layout. If the sidelobe level meets preset requirements, the corresponding sparse binary layout is used as a sparse array; otherwise, the amplitude weight matrix is ​​updated using an optimization algorithm, and the process of mapping the amplitude weight matrix to a sparse binary layout is repeated until the sidelobe level meets the preset requirements. This invention transforms the discrete, massive search problem of combining cell positions into a continuous, relatively low-dimensional amplitude weight optimization problem, which greatly compresses the solution space and enables efficient optimization of large-scale arrays. Furthermore, this invention employs a closed-loop iterative framework of "optimization-mapping-evaluation," where the optimization objective is directly based on the performance of the mapped real sparse layout. This ensures that the optimization direction always aims to improve the performance of the final sparse array and effectively avoids the problem of blindly searching in the discrete space and easily getting trapped in local optima, a problem common in traditional methods. Specifically, this invention dynamically couples "amplitude design" and "position selection" through the mapping process, forming a unified optimization flow that provides a flexible framework for handling various array configurations (regular / irregular) and complex constraints.

[0082] The embodiments described in this invention are for the purpose of more clearly illustrating the technical solutions of the embodiments of this invention, and do not constitute a limitation on the technical solutions provided by the embodiments of this invention. As those skilled in the art will know, with the evolution of technology and the emergence of new application scenarios, the technical solutions provided by the embodiments of this invention are also applicable to similar technical problems.

[0083] Those skilled in the art will understand that the technical solutions shown in the figures do not constitute a limitation on the embodiments of the present invention, and may include more or fewer steps than shown, or combine certain steps, or different steps.

[0084] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.

[0085] Those skilled in the art will understand that all or some of the steps in the methods disclosed above, as well as the functional modules / units in the systems and devices, can be implemented as software, firmware, hardware, or suitable combinations thereof.

[0086] The preferred embodiments of the present invention have been described above with reference to the accompanying drawings, but this does not limit the scope of the claims of the present invention. Any modifications, equivalent substitutions, and improvements made by those skilled in the art without departing from the scope and spirit of the present invention should be within the scope of the claims of the present invention.

Claims

1. A sparse array optimization method based on amplitude mapping, characterized in that, The method includes the following steps: Obtain the array information of the antenna array and the preset sparse constraints; wherein, the array information includes the total number of array elements and the position information of the array elements; An amplitude weight matrix is ​​initialized based on the array information and the sparse constraints; wherein, the weight matrix includes the amplitude weight of each array element; The magnitude weight matrix is ​​mapped to a sparse binary layout; wherein the sparse binary layout includes the activation state of each array cell; Based on the quantization of the sidelobe level using the sparse binary layout, if the sidelobe level meets a preset requirement, the corresponding sparse binary layout is used as a sparse array; otherwise... The amplitude weight matrix is ​​updated by optimizing the algorithm, and the step of mapping the amplitude weight matrix to a sparse binary layout is returned to be executed until the sidelobe level meets the preset requirement.

2. The method according to claim 1, characterized in that, The initialization of the magnitude weight matrix based on the array information and the sparse constraint conditions includes the following steps: The number of retained units is determined based on the sparse constraints. The amplitude weight of each array unit is assigned a random value within a preset interval, such that the sum of the amplitude weights of all array units equals the number of reserved units.

3. The method according to claim 2, characterized in that, If the sparse constraint is a sparsity rate, determining the number of retained units based on the sparse constraint includes the following steps: The number of reserved cells is determined by multiplying the total number of cells in the array with the sparsity rate.

4. The method according to claim 1, characterized in that, Mapping the magnitude weight matrix to a sparse binary layout includes the following steps: Based on the magnitude of the magnitude weights in the magnitude weight matrix, the array cells with the reserved number of cells are marked as active state values, and the remaining array cells are marked as inactive state values, thus obtaining the sparse binary layout. The number of reserved units is determined based on the sparse constraint condition.

5. The method according to claim 4, characterized in that, The step of marking the array cells with a reserved number of cells as active state values ​​based on the magnitude of the magnitude weights in the magnitude weight matrix includes the following steps: The antenna array is divided into multiple array regions; Normalize the amplitude weights corresponding to all array regions to obtain the amplitude weighted value for each array region. Based on the amplitude weighting value and the number of reserved units, the number of active units in each array region is determined proportionally. The array cells with the largest amplitude weight in the array region are marked as the activation state value.

6. The method according to claim 1, characterized in that, The quantization of sidelobe levels based on the sparse binary layout includes the following steps: The radiation pattern is obtained based on the sparse binary layout; wherein the radiation pattern includes the main lobe direction and the highest sidelobe direction; The sidelobe level is determined based on the difference between the direction of the highest sidelobe and the direction of the main lobe.

7. The method according to claim 1, characterized in that, The optimization algorithm includes one or more combinations of genetic algorithm, particle swarm optimization, differential evolution, simulated annealing, and gradient descent. When the optimization algorithm is the genetic algorithm, updating the magnitude weight matrix through the optimization algorithm includes the following steps: The population is determined based on the magnitude weight matrix; Genetic operations are performed based on a preset genetic configuration to update the population as the updated magnitude weight matrix; The genetic operations include one or more combinations of mutation, crossover, and selection operations.

8. A sparse array optimization device based on amplitude mapping, characterized in that, The device includes: The first module is used to acquire the array information of the antenna array and the preset sparse constraint conditions; wherein, the array information includes the total number of array elements and the position information of the array elements; The second module is used to initialize an amplitude weight matrix based on the array information and the sparse constraint conditions; wherein, the weight matrix includes the amplitude weight of each array element; The third module is used to map the magnitude weight matrix to a sparse binary layout; wherein the sparse binary layout includes the activation state of each array unit; The fourth module is used to quantize the sidelobe level based on the sparse binary layout. If the sidelobe level meets the preset requirements, the corresponding sparse binary layout is used as a sparse array; otherwise, the operation of the subsequent modules is executed. The fifth module is used to update the amplitude weight matrix through an optimization algorithm and return to execute the operation of the third module until the sidelobe level meets the preset requirements.

9. An electronic device, characterized in that, The electronic device includes a memory and a processor, the memory storing a computer program, and the processor executing the computer program to implement the method according to any one of claims 1 to 7.

10. A computer program product, characterized in that, The computer program product includes a computer program that, when executed by a processor, implements the method according to any one of claims 1 to 7.

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