Flash memory data correction read method and system based on bit line in masked state

Abstract

This invention provides a flash memory data correction and reading method and system based on bit lines in a shielded state, comprising: determining whether the current storage cell is in an odd-numbered page or an even-numbered page; if the current storage cell is in an odd-numbered page, using a first correction reading method to read data to correct coupling caused by adjacent pages; if the current storage cell is in an even-numbered page, using a second correction reading method to read data to correct coupling caused by adjacent pages and coupling caused by adjacent storage cells on the same page; and outputting the read data. By using different correction reading methods for odd-numbered and even-numbered pages, the coupling caused by adjacent pages and coupling caused by adjacent storage cells on the same page can be corrected according to the characteristics of the storage cell's location, thereby improving the accuracy of the read data and solving the problem of how to improve the data reading accuracy when bit lines are in a shielded state.

Description

Technical Field

[0001] This invention relates to the field of data processing technology, and in particular to a flash memory data correction and reading method and system based on bit lines in a shielded state. Background Technology

[0002] The data read / write mechanism of non-volatile flash memory (NAND flash memory) is roughly as follows: the control gate of the selected memory cell is connected to a read voltage (typically a low voltage, such as 0V), and the control gate of the unselected memory cell is connected to an on voltage (typically a high voltage, such as 6V). If the threshold voltage of the selected memory cell is lower than the read voltage, the memory cell is in the erase state; if the threshold voltage of the selected memory cell is higher than the read voltage, the memory cell is in the programming state. Therefore, whether a memory cell in NAND flash memory can accurately read data depends mainly on its threshold voltage distribution and the magnitude of the read voltage. The narrower the threshold voltage distribution, the larger the adjustable range of the read voltage.

[0003] However, during actual data reading, due to coupling between the floating gates of the memory cells, the currently being programmed page will raise the threshold voltage distribution of the previously programmed page through coupling. At this point, for these interfered memory cells, a voltage higher than the original read voltage is required to read the correct data.

[0004] To correctly read the data stored in the NAND flash memory cells, the current correction read method mainly includes the following steps: reading data from adjacent pages to obtain the first data; reading the current page using the read voltage to obtain the second data; reading the current page using the correction voltage to obtain the third data; using logical operations between page buffers, selecting the data in the second data that is not affected by coupling interference and the data in the third data that is affected by coupling interference using the first data, and integrating the selected data to obtain the fourth data; the fourth data is the final data read by the correction read method.

[0005] However, when the bit lines are in a masked state, the existing correction read method only corrects the coupling caused by adjacent page programming, while the coupling caused by adjacent memory cells on the same page is not corrected, resulting in insufficient accuracy of the read data. Summary of the Invention

[0006] The purpose of this invention is to provide a flash memory data correction and reading method and system based on bit lines in a shielded state, so as to solve the problem of how to improve the data reading accuracy of bit lines in a shielded state.

[0007] To address the aforementioned technical problems, this invention provides a flash memory data correction and reading method based on bit lines in a shielded state, comprising: Determine whether the current memory location is an odd or even page; If the current storage unit is in an odd-numbered page, the first correction read method is used to read the data in order to correct the coupling caused by adjacent pages; If the current storage cell is in an even-numbered page, the second correction read method is used to read the data in order to correct the coupling caused by adjacent pages and the coupling caused by adjacent storage cells on the same page; Output the read data.

[0008] Optionally, in the aforementioned flash memory data correction and reading method based on bit lines in a shielded state, the method of reading data using the first correction and reading method includes: The data of the memory cell affected by coupling in the current page is read using the first correction voltage and recorded as the first data; Data in adjacent pages is read using the read voltage to obtain the data of the memory cell affected by coupling in the current page, which is denoted as the second data; Based on the first and second data, select the storage units in the current page that are not affected by coupling and initialize them. The data obtained at this time is recorded as the third data. Based on the second data, the data of the memory cell in the current page that is not affected by coupling is read using the read voltage, and it is recorded as the fourth data; The third and fourth data are combined to obtain the read data.

[0009] Optionally, in the aforementioned flash memory data correction and reading method based on bit lines in a shielded state, the method for reading data using the first correction and reading method further includes: If the memory cell in the adjacent page is in a programmed state, then the memory cell in the current page that is on the same line as the adjacent page is determined to be a memory cell affected by coupling. If a memory cell in an adjacent page is in an erased state, then the memory cell on the same line as the adjacent page in the current page is determined to be a memory cell that is not affected by coupling.

[0010] Optionally, in the flash memory data correction and reading method based on bit lines in a shielded state, the first correction voltage is greater than the reading voltage.

[0011] Optionally, in the aforementioned flash memory data correction and reading method based on bit lines in a shielded state, the method of filtering and initializing memory cells in the current page that are not affected by coupling based on the first data and the second data includes: Perform a logical AND operation on the inverted first and second data to retain the first data in the storage cells affected by coupling, while initializing the data in the uncoupled storage cells to 0 to obtain the third data.

[0012] Optionally, in the aforementioned flash memory data correction and reading method based on bit lines in a shielded state, the method for integrating the third data and the fourth data to obtain the read data includes: Perform a logical OR operation on the third and fourth data to obtain the read data.

[0013] Optionally, in the aforementioned flash memory data correction and reading method based on bit lines in a shielded state, the method for reading data using the second correction and reading method includes: The current page data is read using the second correction voltage and recorded as the first data. The data in the adjacent page and the data in the adjacent memory cell of the current page are read using the read voltage and recorded as the second data; Based on the second data, the first data is filtered and initialized to obtain the third data; The current page data is read using the third correction voltage and recorded as the fourth data. The third and fourth data are combined to obtain the fifth data; The data in the adjacent page and the data in the adjacent memory cell of the current page are read using the read voltage, and this is recorded as the sixth data. Based on the sixth data, the fifth data is filtered and initialized to obtain the seventh data; Based on the sixth data, the current page data is read using the read voltage to obtain the eighth data; The seventh and eighth data points are combined to obtain the read data.

[0014] Optionally, in the flash memory data correction and reading method based on bit lines in a shielded state, the second correction voltage is greater than the third correction voltage; the third correction voltage is greater than the reading voltage.

[0015] Optionally, in the aforementioned flash memory data correction and reading method based on bit lines in a shielded state, the method of filtering and initializing the first data according to the second data to obtain the third data includes: Perform a logical AND operation on the first data and the second data to retain the first data in the storage unit affected by the two couplings, while initializing the data in other storage units to 0 to obtain the third data.

[0016] Optionally, in the aforementioned flash memory data correction and reading method based on bit lines in a shielded state, the method for integrating the third and fourth data to obtain the fifth data includes: Perform a logical OR operation on the third and fourth data to obtain the fifth data.

[0017] Optionally, in the aforementioned flash memory data correction and reading method based on bit lines in a shielded state, the method for filtering and initializing the fifth data according to the sixth data to obtain the seventh data includes: Perform a logical OR operation on the fifth and sixth data to retain the fifth data in the storage cell affected by coupling, while initializing the data in the uncoupled storage cell to 1 to obtain the seventh data.

[0018] Optionally, in the aforementioned flash memory data correction and reading method based on bit lines in a shielded state, the method for integrating the seventh and eighth data to obtain the read data includes: Perform a logical AND operation on the seventh data and the inverted eighth data to obtain the read data.

[0019] To address the aforementioned technical problems, the present invention also provides a flash memory data correction and reading system based on bit lines in a shielded state, used to implement the flash memory data correction and reading method based on bit lines in a shielded state as described in any of the preceding claims, wherein the flash memory data correction and reading system based on bit lines in a shielded state comprises: The judgment module is used to determine whether the current storage unit is in an odd page or an even page; The read module is used to read data from the current storage unit using a first correction read method or a second correction read method based on the judgment result of the judgment module. Specifically, if the current storage unit is on an odd-numbered page, the first correction read method is used to read data to correct coupling caused by adjacent pages; if the current storage unit is on an even-numbered page, the second correction read method is used to read data to correct coupling caused by adjacent pages and coupling caused by adjacent storage units on the same page. The output module is used to output the data read by the reading module.

[0020] The present invention provides a flash memory data correction and reading method and system based on bit lines in a shielded state, comprising: determining whether the current storage cell is in an odd-numbered page or an even-numbered page; if the current storage cell is in an odd-numbered page, using a first correction reading method to read data to correct coupling caused by adjacent pages; if the current storage cell is in an even-numbered page, using a second correction reading method to read data to correct coupling caused by adjacent pages and coupling caused by adjacent storage cells on the same page; and outputting the read data. By using different correction reading methods for odd-numbered and even-numbered pages, the coupling caused by adjacent pages and coupling caused by adjacent storage cells on the same page can be corrected according to the characteristics of the storage cell's location, thereby improving the accuracy of the read data and solving the problem of how to improve the data reading accuracy when bit lines are in a shielded state. Attached Figure Description

[0021] Figure 1 A flowchart of the flash memory data correction and reading method based on bit lines in a shielded state provided in this embodiment; Figure 2 This is a block diagram of a flash memory data correction and reading system based on bit lines in a shielded state, as provided in this embodiment. Detailed Implementation

[0022] The following detailed description, in conjunction with the accompanying drawings and specific embodiments, provides a further detailed explanation of the flash memory data correction and reading method and system based on bit lines in a shielded state proposed in this invention. It should be noted that the drawings are all in a very simplified form and use non-precise scales, intended only to facilitate and clarify the illustration of the embodiments of this invention. Furthermore, the structures shown in the drawings are often part of the actual structure. In particular, different figures may emphasize different aspects and sometimes use different scales.

[0023] It should be noted that the terms "first," "second," etc., used in the specification, claims, and drawings of this invention are used to distinguish similar objects in order to describe embodiments of the invention, and are not used to describe a specific order or sequence. It should be understood that such uses of terminology are interchangeable where appropriate. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion. For example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0024] This embodiment provides a flash memory data correction and reading method based on bit lines in a shielded state, such as... Figure 1 As shown, it includes: S1, determine whether the current memory unit is in an odd page or an even page; S2, if the current storage unit is an odd-numbered page, the first correction read method is used to read the data in order to correct the coupling caused by adjacent pages; S3, if the current storage unit is in an even-numbered page, the second correction read method is used to read the data in order to correct the coupling caused by adjacent pages and the coupling caused by adjacent storage units in the same page; S4 outputs the read data.

[0025] The flash memory data correction and reading method based on bit lines in a shielded state provided in this embodiment can correct the coupling caused by adjacent pages and adjacent memory cells on the same page by using different correction and reading methods for odd-numbered and even-numbered pages, according to the characteristics of the location of the memory cells. This improves the accuracy of the read data and solves the problem of how to improve the data reading accuracy when bit lines are in a shielded state.

[0026] It should be noted that in practical applications, steps S2 and S3 are performed selectively, not sequentially. That is, when step S1 determines that the current storage unit is in an odd-numbered page, only steps S2 and S4 are executed, and step S3 is not executed; when step S1 determines that the current storage unit is in an even-numbered page, only steps S3 and S4 are executed, and step S2 is not executed.

[0027] Specifically, in this embodiment, step S2, if the current storage unit is in an odd-numbered page, uses a first correction read method to read data, and the method for correcting the coupling caused by adjacent pages includes: S21, use the first correction voltage to read the data of the memory cell affected by coupling in the current page, and record it as the first data.

[0028] In practical applications, the voltage value of the first correction voltage Vcorr1 is greater than the voltage value of the read voltage Vrd, thereby enabling accurate reading of the data Data1 of the memory cell affected by coupling in the current page WLn. The specific value of the first correction voltage Vcorr1 can be determined based on the threshold voltage of the memory cell in the NAND flash memory, and this application does not impose any restrictions on it.

[0029] It should be noted that in this embodiment, the state of the memory cell is used to determine whether it is affected by coupling. Specifically, if the memory cell in the adjacent page WLn+1 is in the programming state "0", then during the programming process, electron injection will cause coupling to the memory cell at that position in the current page WLn. Therefore, the memory cell in the current page WLn that is on the same line as the adjacent page WLn+1 is determined to be a memory cell affected by coupling. If the memory cell in the adjacent page WLn+1 is in the erase state "1", then there is no coupling effect on the memory cell in the current page WLn that is on the same line as the adjacent page WLn+1, and no threshold voltage shift will occur. Therefore, this memory cell is determined to be a memory cell that is not affected by coupling.

[0030] S22, use the read voltage to read the data in the adjacent page to obtain the data of the memory cell affected by coupling in the current page, which is recorded as the second data.

[0031] In practical applications, the data in the adjacent page WLn+1 is read using the read voltage Vrd, and at this time the data Data2 of the memory cell affected by coupling in the current page WLn is obtained.

[0032] S23. Based on the first data and the second data, filter the storage units in the current page that are not affected by coupling and initialize them. The data obtained at this time is recorded as the third data.

[0033] Specifically, in this embodiment, a logical AND operation is performed on the inverted first data and second data to retain the first data of the storage cell affected by coupling, while the data of the storage cell not affected by coupling is initialized to 0 to obtain the third data.

[0034] In practical applications, the inverted first data, Data1, can be stored in SDC, and the second data, Data2, can be stored in PDC. Since the first data, Data1, is read with a higher first correction voltage, Vcorr1, only the data in the coupled storage cells is correct. A logical AND operation between the first data, Data1, and the second data, is needed to ensure that the coupled correct data in the first data, Data1, is retained, while the other data is initialized to 0.

[0035] In one specific embodiment, the first data Data1 of the coupled memory cell in the current page WLn is read using the first correction voltage Vcorr1 and is 0x55AA, and stored in SDC; the second data Data2 of the adjacent page WLn+1 is read using the read voltage Vrd and is 0x00FF, and stored in PDC. Therefore, the memory cell "55" corresponding to "00" in the current page WLn is the coupled memory cell, and the memory cell "AA" corresponding to "FF" is the uncoupled memory cell. A bitwise AND operation is performed on the first data Data1 and the second data Data2, i.e., SDC=SDC&~PDC=(0x55AA)&(0xFF00)=0x5500. It can be seen that the data corresponding to the coupled memory cell is preserved, while the data corresponding to the uncoupled memory cell is initialized to 0. The resulting third data Data3 is 0x5500.

[0036] S24, based on the second data, read the data of the memory cell in the current page that is not affected by coupling using the read voltage, and record it as the fourth data.

[0037] Specifically, in this embodiment, the data of the memory cell in the current page WLn that is not affected by coupling is read using the read voltage Vrd, and is denoted as the fourth data Data4.

[0038] Taking the above example, the second data Data2 is 0x00FF. Based on this, the data of the memory cell that is not affected by coupling in the current page WLn is read using the read voltage Vrd, for example, 0x008A. Then the fourth data Data4 obtained at this time is 0x008A.

[0039] S25, integrate the third and fourth data to obtain the read data.

[0040] Specifically, in this embodiment, a logical OR operation is performed on the third data Data3 and the fourth data Data4 to obtain the read data DATA.

[0041] Taking the example above, the third data Data3 is 0x5500 and the fourth data Data4 is 0x008A. Performing a logical OR operation on the third data Data3 and the fourth data Data4 yields the final data DATA, which is 0x558A, i.e., the data read from the odd-numbered page memory unit.

[0042] Of course, in practical applications, existing correction reading methods can also be used as the first correction reading method to implement step S2, and no restrictions are imposed on this.

[0043] Furthermore, considering that even-numbered pages of storage units are affected not only by interference from adjacent pages WLn+1, but also by interference from adjacent odd-numbered pages within the same page WLn, in order to effectively correct the interference caused by the two couplings, in this embodiment, step S3, if the current storage unit is in an even-numbered page, uses a second correction reading method to read data. The method for correcting the coupling caused by adjacent pages and the coupling caused by adjacent storage units within the same page includes: S31, use the second correction voltage to read the current page data, and record it as the first data.

[0044] In practical applications, the second correction voltage Vcorr2 is greater than the read voltage Vrd and should be the highest voltage, so as to accurately read the data Data1 of the even-numbered page memory cell in the current page WLn that is affected by the second coupling. The specific value of the second correction voltage Vcorr2 can be determined according to the threshold voltage of the memory cell in the NAND flash memory, and this application does not impose any restrictions on it.

[0045] S32, using the read voltage, reads the data in the adjacent page and the data in the adjacent memory cell of the current page, and records it as the second data.

[0046] In practical applications, the data in the adjacent page WLn+1 and the data in the adjacent memory cell of the current page WLn (i.e., the data in the current page WLn located in odd-numbered pages) are read using the read voltage Vrd to obtain the second data Data2.

[0047] S33, Based on the second data, filter the first data and initialize it to obtain the third data.

[0048] Specifically, in this embodiment, a logical AND operation is performed on the first data Data1 and the second data Data2 to retain the first data Data1 of the storage unit affected by the two couplings. At the same time, the data of other storage units is initialized to 0 to obtain the third data Data3.

[0049] In one specific embodiment, the first data Data1 located on an even-numbered page in the current page WLn is 0x55AA, the data in the even-numbered page of the adjacent page WLn+1 of the second data Data2 is 0x0F0F, and the data in the odd-numbered page of the current page WLn adjacent to the first data is 0x00FF. Performing a logical AND operation on the first data Data1 and the second data Data2, the resulting third data Data3 is (~0x0F0F)&(~0x00FF)&(0x55AA)=0x5000. It can be seen that the third data Data3 only retains the data that has been coupled twice, that is, it retains the first data Data1 corresponding to the two data of the second data Data2 where the same position is 0, and the other positions are initialized to 0.

[0050] S34, use the third correction voltage to read the current page data, and record it as the fourth data.

[0051] In practical applications, the third correction voltage Vcorr3 is greater than the read voltage Vrd and less than the second correction voltage Vcorr2, thus enabling accurate reading of the data Data4 in the even-numbered page of the current page WLn that is affected by primary coupling. The specific value of the third correction voltage Vcorr3 can be determined based on the threshold voltage of the memory cell in the NAND flash memory, and this application does not impose any restrictions on it.

[0052] S35, integrate the third and fourth data to obtain the fifth data.

[0053] Specifically, in this embodiment, a logical OR operation is performed on the third data Data3 and the fourth data Data4 to obtain the fifth data Data5. Since the third data Data3 contains only accurate data affected by two couplings, and the fourth data Data4 contains only accurate data affected by one coupling, performing a logical OR operation on the third data Data3 and the fourth data Data4 ensures that the resulting fifth data Data5 contains all accurate data affected by couplings (two couplings and one coupling).

[0054] S36, using the read voltage, reads the data in the adjacent page and the data in the adjacent memory cell of the current page, and records it as the sixth data.

[0055] In practical applications, the data in the adjacent page WLn+1 and the data in the adjacent memory cell of the current page WLn (i.e., the data in the current page WLn located in the odd-numbered page) are read again using the read voltage Vrd to obtain the sixth data Data6.

[0056] S37. Based on the sixth data, filter and initialize the fifth data to obtain the seventh data.

[0057] Specifically, in this embodiment, a logical AND operation is performed on the fifth data Data5 and the sixth data Data6 to retain the first data Data1 of the storage units affected by two couplings and one coupling, respectively. At the same time, the data of the storage units not affected by coupling is initialized to 1 to obtain the seventh data Data7.

[0058] S38, based on the sixth data, uses the read voltage to read the current page data to obtain the eighth data.

[0059] Specifically, in this embodiment, the data of the current page WLn is read using the read voltage Vrd, and is denoted as the eighth data Data8, which contains the data of the correct uncoupled memory cells.

[0060] In practical applications, this step is implemented in a similar way to step S24, and will not be described in detail here.

[0061] S39, integrate the seventh and eighth data to obtain the read data.

[0062] Specifically, in this embodiment, since the seventh data Data7 contains accurate data affected by two couplings and accurate data affected by one coupling, and the eighth data Data8 contains accurate data unaffected by coupling, a logical AND operation is performed on the seventh data Data7 and the inverted eighth data Data8 to obtain the read data DATA, which contains accurate read data.

[0063] The flash memory data correction and reading method based on bit lines in a shielded state provided in this embodiment can accurately read data for memory cells located in odd-numbered pages, since they are only affected by coupling caused by adjacent pages. This reduces development costs while utilizing mature reading methods to accurately read data. For memory cells located in even-numbered pages, due to coupling effects caused by adjacent pages and adjacent memory cells within the same page, two different correction voltages are used to accurately read data affected by two coupling effects and data affected by one coupling effect. The reading voltage is then used to accurately read data unaffected by coupling. Logical operations are then used to integrate the data, resulting in accurate data read. This method eliminates the impact of coupling on data reading accuracy without significantly increasing hardware overhead, ensuring the accuracy of the read data.

[0064] This embodiment also provides a flash memory data correction and reading system based on bit lines in a shielded state, used to implement the flash memory data correction and reading method based on bit lines in a shielded state as described above, such as... Figure 2 As shown, the flash memory data correction and reading system based on bit lines in a shielded state includes: The judgment module is used to determine whether the current storage unit is in an odd page or an even page; The read module is used to read data from the current storage unit using a first correction read method or a second correction read method based on the judgment result of the judgment module. Specifically, if the current storage unit is on an odd-numbered page, the first correction read method is used to read data to correct coupling caused by adjacent pages; if the current storage unit is on an even-numbered page, the second correction read method is used to read data to correct coupling caused by adjacent pages and coupling caused by adjacent storage units on the same page. The output module is used to output the data read by the reading module. The flash memory data correction and reading system based on bit lines in a shielded state provided in this embodiment uses different correction and reading methods for odd-numbered and even-numbered pages of storage cells through the reading module. It can correct the coupling caused by adjacent pages of storage cells and the coupling caused by adjacent storage cells on the same page according to the characteristics of the location of the storage cells, thereby improving the accuracy of the read data and solving the problem of how to improve the data reading accuracy when bit lines are in a shielded state.

[0065] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. Similar or identical parts between embodiments can be referred to mutually. In addition, different parts between embodiments can also be combined with each other, and this invention does not limit this.

[0066] This embodiment provides a flash memory data correction and reading method and system based on bit lines in a shielded state, including: determining whether the current storage cell is in an odd-numbered page or an even-numbered page; if the current storage cell is in an odd-numbered page, using a first correction reading method to read data to correct coupling caused by adjacent pages; if the current storage cell is in an even-numbered page, using a second correction reading method to read data to correct coupling caused by adjacent pages and coupling caused by adjacent storage cells on the same page; and outputting the read data. By using different correction reading methods for odd-numbered and even-numbered pages, the coupling caused by adjacent pages and coupling caused by adjacent storage cells on the same page can be corrected according to the characteristics of the storage cell's location, thereby improving the accuracy of the read data and solving the problem of how to improve the data reading accuracy when bit lines are in a shielded state.

[0067] The above description is merely a description of preferred embodiments of the present invention and is not intended to limit the scope of the present invention in any way. Any changes or modifications made by those skilled in the art based on the above disclosure shall fall within the protection scope of the claims.

Claims

1. A flash memory data correction and reading method based on bit lines in a shielded state, characterized in that, include: Determine whether the current memory location is an odd or even page; If the current storage unit is in an odd-numbered page, the first correction read method is used to read the data in order to correct the coupling caused by adjacent pages; If the current storage cell is in an even-numbered page, the second correction read method is used to read the data in order to correct the coupling caused by adjacent pages and the coupling caused by adjacent storage cells on the same page; Output the read data.

2. The flash memory data correction and reading method based on bit lines in a shielded state according to claim 1, characterized in that, The method for reading data using the first correction reading method includes: The data of the memory cell affected by coupling in the current page is read using the first correction voltage and recorded as the first data; Data in adjacent pages is read using the read voltage to obtain the data of the memory cell affected by coupling in the current page, which is denoted as the second data; Based on the first and second data, select the storage units in the current page that are not affected by coupling and initialize them. The data obtained at this time is recorded as the third data. Based on the second data, the data of the memory cell in the current page that is not affected by coupling is read using the read voltage, and it is recorded as the fourth data; The third and fourth data are combined to obtain the read data.

3. The flash memory data correction and reading method based on bit lines in a shielded state according to claim 2, characterized in that, The method for reading data using the first correction reading method further includes: If the memory cell in the adjacent page is in a programmed state, then the memory cell in the current page that is on the same line as the adjacent page is determined to be a memory cell affected by coupling. If a memory cell in an adjacent page is in an erased state, then the memory cell on the same line as the adjacent page in the current page is determined to be a memory cell that is not affected by coupling.

4. The flash memory data correction and reading method based on bit lines in a shielded state according to claim 2, characterized in that, The first correction voltage is greater than the reading voltage.

5. The flash memory data correction and reading method based on bit lines in a shielded state according to claim 2, characterized in that, The method for selecting and initializing uncoupled storage units in the current page based on the first and second data includes: Perform a logical AND operation on the inverted first and second data to retain the first data in the storage cells affected by coupling, while initializing the data in the uncoupled storage cells to 0 to obtain the third data.

6. The flash memory data correction and reading method based on bit lines in a shielded state according to claim 2, characterized in that, The method for integrating the third and fourth data to obtain the read data includes: Perform a logical OR operation on the third and fourth data to obtain the read data.

7. The flash memory data correction and reading method based on bit lines in a shielded state according to claim 1, characterized in that, The method for reading data using the second correction reading method includes: The current page data is read using the second correction voltage and recorded as the first data. The data in the adjacent page and the data in the adjacent memory cell of the current page are read using the read voltage and recorded as the second data; Based on the second data, the first data is filtered and initialized to obtain the third data; The current page data is read using the third correction voltage and recorded as the fourth data. The third and fourth data are combined to obtain the fifth data; The data in the adjacent page and the data in the adjacent memory cell of the current page are read using the read voltage, and this is recorded as the sixth data. Based on the sixth data, the fifth data is filtered and initialized to obtain the seventh data; Based on the sixth data, the current page data is read using the read voltage to obtain the eighth data; The seventh and eighth data points are combined to obtain the read data.

8. The flash memory data correction and reading method based on bit lines in a shielded state according to claim 7, characterized in that, The second correction voltage is greater than the third correction voltage; the third correction voltage is greater than the reading voltage.

9. The flash memory data correction and reading method based on bit lines in a shielded state according to claim 7, characterized in that, The method of filtering and initializing the first data based on the second data to obtain the third data includes: Perform a logical AND operation on the first data and the second data to retain the first data in the storage unit affected by the two couplings, while initializing the data in other storage units to 0 to obtain the third data.

10. The flash memory data correction and reading method based on bit lines in a shielded state according to claim 7, characterized in that, The method for integrating the third and fourth data to obtain the fifth data includes: Perform a logical OR operation on the third and fourth data to obtain the fifth data.

11. The flash memory data correction and reading method based on bit lines in a shielded state according to claim 7, characterized in that, The method for filtering and initializing the fifth data based on the sixth data to obtain the seventh data includes: Perform a logical OR operation on the fifth and sixth data to retain the fifth data in the storage cell affected by coupling, while initializing the data in the uncoupled storage cell to 1 to obtain the seventh data.

12. The flash memory data correction and reading method based on bit lines in a shielded state according to claim 7, characterized in that, The method for integrating the seventh and eighth data to obtain the read data includes: Perform a logical AND operation on the seventh data and the inverted eighth data to obtain the read data.

13. A flash memory data correction and reading system based on bit lines in a shielded state, used to implement the flash memory data correction and reading method based on bit lines in a shielded state as described in any one of claims 1 to 12, characterized in that, The flash memory data correction and reading system based on bit lines in a shielded state includes: The judgment module is used to determine whether the current storage unit is in an odd page or an even page; The read module is used to read data from the current storage unit using a first correction read method or a second correction read method based on the judgment result of the judgment module. Specifically, if the current storage unit is on an odd-numbered page, the first correction read method is used to read data to correct coupling caused by adjacent pages; if the current storage unit is on an even-numbered page, the second correction read method is used to read data to correct coupling caused by adjacent pages and coupling caused by adjacent storage units on the same page. The output module is used to output the data read by the reading module.

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