A back-contact solar cell, battery module and photovoltaic system

Abstract

This invention relates to the field of photovoltaic technology and provides a back-contact solar cell, a cell module, and a photovoltaic system. The back-contact solar cell includes: a silicon substrate, which includes a back side and a front side. The back side includes a first region and a second region, and an isolation region located between the first region and the second region; a first doped layer disposed in the first region; a second doped layer disposed in the second region; an isolation layer disposed in the isolation region; an interface passivation layer disposed between the first doped layer and the silicon substrate, and between the second doped layer and the silicon substrate; a first dielectric layer disposed on the side of the isolation layer facing away from the silicon substrate; and a second dielectric layer, which includes a first main body portion located on the side of the first doped layer facing away from the silicon substrate, and a first extension portion extending from the first main body portion, the first extension portion filling a portion of the region between the isolation layer and the first dielectric layer. The back-contact solar cell of this invention can improve the passivation effect of the interface passivation layer, which is beneficial to improving the photoelectric conversion efficiency.

Description

Technical Field

[0001] This invention relates to the field of photovoltaic technology, and in particular to a back-contact solar cell, a cell module, and a photovoltaic system. Background Technology

[0002] The metal electrodes of the back-contact solar cell are all located on the back side, which can prevent the metal electrodes from blocking the front side of the cell. Compared with bifacial solar cells with metal electrodes on both the front and back sides, this can improve the photoelectric conversion efficiency of the cell.

[0003] In related technologies, the back side of a back-contact solar cell includes an interface passivation layer, a first doped layer and a second doped layer with opposite doping types disposed on the interface passivation layer, and an isolation layer disposed between the first doped layer and the second doped layer to insulate and isolate them. A dielectric layer is disposed on the surfaces of the first doped layer, the second doped layer, and the isolation layer. However, hydrogen atoms in the first and second doped layers tend to diffuse outwards from the gap between the isolation layer and the dielectric layer, reducing the number of hydrogen atoms from the first and second doped layers entering the interface passivation layer. This affects the passivation effect of the interface passivation layer and consequently impacts the photoelectric conversion efficiency of the back-contact solar cell. Summary of the Invention

[0004] This invention provides a back-contact solar cell, which aims to solve the problem that in existing back-contact solar cells, hydrogen atoms in the first and second doped layers tend to expand outward, affecting the passivation effect of the interface passivation layer and thus impacting the photoelectric conversion efficiency.

[0005] This invention is implemented by providing a back-contact solar cell, comprising: A silicon substrate, the silicon substrate including a back side and a front side disposed opposite to each other, the back side including a first region and a second region disposed alternately at intervals along a first direction, and an isolation region located between the first region and the second region; A first doped layer is disposed in the first region; A second doped layer is provided in the second region, and the doping type of the second doped layer is opposite to that of the first doped layer. An isolation layer is provided in the isolation region, and the doping concentration of the isolation layer is less than or equal to 1E18 / cm. 3 ; An interface passivation layer is disposed between the first doped layer and the silicon substrate, and between the second doped layer and the silicon substrate; A first dielectric layer is disposed on the side of the isolation layer opposite to the silicon substrate; and A second dielectric layer is disposed on the side of the first doped layer opposite to the silicon substrate. The second dielectric layer includes a first main body portion located on the side of the first doped layer opposite to the silicon substrate and a first extension portion extending from the first main body portion toward the spacer layer and the first dielectric layer. The first extension portion fills a portion of the area between the spacer layer and the first dielectric layer.

[0006] Preferred options also include: A third dielectric layer is disposed on the side of the second doped layer opposite to the silicon substrate. The third dielectric layer includes a second main body portion located on the side of the second doped layer opposite to the silicon substrate, and a second extension portion extending from the second main body portion toward the spacer layer and the first dielectric layer. The second extension portion fills a portion of the area between the spacer layer and the first dielectric layer.

[0007] Preferably, the second dielectric layer includes at least one of a silicon oxide layer, a silicon carbide layer, an aluminum oxide layer, a silicon nitride layer, borosilicate glass, and phosphosilicate glass.

[0008] Preferably, the second dielectric layer is borosilicate glass or phosphosilicate glass.

[0009] Preferably, the third dielectric layer includes at least one of silicon oxide, silicon carbide, aluminum oxide, silicon nitride, borosilicate glass, and phosphosilicate glass.

[0010] Preferably, one of the second dielectric layer and the third dielectric layer is borosilicate glass and the other is phosphosilicate glass.

[0011] Preferably, the first dielectric layer is at least one of a silicon nitride layer, a silicon oxynitride layer, and an aluminum oxide layer.

[0012] Preferably, the interface passivation layer includes one of a silicon oxide layer, an aluminum oxide layer, a silicon carbide layer, a silicon nitride layer, and a silicon oxynitride layer.

[0013] Preferred options also include: An anti-reflection passivation layer covers the side of the first dielectric layer, the second dielectric layer, and the third dielectric layer that faces away from the silicon substrate.

[0014] Preferred options also include: A first metal electrode passes through the anti-reflection passivation layer and the second dielectric layer and is electrically connected to the first doped layer; The second metal electrode passes through the anti-reflection passivation layer, the third dielectric layer, and is electrically connected to the second doped layer.

[0015] Preferably, the ratio of the length of the first extension along the first direction to the length of the insulating layer along the first direction is less than or equal to 15%.

[0016] Preferably, along the first direction, the first extension includes a first end close to the first doped layer and a second end away from the first doped layer, wherein the dimension of the first end along the thickness direction of the silicon substrate is greater than the dimension of the second end along the thickness direction of the silicon substrate.

[0017] Preferably, the first extension is pointed, and the dimension of the first extension along the thickness direction of the silicon substrate decreases sequentially from the first end to the second end.

[0018] Preferably, the first main body includes a first surface and a second surface disposed opposite to each other along the thickness direction of the silicon substrate. The first surface is disposed close to the first doped layer, and the second surface is disposed away from the first doped layer. The plane in which the first surface is located is a first plane, and the plane in which the second surface is located is a second plane. The first extension is located between the first plane and the second plane.

[0019] Preferably, the length of the first extension along the first direction is 0.02 to 2 micrometers.

[0020] Preferably, the thickness of the second dielectric layer is 15-100 nanometers.

[0021] Preferably, the ratio of the sum of the areas of the first region and the second region to the total area of ​​the back surface is 10% to 80%.

[0022] Preferably, the ratio of the sum of the areas of the first region and the second region to the total area of ​​the back surface is 20% to 50%.

[0023] Preferably, the thickness of the first dielectric layer is 10-80 nanometers.

[0024] Preferably, the thickness of the isolation layer is greater than the thickness of at least one of the first doped layer and the second doped layer.

[0025] Preferably, the isolation layer is an intrinsic semiconductor layer or a doped semiconductor layer.

[0026] Preferably, the intrinsic semiconductor layer is at least one of an intrinsic polycrystalline silicon layer, an intrinsic amorphous silicon layer, an intrinsic microcrystalline silicon layer, and an intrinsic nanocrystalline silicon layer.

[0027] Preferably, the doped semiconductor layer is at least one of a doped polycrystalline silicon layer, a doped amorphous silicon layer, a doped microcrystalline silicon layer, and a doped nanocrystalline silicon layer.

[0028] Preferably, the doping concentration of the isolation layer is less than 1E17 / cm. 3 .

[0029] Preferably, the doping concentration of both the first doped layer and the second doped layer is greater than 1E19 / cm. 3 .

[0030] Preferably, the first doped layer and the second doped layer each comprise a stack of one or more of the following: a doped polycrystalline silicon layer, a doped microcrystalline silicon layer, and a doped nanocrystalline silicon layer.

[0031] Preferably, the first doped layer is a P-type doped layer, and the second doped layer is an N-type doped layer; the length of the first extension along the first direction is greater than the length of the second extension along the first direction.

[0032] Preferably, the first doped layer is a P-type doped layer, the second doped layer is an N-type doped layer, and the maximum thickness of the first extension is greater than the maximum thickness of the second extension. Preferably, the first doped layer is a P-type doped layer, the second doped layer is an N-type doped layer, and the maximum thickness of the first main body portion is greater than the maximum thickness of the second main body portion. The present invention also provides a battery assembly including the aforementioned back-contact solar cell.

[0033] The present invention also provides a photovoltaic system including the above-described battery module.

[0034] This invention provides a back-contact solar cell with an interface passivation layer disposed between a first doped layer and a silicon substrate, and between a second doped layer and a silicon substrate. A first dielectric layer is disposed on the side of an isolation layer facing away from the silicon substrate, and a second dielectric layer is disposed on the side of the first doped layer facing away from the silicon substrate. The second dielectric layer extends into the space between the isolation layer and the first dielectric layer to form a first extension portion, which fills a portion of the area between the isolation layer and the first dielectric layer. Because the second dielectric layer has the first extension portion, the first extension portion fills a portion of the area between the isolation layer and the first dielectric layer. The first extension portion can prevent hydrogen atoms in the first doped layer from expanding outward from the gap between the isolation layer and the first dielectric layer, thereby reducing the outward expansion of hydrogen atoms in the first doped layer. This facilitates the expansion of more hydrogen atoms in the first doped layer into the interface passivation layer, which helps to increase the hydrogen content of the interface passivation layer, thereby improving the passivation effect of the interface passivation layer and thus improving the photoelectric conversion efficiency of the back-contact solar cell. Attached Figure Description

[0035] Figure 1 A cross-sectional schematic diagram of a back-contact solar cell provided in an embodiment of the present invention; Figure 2 for Figure 1A magnified view of part A in the middle; Figure 3 for Figure 1 A magnified view of part B in the middle.

[0036] Explanation of key symbols: Back contact solar cell 100, silicon substrate 1, back side 11, front side 12, first region 111, second region 112, isolation region 113, first doped layer 2, second doped layer 3, isolation layer 4, interface passivation layer 5, first dielectric layer 6, second dielectric layer 7, first main body 71, first extension 72, third dielectric layer 8, second main body 81, second extension 82, anti-reflection passivation layer 9, first metal electrode 13, second metal electrode 14, first end 721, second end 722, third end 821, fourth end 822, first plane P1, second plane P2, third plane P3, fourth plane P4. Detailed Implementation

[0037] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. Examples of embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the invention, and should not be construed as limiting the invention. Furthermore, it should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.

[0038] In the description of this invention, it should be understood that the terms "upper", "lower", "back", "front", etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing this invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this invention.

[0039] In this invention, unless otherwise explicitly specified and limited, "above" or "below" the second feature can include direct contact between the first and second features, or contact between the first and second features through another feature between them. Furthermore, "above," "over," and "on top" of the second feature includes the first feature directly above or diagonally above the second feature, or simply indicates that the first feature is at a higher horizontal level than the second feature. "Below," "below," and "under" the second feature includes the first feature directly below or diagonally below the second feature, or simply indicates that the first feature is at a lower horizontal level than the second feature.

[0040] The following disclosure provides numerous different embodiments or examples for implementing various structures of the invention. To simplify the disclosure, specific examples of components and arrangements are described below. These are merely examples and are not intended to limit the scope of the invention. Furthermore, reference numerals and / or letters may be repeated in different examples; such repetition is for simplification and clarity and does not in itself indicate a relationship between the various embodiments and / or arrangements discussed.

[0041] Please refer to Figures 1-3 An embodiment of the present invention provides a back-contact solar cell 100, comprising: The silicon substrate 1 includes a back side 11 and a front side 12 disposed opposite to each other. The back side 11 includes a first region 111 and a second region 112 disposed alternately along a first direction X, and an isolation region 113 located between the first region 111 and the second region 112. A first doped layer 2 is provided in the first region 111; A second doped layer 3 is provided in the second region 112, and the doping type of the second doped layer 3 is opposite to that of the first doped layer 2; An isolation layer 4 is provided in isolation region 113. The doping concentration of isolation layer 4 is less than that of the first doped layer 2 and the second doped layer 3, and the doping concentration of isolation layer 4 is less than or equal to 1E18 / cm. 3 ; An interface passivation layer 5 is disposed between the first doped layer 2 and the silicon substrate 1 and between the second doped layer 3 and the silicon substrate 1. The first dielectric layer 6 is disposed on the side of the isolation layer 4 facing away from the silicon substrate 1; The second dielectric layer 7 is disposed on the side of the first doped layer 2 away from the silicon substrate 1. The second dielectric layer 7 includes a first main body portion 71 located on the side of the first doped layer 2 away from the silicon substrate 1, and a first extension portion 72 formed by extending the first main body portion 71 into the space between the isolation layer 4 and the first dielectric layer 6. The first extension portion 72 fills a portion of the area between the isolation layer 4 and the first dielectric layer 6.

[0042] An embodiment of the present invention provides a back-contact solar cell 100 with an interface passivation layer 5 disposed between a first doped layer 2 and a silicon substrate 1 and between a second doped layer 3 and a silicon substrate 1. A first dielectric layer 6 is disposed on the side of an isolation layer 4 facing away from the silicon substrate 1, and a second dielectric layer 7 is disposed on the side of the first doped layer 2 facing away from the silicon substrate 1. The second dielectric layer 7 extends into the space between the isolation layer 4 and the first dielectric layer 6 to form a first extension portion 72. The first extension portion 72 fills a portion of the area between the isolation layer 4 and the first dielectric layer 6. Since the first extension portion 72 fills a portion of the area between the isolation layer 4 and the first dielectric layer 6, the first extension portion 72 can block hydrogen atoms in the first doped layer 2 from expanding outward from the gap between the isolation layer 4 and the first dielectric layer 6. This reduces the outward expansion of hydrogen atoms in the first doped layer 2 and facilitates the expansion of more hydrogen atoms in the first doped layer 2 into the interface passivation layer 5, thereby increasing the hydrogen content of the interface passivation layer 5 and improving the passivation effect of the interface passivation layer 5. This, in turn, helps to improve the photoelectric conversion efficiency of the back-contact solar cell 100.

[0043] In this embodiment of the invention, an isolation layer 4 is provided in the isolation region 113 on the back side 11. The doping concentration of the isolation layer 4 is lower than that of the first doped layer 2 and the second doped layer 3, and the doping concentration of the isolation layer 4 is less than or equal to 1E18 / cm. 3 Thus, the doping concentration of isolation layer 4 is controlled to be less than or equal to 1E18 / cm. 3 By using a low doping concentration isolation layer 4, the current transmission capability of the isolation layer 4 is relatively weak. Under this doping concentration, the isolation layer 4 can achieve reliable electrical isolation between the first doped layer 2 and the second doped layer 3, preventing short circuits between the first doped layer 2 and the second doped layer 3.

[0044] In this embodiment of the invention, the silicon substrate 1 includes a back side 11 and a front side 12 disposed opposite to each other along the thickness direction Z of the silicon substrate 1. The front side 12 of the silicon substrate 1 is the side of the silicon substrate 1 that mainly receives sunlight when the back contact solar cell 100 is working normally, and the back side 11 of the silicon substrate 1 is the surface opposite to the front side 12 of the silicon substrate 1.

[0045] In this embodiment of the invention, there are multiple first doped layers 2 and second doped layers 3, which are alternately spaced along a first direction X. One of the first doped layers 2 and the second doped layer 3 is P-type doped, and the other is N-type doped; that is, one of the first doped layers 2 and the second doped layer 3 is a P-type doped layer, and the other is an N-type doped layer. The specific doping type of the first doped layer 2 and the second doped layer 3 is not limited. Specifically, the first doped layer 2 can be a P-type doped layer and the second doped layer 3 can be an N-type doped layer; or the first doped layer 2 can be an N-type doped layer and the second doped layer 3 can be a P-type doped layer. The P-type doped layer is doped with a P-type dopant element, that is, it is doped with P-type dopant atoms; the N-type doped layer is doped with an N-type dopant element, that is, it is doped with N-type dopant atoms. The P-type dopant element is a Group IIIA element in the periodic table, and the N-type dopant element is a Group VA element in the periodic table. For example, the P-type dopant element can be boron, and the N-type dopant element can be phosphorus.

[0046] As an embodiment of the present invention, the first doped layer 2 and the second doped layer 3 respectively include one or at least two of the following: a doped polycrystalline silicon layer, a doped microcrystalline silicon layer, and a doped nanocrystalline silicon layer.

[0047] In this embodiment, the first doped layer 2 and the second doped layer 3 can be one of a doped polycrystalline silicon layer, a doped microcrystalline silicon layer, or a doped nanocrystalline silicon layer. Alternatively, the first doped layer 2 and the second doped layer 3 can be a stacked structure of at least two of these doped polycrystalline silicon layers, doped microcrystalline silicon layers, or doped nanocrystalline silicon layers. In practical applications, the first doped layer 2 and the second doped layer 3 can be a single-layer structure. Alternatively, the first doped layer 2 and the second doped layer 3 can be a multilayer structure. When the first doped layer 2 and the second doped layer 3 are multilayer structures, a barrier layer can be provided between adjacent first doped layer 2 layers and between adjacent second doped layer 3 layers.

[0048] In this embodiment of the invention, the doping concentration of the isolation layer 4 is the concentration of doped atoms in the active state in the isolation layer 4, the doping concentration of the first doped layer 2 is the concentration of doped atoms in the active state in the first doped layer 2, and the doping concentration of the second doped layer 3 is the concentration of doped atoms in the active state in the second doped layer 3.

[0049] Specifically, when the doping type of the isolation layer 4 is P-type, the doping concentration of the isolation layer 4 is the concentration of the active P-type doped atoms in the isolation layer 4; conversely, when the doping type of the isolation layer 4 is N-type, the doping concentration of the isolation layer 4 is the concentration of the active N-type doped atoms in the isolation layer 4.

[0050] When the doping type of the first doped layer 2 is P-type, the doping concentration of the first doped layer 2 is the concentration of P-type doped atoms in the active state in the first doped layer 2; when the doping type of the first doped layer 2 is N-type, the doping concentration of the first doped layer 2 is the concentration of N-type doped atoms in the active state in the first doped layer 2.

[0051] When the doping type of the second doped layer 3 is P-type, the doping concentration of the second doped layer 3 is the concentration of P-type doped atoms in the active state in the second doped layer 3; when the doping type of the second doped layer 3 is N-type, the doping concentration of the second doped layer 3 is the concentration of N-type doped atoms in the active state in the second doped layer 3.

[0052] In this embodiment of the invention, the doping concentration of the isolation layer 4 is less than that of the first doping layer 2 and the second doping layer 3. This can be understood as the concentration of active doped atoms in the isolation layer 4 being less than that of active doped atoms in the first doping layer 2, and the concentration of active doped atoms in the isolation layer 4 being less than that of active doped atoms in the second doping layer 3.

[0053] The doping concentration of the isolation layer 4 is less than or equal to 1E18 / cm³. 3 This can be understood as the concentration of doped atoms in the active state in isolation layer 4 being less than or equal to 1E18 / cm³. 3 For example, if the doped atom in isolation layer 4 is a phosphorus atom, then the concentration of activated phosphorus atoms in isolation layer 4 is less than or equal to 1E18 / cm³. 3 If the doped atom in isolation layer 4 is boron atom, then the concentration of active boron atom in isolation layer 4 is less than or equal to 1E18 / cm³. 3 .

[0054] In this embodiment of the invention, the doping concentration of the isolation layer 4 can be less than or equal to 1E18 / cm². 3 Any value in the range. For example, the doping concentration of the isolation layer 4 can be 0 / cm. 3 1E3 / cm 3 1E4 / cm 3 1E5 / cm 3 1E6 / cm 3 1E8 / cm 3 1E9 / cm 3 1E10 / cm 3 1E11 / cm 3 1E12 / cm 3 1E13 / cm 3 1E14 / cm 3 1E15 / cm 3 1E16 / cm 3 1E17 / cm 32E17 / cm 3 3E17 / cm 3 4E17 / cm 3 5E17 / cm 3 1E18 / cm 3 Any value in the range.

[0055] As an embodiment of the present invention, the isolation layer 4 is an intrinsic semiconductor layer or a doped semiconductor layer.

[0056] In this embodiment of the invention, the isolation layer 4 may be made of the same material as the first doped layer 2 and the second doped layer 3, or it may be made of a different material. The isolation layer 4 is an intrinsic semiconductor layer or a doped semiconductor layer, and the doping concentration of the isolation layer 4 is less than or equal to 1E18 / cm³. 3 Within this doping concentration range, the current transport capability of the isolation layer 4 is relatively weak, thus achieving isolation between the first doped layer 2 and the second doped layer 3. Of course, in some embodiments, the isolation layer 4 can also be an insulating material. For example, the isolation layer 4 can be a stack of one or more of silicon oxide, silicon nitride, and silicon oxynitride layers, and the doping concentration of the isolation layer 4 is less than or equal to 1E18 / cm³. 3 .

[0057] As an embodiment of the present invention, the intrinsic semiconductor layer is at least one of an intrinsic polycrystalline silicon layer, an intrinsic amorphous silicon layer, an intrinsic microcrystalline silicon layer, and an intrinsic nanocrystalline silicon layer. It can be understood that the isolation layer 4 can be one or a stack of at least two of the intrinsic polycrystalline silicon layer, intrinsic amorphous silicon layer, intrinsic microcrystalline silicon layer, and intrinsic nanocrystalline silicon layer. Preferably, the isolation layer 4 is an intrinsic amorphous silicon layer or an intrinsic polycrystalline silicon layer, which can better achieve electrical isolation between the first doped layer 2 and the second doped layer 3.

[0058] As an embodiment of the present invention, the doped semiconductor layer is at least one of a doped polycrystalline silicon layer, a doped amorphous silicon layer, a doped microcrystalline silicon layer, and a doped nanocrystalline silicon layer. For example, the first doped layer 2, the second doped layer 3, and the isolation layer 4 are doped polycrystalline silicon layers, and the doping type of the isolation layer 4 is the same as the doping type of the first doped layer 2 or the second doped layer 3.

[0059] In one embodiment of the present invention, the doping concentration of the isolation layer 4 is less than 2E17 / cm. 3 .

[0060] In this embodiment, the doping concentration of the isolation layer 4 is controlled to be less than 2E17 / cm. 3 This further reduces the doping concentration of isolation layer 4, which helps to ensure the good electrical isolation effect of isolation layer 4.

[0061] As an embodiment of the present invention, the doping concentration of the isolation layer 4 is less than 1E17 / cm. 3.

[0062] In this embodiment, the doping concentration of the isolation layer 4 is controlled to be less than 1E17 / cm. 3 This further reduces the doping concentration of isolation layer 4, which helps to ensure the good isolation effect of isolation layer 4.

[0063] In one embodiment of the present invention, both the first doped layer 2 and the isolation layer 4 are doped with group VA elements, the second doped layer 3 is doped with group IIIA elements, and the doping concentration of the isolation layer 4 is less than 3E17 / cm³. 3 .

[0064] In this embodiment, both the first doped layer 2 and the isolation layer 4 are doped with group VA elements from the periodic table, and the second doped layer 3 is doped with group IIIA elements from the periodic table. The doping concentration of the isolation layer 4 is controlled to be less than 3E17 / cm³. 3 This ensures good isolation effect of isolation layer 4, while also facilitating the control of doping concentration and processing.

[0065] In one embodiment of the present invention, both the first doped layer 2 and the isolation layer 4 are doped with group IIIA elements, the second doped layer 3 is doped with group VA elements, and the doping concentration of the isolation layer 4 is less than 1E17 / cm³. 3 .

[0066] In this embodiment, both the first doped layer 2 and the isolation layer 4 are doped with Group IIIA elements from the periodic table, and the second doped layer 3 is doped with Group VA elements from the periodic table. The doping concentration of the isolation layer 4 is controlled to be less than 1E17 / cm³. 3 This ensures good isolation effect of isolation layer 4, while also facilitating the control of doping concentration and processing.

[0067] In one embodiment of the present invention, the doping concentrations of both the second doped layer 3 and the first doped layer 2 are greater than 1E19 / cm². 3 .

[0068] In this embodiment, the doping concentrations of both the second doped layer 3 and the first doped layer 2 are controlled to be greater than 1E19 / cm. 3 This ensures a low contact resistance between the first doped layer 2 and the first metal electrode 13, and between the second doped layer 3 and the second metal electrode 14, which is more conducive to improving the photoelectric conversion efficiency of the battery.

[0069] As one embodiment of the present invention, it also includes: The third dielectric layer 8 is disposed on the side of the second doped layer 3 facing away from the silicon substrate 1. The third dielectric layer 8 includes a second main body portion 81 located on the side of the second doped layer 3 facing away from the silicon substrate 1, and a second extension portion 82 formed by extending the second main body portion 81 towards the spacer layer 4 and the first dielectric layer 6. The second extension portion 82 fills a portion of the area between the spacer layer 4 and the first dielectric layer 6.

[0070] In this embodiment, a third dielectric layer 8 is provided on the side of the second doped layer 3 facing away from the silicon substrate 1. The third dielectric layer 8 extends into the space between the isolation layer 4 and the first dielectric layer 6 to form a second extension 82. The second extension 82 fills a portion of the area between the isolation layer 4 and the first dielectric layer 6. The second extension 82 can block hydrogen atoms in the second doped layer 3 from expanding outward from the gap between the isolation layer 4 and the first dielectric layer 6, reducing the outward expansion of hydrogen atoms in the second doped layer 3. This facilitates the diffusion of more hydrogen atoms in the second doped layer 3 into the interface passivation layer 5, thereby further improving the passivation effect of the interface passivation layer 5 and further improving the photoelectric conversion efficiency of the battery.

[0071] In this embodiment, the first main body portion 71 of the second dielectric layer 7 extends to form a first extension portion 72 on both sides near the isolation layer 4, and each first extension portion 72 extends into the space between the corresponding isolation layer 4 and the first dielectric layer 6; the second main body portion 81 of the third dielectric layer 8 extends to form a second extension portion 82 on both sides near the isolation layer 4, and each second extension portion 82 extends into the space between the corresponding isolation layer 4 and the first dielectric layer 6; thus, the gap between the isolation layer 4 and the first dielectric layer 6 near the first doped layer 2 is filled by the first extension portion 72, and the gap between the isolation layer 4 and the first dielectric layer 6 near the second doped layer 3 is filled by the second extension portion 82. This can better prevent hydrogen in the first doped layer 2 and the second doped layer 3 from expanding outward from the gap between the isolation layer 4 and the first dielectric layer 6, greatly improving the passivation effect of the first region 111 and the second region 112, thereby improving the photoelectric conversion efficiency of the battery.

[0072] In this embodiment, the interface passivation layer 5 is disposed between the first doped layer 2 and the silicon substrate 1, and the interface passivation layer 5 is disposed between the second doped layer 3 and the silicon substrate 1. The interface passivation layer 5 passesivates the surface of the silicon substrate 1 and allows carriers to pass through efficiently, which helps to ensure good photoelectric conversion efficiency of the battery.

[0073] As an embodiment of the present invention, the interface passivation layer 5 includes one or a combination of at least two of the following: silicon oxide layer, aluminum oxide layer, silicon carbide layer, silicon nitride layer, and silicon oxynitride layer.

[0074] In this embodiment, the interface passivation layer 5 can be one of a silicon oxide layer, an aluminum oxide layer, a silicon carbide layer, a silicon nitride layer, and a silicon oxynitride layer. Alternatively, the interface passivation layer 5 can be a stacked structure of at least two of these layers. Preferably, the interface passivation layer 5 is a silicon oxide layer, which can achieve a better passivation effect.

[0075] As an embodiment of the present invention, the interface passivation layer 5 is also disposed between the isolation layer 4 and the silicon substrate 1.

[0076] In this embodiment, the interface passivation layer 5 is also disposed between the isolation layer 4 and the silicon substrate 1. The interface passivation layer 5 passesivates the surface of the silicon substrate 1 at the location of the isolation layer 4, which can further improve the photoelectric conversion efficiency of the battery.

[0077] As an embodiment of the present invention, the second dielectric layer 7 includes at least one of silicon oxide layer, silicon carbide layer, aluminum oxide layer, silicon nitride layer, borosilicate glass, and phosphosilicate glass.

[0078] In this embodiment, the second dielectric layer 7 can be at least one of silicon oxide layer, silicon carbide layer, aluminum oxide layer, silicon nitride layer, borosilicate glass, and phosphosilicate glass, or it can be a stacked structure of at least two of silicon oxide layer, silicon carbide layer, aluminum oxide layer, silicon nitride layer, borosilicate glass, and phosphosilicate glass.

[0079] Preferably, the second dielectric layer 7 is borosilicate glass (boron-doped silicon oxide) or phosphosilicate glass (phosphorus-doped silicon oxide). When the first doped layer 2 is a boron-doped layer, the second dielectric layer 7 is borosilicate glass. The second dielectric layer 7 can be formed by directly oxidizing the first doped layer 2 at high temperature to generate borosilicate glass, which facilitates the preparation of the second dielectric layer 7 and makes it easier for the second dielectric layer 7 to form the first extension 72 between the isolation layer 4 and the first dielectric layer 6 during the high-temperature process. When the first doped layer 2 is a phosphorus-doped layer, the second dielectric layer 7 is phosphosilicate glass. The second dielectric layer 7 can be obtained by directly oxidizing the first doped layer 2 at high temperature to generate phosphosilicate glass, which facilitates the preparation of the second dielectric layer 7 and makes it easier for the second dielectric layer 7 to form the first extension 72 between the isolation layer 4 and the first dielectric layer 6 during the high-temperature process. Therefore, setting the second dielectric layer 7 as borosilicate glass or phosphosilicate glass facilitates the preparation of the second dielectric layer 7, and borosilicate glass or phosphosilicate glass has a strong ability to block hydrogen atoms, which helps to improve the effect of the first extension 72 of the second dielectric layer 7 in blocking the outward diffusion of hydrogen atoms in the first doped layer 2.

[0080] As an embodiment of the present invention, the first dielectric layer 6 is at least one of a silicon nitride layer, a silicon oxynitride layer, and an aluminum oxide layer.

[0081] In this embodiment, the first dielectric layer 6 can passivate the surface of the isolation layer 4. The first dielectric layer 6 is one of a silicon nitride layer, a silicon oxynitride layer, and an aluminum oxide layer, or a stacked structure of at least two of these layers.

[0082] As an embodiment of the present invention, the thickness of the first dielectric layer 6 is 10~80 nanometers.

[0083] In this embodiment, the thickness of the first dielectric layer 6 is controlled to be 10-80 nanometers, so that the first dielectric layer 6 can effectively passivate the surface of the isolation layer 4. For example, the thickness of the first dielectric layer 6 can be any value among 10 nanometers, 11 nanometers, 12 nanometers, 13 nanometers, 15 nanometers, 16 nanometers, 18 nanometers, 20 nanometers, 25 nanometers, 30 nanometers, 35 nanometers, 40 nanometers, 45 nanometers, 50 nanometers, 55 nanometers, 60 nanometers, 65 nanometers, 70 nanometers, 75 nanometers, 78 nanometers, and 80 nanometers.

[0084] As an embodiment of the present invention, the third dielectric layer 8 includes at least one of silicon oxide layer, silicon carbide layer, aluminum oxide layer, silicon nitride layer, borosilicate glass, and phosphosilicate glass.

[0085] In this embodiment, the third dielectric layer 8 can be at least one of silicon oxide, silicon carbide, aluminum oxide, silicon nitride, borosilicate glass, and phosphosilicate glass, or it can be a stacked structure of at least two of these materials. The materials of the third dielectric layer 8 and the second dielectric layer 7 can be the same or different.

[0086] In a preferred embodiment of the present invention, one of the second dielectric layer 7 and the third dielectric layer 8 is borosilicate glass, and the other is phosphosilicate glass. Specifically, the first doped layer 2 is a boron-doped layer, the second dielectric layer 7 is borosilicate glass, the second doped layer 3 is a phosphorus-doped layer, and the third dielectric layer 8 is phosphosilicate glass; or, the first doped layer 2 is a phosphorus-doped layer, the second dielectric layer 7 is phosphosilicate glass, the second doped layer 3 is a boron-doped layer, and the third dielectric layer 8 is borosilicate glass.

[0087] When the second doped layer 3 is a boron-doped layer, the third dielectric layer 8 is borosilicate glass. The third dielectric layer 8 can be formed by directly oxidizing the second doped layer 3 at high temperature to generate borosilicate glass, which facilitates the preparation of the third dielectric layer 8 and makes it easier for the third dielectric layer 8 to form a second extension 82 between the isolation layer 4 and the first dielectric layer 6 during the high-temperature process. When the second doped layer 3 is a phosphorus-doped layer, the third dielectric layer 8 is phosphosilicate glass. The third dielectric layer 8 can be obtained by directly oxidizing the second doped layer 3 at high temperature to generate phosphosilicate glass, which facilitates the preparation of the third dielectric layer 8 and makes it easier for the third dielectric layer 8 to form a second extension 82 between the isolation layer 4 and the first dielectric layer 6 during the high-temperature process. Therefore, setting the third dielectric layer 8 as borosilicate glass or phosphosilicate glass facilitates the preparation of the third dielectric layer 8, and borosilicate glass or phosphosilicate glass has a strong ability to block hydrogen atoms, which helps to improve the effect of the second extension 82 of the third dielectric layer 8 in blocking the outward diffusion of hydrogen atoms in the second doped layer 3.

[0088] As one embodiment of the present invention, it also includes: Anti-reflection passivation layer 9 covers the side of the first dielectric layer 6, the second dielectric layer 7 and the third dielectric layer 8 that is away from the silicon substrate 1.

[0089] In this embodiment, the anti-reflection passivation layer 9 covers the first dielectric layer 6, the second dielectric layer 7, and the third dielectric layer 8. The anti-reflection passivation layer 9 serves to passivate and reduce reflection, thereby reducing the recombination loss of the back surface 11 and improving the utilization rate of sunlight by the back surface 11. Specifically, the anti-reflection passivation layer 9 can be one or a stack of at least two of the following: an aluminum oxide layer, a silicon nitride layer, and a silicon oxynitride layer.

[0090] As one embodiment of the present invention, it also includes: The first metal electrode 13 passes through the anti-reflection passivation layer 9 and the second dielectric layer 7 and is electrically connected to the first doped layer 2. The second metal electrode 14 passes through the anti-reflection passivation layer 9, the third dielectric layer 8, and is electrically connected to the second doped layer 3.

[0091] In this embodiment, the first metal electrode 13 and the second metal electrode 14 can specifically be silver electrodes or aluminum electrodes. When the first doped layer 2 is a doped polysilicon layer, the first metal electrode 13 is in direct contact with the first doped layer 2, thereby achieving an electrical connection between the first metal electrode 13 and the first doped layer 2; when the second doped layer 3 is a doped polysilicon layer, the second metal electrode 14 is in direct contact with the second doped layer 3, thereby achieving an electrical connection between the second metal electrode 14 and the second doped layer 3.

[0092] When the first doped layer 2 and the second doped layer 3 are at least one of doped microcrystalline silicon layer and doped nanocrystalline silicon layer, a first TCO conductive film can be disposed between the first metal electrode 13 and the first doped layer 2, and the first metal electrode 13 and the first doped layer 2 are electrically connected by the first TCO conductive film; a second TCO conductive film can be disposed between the second metal electrode 14 and the second doped layer 3, and the second metal electrode 14 and the second doped layer 3 are electrically connected by the second TCO conductive film, and the second TCO conductive film and the first TCO conductive film are spaced apart to avoid the second TCO conductive film and the first TCO conductive film forming a short circuit.

[0093] As an embodiment of the present invention, the ratio of the length L1 of the first extension 72 along the first direction X to the length L0 of the isolation layer 4 along the first direction X is less than or equal to 15%.

[0094] In this embodiment, the ratio of the length L1 of the first extension 72 along the first direction X to the length L0 of the isolation layer 4 along the first direction X is controlled to be less than or equal to 15%. This avoids the first extension 72 being too long along the first direction X, ensuring sufficient bonding area between the first dielectric layer 6 and the isolation layer 4, thus enabling a stable bond between them. For example, the ratio of the length L1 of the first extension 72 along the first direction X to the length L0 of the isolation layer 4 along the first direction X can be any value among 1%, 1.5%, 2%, 2.2%, 3%, 3.5%, 4%, 5%, 5.6%, 6%, 7%, 8%, 9%, 10%, 11%, 12%, 13%, and 15%.

[0095] As an embodiment of the present invention, along the first direction X, the first extension 72 includes a first end 721 close to the first doped layer 2 and a second end 722 away from the first doped layer 2. The dimension of the first end 721 along the thickness direction Z of the silicon substrate 1 is greater than the dimension of the second end 722 along the thickness direction Z of the silicon substrate 1.

[0096] In this embodiment, in the first direction X, since the first end 721 of the first extension 72 is closer to the first doped layer 2 than the second end 722, the dimension of the first end 721 of the first extension 72 along the thickness direction Z of the silicon substrate 1 is set to be greater than the dimension of the second end 722 along the thickness direction Z of the silicon substrate 1. That is, the thickness of the first extension 72 at the first end 721 is greater than the thickness of the first extension 72 at the second end 722, which is more conducive to improving the effect of the first extension 72 in blocking hydrogen diffusion from the first doped layer 2. The ratio of the dimension of the first end 721 along the thickness direction Z of the silicon substrate 1 to the dimension of the second end 722 along the thickness direction Z of the silicon substrate 1 is not limited. For example, the ratio of the dimension of the first end 721 along the thickness direction Z of the silicon substrate 1 to the dimension of the second end 722 along the thickness direction Z of the silicon substrate 1 can be 3 to 10. This ensures both a good blocking effect of the first end 721 on hydrogen diffusion from the first doped layer 2 and a stable bond between the first dielectric layer 6 and the isolation layer 4.

[0097] Similarly, along the first direction X, the second extension 82 includes a third end 821 close to the second doped layer 3 and a fourth end 822 away from the second doped layer 3. The dimension of the third end 821 along the thickness direction Z of the silicon substrate 1 is greater than the dimension of the fourth end 822 along the thickness direction Z of the silicon substrate 1. That is, the thickness of the second extension 82 at the third end 821 is greater than the thickness of the second extension 82 at the fourth end 822, which is more conducive to improving the effect of the second extension 82 in blocking hydrogen diffusion in the second doped layer 3.

[0098] As an embodiment of the present invention, the first extension 72 is provided in a pointed shape, and the size of the first extension 72 along the thickness direction Z of the silicon substrate 1 decreases sequentially from the first end 721 to the second end 722.

[0099] In this embodiment, the first extension 72 has a pointed structure, and the thickness of the first extension 72 decreases sequentially from the first end 721 to the second end 722. This not only effectively blocks the outward diffusion of hydrogen from the first doped layer 2, but also ensures good adhesion between the first dielectric layer 6 and the isolation layer 4, guaranteeing sufficient bonding force between them and preventing the first dielectric layer 6 from detaching from the isolation layer 4. The surface of the first extension 72 can be a sloped or curved surface to achieve the sequential decrease in thickness from the first end 721 to the second end 722.

[0100] Similarly, the second extension 82 is also pointed. The size of the second extension 82 along the thickness direction Z of the silicon substrate 1 decreases from the third end 821 to the fourth end 822. This not only enables the second extension 82 to effectively block the hydrogen diffusion of the second doped layer 3, but also ensures good adhesion between the first dielectric layer 6 and the isolation layer 4, ensuring sufficient bonding force between the first dielectric layer 6 and the isolation layer 4, and preventing the first dielectric layer 6 from detaching from the isolation layer 4.

[0101] Please refer to this again. Figure 2 As an embodiment of the present invention, the first main body 71 includes a first surface and a second surface disposed opposite to each other along the thickness direction Z of the silicon substrate 1. The first surface is disposed close to the first doped layer 2, and the second surface is disposed away from the first doped layer 2. The plane where the first surface is located is the first plane P1, and the plane where the second surface is located is the second plane P2. The first extension 72 is located between the first plane P1 and the second plane P2.

[0102] In this embodiment, the first extension 72 is located between the first plane P1 and the second plane P2. This avoids excessive warping of the first extension 72 and ensures good adhesion between the first dielectric layer 6 and the isolation layer 4, thus guaranteeing the bonding force between the first dielectric layer 6 and the isolation layer 4.

[0103] Please refer to this again. Figure 3 As an embodiment of the present invention, the second main body 81 includes a third surface and a fourth surface disposed opposite to each other along the thickness direction Z of the silicon substrate 1. The third surface is disposed close to the second doped layer 3, and the fourth surface is disposed away from the second doped layer 3. The plane in which the third surface is located is the third plane P3, and the plane in which the fourth surface is located is the fourth plane P4. The second extension 82 is located between the third plane P3 and the fourth plane P4. This can avoid excessive warping of the second extension 82 and further ensure good adhesion between the first dielectric layer 6 and the isolation layer 4, and ensure the bonding force between the first dielectric layer 6 and the isolation layer 4.

[0104] As an embodiment of the present invention, the length L1 of the first extension 72 along the first direction X is 0.02~2 micrometers.

[0105] In this embodiment, the length of the first extension 72 along the first direction X is controlled to be 0.02~2 micrometers. This avoids the first extension 72 being too short along the first direction X, ensuring that the first extension 72 can block the outward diffusion of hydrogen in the first doped layer 2. It also avoids the first extension 72 being too long along the first direction X, ensuring sufficient contact area between the first dielectric layer 6 and the isolation layer 4, and ensuring good bonding between the first dielectric layer 6 and the isolation layer 4.

[0106] For example, the length L1 of the first extension 72 along the first direction X can be any value among 0.02 micrometers, 0.03 micrometers, 0.05 micrometers, 0.08 micrometers, 0.1 micrometers, 0.15 micrometers, 0.2 micrometers, 0.25 micrometers, 0.3 micrometers, 0.35 micrometers, 0.4 micrometers, 0.5 micrometers, 0.8 micrometers, 1 micrometer, 1.5 micrometers, 1.8 micrometers, and 2 micrometers.

[0107] As an embodiment of the present invention, the length L2 of the second extension 82 along the first direction X is 0.02~2 micrometers, which ensures the ability of the second extension 82 to block the outward diffusion of hydrogen in the second doped layer 3, and ensures sufficient contact area between the first dielectric layer 6 and the isolation layer 4, thus ensuring good bonding between the first dielectric layer 6 and the isolation layer 4.

[0108] As an embodiment of the present invention, the thickness of the second dielectric layer 7 is 15~100 nanometers.

[0109] In this embodiment, the thickness of the second dielectric layer 7 is 15-100 nanometers, that is, the thickness of both the first main body portion 71 and the first extension portion 72 of the second dielectric layer 7 is in the range of 15-100 nanometers. The thickness of the first extension portion 72 is less than the thickness of the first main body portion 71. Preferably, the thickness of the first extension portion 72 is less than 50 nanometers.

[0110] As an embodiment of the present invention, the ratio of the sum of the areas of the first region 111 and the second region 112 to the total area of ​​the back surface 11 is 10% to 80%.

[0111] In this embodiment, the sum of the areas of the first region 111 and the second region 112 is the sum of the areas of all first regions 111 and all second regions 112. By controlling the ratio of the sum of the areas of the first region 111 and the second region 112 to the total area of ​​the back surface 11 to be 10%~80%, the area of ​​the first region 111 and the second region 112 on the back surface 11 is prevented from being too large, thus reducing Auger recombination of the first doped layer 2 and the second doped layer 3, which is beneficial for improving photoelectric conversion efficiency. Conversely, by preventing the area of ​​the first doped layer 2 and the second doped layer 3 on the back surface 11 from being too small, a smaller sheet resistance of the battery is ensured, maintaining a higher fill factor and improving photoelectric conversion efficiency. This achieves a balance between these two effects.

[0112] For example, the ratio of the sum of the areas of the first region 111 and the second region 112 to the total area of ​​the back surface 11 can be any value among 10%, 12%, 15%, 20%, 25%, 30%, 35%, 40%, 45%, 50%, 55%, 60%, 65%, 70%, 75%, and 80%.

[0113] As an embodiment of the present invention, the ratio of the sum of the areas of the first region 111 and the second region 112 to the total area of ​​the back surface 11 is 20% to 50%.

[0114] In this embodiment, the ratio of the sum of the areas of the first region 111 and the second region 112 to the total area of ​​the back surface 11 is further controlled to be 20% to 50%, which can further reduce Auger recombination of the first doped layer 2 and the second doped layer 3, and maintain a small sheet resistance of the battery, which is conducive to further improving the photoelectric conversion efficiency of the battery.

[0115] As an embodiment of the present invention, the thickness of the isolation layer 4 is greater than the thickness of at least one of the first doped layer 2 and the second doped layer 3.

[0116] In this embodiment, the thicknesses of the first doped layer 2 and the second doped layer 3 can be the same or different. The thickness of the isolation layer 4 is greater than at least one of the first doped layer 2 and the second doped layer 3, which is beneficial for improving the electrical isolation effect between the first doped layer 2 and the second doped layer 3. Preferably, the thickness of the isolation layer 4 is greater than the thicknesses of both the first doped layer 2 and the second doped layer 3, which is beneficial for further improving the electrical isolation effect between the first doped layer 2 and the second doped layer 3. For example, the thickness of the isolation layer 4 is 1.2~3 times the thickness of the first doped layer 2 and the second doped layer 3, which facilitates the processing of the first doped layer 2, the second doped layer 3, and the isolation layer 4, and also improves the electrical isolation effect of the isolation layer 4 between the first doped layer 2 and the second doped layer 3.

[0117] In one embodiment of the present invention, the first doped layer 2 is a P-type doped layer and the second doped layer 3 is an N-type doped layer; the length L1 of the first extension 72 along the first direction X is greater than the length L2 of the second extension 82 along the first direction X.

[0118] In this embodiment, since the defect state density of the P-type doped layer is generally greater than that of the N-type doped layer, the length of the first extension 72 along the first direction X is controlled to be greater than the length of the second extension 82 along the first direction X. This can improve the ability of the first extension 72 to block the outward expansion of hydrogen atoms in the P-type doped layer, so that more hydrogen atoms are retained in the P-type doped layer or more hydrogen atoms in the P-type doped layer can expand inward to the passivation layer 5 at the interface where the P-type doped layer is located. This is beneficial to improving the passivation effect of the first region 111 and further improving the photoelectric conversion efficiency of the battery.

[0119] For example, the ratio of the length L1 of the first extension 72 along the first direction X to the length L2 of the second extension 82 along the first direction X can be 1.2 to 3. This can improve the ability of the first extension 72 to block the outward expansion of hydrogen atoms in the P-type doped layer, while also preventing the length L1 of the first extension 72 along the first direction X from being too long, thus ensuring a good bond between the first dielectric layer 6 and the isolation layer 4.

[0120] In one embodiment of the present invention, the first doped layer 2 is a P-type doped layer, the second doped layer 3 is an N-type doped layer, and the maximum thickness of the first extension 72 is greater than the maximum thickness of the second extension 82.

[0121] In this embodiment, the maximum thickness of the first extension 72 can be the dimension of the first end 721 of the first extension 72 along the thickness direction Z of the silicon substrate 1. Of course, the maximum thickness of the first extension 72 may also be located at other positions of the first extension 72. The maximum thickness of the second extension 82 can be the dimension of the third end 821 of the second extension 82 along the thickness direction Z of the silicon substrate 1. Of course, the maximum thickness of the second extension 82 may also be located at other positions of the second extension 82. Since the defect state density of the P-type doped layer is generally higher than that of the N-type doped layer, controlling the maximum thickness of the first extension 72 to be greater than the maximum thickness of the second extension 82 is more conducive to improving the ability of the second dielectric layer 7 to block the outward diffusion of hydrogen atoms in the first doped layer 2, which is conducive to improving the passivation effect of the first region 111 and improving the photoelectric conversion efficiency of the battery. In some embodiments, the ratio of the maximum thickness of the first extension 72 to the maximum thickness of the second extension 82 can be 1.2 to 3, which is beneficial to improving the passivation effect of the first region 111 and also facilitates the processing of the first extension 72 and the second extension 82.

[0122] In one embodiment of the present invention, the first doped layer 2 is a P-type doped layer and the second doped layer 3 is an N-type doped layer; the maximum thickness of the first main body 71 is greater than the maximum thickness of the second main body 81.

[0123] In this embodiment, the maximum thickness of the first main body 71 is the maximum dimension value of the first main body 71 along the thickness direction Z of the silicon substrate 1, and the maximum thickness of the second main body 81 is the maximum dimension value of the second main body 81 along the thickness direction Z of the silicon substrate 1. Since the defect state density of the P-type doped layer is greater than that of the N-type doped layer, the maximum thickness of the first main body 71 is greater than that of the second main body 81, which can improve the ability of the first main body 71 to block the outward diffusion of hydrogen atoms in the first doped layer 2, which is beneficial to improving the passivation effect of the first region 111 and further improving the photoelectric conversion efficiency of the battery. In some embodiments, the ratio of the maximum thickness of the first main body 71 to the maximum thickness of the second main body 81 can be 1.2 to 3, which is beneficial to improving the passivation effect of the first region 111 and also facilitates the processing of the first main body 71 and the second main body 81.

[0124] This invention also provides a battery assembly, which includes the back-contact solar cell 100 described in the above embodiments. It should be noted that this battery assembly has the same or similar beneficial effects as the back-contact solar cell 100, and the related aspects between the two can be referred to each other; to avoid repetition, they will not be repeated here.

[0125] In this embodiment, multiple back-contact solar cells 100 in the battery module are connected in series by solder ribbons to form a battery string, thereby achieving series current collection and output.

[0126] It is understood that in such embodiments, the battery assembly may also include a metal frame, a backsheet, photovoltaic glass, and an encapsulating film. The encapsulating film may be filled between the front side 12 and back side 11 of the back-contact solar cell 100, the photovoltaic glass, adjacent cells, etc. As a filler, it may be a transparent colloid with good light transmittance and aging resistance. For example, the encapsulating film may be an EVA film or a POE film, and the specific choice can be made according to the actual situation, without limitation.

[0127] Photovoltaic glass can be applied to the encapsulant film on the front side 12 of the back-contact solar cell 100. The photovoltaic glass can be ultra-clear glass, which has high light transmittance, high transparency, and superior physical, mechanical, and optical properties. For example, the light transmittance of ultra-clear glass can reach over 92%. It can protect the back-contact solar cell 100 while minimizing impact on its efficiency. Simultaneously, the encapsulant film bonds the photovoltaic glass and the back-contact solar cell 100 together, providing sealing, insulation, waterproofing, and moisture protection for the back-contact solar cell 100.

[0128] The backsheet can be attached to the adhesive film on the back side 11 of the back-contact solar cell 100. The backsheet provides protection and support for the back-contact solar cell 100, and has reliable insulation, water resistance, and aging resistance. Multiple options are available for the backsheet, typically tempered glass, acrylic glass, aluminum alloy TPT composite adhesive film, etc., and the specific choice depends on the specific circumstances and is not limited here. The backsheet, back-contact solar cell 100, adhesive film, and photovoltaic glass can be mounted on a metal frame. The metal frame serves as the main external support structure for the entire battery module, providing stable support and installation. For example, the battery module can be installed at the desired location using the metal frame.

[0129] This invention also provides a photovoltaic system, which includes the battery module described in the above embodiments. It should be noted that this photovoltaic system has the same or similar beneficial effects as the back-contact solar cell 100 described above, and the related aspects between the two can be referred to each other; to avoid repetition, they will not be repeated here.

[0130] In this embodiment, the photovoltaic system can be applied in photovoltaic power plants, such as ground-mounted power plants, rooftop power plants, and floating power plants. It can also be applied to equipment or devices that utilize solar energy to generate electricity, such as user solar power supplies, solar streetlights, solar cars, and solar buildings. Of course, it is understood that the application scenarios of the photovoltaic system are not limited to these; that is, the photovoltaic system can be applied in all fields that require solar energy to generate electricity. Taking a photovoltaic power generation system network as an example, the photovoltaic system may include a photovoltaic array, a combiner box, and an inverter. The photovoltaic array may be an array combination of multiple battery modules; for example, multiple battery modules can form multiple photovoltaic arrays. The photovoltaic array is connected to the combiner box, which can collect the current generated by the photovoltaic array. The collected current flows through the inverter and is converted into AC power required by the mains power grid before being connected to the mains power grid to achieve solar power supply.

[0131] In the description of this specification, references to terms such as "some embodiments," "illustrative embodiments," "examples," "specific examples," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with an embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0132] The above are merely preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent substitutions, and improvements made within the spirit and principles of the present invention should be included within the protection scope of the present invention.

Claims

1. A back-contact solar cell, characterized in that, include: A silicon substrate, the silicon substrate including a back side and a front side disposed opposite to each other, the back side including a first region and a second region disposed alternately at intervals along a first direction, and an isolation region located between the first region and the second region; A first doped layer is disposed in the first region; A second doped layer is provided in the second region, and the doping type of the second doped layer is opposite to that of the first doped layer. An isolation layer is provided in the isolation region, and the doping concentration of the isolation layer is less than or equal to 1E18 / cm. 3 ; An interface passivation layer is disposed between the first doped layer and the silicon substrate, and between the second doped layer and the silicon substrate; A first dielectric layer is disposed on the side of the isolation layer opposite to the silicon substrate; and A second dielectric layer is disposed on the side of the first doped layer opposite to the silicon substrate. The second dielectric layer includes a first main body portion located on the side of the first doped layer opposite to the silicon substrate and a first extension portion extending from the first main body portion toward the spacer layer and the first dielectric layer. The first extension portion fills a portion of the area between the spacer layer and the first dielectric layer.

2. The back-contact solar cell according to claim 1, characterized in that, Also includes: A third dielectric layer is disposed on the side of the second doped layer opposite to the silicon substrate. The third dielectric layer includes a second main body portion located on the side of the second doped layer opposite to the silicon substrate, and a second extension portion extending from the second main body portion toward the spacer layer and the first dielectric layer. The second extension portion fills a portion of the area between the spacer layer and the first dielectric layer.

3. The back-contact solar cell according to claim 1, characterized in that, The second dielectric layer includes at least one of silicon oxide layer, silicon carbide layer, aluminum oxide layer, silicon nitride layer, borosilicate glass, and phosphosilicate glass.

4. The back-contact solar cell according to claim 3, characterized in that, The second dielectric layer is borosilicate glass or phosphosilicate glass.

5. The back-contact solar cell according to claim 2, characterized in that, The third dielectric layer includes at least one of silicon oxide layer, silicon carbide layer, aluminum oxide layer, silicon nitride layer, borosilicate glass, and phosphosilicate glass.

6. The back-contact solar cell according to claim 2, characterized in that, One of the second dielectric layer and the third dielectric layer is borosilicate glass, and the other is phosphosilicate glass.

7. The back-contact solar cell according to claim 1, characterized in that, The first dielectric layer is at least one of silicon nitride, silicon oxynitride, and aluminum oxide.

8. The back-contact solar cell according to claim 1, characterized in that, The interface passivation layer includes one of the following: silicon oxide layer, aluminum oxide layer, silicon carbide layer, silicon nitride layer, and silicon oxynitride layer.

9. The back-contact solar cell according to claim 2, characterized in that, Also includes: An anti-reflection passivation layer covers the side of the first dielectric layer, the second dielectric layer, and the third dielectric layer that faces away from the silicon substrate.

10. The back-contact solar cell according to claim 9, characterized in that, Also includes: A first metal electrode passes through the anti-reflection passivation layer and the second dielectric layer and is electrically connected to the first doped layer; The second metal electrode passes through the anti-reflection passivation layer, the third dielectric layer, and is electrically connected to the second doped layer.

11. The back-contact solar cell according to claim 1, characterized in that, The ratio of the length of the first extension along the first direction to the length of the insulating layer along the first direction is less than or equal to 15%.

12. The back-contact solar cell according to claim 1, characterized in that, Along the first direction, the first extension includes a first end close to the first doped layer and a second end away from the first doped layer, wherein the dimension of the first end along the thickness direction of the silicon substrate is greater than the dimension of the second end along the thickness direction of the silicon substrate.

13. The back-contact solar cell according to claim 12, characterized in that, The first extension is pointed, and the dimension of the first extension along the thickness direction of the silicon substrate decreases sequentially from the first end to the second end.

14. The back-contact solar cell according to claim 1, characterized in that, The first main body includes a first surface and a second surface disposed opposite to each other along the thickness direction of the silicon substrate. The first surface is disposed close to the first doped layer, and the second surface is disposed away from the first doped layer. The plane in which the first surface is located is a first plane, and the plane in which the second surface is located is a second plane. The first extension is located between the first plane and the second plane.

15. The back-contact solar cell according to claim 1, characterized in that, The length of the first extension along the first direction is 0.02 to 2 micrometers.

16. The back-contact solar cell according to claim 1, characterized in that, The thickness of the second dielectric layer is 15~100 nanometers.

17. The back-contact solar cell according to claim 1, characterized in that, The ratio of the sum of the areas of the first region and the second region to the total area of ​​the back surface is 10% to 80%.

18. The back-contact solar cell according to claim 17, characterized in that, The ratio of the sum of the areas of the first region and the second region to the total area of ​​the back surface is 20% to 50%.

19. The back-contact solar cell according to claim 1, characterized in that, The thickness of the first dielectric layer is 10~80 nanometers.

20. The back-contact solar cell according to claim 1, characterized in that, The thickness of the isolation layer is greater than the thickness of at least one of the first doped layer and the second doped layer.

21. The back-contact solar cell according to claim 1, characterized in that, The isolation layer is an intrinsic semiconductor layer or a doped semiconductor layer.

22. The back-contact solar cell according to claim 21, characterized in that, The intrinsic semiconductor layer is at least one of intrinsic polycrystalline silicon layer, intrinsic amorphous silicon layer, intrinsic microcrystalline silicon layer, and intrinsic nanocrystalline silicon layer.

23. The back-contact solar cell according to claim 21, characterized in that, The doped semiconductor layer is at least one of the following: a doped polycrystalline silicon layer, a doped amorphous silicon layer, a doped microcrystalline silicon layer, and a doped nanocrystalline silicon layer.

24. The back-contact solar cell according to claim 1, characterized in that, The doping concentration of the isolation layer is less than 1E17 / cm. 3 .

25. The back-contact solar cell according to claim 1, characterized in that, The doping concentrations of both the first and second doped layers are greater than 1E19 / cm². 3 .

26. The back-contact solar cell according to claim 1, characterized in that, The first doped layer and the second doped layer respectively comprise one or at least a stack of doped polycrystalline silicon, doped microcrystalline silicon, and doped nanocrystalline silicon.

27. The back-contact solar cell according to claim 2, characterized in that, The first doped layer is a P-type doped layer, and the second doped layer is an N-type doped layer; the length of the first extension along the first direction is greater than the length of the second extension along the first direction.

28. The back-contact solar cell according to claim 2, characterized in that, The first doped layer is a P-type doped layer, the second doped layer is an N-type doped layer, and the maximum thickness of the first extension is greater than the maximum thickness of the second extension.

29. The back-contact solar cell according to claim 2, characterized in that, The first doped layer is a P-type doped layer, the second doped layer is an N-type doped layer, and the maximum thickness of the first main body is greater than the maximum thickness of the second main body.

30. A battery assembly, characterized in that, Including the back-contact solar cell as described in any one of claims 1 to 29.

31. A photovoltaic system, characterized in that, Includes the battery assembly as described in claim 30.

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