Semiconductor device and method of manufacturing the same, electronic device
By forming a protective layer on the inner wall of the etching window, the problem of damage to the etching barrier layer during dry etching of the dummy layer is solved, thus achieving the effect of protecting the device structure and reducing production costs.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- BEIJING SUPERSTRING ACAD OF MEMORY TECH
- Filing Date
- 2024-11-26
- Publication Date
- 2026-06-02
AI Technical Summary
In the semiconductor device manufacturing process, the etch barrier layer is easily damaged when the dummy layer is dry-etched, which can lead to device structural damage. Existing technologies cannot effectively avoid this problem.
By forming a protective layer in situ on the inner wall of the etching window, the size of the etching window is reduced, and a plasma etching process is used to form the protective layer to avoid damage to the etching barrier layer. The dummy layer is then etched using a dry etching process.
It effectively avoids damage to the etching barrier layer, protects the device structure, reduces production costs, eliminates the need for additional processes and equipment, and simplifies the process flow.
Smart Images
Figure CN122138635A_ABST
Abstract
Description
Technical Field
[0001] This application relates to the field of semiconductor technology, and more particularly to a semiconductor device and its manufacturing method, and an electronic device. Background Technology
[0002] With the development of integrated circuit technology, the critical dimensions of devices are shrinking, and the types and number of devices contained in a single chip are increasing, which means that small differences in the manufacturing process may affect the performance of the devices.
[0003] To minimize product costs, the goal is to fabricate as many device units as possible on a limited substrate. Since the advent of Moore's Law, the industry has proposed various semiconductor structure designs and process optimizations to meet current product demands. Summary of the Invention
[0004] The following is an overview of the subject matter described in detail herein. This overview is not intended to limit the scope of protection of this application.
[0005] This application provides a semiconductor device and its manufacturing method, as well as an electronic device. The manufacturing method reduces the size of the etching window by forming a protective layer, thereby avoiding damage to the etching barrier layer during the etching of the dummy layer.
[0006] This application provides a method for manufacturing a semiconductor device, the method comprising:
[0007] A preceding film layer is formed on a substrate, and an opening is formed in the preceding film layer that extends through the preceding film layer in a direction toward the substrate;
[0008] An etching barrier layer and a dummy layer are sequentially formed within the opening, and a mask layer covering the opening is formed on the substrate surface;
[0009] The mask layer is etched using a plasma etching process to form an etching window in the mask layer; during the formation of the etching window, the byproducts of plasma etching form a protective layer on the inner wall of the etching window;
[0010] Remove the dummy layer;
[0011] In the process of removing the dummy layer, the distance between the protective layers on the two sidewalls of the etching window distributed along a first direction parallel to the substrate is d, and the distance between the two sidewalls of the opening distributed along the first direction is D, where d < D; the first direction is any direction parallel to the substrate.
[0012] The etching ratio of the dummy layer to the protective layer is not less than 5:1.
[0013] In some embodiments of this application, removing the dummy layer includes:
[0014] A dry etching process is used in the etching window to remove the film layer between the bottom surface of the etching window and the dummy layer, exposing the dummy layer;
[0015] The dummy layer is partially etched using a dry etching process, leaving a dummy layer of a predetermined thickness in the opening;
[0016] The dummy layer is removed using a wet etching process.
[0017] In some embodiments of this application, the process of removing the film layer between the bottom surface of the etched window and the dummy layer using a dry etching process is a plasma etching process.
[0018] The process of using dry etching to incompletely etch the dummy layer is a plasma etching process.
[0019] In some embodiments of this application, the plasma etching process for forming the etching window, the plasma etching process for removing the film layer between the bottom surface of the etching window and the dummy layer, and the plasma etching process for incomplete etching of the dummy layer are performed on the same machine.
[0020] In some embodiments of this application, the mask layer is etched using a plasma etching process to form an etching window in the mask layer; during the formation of the etching window, byproducts of plasma etching form a protective layer on the inner wall of the etching window, including:
[0021] A photoresist is formed on the surface of the mask layer, and a photolithography process is used to pattern the photoresist to form a photolithographic pattern on the surface of the mask layer, the photolithographic pattern exposing the mask layer in the area corresponding to the opening;
[0022] The mask layer exposed by the photolithography pattern is etched using a dry etching process to form an initial etching window in the mask layer. The bottom surface of the initial etching window exposes the mask layer or the dummy layer.
[0023] The mask layer or the dummy layer exposed on the bottom surface of the initial etching window is etched using a plasma etching process to form the etching window; during the formation of the etching window, the byproducts of plasma etching form a protective layer on the inner wall of the etching window, and the protective layer on the bottom surface of the etching window is in contact with the dummy layer.
[0024] In some embodiments of this application, the process of forming the initial etching window using a dry etching process is a plasma etching process;
[0025] The plasma etching process for forming the initial etching window, the plasma etching process for forming the etching window, the plasma etching process for removing the film layer between the bottom surface of the etching window and the dummy layer, and the plasma etching process for incomplete etching of the dummy layer are all performed on the same machine.
[0026] The mask layer is etched using a plasma etching process to form an etching window in the mask layer; during the formation of the etching window, the byproducts of plasma etching form a protective layer on the inner wall of the etching window, including:
[0027] A photoresist is formed on the surface of the mask layer, and a photolithography process is used to pattern the photoresist to form a photolithographic pattern on the surface of the mask layer, the photolithographic pattern exposing the mask layer in the area corresponding to the opening;
[0028] The photolithography pattern is exposed by a plasma etching process to form an etching window in the mask layer. During the formation of the etching window, the byproducts of plasma etching form a protective layer on the inner wall of the etching window, and the protective layer located on the bottom surface of the etching window is in contact with the mask layer.
[0029] In some embodiments of this application, the etching gas used in the plasma etching process during the formation of the protective layer is a gas containing carbon and fluorine.
[0030] Furthermore, in the etching gas containing carbon and fluorine, the molar ratio of carbon atoms to fluorine atoms is not less than 0.5:1.
[0031] In some embodiments of this application, the etching gas containing carbon and fluorine is selected from any one or more of CH3F, CH2F2, and C4F6.
[0032] In some embodiments of this application, the thickness of the protective layer is not less than 5 nm.
[0033] In some embodiments of this application, the opening is any one or both of a through hole and a trench;
[0034] The through-hole extends in the direction toward the substrate;
[0035] The trench extends in both the direction toward the substrate and the direction parallel to the substrate.
[0036] This application also provides a semiconductor device, which is obtained by the manufacturing method described above.
[0037] This application also provides an electronic device, which includes the semiconductor device described above.
[0038] The manufacturing method of this application reduces the size of the etching window by forming a protective layer, thereby reserving space for the dry etching of the dummy layer. In this way, the etching barrier layer can be effectively prevented from being damaged during the dry etching process of etching the dummy layer.
[0039] Moreover, the manufacturing method of this application uses the byproducts formed during the formation of the etching window in the plasma etching process as a protective layer, that is, the protective layer is formed in situ. There is no need to add additional steps and equipment to form the protective layer. The formation of the etching window, the formation of the protective layer and the removal of the dummy layer can be completed on the existing operating table. This will not increase the production cost, and the step of removing the byproducts of the plasma etching process can be eliminated, thereby reducing the production cost.
[0040] Other features and advantages of this application will be set forth in the following description, and will be apparent in part from the description, or may be learned by practicing the application. Other advantages of this application can be realized and obtained by means of the solutions described in the description and the accompanying drawings. Attached Figure Description
[0041] The accompanying drawings are used to provide an understanding of the technical solutions of this application and constitute a part of the specification. They are used together with the embodiments of this application to explain the technical solutions of this application and do not constitute a limitation on the technical solutions of this application.
[0042] Figure 1 A process flow diagram of a method for manufacturing a semiconductor device, which is an exemplary embodiment of this application;
[0043] Figure 2 A schematic longitudinal section of a semiconductor device manufacturing method according to an exemplary embodiment of this application, after forming a photolithographic pattern, is shown in a cross section perpendicular to the substrate.
[0044] Figure 3 This is a schematic longitudinal section view of a semiconductor device manufacturing method according to an exemplary embodiment of this application, after forming an etching window, on a section perpendicular to the substrate.
[0045] Figure 4 This is a schematic longitudinal section view of a semiconductor device manufacturing method according to an exemplary embodiment of this application, after the formation of an etched window and a protective layer, on a section perpendicular to the substrate.
[0046] Figure 5This is a schematic longitudinal section view of a semiconductor device manufacturing method according to an exemplary embodiment of this application, after removing the protective layer on the bottom surface of the etched window, perpendicular to the substrate.
[0047] Figure 6 This is a schematic diagram of a longitudinal section perpendicular to the substrate after incomplete etching of a dummy layer in a method for manufacturing a semiconductor device, which is an exemplary embodiment of this application.
[0048] Figure 7 This is a schematic longitudinal section view of a semiconductor device manufacturing method after removing the dummy layer, which is an exemplary embodiment of this application, on a section perpendicular to the substrate.
[0049] Figure 8 This is a schematic longitudinal section diagram of a method for manufacturing another semiconductor device, which is an exemplary embodiment of this application, after the formation of a protective layer, on a section perpendicular to the substrate.
[0050] The symbols in the attached diagram have the following meanings:
[0051] 10-Substrate; 11-First insulating layer; 12-Second insulating layer; 13-Etching barrier layer; 14-Dummy layer; 15-Sacrificial layer; 16-Protective layer; 21-First mask layer; 22-Second mask layer; 23-Third mask layer; 24-Photoresist; K1-Through hole; K2-Etching window; K3-Initial etching window; Bit line-BL; C1-First capacitor electrode. Detailed Implementation
[0052] To make the objectives, technical solutions, and advantages of this application clearer, the embodiments of this application will be described in detail below with reference to the accompanying drawings. It should be noted that, unless otherwise specified, the embodiments and features described in these embodiments can be arbitrarily combined with each other.
[0053] The embodiments of this application are not necessarily limited to the dimensions shown in the drawings. The shapes and sizes of the components in the drawings are preferred embodiments, but other shapes and sizes are also possible. Furthermore, the drawings schematically illustrate ideal examples, and the embodiments of this application are not limited to the shapes or values shown in the drawings.
[0054] The size and proportional relationships between the various film layers or components in the accompanying drawings of this application can serve as a reference in actual processes and represent embodiments with better technical effects, but are not limited thereto. For example, the width-to-length ratio of the insulating layer, the thickness of each film layer, and the spacing can be adjusted according to actual needs.
[0055] The ordinal numbers such as "first" and "second" in this application are used to avoid confusion among the constituent elements and do not indicate any order, quantity, or importance.
[0056] In this application, for convenience, terms such as "middle," "upper," "lower," "front," "rear," "vertical," "horizontal," "top," "bottom," "inner," and "outer" are used to indicate orientation or positional relationships in conjunction with the accompanying drawings. This is solely for the purpose of facilitating the description and simplification of this specification, and does not imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, it should not be construed as a limitation of this application. The positional relationships of the constituent elements may be appropriately changed depending on the direction in which each constituent element is described. Therefore, the application is not limited to the terms described in the disclosure and may be appropriately replaced as appropriate.
[0057] In this application, unless otherwise expressly specified and limited, the terms "installation," "connection," and "linking" should be interpreted broadly. For example, they can refer to a fixed connection, a detachable connection, or an integral connection; a mechanical connection or an electrical connection; a direct connection, an indirect connection via an intermediate component, or a connection within two components. Those skilled in the art can understand the specific meaning of the above terms in this application based on the specific circumstances.
[0058] In this application, a transistor refers to a device that includes at least three terminals: a gate electrode, a drain electrode, and a source electrode. A transistor has a channel region between the drain electrode (drain electrode terminal, drain region, or drain electrode) and the source electrode (source electrode terminal, source region, or source electrode), and current can flow through the drain electrode, the channel region, and the source electrode. In this application, the channel region refers to the region through which current primarily flows.
[0059] In this application, the first electrode can be the drain electrode and the second electrode can be the source electrode, or vice versa. When using transistors with opposite polarities or when the current direction changes during circuit operation, the functions of the "source electrode" and "drain electrode" are sometimes interchanged. Therefore, unless otherwise specified, in this application, the "source electrode" and "drain electrode" can be interchanged.
[0060] In this application, "electrical connection" or "connection" includes situations where constituent elements are connected together by a component having some electrical function, such as an electrical signal connection (coupled connection, e.g., coupled to), or a physical direct connection. There are no particular limitations on the "component having some electrical function," as long as it enables the transmission and reception of electrical signals between the connected constituent elements. Examples of "component having some electrical function" include not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, and other components with various functions.
[0061] In this application, "parallel" means approximately parallel or nearly parallel, for example, two straight lines forming an angle of -10° or more and less than 10°, and therefore also includes angles of -5° or more and less than 5°. Similarly, "perpendicular" means approximately perpendicular, for example, two straight lines forming an angle of 80° or more and less than 100°, and therefore also includes angles of 85° or more and less than 95°.
[0062] In this application, "film" and "layer" can be interchanged. For example, "dummy layer" can sometimes be replaced with "dummy film". Similarly, "insulating film" can sometimes be replaced with "insulating layer".
[0063] The phrase "A and B are arranged in the same layer" in this application refers to A and B being distributed on the same horizontal plane, or although not on the same horizontal plane, both being in different areas of the same supporting surface. One embodiment involves A and B being formed simultaneously on the same film layer using the same patterning process.
[0064] In this application's embodiments, "A and B are an integral structure" can refer to a structure without obvious boundaries such as discontinuities or gaps in its microstructure. Generally, an integral structure is formed by patterning interconnected layers on a single film layer. For example, A and B may be formed using the same material to create a single film layer and simultaneously formed with interconnected structures through the same patterning process, or B may be directly grown on A via epitaxy, and the materials of the two may not be exactly the same.
[0065] The substrate in the embodiments of this application can be a support structure, such as a silicon substrate, or a support structure on which other films or functional circuits are already distributed. The devices involved in the inventive construction of the embodiments of this application are disposed on the main surface of the support structure.
[0066] In this application, the spacing distribution can be understood as a separate, independent distribution. This spacing can be achieved through physical structural breaks or electrical characteristic breaks. For example, the semiconductor layer between the effective channels of two transistors can be modified to achieve insulation, thus creating an electrical gap between the two channels.
[0067] In the manufacturing process of three-dimensional (3D) semiconductor devices, such as in the manufacturing process of Dynamic Random Access Memory (DRAM), it is usually necessary to etch deep holes, then deposit an etch barrier layer on the inner wall of the deep hole, and fill the deep hole with a dummy layer such as polysilicon. The role of the etch barrier layer is to protect the bit lines on the outer wall of the deep hole from being damaged in subsequent etching processes. The role of the dummy layer is to occupy the deep hole first, and then remove the dummy layer to form the transistor channel and gate electrode in the deep hole.
[0068] In current semiconductor device manufacturing processes, it is often necessary to etch deep holes in stacked structures formed by multiple film layers, and then sequentially deposit an etch barrier layer and a dummy layer (formed from materials such as polysilicon) within these deep holes. The purpose of the etch barrier layer is to reduce or prevent damage to the film layers or components on the sidewalls of the deep holes during subsequent etching processes. Afterward, the deep holes are opened, and the dummy layer is completely removed using the high selectivity of wet etching. However, in actual production processes, subsequent wet etching processes often cannot completely remove the dummy layer.
[0069] To address this issue, a portion of the dummy layer can be etched away using a dry etching process. However, during the etching of the dummy layer using a dry etching process, there is a risk of damaging the etching barrier layer on the sidewalls of deep holes. Therefore, the etching barrier layer cannot effectively prevent wet etching reagents from damaging the device structure.
[0070] This application provides a method for manufacturing a semiconductor device, which aims to effectively avoid damage to the etching barrier layer during the etching process of the dummy layer by reducing the size of the etching window and reserving space for the dry etching dummy layer, thereby preventing damage to the device structure by subsequent etching steps.
[0071] Figure 1 This is a process flow diagram of a method for manufacturing a semiconductor device, which is an exemplary embodiment of this application. Figure 1 As shown, the manufacturing method includes:
[0072] A preceding film layer is formed on a substrate, and an opening is formed in the preceding film layer that extends through the preceding film layer in a direction toward the substrate;
[0073] An etching barrier layer and a dummy layer are sequentially formed within the opening, and a mask layer covering the opening is formed on the substrate surface;
[0074] The mask layer is etched using a plasma etching process to form an etching window in the mask layer; during the formation of the etching window, the byproducts of plasma etching form a protective layer on the inner wall of the etching window;
[0075] Remove the dummy layer;
[0076] In the process of removing the dummy layer, the distance between the protective layers on the two sidewalls of the etching window distributed along a first direction parallel to the substrate is d, and the distance between the two sidewalls of the opening distributed along the first direction is D, where d < D; the first direction is any direction parallel to the substrate.
[0077] The etching ratio of the dummy layer to the protective layer is not less than 5:1.
[0078] The manufacturing method of this application reduces the size of the etching window by forming a protective layer, thereby reserving space for the dry etching of the dummy layer. In the process of etching the dummy layer using the dry etching process, the etching barrier layer can be effectively prevented from being damaged, thereby preventing damage to other film layers during the etching process.
[0079] Moreover, the manufacturing method of this application uses the byproducts formed during the formation of the etching window in the plasma etching process as a protective layer, that is, the protective layer is formed in situ. There is no need to add additional steps and equipment to form the protective layer. The formation of the etching window, the formation of the protective layer and the removal of the dummy layer can be completed on the existing operating table. This will not increase the production cost, and the step of removing the byproducts of the plasma etching process can be eliminated, thereby reducing the production cost.
[0080] In some embodiments of this application, the preceding film layer may be a plurality of alternating first insulating layers (e.g., silicon oxide) and a plurality of second insulating layers (e.g., silicon nitride), wherein the plurality of first insulating layers and the plurality of second insulating layers are alternately stacked to form a stacked structure; or, the preceding film layer may be a plurality of alternating insulating layers (e.g., silicon oxide, silicon nitride, etc.) and a plurality of sacrificial layers (e.g., polycrystalline silicon, etc.), wherein the plurality of insulating layers and the plurality of sacrificial layers are alternately stacked to form a stacked structure; or, the preceding film layer may be a plurality of alternating insulating layers and a plurality of conductive layers (e.g., metallic conductive layers, etc.), wherein the plurality of insulating layers and the plurality of conductive layers are alternately stacked to form a stacked structure.
[0081] In some embodiments of this application, the etching ratio of the dummy layer to the protective layer can be 5:1, 6:1, 7:1, 8:1, 9:1, 10:1, 12:1, 14:1, 16:1, 18:1 or 20:1.
[0082] A wider etching range between the dummy layer and the protective layer ensures that the protective layer is not damaged during the etching of the dummy layer, thus ensuring that the size of the etching window remains unchanged and does not expand as the dummy layer is etched, effectively preventing the etching barrier layer from being damaged.
[0083] In some embodiments of this application, removing the dummy layer includes:
[0084] A dry etching process is used in the etching window to remove the film layer between the bottom surface of the etching window and the dummy layer, exposing the dummy layer;
[0085] The dummy layer is partially etched using a dry etching process, leaving a dummy layer of a predetermined thickness in the opening;
[0086] The dummy layer is removed using a wet etching process.
[0087] In some embodiments of this application, the process of removing the film layer between the bottom surface of the etched window and the dummy layer using a dry etching process is a plasma etching process.
[0088] The process of using dry etching to incompletely etch the dummy layer is a plasma etching process.
[0089] In some embodiments of this application, the plasma etching process for forming the etching window, the plasma etching process for removing the film layer between the bottom surface of the etching window and the dummy layer, and the plasma etching process for incomplete etching of the dummy layer are performed on the same machine.
[0090] In some embodiments of this application, the mask layer is etched using a plasma etching process to form an etching window in the mask layer; during the formation of the etching window, byproducts of plasma etching form a protective layer on the inner wall of the etching window, including:
[0091] A photoresist is formed on the surface of the mask layer, and a photolithography process is used to pattern the photoresist to form a photolithographic pattern on the surface of the mask layer, the photolithographic pattern exposing the mask layer in the area corresponding to the opening;
[0092] The mask layer exposed by the photolithography pattern is etched using a dry etching process to form an initial etching window in the mask layer. The bottom surface of the initial etching window exposes the mask layer or the dummy layer.
[0093] The mask layer or the dummy layer exposed on the bottom surface of the initial etching window is etched using a plasma etching process to form the etching window; during the formation of the etching window, the byproducts of plasma etching form a protective layer on the inner wall of the etching window, and the protective layer on the bottom surface of the etching window is in contact with the dummy layer.
[0094] In some embodiments of this application, the process of forming the initial etching window using a dry etching process is a plasma etching process;
[0095] The plasma etching process for forming the initial etching window, the plasma etching process for forming the etching window, the plasma etching process for removing the film layer between the bottom surface of the etching window and the dummy layer, and the plasma etching process for incomplete etching of the dummy layer are all performed on the same machine.
[0096] The mask layer is etched using a plasma etching process to form an etching window in the mask layer; during the formation of the etching window, the byproducts of plasma etching form a protective layer on the inner wall of the etching window, including:
[0097] A photoresist is formed on the surface of the mask layer, and a photolithography process is used to pattern the photoresist to form a photolithographic pattern on the surface of the mask layer, the photolithographic pattern exposing the mask layer in the area corresponding to the opening;
[0098] The photolithography pattern is exposed by a plasma etching process to form an etching window in the mask layer. During the formation of the etching window, the byproducts of plasma etching form a protective layer on the inner wall of the etching window, and the protective layer located on the bottom surface of the etching window is in contact with the mask layer.
[0099] In some embodiments of this application, the etching gas used in the plasma etching process during the formation of the protective layer is a gas containing carbon and fluorine.
[0100] Furthermore, in the etching gas containing carbon and fluorine, the molar ratio of carbon atoms to fluorine atoms is not less than 0.5:1. For example, the molar ratio of carbon atoms to fluorine atoms can be 0.5:1, 1:1, 1:1.5, or 1:2.
[0101] In some embodiments of this application, the etching gas containing carbon and fluorine is selected from any one or more of CH3F, CH2F2, and C4F6.
[0102] In some embodiments of this application, the thickness of the protective layer may be no less than 5 nm. For example, the thickness of the protective layer may be 5 nm, 6 nm, 7 nm, 8 nm, 9 nm, 10 nm, 12 nm, 15 nm, 20 nm, 25 nm, 30 nm, 35 nm, 40 nm, 45 nm, or 50 nm.
[0103] In some embodiments of this application, the opening can be any one or both of through holes and trenches;
[0104] The through-hole extends in the direction toward the substrate;
[0105] The trench extends in both the direction toward the substrate and the direction parallel to the substrate.
[0106] The technical solutions of the embodiments of this application are further illustrated below through the manufacturing process of a semiconductor device using exemplary embodiments. The "patterning etching" mentioned in this embodiment includes processes such as film deposition, photoresist coating, mask exposure, development, etching, and photoresist stripping, which are mature fabrication processes in related technologies. The "photolithography" process mentioned in this embodiment includes film coating, mask exposure, and development, which are mature fabrication processes in related technologies. Deposition can employ known processes such as sputtering, evaporation, and chemical vapor deposition; coating can employ known coating processes; and etching can employ known methods, without specific limitations here.
[0107] like Figures 2 to 8 As shown, in one exemplary embodiment, the method for manufacturing the semiconductor device may include the following processes.
[0108] S10: A preceding film layer is formed on the substrate 10, and a through hole K1 is formed in the preceding film layer in a direction toward the substrate 10.
[0109] For example, the preceding film layer may include a plurality of alternating first insulating layers and a plurality of second insulating layers. Step S10 may include:
[0110] S11: Multiple first insulating layers 11 and multiple second insulating layers 12 are alternately deposited on the substrate 10 to obtain a stacked structure formed by alternating stacking of multiple first insulating layers 11 and multiple second insulating layers 12;
[0111] S12: A through-hole K1 is etched in the stacked structure to form a through-hole K1. Further, in this embodiment, the opening is a through-hole K1, and the distance between the two sidewalls of the opening distributed along the first direction is D.
[0112] S20: An etching barrier layer 13 and a dummy layer 14 are sequentially formed inside the via K1, and a mask layer 20 covering the via K1 is formed on the surface of the substrate 10.
[0113] For example, step S20 may include:
[0114] S21: An etching barrier layer 13 is deposited on the inner wall of the via K1, and a dummy layer 14 is filled in the via K1; a bit line BL is formed on one side wall of the via K1 in a direction parallel to the substrate 10, a first capacitor electrode C1 of a capacitor is formed in the capacitor region on the other side of the via K1, and a sacrificial layer 15 is filled in the gaps of the capacitor region.
[0115] S22: Form a mask layer 20 covering the through-hole K1 on the surface of the substrate. Exemplarily, along the direction away from the substrate 10, the mask layer 20 sequentially includes a first mask layer 21 formed of a first insulating material (such as silicon nitride, etc.), a second mask layer 22 formed of a material such as a carbon film, and a third mask layer 23 formed of a second insulating material (such as silicon oxynitride);
[0116] S23: Form a photoresist 24 on the surface of the mask layer, and pattern the photoresist 24 through a photolithography process to obtain a photolithography pattern located on the surface of the mask layer and corresponding to the to-be-formed etching window. The photolithography pattern exposes the mask layer 20 in the area corresponding to the through-hole K1, as Figure 2 shown.
[0117] S30: Etch the mask layer 20 using a plasma etching process to form an etching window K2 in the mask layer 20; during the process of forming the etching window K2, by-products of the plasma etching form a protective layer 16 on the inner wall of the etching window K2.
[0118] Exemplarily, step S30 may include:
[0119] S31: Etch the mask layer 20 exposed by the photolithography pattern using a plasma etching process to form an initial etching window K3 in the mask layer 20. The bottom surface of the initial etching window K3 exposes the dummy layer 14; in other embodiments, the bottom surface of the initial etching window K3 formed in step S31 may expose the mask layer 20, as Figure 3 shown;
[0120] S32: Etch the dummy layer 14 exposed by the bottom surface of the initial etching window K3 using a plasma etching process to form an etching window K2; during the process of forming the etching window K2, by-products of the plasma etching form a protective layer 16 on the inner wall of the etching window K2 and on the surface away from the substrate 10. The protective layer 16 located on the bottom surface of the etching window K2 contacts the dummy layer 14, as Figure 4 shown.
[0121] Exemplarily, during the process of forming the etching window K2, by-products of the plasma etching form a protective layer 16 on the inner wall of the etching window K2 and on the surface away from the substrate 10. The distance d between the protective layers on the two side walls distributed along a first direction parallel to the substrate is less than the distance D between the two side walls of the opening distributed along the first direction, that is, d < D; wherein, the first direction may be any direction parallel to the substrate.
[0122] For example, in the process of etching the dummy layer 14 exposed on the bottom surface of the initial etching window K3 to form the etching window K2 using a plasma etching process, etching gases containing carbon and fluorine, such as any one or more of CH3F, CH2F2, and C4F6, can be used. During the etching process to form the etching window K2, the byproducts of plasma etching form a protective layer 16 on the etching window and on the surface of the stacked structure away from the substrate 10.
[0123] For example, in some embodiments of this application, the thickness of the protective layer formed is not less than 5nm, which can be more conducive to reducing the etching window. In this way, during the etching of the dummy layer using the dry etching process, the etching barrier layer can be effectively prevented from being damaged, thereby avoiding damage to other film layers during the etching process.
[0124] For example, in some embodiments of this application, the etching selectivity ratio of the dummy layer to the protective layer is not less than 5:1. For example, the etching selectivity ratio can be 5:1, 6:1, 7:1, 8:1, 9:1, 10:1, 12:1, 14:1, 16:1, 18:1 or 20:1, etc.
[0125] S40: Remove the dummy layer 14.
[0126] For example, step S40 may include:
[0127] S41: In the etching window K2, a plasma etching process is used to remove the film layer between the bottom surface of the etching window K2 and the dummy layer 14, exposing the dummy layer 14, as shown. Figure 5 As shown; in this embodiment, the film layer between the bottom surface of the etching window K2 and the dummy layer 14 is the protective layer 16 on the bottom surface of the etching window K2;
[0128] S42: The dummy layer 14 is partially etched using plasma etching, leaving a dummy layer 14 of a preset thickness in the via K1, such as... Figure 6 As shown;
[0129] S43: Use wet etching to remove all the dummy layer 14 in via K1, such as... Figure 7 As shown.
[0130] In other embodiments, step S30 may not include S31, in which case step S30 may include:
[0131] The dummy layer 14 exposed by the photolithographic pattern is etched using a plasma etching process to form an etching window K2. During the formation of the etching window K2, plasma etching byproducts form a protective layer 16 on the inner wall of the etching window K2. The protective layer 16 on the bottom surface of the etching window K2 is in contact with the dummy layer 14. Figure 8 As shown. Subsequent steps are performed according to S40.
[0132] This application also provides a semiconductor device, which is obtained by the manufacturing method described above.
[0133] This application also provides an electronic device, which includes the semiconductor device described above.
[0134] In some embodiments of this application, the electronic device may be a storage device, a smartphone, a computer, a tablet computer, an artificial intelligence device, a wearable device, or a power bank, etc. The storage device may include memory in a computer, etc., and is not limited thereto.
[0135] While the embodiments disclosed in this application are as described above, the content is merely for the purpose of facilitating understanding of this application and is not intended to limit this application. Any person skilled in the art to which this application pertains may make any modifications and changes in the form and details of the implementation without departing from the spirit and scope disclosed in this application; however, the scope of protection of this application shall still be determined by the scope defined in the appended claims.
Claims
1. A method for manufacturing a semiconductor device, characterized in that, include: A preceding film layer is formed on a substrate, and an opening is formed in the preceding film layer that extends through the preceding film layer in a direction toward the substrate; An etching barrier layer and a dummy layer are sequentially formed within the opening, and a mask layer covering the opening is formed on the substrate surface; The mask layer is etched using a plasma etching process to form an etching window in the mask layer; during the formation of the etching window, the byproducts of plasma etching form a protective layer on the inner wall of the etching window; Remove the dummy layer; In the process of removing the dummy layer, the distance between the protective layers on the two sidewalls of the etching window distributed along a first direction parallel to the substrate is d, and the distance between the two sidewalls of the opening distributed along the first direction is D, where d < D; the first direction is any direction parallel to the substrate. The etching ratio of the dummy layer to the protective layer is not less than 5:
1.
2. The manufacturing method according to claim 1, characterized in that, The removal of the dummy layer includes: A dry etching process is used in the etching window to remove the film layer between the bottom surface of the etching window and the dummy layer, exposing the dummy layer; The dummy layer is partially etched using a dry etching process, leaving a dummy layer of a predetermined thickness in the opening; The dummy layer is removed using a wet etching process.
3. The manufacturing method according to claim 2, characterized in that, The process of removing the film layer between the bottom surface of the etching window and the dummy layer using dry etching is a plasma etching process. The process of using dry etching to incompletely etch the dummy layer is a plasma etching process.
4. The manufacturing method according to claim 3, characterized in that, The plasma etching process for forming the etching window, the plasma etching process for removing the film layer between the bottom surface of the etching window and the dummy layer, and the plasma etching process for incomplete etching of the dummy layer are all performed on the same machine.
5. The manufacturing method according to any one of claims 1 to 4, characterized in that, The mask layer is etched using a plasma etching process to form an etching window in the mask layer; During the formation of the etching window, plasma etching byproducts form a protective layer on the inner wall of the etching window, including: A photoresist is formed on the surface of the mask layer, and a photolithography process is used to pattern the photoresist to form a photolithographic pattern on the surface of the mask layer, the photolithographic pattern exposing the mask layer in the area corresponding to the opening; The mask layer exposed by the photolithography pattern is etched using a dry etching process to form an initial etching window in the mask layer. The bottom surface of the initial etching window exposes the mask layer or the dummy layer. The mask layer or the dummy layer exposed on the bottom surface of the initial etching window is etched using a plasma etching process to form the etching window; during the formation of the etching window, the byproducts of plasma etching form a protective layer on the inner wall of the etching window, and the protective layer on the bottom surface of the etching window is in contact with the dummy layer.
6. The manufacturing method according to claim 5, characterized in that, The process of forming the initial etching window using dry etching is called plasma etching. The plasma etching process for forming the initial etching window, the plasma etching process for forming the etching window, the plasma etching process for removing the film layer between the bottom surface of the etching window and the dummy layer, and the plasma etching process for incomplete etching of the dummy layer are all performed on the same machine.
7. The manufacturing method according to any one of claims 1 to 4, wherein the mask layer is etched using a plasma etching process to form an etching window in the mask layer; During the formation of the etching window, plasma etching byproducts form a protective layer on the inner wall of the etching window, including: A photoresist is formed on the surface of the mask layer, and a photolithography process is used to pattern the photoresist to form a photolithographic pattern on the surface of the mask layer, the photolithographic pattern exposing the mask layer in the area corresponding to the opening; The photolithography pattern is exposed by a plasma etching process to form an etching window in the mask layer. During the formation of the etching window, the byproducts of plasma etching form a protective layer on the inner wall of the etching window, and the protective layer located on the bottom surface of the etching window is in contact with the mask layer.
8. The manufacturing method according to any one of claims 1 to 4, characterized in that, During the formation of the protective layer, the etching gas used in the plasma etching process is a gas containing carbon and fluorine. Furthermore, in the etching gas containing carbon and fluorine, the molar ratio of carbon atoms to fluorine atoms is not less than 0.5:
1.
9. The manufacturing method according to claim 8, characterized in that, The etching gas containing carbon and fluorine is selected from any one or more of CH3F, CH2F2, and C4F6.
10. The manufacturing method according to any one of claims 1 to 4, characterized in that, The thickness of the protective layer is not less than 5 nm.
11. The manufacturing method according to any one of claims 1 to 4, characterized in that, The opening can be any one or both of through holes and grooves; The through-hole extends in the direction toward the substrate; The trench extends in both the direction toward the substrate and the direction parallel to the substrate.
12. A semiconductor device, characterized in that, Obtained by the manufacturing method according to any one of claims 1 to 11.
13. An electronic device, characterized in that, Including the semiconductor device according to claim 12.