Request scheduling method, device, system, storage medium and electronic equipment

Abstract

The application discloses a request scheduling method, device, system, storage medium and electronic equipment, and relates to the chip technical field. The method comprises the following steps: determining a first request, and writing the first request into a first cache; in the case that a second request emitted in alignment with the first request has arrived at a second cache or has been written into the second cache, determining the first request as a first request capable of being emitted; determining a first target request emitted in a target timing period from the first cache; in the case that the first target request is the first request capable of being emitted, sending a first scheduling message to a second scheduler; and emitting the first request capable of being emitted when the target timing period is reached. The requests needing to be emitted in alignment are respectively scheduled in the first cache and the second cache, so that each cache can be configured according to the bit width requirement of a single request, the waste of cache bit width resources is reduced, and the optimization of chip area simplification and operation performance is facilitated.

Description

Technical Field

[0001] This application relates to the field of chip technology, and in particular to a request scheduling method, apparatus, system, storage medium, and electronic device. Background Technology

[0002] In the current chip technology field, request scheduling schemes typically employ a single shared cache to support the scheduling (collection, storage, and emission) of various request types. To adapt to the bit width requirements of different request types, the shared cache needs to be configured according to the maximum bit width requirements of each request type to ensure compatibility with the scheduling of various request types.

[0003] When multiple requests require aligned launch, existing scheduling schemes must write all requests to the same storage unit to meet the timing requirements of synchronous launch. To adapt to aligned launch scenarios for multiple requests, the storage unit of the shared cache needs to be configured according to the total bit width of the multiple requests. This causes a large amount of cache bit width to be idle when scheduling other types of requests, especially those that do not require aligned launch, resulting in a serious waste of bit width resources and hindering chip area reduction and performance optimization. Summary of the Invention

[0004] In view of this, this application provides a request scheduling method, apparatus, system, storage medium, and electronic device. By scheduling requests that need to be aligned for emission in a first cache and a second cache respectively, each cache can be configured according to the bit width requirement of a single request, thereby reducing the waste of cache bit width resources and facilitating chip area reduction and performance optimization.

[0005] In a first aspect, this application provides a request scheduling method applied to a first scheduler, comprising: Identify the first request and write it to the first cache.

[0006] If a second request, which is aligned with the first request, has arrived at or been written to the second cache, the first request is determined to be a first request that can be issued.

[0007] The first target request to be emitted in the target timing period is determined from the first cache.

[0008] If the first target request is the first request that can be launched, a first scheduling message is sent to the second scheduler; wherein the first scheduling message is used to identify that the second request is launched in the target timing period.

[0009] Upon reaching the target timing period, the first transmittable request is emitted.

[0010] Secondly, this application provides a request scheduling method applied to a second scheduler, comprising: A first scheduling message is received from a first scheduler; wherein the first scheduling message is used to identify that the second request is to be launched in the target timing period; the first scheduling message is sent by the first scheduler when the first target request is a launchable first request, the first target request is a request to be launched in the target timing period determined by the first scheduler from a first cache, the launchable first request is determined by the first scheduler when the second request launched in alignment with the first request has arrived in a second cache or has been written to the second cache, and the first request is determined by the first scheduler and written to the first cache.

[0011] When the target timing period is reached, the second request is transmitted.

[0012] Thirdly, this application provides a request scheduling apparatus applied to a first scheduler, comprising: a first determining module configured to determine a first request and write the first request into a first cache.

[0013] The second determining module is configured to determine the first request as a first request that can be emitted if a second request that is aligned with the first request has arrived in or been written to the second cache.

[0014] The third determining module is configured to determine, from the first cache, a first target request to be transmitted in the target timing period.

[0015] The sending module is configured to send a first scheduling message to the second scheduler when the first target request is the first request that can be sent; wherein the first scheduling message is used to identify that the second request is sent during the target timing period.

[0016] The transmission module is configured to transmit the first transmittable request when the target timing period is reached.

[0017] Fourthly, this application provides a request scheduling device for a second scheduler, comprising: a receiving module and a transmitting module.

[0018] The receiving module is configured to receive a first scheduling message; wherein the first scheduling message is used to identify that the second request is to be transmitted in the target timing period; the first scheduling message is sent by the first scheduler when the first target request is the first request that can be transmitted, the first target request is a request that the first scheduler determines from the first cache to be transmitted in the target timing period, the first request that can be transmitted is determined by the first scheduler when the second request that is aligned with the first request has arrived in the second cache or has been written to the second cache, and the first request is determined by the first scheduler and written to the first cache.

[0019] The transmission module is configured to transmit the second request when the target timing period is reached.

[0020] Fifthly, this application provides a request scheduling system, including a first scheduler and a second scheduler; The first scheduler executes the method described in the first aspect above.

[0021] The second scheduler executes the method described in the second aspect above.

[0022] In a sixth aspect, this application provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the method of the first or second aspect.

[0023] In a seventh aspect, this application provides an electronic device, including a storage medium, a processor, and a computer program stored on the storage medium and executable on the processor, wherein the processor executes the computer program to implement the method of the first aspect or the second aspect.

[0024] In view of the above embodiments, this application provides a method, apparatus, system, storage medium, and electronic device for scheduling requests. When a first scheduler determines a first target request to be emitted in a target timing period from a first buffer, if the first target request is an emitterable first request, it sends a first scheduling message to a second scheduler indicating that the emitterable first request is ready. Since the first scheduling message is sent by the first scheduler to the second scheduler when a second request to be emitted in alignment with the first request has arrived in or been written to the second buffer, the second scheduler can emit the second request when the target timing period arrives, based on the first scheduling message. The first scheduler emits the emitterable first request when the target timing period arrives. Thus, aligned emission of the first and second requests is achieved.

[0025] Compared with existing technologies, this application achieves synchronous aligned issuance of two requests by scheduling the first request and the second request that need to be aligned for issuance in the first cache and the second cache, respectively. Since the two requests that need to be aligned for issuance are stored in the first cache and the second cache, respectively, the first cache and the second cache can be configured according to the bit width of a single request. This effectively avoids the waste of bit width resources caused by existing scheduling schemes when scheduling multiple types of requests based on shared caches, which is beneficial to chip area reduction and performance optimization.

[0026] It should be noted that the above content is only a general overview of the technical solution of this application. In order to enable those skilled in the art to clearly understand the core technical means of this application and to accurately implement this solution based on the content disclosed in the specification, the technical details of this application will be described in detail below in conjunction with specific embodiments. Attached Figure Description

[0027] The accompanying drawings, which are incorporated in and form a part of this specification, illustrate embodiments consistent with this application and, together with the specification, serve to explain the principles of this application.

[0028] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, for those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0029] Figure 1 A schematic diagram of a method provided in an embodiment of this application is shown; Figure 2 A schematic diagram of a chip cache structure provided in an embodiment of this application is shown; Figure 3 A schematic diagram of a method provided in an embodiment of this application is shown; Figure 4 A schematic diagram of a method provided in an embodiment of this application is shown; Figure 5 This illustration shows a schematic diagram of a storage cell structure provided in an embodiment of this application; Figure 6 The illustration shows an execution diagram of a request arbitration strategy provided in an embodiment of this application; Figure 7 The illustration shows an execution diagram of a request arbitration strategy provided in an embodiment of this application; Figure 8 A schematic diagram of a method provided in an embodiment of this application is shown; Figure 9 This illustration shows a schematic diagram of an implementation process provided in an embodiment of this application; Figure 10 This illustration shows a timing flow diagram provided in an embodiment of this application; Figure 11 This illustration shows a schematic diagram of the structure of a request scheduling device provided in an embodiment of this application; Figure 12 This illustration shows a schematic diagram of the structure of a request scheduling device provided in an embodiment of this application; Figure 13 A schematic diagram of the structure of a request scheduling system provided in an embodiment of this application is shown. Detailed Implementation

[0030] The embodiments of this application will now be described in more detail with reference to the accompanying drawings. It should be noted that, unless otherwise specified, the embodiments and features described herein can be combined with each other.

[0031] like Figure 1 The diagram illustrates a method flowchart, illustrating the execution process of a request scheduling method provided in this application. This request scheduling method is applied to a first scheduler. The first scheduler is a control module located within a first cache on the chip. Its specific implementation can be a hardware scheduling unit, a dedicated arbitration circuit, an on-chip controller, or a processor execution unit, used to perform request write control, cache scheduling, arbitration selection, and scheduling message interaction with a second scheduler.

[0032] For example, the first scheduler can communicate with the second scheduler via on-chip control signal lines, handshake interaction signals, or dedicated interconnect channels. When it is necessary to align the issuance of the first request and the second request, the first scheduler sends a first scheduling message to the second scheduler to notify the second scheduler to issue the second request in the same timing period. Simultaneously, the first scheduler issues the first request in the same timing period, thereby achieving aligned issuance of the first and second requests. The second request issued in the same timing period as the first request may include one or more, and when there are multiple second requests, each second request is located in a corresponding second buffer. Figure 2 The diagram illustrates a chip cache structure, which includes a first cache and a second cache. The first cache stores a first request, and the second cache stores a second request. A first scheduler sends a first scheduling message to a second scheduler to align the issuance of the first and second requests.

[0033] The first scheduler stores the control logic corresponding to the scheduling method for the request provided in this application, and is used to execute the following steps S101 to S105: S101. The first scheduler determines the first request and writes the first request into the first cache.

[0034] Among them, the first request is a coupled request that needs to be launched in alignment with the second request among various requests scheduled by the first scheduler. These include, but are not limited to, data access requests, bus transaction requests, and module interaction requests in multiplexed links.

[0035] In one implementation, the first scheduler determines that a request is a first request based on the identification information of a request that has arrived in the first buffer. The first scheduler then writes the first request into the first buffer. The identification information is at least one of a request identifier, a request type, a pairing flag, or synchronization attribute information. For example, the first scheduler determines that a request is a first request when it carries a specific synchronization flag (e.g., a high level), or when the request header contains a preset pairing flag field, or when the request type is a specified "synchronized transmission required" type. Subsequently, the first scheduler writes the first request into the first buffer via the write control path of the first buffer, provided the write enable signal is valid.

[0036] S102, if the first scheduler determines the first request as a first request that can be launched if the second request that is aligned with the first request has arrived in the second cache or has been written to the second cache.

[0037] In one implementation, if there are multiple second requests, the first scheduler determines the first request as a first request that can be launched when all the second requests have arrived or been written to their corresponding second buffers. For example, the first scheduler determines the number of second requests to be launched in alignment with the first request by parsing the alignment quantity information, pairing identifier information, or synchronization path mask information carried in the first request.

[0038] The second request has reached the second cache, for example, it means that the second request has reached the input port (entry point) of the second cache and is in the stage of waiting to be written or writing to the second cache.

[0039] The second request has been written to the second cache, for example, by the second request having been written through the write control logic and stored in the internal register (reg) or storage unit (buf) of the second cache.

[0040] The first reproducible request refers to the first scheduler marking the first request as reproducible when the second request, which is aligned with the first request, has arrived at or been written to the second cache.

[0041] In one implementation, when the first scheduler determines that the second request has arrived or been written to the second cache, it marks the first request as a reproducible request. Specifically, the first scheduler determines whether the second request has arrived at or been written to the second cache by querying the cache information of the second cache or by receiving a status notification of the second request (such as a second scheduling message sent by the second scheduler).

[0042] S103, The first scheduler determines the first target request to be transmitted in the target timing period from the first buffer.

[0043] The target timing period refers to one clock cycle in the system clock. That is, a complete clock cycle triggered by a single rising or falling edge of the clock within the chip's unified clock domain. Within this clock cycle, the first scheduler and the second scheduler synchronously complete the request transmit control to achieve aligned transmit of the first request and the second request.

[0044] In one implementation, the first scheduler performs the operation of determining a first target request to be transmitted in the target timing period from the first buffer in each timing period (i.e., in each clock tick).

[0045] S104. If the first target request is a first request that can be launched, the first scheduler sends a first scheduling message to the second scheduler.

[0046] The first scheduling message is used to identify the transmission of the second request during the target timing period.

[0047] In one implementation, a first scheduler notifies a second scheduler to launch a second request aligned with a first launchable request within a target timing period by sending a first scheduling message. The second scheduler then determines the second request from a second buffer using the first scheduling message and launches the second request when the target timing period arrives.

[0048] For example, if the target timing period is pre-agreed, such as the next timing period after the timing period in which the first scheduling message is received, then the first scheduling message may only contain the identification information of the first request that can be emitted. After receiving the first scheduling message, the second scheduler matches the second request in the second buffer using the identification information of the first request that can be emitted, and emits the second request when the target timing period arrives. The identification information of the first request that can be emitted and the identification information of the second request have a pre-defined pairing relationship, and the second scheduler determines the second request through this pre-defined pairing relationship.

[0049] In another example, if the target timing period is not predetermined, or the interval between it and the timing period for sending the first scheduling message is not fixed, the first scheduling message may simultaneously include the identification information of the target timing period and the identification information of the first request that can be transmitted. This allows the second scheduler to determine the corresponding second request based on the identification information of the target timing period and the identification information of the first request after receiving the first scheduling message, and to transmit the second request when the target timing period is reached.

[0050] S105. When the target timing period is reached, the first scheduler sends out the first request that can be sent.

[0051] In one implementation, the first scheduler reads the first transmittable request from the first buffer through read control logic and drives the first transmittable request to the corresponding output port to complete the request transmission.

[0052] like Figure 3 The flowchart shown illustrates the execution process of a request scheduling method provided in this application. This request scheduling method is applied to a second scheduler. The second scheduler is a control module located within a second cache on the chip, and its specific implementation is similar to that of the first scheduler, which will not be described in detail here.

[0053] The second scheduler stores the control logic corresponding to the scheduling method for the request provided in this application, and is used to execute the following steps S201~S202: S201, The second scheduler receives the first scheduling message sent by the first scheduler.

[0054] The first scheduling message identifies the launch of the second request within the target timing period. This first scheduling message is sent by the first scheduler when the first target request is a launchable first request. The first target request is a request determined by the first scheduler from the first cache to be launched within the target timing period. The launchable first request is determined by the first scheduler when the second request, which is aligned with the first request, has arrived in the second cache or has been written to the second cache. The first request is determined and written to the first cache by the first scheduler.

[0055] Optionally, the above-mentioned content regarding the first scheduling message, the first request, the first proclamation request, and the first target request has been described in detail in S101~S105, and will not be repeated here.

[0056] In one implementation, the second scheduler receives the first scheduling message via an on-chip control signal line, handshake interaction signal, or dedicated interconnection channel with the first scheduler.

[0057] S202. When the target timing period is reached, the second scheduler sends a second request.

[0058] In one implementation, the second scheduler reads the second request from the second buffer through read control logic and drives the second request to the corresponding output port to complete the transmission.

[0059] The request scheduling method provided in the embodiments of this application will now be described in detail with a first scheduler as the execution subject.

[0060] In some embodiments, the first scheduler determines a third request and writes the third request into a first cache. After determining a first target request to be emitted in a target timing period from the first cache, if the first target request is a third request, the first scheduler emits the third request when the target timing period arrives.

[0061] The third request is a request among the various requests scheduled by the first scheduler that does not require aligned launch. The third request is marked as launchable by default.

[0062] In one implementation, the first scheduler determines that the request is a third request based on the identification information of the request that has arrived in the first cache. The first scheduler then writes the third request into the first cache. For example, the first scheduler determines that the request is a third request when it does not carry a specific synchronization flag, does not contain a pairing identifier field, or is of an asynchronous type. Subsequently, the first scheduler writes the third request into the first cache through the write control path of the first cache, provided that the write enable signal is valid.

[0063] In one implementation, after determining a first target request to be transmitted in a target timing period from a first buffer, if the first target request is a third request, the first scheduler transmits the third request when the target timing period arrives. For example, the first scheduler determines that a third request should be transmitted in the target timing period, and upon arrival of the target timing period, reads the third request from the first buffer through read control logic and drives the third request to the corresponding output port to complete the transmission.

[0064] In the above embodiments, when a request arrives at the first cache, this application performs type identification to distinguish between the third request and the first request. Subsequently, for the first request, the scheduling process as described in S101~S105 is executed. For the third request, if it is determined that it will be emitted during the target timing period, it is emitted directly. In this way, the first cache enables the scheduling of both synchronization requests and third requests, improving scheduling efficiency and compatibility.

[0065] In some embodiments, in the step of determining the first target request to be transmitted in the target timing period from the first cache, the first scheduler determines the first target request from the current storage unit of the first cache or from the storage unit whose unit state is the first state based on a preset request arbitration policy.

[0066] The preset request arbitration strategy is a scheduling rule used to select the first target request to be emitted in the target time period from the first cache.

[0067] The current storage unit is the storage unit selected by the first scheduler. For example, the first scheduler selects a storage unit as the current storage unit in each time period based on a preset request arbitration strategy, and attempts to determine the first target request from it.

[0068] The storage unit whose unit state is in the first state is the storage unit in the first cache that stores an emissible request (either an emissible first request or a third request). For example, when the first scheduler writes an emissible first request or a third request into the storage unit, or when the first scheduler determines that a first request already written into the storage unit is an emissible first request, the unit state of the storage unit is set to the first state.

[0069] For example, the preset request arbitration strategy may be a combined arbitration strategy including a read pointer round-robin strategy and a leading one strategy. The read pointer round-robin strategy is used to determine the first target request from the current memory cell. The leading one strategy is used to determine the first target request from memory cells whose cell state is in the first state.

[0070] In one implementation, the first scheduler first attempts to determine the first target request from the current memory cell based on a polling pointer strategy. If the attempt to determine the first target request from the current memory cell fails, a leading 1 strategy is executed to determine the first target request from the memory cell whose cell state is in the first state.

[0071] The above embodiments use a preset request arbitration strategy to first attempt to determine the first target request from the current storage unit. If the determination fails, the first target request is selected from the storage unit that stores the proclamable request, thereby achieving efficient and stable request selection.

[0072] In some embodiments, such as Figure 4 The flowchart shown illustrates that when the first scheduler determines the first target request from the current storage unit of the first cache or from the storage unit with the unit state of the first state based on a preset request arbitration strategy, the process includes the following steps S301 to S303: S301. The first scheduler determines the storage unit corresponding to the index as the current storage unit based on the index indicated by the polling pointer.

[0073] The polling pointer is used to indicate the index of the current storage unit. For example, the polling pointer points to different storage units in the first cache in a preset order, and is updated step by step after each determination of the first target request, so as to achieve sequential polling of each storage unit.

[0074] In one implementation, the first scheduler selects a corresponding storage unit from the first cache as the current storage unit based on the current value of the polling pointer.

[0075] S302. When the current storage unit's cell state is in the first state, the first scheduler determines the request stored in the current storage unit as the first target request.

[0076] In one implementation, the first scheduler detects the cell status of the current storage cell. When it confirms that the cell status of the storage cell is a first state, it selects the request in the current storage cell as the first target request to be transmitted in the target timing period. For example, the first scheduler determines the cell status by reading the status identifier of the current storage cell. For instance, if the status identifier is 1, it determines that the storage cell is in the first state, and then determines the request corresponding to the storage cell as the first target request.

[0077] S303. When the current storage unit's cell state is in the second state, the first scheduler determines the request to store the storage unit with the cell state in the first state and the smallest index as the first target request.

[0078] The second state of the unit indicates that the request stored in the storage unit cannot be transmitted during the target timing period. The second state of the unit includes, but is not limited to, the storage unit not storing a request, the storage unit being in an invalid or disabled state, or the stored request being the first request.

[0079] In one implementation, when the first scheduler determines that the current storage unit's state is a second state, it selects the storage unit with the first state and the smallest index, and identifies the request stored in that storage unit as the first target request. For example, the first scheduler uses a leading-1 strategy to identify the storage unit with the smallest index among all storage units in the first state, and determines the first target request from it.

[0080] like Figure 5The diagram illustrates a first cache storage unit structure. The first cache includes multiple storage units (e.g., buf_0~buf_7). buf_0, buf_3, and buf_7 store emitable requests (either first or third emitable requests). The unit states of buf_0, buf_3, and buf_7 are in the first state (state identifier 1). buf_1, buf_2, buf_4, buf_5, and buf_6 store non-emitable requests (first requests), or no requests are stored, or they are in an invalid / disabled state. The unit states of buf_1, buf_2, buf_4, buf_5, and buf_6 are in the second state (state identifier 0).

[0081] like Figure 6 The diagram illustrates the execution of a request arbitration strategy. The first scheduler executes a polling pointer strategy, determining that the polling pointer points to buf_2 by reading the current value of the polling pointer. Since the cell state of buf_2 is the second state, the first scheduler fails to obtain the first target request from buf_2. Then, it executes a leading 1 strategy, selecting buf_0 with the smallest index from buf_0, buf_3, and buf_7, and determining that the request in buf_0 is the first target request.

[0082] like Figure 7 The diagram illustrates the execution of a request arbitration strategy. The first scheduler executes a polling pointer strategy, determining that the polling pointer points to buf_3 by reading the current value of the polling pointer. Since the cell state of buf_3 is the first state, the first scheduler determines the request in buf_3 as the first target request.

[0083] In the above embodiments, the polling pointer strategy and the leading 1 strategy can achieve efficient scheduling of requests, avoiding the problem of increasing scheduling latency and complex logical operations caused by traversing all memory units one by one, making the overall scheduling logic performance friendly and the circuit implementation simple.

[0084] In one implementation, the first scheduler updates the polling pointer after determining the first target request to be transmitted in the target timing period from the first buffer.

[0085] For example, the polling pointer is updated by incrementing the current pointer value by one.

[0086] The first scheduler determines the first target request by polling the pointer, or by incrementing the current value of the polling pointer after determining the first target request by using a leading 1 strategy.

[0087] In some embodiments, when the first request has arrived at the first cache, the first scheduler obtains the cache information of the second cache, and if it is determined through the cache information of the second cache that the second request has arrived at the second cache or has been written to the second cache, the first request is determined to be a first request that can be launched.

[0088] The cache information of the second cache represents the relevant status information of the request access status in the second cache. For example, the cache information of the second cache includes the entry status of the second cache, the cell status of the register unit of the second cache, and the cell status of the storage unit of the second cache.

[0089] In one implementation, when the first request has arrived at the first cache, the first scheduler determines whether the second request has arrived at or been written to the second cache based on the cache information of the second cache. For example, the first scheduler reads corresponding status information from the entry point of the second cache, the register unit of the second cache, and the storage unit of the second cache to determine whether the second request has arrived at or been written to the second cache. If any one of the entry point status of the second cache, the unit status of the register unit, or the status information corresponding to the storage unit indicates that the second request has arrived at or been written to the second cache, then the first request is determined to be a first request that can be issued.

[0090] In the above embodiment, when the first request has arrived at the first cache, the first scheduler initiates a query for the arrival and write status of the second request. If the query finds that the second request has arrived or has been written to the second cache, the first request is marked as ready to be issued. If the query does not find that the second request has arrived or has been written to the second cache, the first request is not marked as ready to be issued for the time being. In this way, the accuracy of request selection and issuance can be guaranteed.

[0091] In some embodiments, the first scheduler determines the first request as a first request that can be launched if the first request has been written to the first cache and a second scheduling message has been received.

[0092] The second scheduling message is used to identify that the second request has arrived at the second cache. For example, the second scheduling message includes identification information of the second request.

[0093] In one implementation, after receiving the second scheduling message, the first scheduler matches the corresponding status information read from the entry point, register unit, and storage unit of the first cache according to the identification information carried therein. If the match fails, it means that the corresponding first request has not yet arrived or has not been written to the first cache, and the second scheduling message is ignored. If the match succeeds, the corresponding first request is determined to be a first request that can be launched.

[0094] In the above embodiment, when the first scheduler receives the second scheduling message, it matches the arrival and write status of the first request. If a match is found, the first request is marked as ready to be issued. If no match is found, the second scheduling message is ignored. This ensures synchronous scheduling of requests, improving scheduling reliability and execution efficiency.

[0095] In some embodiments, when the first request has been written to the register of the first cache and a second scheduling message is received, the first scheduler determines the first request as a first request that can be launched in the register.

[0096] In some implementations, when the first scheduler receives the second scheduling message, if the first request has been written to the register unit of the first cache, it updates the unit state of the register unit and marks the first request as a reproducible state, so as to determine the first request as a reproducible first request in the register unit.

[0097] If the first request has been written to the storage unit of the first cache and the second scheduling message is received, the first scheduler determines the first request as a first request that can be launched in the storage unit.

[0098] In some implementations, when the first scheduler receives the second scheduling message, if the first request has been written to the storage unit of the first cache, it updates the unit state of the storage unit and marks the first request as reproducible, so as to determine the first request as a reproducible first request in the storage unit.

[0099] In the above embodiments, the first scheduler refines the transmittable status of the first request in different storage locations by updating the status flags for the register unit and the storage unit respectively, so as to provide a reliable basis for the selection and transmission of subsequent requests in a timely manner.

[0100] In some embodiments, the first scheduler determines, in any time period, a first target request to be transmitted in a target time period from a first buffer.

[0101] The target time period is the next time period of any given time period.

[0102] In one implementation, the first scheduler performs selection of a first target request in any timing period to determine the first target request to be transmitted in the next timing period.

[0103] In the above embodiments, the pipeline scheduling method of selecting the current timing period and transmitting in the next timing period enables continuous and stable transmission of requests, thereby improving the overall scheduling efficiency and timing regularity.

[0104] The following is a detailed description of the request scheduling method provided in the embodiments of this application, with the second scheduler as the execution subject.

[0105] In some embodiments, the second scheduler determines a second target request to be transmitted in the target timing period from a second buffer. After receiving a first scheduling message from the first scheduler, the second scheduler updates the second target request to a second request.

[0106] The second scheduler and the first scheduler operate under a unified clock domain on the chip, performing request selection and transmission scheduling to achieve precise alignment and transmission of the first target request and the second target request within the target timing period.

[0107] In one implementation, the second scheduler performs the operation of determining a second target request to be emitted in the target timing period from the second buffer at each timing cycle (i.e., at each clock tick). The second target request includes a third request already written to the second buffer, which is assumed to be emitting.

[0108] It should be noted that the second request is a coupled request that needs to be launched in alignment with the first request, and its launch timing is controlled by the first scheduling message of the first scheduler. The second scheduler does not mark the second request as launchable. Therefore, in the case of multiple types of requests, including the second request that needs to be launched in alignment and the third request that does not need to be launched in alignment, when the second scheduler performs the operation of determining the second target request to be launched in the target time period from the second cache, it determines the second target request to be launched in the target time period from the third requests already written to the second cache.

[0109] In one implementation, after receiving the first scheduling message, the second scheduler updates the second target request to the second request. For example, the second scheduler determines the second request to be launched in the second buffer based on the identification information of the first launchable request carried in the first scheduling message, and updates the previously determined second target request to the second request, so that the second request can be launched when the target timing period arrives.

[0110] In the above embodiments, when the second scheduler receives the first scheduling message, it updates the second target request determined in the second cache to a second request, so as to achieve the aligned launch of the first request and the second request.

[0111] In some embodiments, when the second scheduler determines a second target request to be transmitted in a target timing period from the second cache, it determines the second target request from the current storage unit of the second cache or from the storage unit whose unit state is a first state based on a preset request arbitration strategy.

[0112] The preset request arbitration strategy is a scheduling rule used to select a second target request emitted in the target timing period from the second cache.

[0113] The current storage unit is the storage unit selected by the second scheduler. For example, the second scheduler selects a storage unit as the current storage unit in each time period based on a preset request arbitration strategy, and attempts to determine the second target request from it.

[0114] For example, the preset request arbitration strategy may be a combined arbitration strategy including a read pointer round-robin strategy and a leading one strategy. The read pointer round-robin strategy is used to determine the second target request from the current memory cell. The leading one strategy is used to determine the second target request from the memory cells whose cell state is in the first state.

[0115] In one implementation, the second scheduler first attempts to determine the second target request from the current memory cell based on a polling pointer strategy. If the attempt to determine the second target request from the current memory cell fails, a leading 1 strategy is executed to determine the second target request from the memory cell whose cell state is in the first state.

[0116] The above embodiments use a preset request arbitration strategy to first attempt to determine the second target request from the current storage unit. If the determination fails, the second target request is selected from the storage unit that stores the proclamable request, thereby achieving efficient and stable request selection.

[0117] In some embodiments, such as Figure 8 The flowchart shown illustrates that when the second scheduler determines the second target request from the current storage unit of the second cache or from the storage unit with the unit state in the first state based on a preset request arbitration strategy, the process includes the following steps S401 to S403: S401, The second scheduler determines the storage unit corresponding to the index as the current storage unit based on the index indicated by the polling pointer.

[0118] The polling pointer is used to indicate the index of the current storage unit. For example, the polling pointer points to different storage units in the second cache in a preset order, and is updated step by step after each determination of the second target request, so as to achieve sequential polling of each storage unit.

[0119] In one implementation, the second scheduler locates and selects a corresponding storage unit from the second cache as the current storage unit based on the current value of the polling pointer.

[0120] S402, when the current storage unit's cell state is in the first state, the second scheduler determines the request stored in the current storage unit as the second target request.

[0121] In one implementation, the second scheduler detects the cell status of the current storage cell. When it confirms that the cell status of the storage cell is a first state, it selects the request in the current storage cell as the second target request to be transmitted in the target timing period. For example, the second scheduler determines the cell status by reading the status identifier of the current storage cell. For instance, if the status identifier is 1, it determines that the storage cell is in the first state, and then determines the request corresponding to the storage cell as the second target request.

[0122] S403. When the current storage unit's cell state is in the second state, the second scheduler determines the request to store the storage unit with the cell state in the first state and the smallest index as the second target request.

[0123] The cell status being in the second state indicates that the request stored in the storage cell cannot be transmitted during the target timing period. The cell status being in the second state includes, but is not limited to, the storage cell not storing a request, the storage cell being in an invalid or disabled state, or the stored request being a second request.

[0124] In one implementation, when the second scheduler determines that the current storage unit is in the second state, it selects the storage unit with the first state and the smallest index, and identifies the request stored in that storage unit as the second target request. For example, the second scheduler uses a leading-1 strategy to identify the storage unit with the smallest index among all storage units in the first state, and determines the second target request from it.

[0125] In the above embodiments, the polling pointer strategy and the leading 1 strategy can achieve efficient scheduling of requests, avoiding the problem of increasing scheduling latency and complex logical operations caused by traversing all memory units one by one, making the overall scheduling logic performance friendly and the circuit implementation simple.

[0126] In one implementation, the second scheduler updates the polling pointer after determining a second target request to be emitted in the target timing period from the second buffer.

[0127] For example, the polling pointer is updated by incrementing the current pointer value by one.

[0128] In one implementation, the second scheduler determines the second target request using a polling pointer strategy, or determines the second target request using a leading 1 strategy and then increments the current value of the polling pointer by one.

[0129] In the above embodiments, by updating the polling pointer, it can be ensured that each storage unit is polled evenly, avoiding long-term biased access and improving scheduling fairness and cache usage balance.

[0130] In one implementation, the request stored in the storage unit in the first state includes: a third request.

[0131] In the above embodiments, this application takes into account both the local autonomous scheduling of the third request and the controlled scheduling of the second request. The controlled scheduling logic of the second request is simple. After receiving the first scheduling message, the second scheduler can update the second target request to the second request. This can simplify the hardware control logic and improve the versatility of the cache and the resource reuse rate.

[0132] In some embodiments, the second scheduler determines, in any timing period, a second target request to be transmitted in the target timing period from the second buffer.

[0133] Wherein, the target timing period is the next timing period of any given timing period.

[0134] In one implementation, the second scheduler performs selection of a second target request in any timing period to determine the second target request to be transmitted in the next timing period.

[0135] In the above embodiments, the pipeline scheduling method of selecting the current timing period and transmitting in the next timing period enables continuous and stable transmission of requests, thereby improving the overall scheduling efficiency and timing regularity.

[0136] In some embodiments, if the second scheduler receives the first scheduling message in any time period, it will send a second request when the target time period arrives. If it does not receive the first scheduling message, it will send a second target request when the target time period arrives.

[0137] In one implementation, if the second scheduler receives the first scheduling message in any time period, it updates the second target request to the second request and sends the second request when the target time period arrives.

[0138] If the first scheduling message is not received, a second target request is sent when the target timing period is reached.

[0139] In the above embodiments, the second scheduler, through scheduling logic that prioritizes scheduling messages, simultaneously supports the aligned issuance of the second request and the autonomous issuance of the third request. This ensures the accuracy of cross-schedule collaborative timing while simplifying the complexity of control logic and hardware implementation.

[0140] In some embodiments, the second scheduler sends a second scheduling message to the first scheduler if the second request has arrived at the second cache.

[0141] The second scheduling message is used to identify that the second request has arrived at the second cache.

[0142] In one implementation, the second scheduler determines that the request is a second request based on the identification information of the request that has arrived in the second buffer. The second scheduler then writes the second request into the second buffer. For example, the second scheduler determines that the request is a second request when it carries a specific synchronization flag (e.g., a high level), or when the request header contains a preset pairing identifier field, or when the request type is a specified "synchronized transmission required" type. Subsequently, the second scheduler writes the first request into the first buffer via the write control path of the second buffer, provided the write enable signal is valid. Furthermore, the second scheduler sends a second scheduling message to the first scheduler via the on-chip synchronization interaction channel with the first scheduler.

[0143] Below, with reference to the above embodiments, we will introduce implementation examples of the request scheduling method described in this application.

[0144] like Figure 9 The diagram illustrates one implementation process. Requests generated by the request generation module are processed by various processing logics on data channel 1 and data channel 2, and then written to the first and second caches. Specifically, the first request (e.g., req0_0) and the second request (e.g., req0_1) that need to be transmitted in alignment are transmitted on data channel 1 and data channel 2 respectively. The third requests (e.g., req1, req2, req_3) can be transmitted on the same data channel or separately on data channel 1 and data channel 2.

[0145] Data channels 1 and 2 comprise multiple processing logics, each preceded and followed by corresponding pipeline registers to form a multi-stage pipelined structure, ensuring stable request transmission across logical stages. Each processing logic performs corresponding processing on the received requests, including but not limited to protocol conversion, address translation, permission verification, and error detection and correction. In some processing logics (such as processing logic 1), requests are executed sequentially, while in others (such as processing logic 2), requests are executed out of order. When a request enters a processing logic preceding out-of-order execution (such as processing logic 1), its index in the corresponding cache needs to be allocated to ensure it can be written to the storage unit.

[0146] When a request arrives at the first cache, the first scheduler determines the request type. That is, it determines whether the request is a first request that requires aligned firing or a third request that does not require aligned firing.

[0147] For the third request, the first scheduler, after registering it in its internal register, writes it into the corresponding memory unit according to its index.

[0148] For the first request, when the first request has arrived in the first cache, the first scheduler queries whether the second request has arrived in the second cache or has been written to the second cache. If the second request has arrived in the second cache or has been written to the second cache, the first scheduler marks the first request as ready to be issued, that is, determines the first request as a ready-to-issue request. Subsequently, after the first scheduler registers the request in its internal registers, it writes it to the corresponding memory unit according to its index.

[0149] The second scheduler determines the request type when a request arrives at the second cache.

[0150] For the third request, the second scheduler, after registering it in the register, writes it into the corresponding memory unit according to its index.

[0151] For the second request, when the second request has arrived in the second cache, the second scheduler sends a second scheduling message to the first scheduler to notify the first scheduler that the second request has arrived in the second cache. Furthermore, after the second request is stored in its internal registers, the second scheduler writes it to the corresponding memory location according to its index.

[0152] When the first scheduler receives the second scheduling message, if it determines that the first request has been written into the internal register, it will mark the first request as a first request that can be issued in the internal register.

[0153] If it is determined that the first request has been written to the storage unit, then the first request is identified as an erroneous first request in the storage unit.

[0154] If the first request cannot be determined, the second scheduling message is ignored.

[0155] In any given time period, the first scheduler selects a first target request from the first cache to be launched in the target time period based on a preset request arbitration strategy. If the first target request is a launchable first request, it sends a first scheduling message to the second scheduler to notify the second scheduler to launch a second request in the target time period. When the target time period arrives, the first scheduler launches the launchable first request.

[0156] If the first target request is the third request, the first scheduler will send the third request when the target timing period is reached.

[0157] In any given time period, the second scheduler also selects a second target request from the second buffer based on a preset request arbitration strategy, so that the second request can be launched in the target time period. If the second scheduler receives the first scheduling message in any time period, it updates the second target request to the second request, so that the second request can be launched when the target time period arrives.

[0158] If the second scheduler does not receive the first scheduling message in any time period, it will send a second target request when the target time period arrives.

[0159] like Figure 10 The diagram illustrates a timing sequence flow, demonstrating the scheduling timing flow of the first request. Wherein: During timing period n, the input write valid signal (i_wr_valid) goes high, and the first request enters the first buffer entry along with the input write data signal (i_wr_data).

[0160] During timing period n+1, the cache write valid signal (c_wr_valid) and the cache write data signal (c_wr_data) are generated. The first request is in the stage of waiting to be written to the storage unit. At the same time, the first scheduler detects that the second request has been written to the second cache and determines the first request as the first request that can be issued.

[0161] During timing period n+2, the storage unit valid signal (r_wr_valid[i]) and storage unit data signal (r_wr_data[i]) are generated. The first scheduler writes the first request to the storage unit of the first cache through the write control logic.

[0162] During the timing period n+x (x≥3), the first scheduler executes the preset request arbitration strategy to select the first target request to be transmitted in the next timing period. If the first target request is the first request, a first scheduling message is sent to the second scheduler.

[0163] During the timing period n+(x+1), the output valid signal (o_valid) is pulled high, and the first scheduler outputs the first request from the first buffer through the output data signal (o_rdata), thus completing the request transmission.

[0164] Meanwhile, the second scheduler outputs the second request from the second buffer, achieving aligned launch.

[0165] Furthermore, this embodiment provides a request scheduling device, applied to a first scheduler, such as... Figure 11 As shown, the device 1100 includes a first determining module 1110, a second determining module 1120, a third determining module 1130, a transmitting module 1140, and a transmitting module 1150; wherein: The first determining module 1110 is configured to determine the first request and write the first request into the first cache.

[0166] The second determining module 1120 is configured to determine the first request as a first request that can be emitted if the second request that is aligned with the first request for emission has arrived at or been written to the second cache.

[0167] The third determining module 1130 is configured to determine, from the first cache, a first target request to be transmitted in the target timing period.

[0168] The sending module 1140 is configured to send a first scheduling message to the second scheduler when the first target request is the first request that can be launched; wherein the first scheduling message is used to identify that the second request is launched in the target timing period.

[0169] The transmission module 1150 is configured to transmit the first transmittable request when the target timing period is reached.

[0170] In one embodiment, the first determining module 1110 is further configured to determine a third request and write the third request into the first cache.

[0171] The sending module 1140 is further configured to send the third request when the target timing period is reached, provided that the first target request is the third request.

[0172] In one embodiment, the third determining module 1130 is configured to determine the first target request from the current storage unit of the first cache or from the storage unit with the unit state in the first state based on a preset request arbitration strategy.

[0173] In one embodiment, the third determining module 1130 is configured to determine the storage unit corresponding to the index as the current storage unit based on the index indicated by the polling pointer.

[0174] When the current storage unit is in the first state, the request stored in the current storage unit is determined as the first target request.

[0175] When the current storage cell is in the second state, the request to store the storage cell with the first state and the smallest index is determined as the first target request.

[0176] In one embodiment, the second determining module 1120 is configured to obtain cache information of the second cache when the first request has reached the first cache.

[0177] If it is determined through the cache information of the second cache that the second request has reached the second cache or has been written to the second cache, the first request is determined as the first request that can be emitted.

[0178] In one embodiment, the second determining module 1120 is further configured to determine the first request as the first request that can be launched when the first request has been written to the first cache and a second scheduling message is received; wherein the second scheduling message is used to identify that the second request has arrived at the second cache.

[0179] In one embodiment, the second determining module 1120 is configured to determine the first request as the first reproducible request in the register unit when the first request has been written to the register unit of the first cache and the second scheduling message is received.

[0180] If the first request has been written to the storage unit of the first cache and the second scheduling message is received, the first request is determined as the first request that can be issued in the storage unit.

[0181] In one embodiment, the second determining module 1120 is configured to determine, in any time period, a first target request to be transmitted in a target time period from the first cache; wherein the target time period is the next time period after the any time period.

[0182] Furthermore, this embodiment provides a request scheduling device, applied to a second scheduler, such as... Figure 12 As shown, the device 1200 includes a receiving module 1210 and a transmitting module 1220; wherein: The receiving module 1210 is configured to receive a first scheduling message sent by a first scheduler; wherein the first scheduling message is used to identify that a second request is to be transmitted in a target timing period; the first scheduling message is sent by the first scheduler when the first target request is the first request that can be transmitted, the first target request is a request that the first scheduler determines from a first buffer to be transmitted in the target timing period, the first request that can be transmitted is determined by the first scheduler when the second request that is transmitted in alignment with the first request has arrived in a second buffer or has been written to a second buffer, and the first request is determined by the first scheduler and written to the first buffer; The transmission module 1220 is configured to transmit the second request when the target timing period is reached.

[0183] In one embodiment, the apparatus 1200 further includes a first determining module configured to determine from the second cache a second target request to be transmitted in the target timing period.

[0184] After receiving the first scheduling message sent by the first scheduler, the first determining module is configured to update the second target request to the second request.

[0185] In one embodiment, the first determining module is configured to determine the second target request from the current storage unit of the second cache or from the storage unit with the unit state in the first state, based on a preset request arbitration strategy.

[0186] In one embodiment, the first determining module is configured to determine the storage unit corresponding to the index as the current storage unit based on the index indicated by the polling pointer.

[0187] If the current storage unit is in the first state, the request stored in the current storage unit is determined as the second target request.

[0188] When the current storage cell is in the second state, the request to store the storage cell with the first state and the smallest index is determined as the second target request.

[0189] In one embodiment, the first determining module is further configured to determine, in any timing period, a second target request to be transmitted in the target timing period from the second cache; wherein the target timing period is the next timing period after the any timing period.

[0190] In one embodiment, the first request module is further configured to update the second target request to the second request if the first scheduling message is received in any of the time periods, and to launch the second request when the target time period is reached.

[0191] If the first scheduling message is not received during any of the time periods, the second target request is transmitted when the target time period is reached.

[0192] In one embodiment, the apparatus 1200 further includes a sending module configured to send a second scheduling message to the first scheduler when the second request has arrived at the second cache; the second scheduling message is used to identify that the second request has arrived at the second cache.

[0193] It should be noted that other corresponding descriptions of the functional units involved in the request scheduling device provided in this embodiment can be found in the description of the request scheduling method in the above embodiments, and will not be repeated here.

[0194] Furthermore, this embodiment provides a request scheduling system. For example... Figure 13 As shown, the system 1300 includes a first scheduler 1310 and a second scheduler 1320. The first scheduler 1310 executes the scheduling method requested as described in the first aspect above, and the second scheduler 1320 executes the scheduling method requested as described in the second aspect above.

[0195] Based on the request scheduling method shown in the above embodiments, this embodiment also provides a computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements the method shown in the above embodiments.

[0196] Based on the methods shown in the above embodiments, this embodiment also provides a computer program product on which a computer program is stored, and when the computer program product is executed by a processor, it implements the methods shown in the above embodiments.

[0197] Based on this understanding, the technical solution of this application can be embodied in the form of a software product, which can be stored in a non-volatile storage medium (such as a CD-ROM, USB flash drive, mobile hard drive, etc.). The storage medium includes several instructions to cause a computer device (such as a personal computer, server, or network device, etc.) to execute the methods of the various embodiments of this application.

[0198] The storage medium may also include an operating system and a network communication module. The operating system is a program that manages the hardware and software resources of the aforementioned physical device, supporting the operation of information processing programs and other software and / or programs. The network communication module is used to enable communication between the various components within the storage medium, as well as communication with other hardware and software in the information processing physical device.

[0199] Based on the method shown in the above embodiments, and Figure 11 , Figure 12 To achieve the above objectives, as illustrated in the virtual device embodiment, this application also provides an electronic device. This electronic device includes a storage medium and a processor; the storage medium stores a computer program; the processor executes the computer program to implement the method shown in the above embodiment.

[0200] Optionally, the aforementioned electronic device may also include a user interface, a network interface, a camera, radio frequency (RF) circuitry, sensors, audio circuitry, a Wi-Fi module, etc. The user interface may include a display screen, input units such as a keyboard, etc., and optionally, a USB interface, a card reader interface, etc. Optionally, the network interface may include standard wired interfaces, wireless interfaces (such as Wi-Fi interfaces), etc.

[0201] Those skilled in the art will understand that the physical device structure provided in this embodiment does not constitute a limitation on the physical device, and may include more or fewer components, or combine certain components, or have different component arrangements.

[0202] Through the above description of the embodiments, those skilled in the art can clearly understand that this application can be implemented using software plus necessary general-purpose hardware platforms, or it can be implemented in hardware. Compared with the existing related technologies, this application achieves synchronous aligned issuance of two requests by scheduling the first request and the second request that need to be aligned for issuance in the first cache and the second cache respectively. Since the two requests that need to be aligned for issuance are stored in the first cache and the second cache respectively, the first cache and the second cache do not need to be configured according to the total bit width of the first request plus the second request, which effectively avoids the waste of bit width resources caused by the existing scheduling scheme when scheduling multiple types of requests based on shared cache, and is conducive to chip area reduction and performance optimization.

[0203] It should be noted that, in this document, relational terms such as "first" and "second" are used merely to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0204] The above description is merely a specific embodiment of this application, enabling those skilled in the art to understand or implement this application. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of this application. Therefore, this application is not to be limited to the embodiments described herein, but is to be accorded the widest scope consistent with the principles and novel features claimed herein.

Claims

1. A request scheduling method, characterized in that, Applied to the first scheduler, including: Identify the first request and write it to the first cache; If a second request, which is aligned with the first request, has arrived at or been written to the second cache, the first request is determined to be an errable first request. Determine the first target request to be emitted in the target timing period from the first cache; If the first target request is the first request that can be launched, a first scheduling message is sent to the second scheduler; wherein, the first scheduling message is used to identify that the second request is launched in the target timing period; Upon reaching the target timing period, the first transmittable request is emitted.

2. The method according to claim 1, characterized in that, Determining the first target request emitted in the target timing period from the first cache includes: Based on a preset request arbitration strategy, the first target request is determined from the current storage unit of the first cache or from the storage unit whose unit state is the first state.

3. The method according to claim 2, characterized in that, The method of determining the first target request based on a preset request arbitration strategy, from the current storage unit of the first cache or from the storage unit with the unit state of the first state, includes: Based on the index indicated by the polling pointer, the storage unit corresponding to the index is determined as the current storage unit; When the current storage unit is in the first state, the request stored in the current storage unit is determined as the first target request; When the current storage cell is in the second state, the request to store the storage cell with the first state and the smallest index is determined as the first target request.

4. The method according to any one of claims 1 to 3, characterized in that, The step of determining the first request as a first request that can be issued when a second request that is aligned with the first request has arrived at or been written to the second cache includes: When the first request has reached the first cache, obtain the cache information of the second cache; If it is determined through the cache information of the second cache that the second request has reached the second cache or has been written to the second cache, the first request is determined as the first request that can be emitted.

5. The method according to claim 4, characterized in that, The method further includes: If the first request has been written to the first cache and a second scheduling message has been received, the first request is determined to be the first request that can be issued; wherein the second scheduling message is used to identify that the second request has arrived at the second cache.

6. The method according to claim 5, characterized in that, The step of determining the first request as the first reproducible request when the first request has been written to the first cache and the second scheduling message has been received includes: If the first request has been written to the register unit of the first cache and the second scheduling message is received, the first request is determined as the first request that can be issued in the register unit. If the first request has been written to the storage unit of the first cache and the second scheduling message is received, the first request is determined as the first request that can be issued in the storage unit.

7. The method according to any one of claims 1 to 3, characterized in that, Determining the first target request emitted in the target timing period from the first cache includes: In any given time period, a first target request to be transmitted in a target time period is determined from the first cache; wherein the target time period is the next time period after the given time period.

8. The method according to any one of claims 1 to 3, characterized in that, The method further includes: Identify the third request and write the third request into the first cache; After determining the first target request to be emitted in the target timing period from the first cache, the method further includes: If the first target request is the third request, the third request is transmitted when the target timing period is reached.

9. A request scheduling method, characterized in that, Applied to the second scheduler, including: The system receives a first scheduling message sent by a first scheduler; wherein the first scheduling message is used to identify that a second request is to be launched in a target time period; the first scheduling message is sent by the first scheduler when the first target request is a launchable first request, the first target request is a request to be launched in the target time period determined by the first scheduler from a first cache, the launchable first request is determined by the first scheduler when the second request launched in alignment with the first request has arrived in a second cache or has been written to the second cache, and the first request is determined by the first scheduler and written to the first cache; When the target timing period is reached, the second request is transmitted.

10. The method according to claim 9, characterized in that, The method further includes: Determine the second target request to be emitted in the target timing period from the second cache; After receiving the first scheduling message sent by the first scheduler, the method further includes: Update the second target request to the second request.

11. The method according to claim 10, characterized in that, Determining the second target request emitted in the target timing period from the second cache includes: Based on a preset request arbitration strategy, the second target request is determined from the current storage unit of the second cache or from the storage unit whose unit state is the first state.

12. The method according to claim 11, characterized in that, The method of determining the second target request based on a preset request arbitration strategy, from the current storage unit of the second cache or from the storage unit with the unit state of the first state, includes: Based on the index indicated by the polling pointer, the storage unit corresponding to the index is determined as the current storage unit; If the current storage unit is in the first state, the request stored in the current storage unit is determined as the second target request; When the current storage cell is in the second state, the request to store the storage cell with the first state and the smallest index is determined as the second target request.

13. The method according to any one of claims 10 to 12, characterized in that, Determining the second target request emitted in the target timing period from the second cache includes: In any given time period, a second target request to be transmitted in the target time period is determined from the second cache; wherein the target time period is the next time period after the given time period.

14. The method according to claim 13, characterized in that, The method further includes, after determining from the second cache the second target request emitted in the target time period in any given time period: If the first scheduling message is received during any of the time periods, the second target request is updated to the second request, and the second request is transmitted when the target time period is reached; If the first scheduling message is not received during any of the time periods, the second target request is transmitted when the target time period is reached.

15. The method according to claim 9, characterized in that, The method further includes: If the second request has reached the second cache, a second scheduling message is sent to the first scheduler; the second scheduling message is used to identify that the second request has reached the second cache.

16. A request scheduling device, characterized in that, The device, applied to a first scheduler, comprises: a first determining module, a second determining module, a third determining module, a transmitting module, and a transmitting module; The first determining module is configured to determine the first request and write the first request into the first cache; The second determining module is configured to determine the first request as a first request that can be emitted if the second request that is aligned with the first request for emission has arrived at or been written to the second cache. The third determining module is configured to determine, from the first cache, a first target request transmitted in the target timing period; The sending module is configured to send a first scheduling message to the second scheduler when the first target request is the first request that can be sent; wherein the first scheduling message is used to identify that the second request is sent during the target timing period; The transmission module is configured to transmit the first transmittable request when the target timing period is reached.

17. A request scheduling device, characterized in that, The device, used in a second scheduler, includes: a receiving module and a transmitting module; The receiving module is configured to receive a first scheduling message sent by a first scheduler; wherein the first scheduling message is used to identify that a second request is to be transmitted in a target timing period; the first scheduling message is sent by the first scheduler when the first target request is a first request that can be transmitted, the first target request is a request that the first scheduler determines from a first cache to be transmitted in the target timing period, the first request that can be transmitted is determined by the first scheduler when the second request that is synchronized with the first request has arrived in the second cache or has been written to the second cache, and the first request is determined by the first scheduler and written to the first cache; The transmission module is configured to transmit the second request when the target timing period is reached.

18. A request scheduling system, characterized in that, Includes a first scheduler and a second scheduler; The first scheduler performs the method as described in any one of claims 1 to 8; The second scheduler performs the method as described in any one of claims 9 to 15.

19. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the method of any one of claims 1 to 8 or the method of any one of claims 9 to 15.

20. An electronic device comprising a storage medium, a processor, and a computer program stored on the storage medium and executable on the processor, characterized in that, When the processor executes the computer program, it implements the method of any one of claims 1 to 8 or the method of any one of claims 9 to 15.

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