Request processing method, graphics processing device, electronic device, and readable medium

Abstract

Embodiments of the present application provide a request processing method, a graphics processing device, electronic equipment and a readable medium, and relate to the technical field of computers. In the method, the endpoint controller forwards a related request to a record response module when the related request of a target display mode is received. The record response module records request information of the related request and sends a specified interrupt signal to a microcontroller module. The microcontroller module reads the request information through an analog service of the target display mode in response to the specified interrupt signal and performs an operation indicated by the related request based on the request information. Since the newly added record response module only needs to record request information, send a specified interrupt signal and respond, the hardware circuit structure is simpler, the required hardware resources are less, and the microcontroller module is hardware possessed by the graphics processing device itself, so the hardware implementation cost is lower.

Description

Technical Field

[0001] This invention relates to the field of computer technology, and in particular to a request processing method, a graphics processing device, an electronic device, and a readable medium. Background Technology

[0002] Currently, to ensure display compatibility of electronic devices, the graphics processing unit in the graphics card of these devices often needs to support the target display mode, such as Video Graphics Array (VGA) mode. When an electronic device is first powered on, before the graphics card driver is loaded, or when the graphics card driver is malfunctioning, the electronic device will use VGA mode for display.

[0003] In related technologies, dedicated hardware circuitry is required for the graphics processing device to implement the target display mode and handle related requests. This approach incurs high hardware implementation costs. Summary of the Invention

[0004] The present invention provides a request processing method, a graphics processing device, an electronic device, and a readable medium, which can solve the problem of high hardware implementation cost.

[0005] To address the aforementioned problems, this invention discloses a request processing method applied to a graphics processing device including an endpoint controller, a response recording module, and a microcontroller module. The method includes: Upon receiving a request related to the target display mode, the endpoint controller forwards the request to the recording response module. The recording response module records the request information of the relevant request and sends a specified interrupt signal to the microcontroller module; In response to the specified interrupt signal, the microcontroller module reads the request information through the simulation service of the target display mode and executes the operation indicated by the relevant request based on the request information.

[0006] On the other hand, embodiments of the present invention disclose a graphics processing device, which includes: an endpoint controller, a recording response module, and a microcontroller module; The endpoint controller is configured to forward the relevant request to the recording response module upon receiving a request related to the target display mode. The recording response module is used to record the request information of the relevant request and send a specified interrupt signal to the microcontroller module; The microcontroller module is configured to, in response to the specified interrupt signal, read the request information through the simulation service of the target display mode, and execute the operation indicated by the relevant request based on the request information.

[0007] In another aspect, embodiments of the present invention disclose an electronic device, including: a processor, a memory, a communication interface, and a communication bus, wherein the processor, the memory, and the communication interface communicate with each other through the communication bus; the memory is used to store executable instructions, which cause the processor to execute the aforementioned method.

[0008] This invention also discloses a machine-readable medium storing instructions that, when executed by one or more processors, cause the processors to perform the methods described above.

[0009] The embodiments of the present invention have the following advantages: The request processing method provided in the embodiments of the present invention involves an endpoint controller forwarding a request related to a target display mode to a recording and response module upon receiving such a request. The recording and response module records the request information of the relevant request and sends a specified interrupt signal to the microcontroller module. The microcontroller module, in response to the specified interrupt signal, reads the request information through the simulation service of the target display mode and executes the operation indicated by the relevant request based on the request information. In the embodiments of the present invention, by setting up a recording and response module and reusing an existing microcontroller module, the recording and response module provides the microcontroller module with the request information required to process the relevant request, and the simulation service in the microcontroller module executes the operation indicated by the relevant request, thus realizing the processing of the relevant request in a hardware-software collaborative manner. This achieves the processing of relevant requests using existing hardware and software simulation. Since the newly added recording and response module only needs to record request information, send a specified interrupt signal, and respond, the hardware circuit structure is simpler, the required hardware resources are less, and the microcontroller module is hardware-integrated within the graphics processing device itself; therefore, the hardware implementation cost is lower.

[0010] Meanwhile, in this embodiment of the invention, there is no need to set the hardware circuit for the target display mode. Therefore, the verification workload in the chip design stage can be reduced, thereby reducing the probability of the hardware design schedule deviating from the expected progress and reducing hardware design risks. Attached Figure Description

[0011] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the description of the embodiments of the present invention will be briefly introduced below.

[0012] Figure 1 This is a flowchart of the steps of a request processing method provided in an embodiment of the present invention; Figure 2This is a schematic diagram of the structure of a graphics processing device provided in an embodiment of the present invention; Figure 3 This is a block diagram of a graphics processing device provided in an embodiment of the present invention; Figure 4 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present invention. Detailed Implementation

[0013] The technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention.

[0014] First, an application scenario related to an embodiment of the present invention will be described. The target display module in this embodiment can be in VGA mode, applicable to scenarios supporting traditional VGA mode. VGA mode refers to a graphics display mode designed for graphics processing devices to maintain compatibility with the VGA standard. VGA mode has strong compatibility and therefore enjoys widespread support. In one usage scenario, before loading the graphics card driver, the operating system initializes to a simplest display mode supported by all graphics processing devices, namely VGA mode. Then, the common VGA mode is used to display startup information and the user interface, ensuring the user can see information during the system startup process. In another usage scenario, if an anomaly occurs during system startup, such as a corrupted or missing graphics card driver, the operating system will boot into safe mode and display the interactive interface in VGA mode, ensuring the user can perform basic operations, such as reinstalling drivers or system recovery.

[0015] In related technologies, a dedicated hardware circuit is set up in the graphics processing unit (GPU) to implement VGA mode. Requests are directly sent to this hardware circuit for processing. However, because the hardware circuit for implementing VGA mode is complex and requires significant hardware resources, and VGA mode is only used in specific situations, dedicating a large portion of the GPU's hardware resources to this circuit results in high hardware implementation costs. Furthermore, using a dedicated VGA mode hardware circuit necessitates extensive verification on different operating system platforms during the chip design phase, increasing the risk of deviations from the expected hardware design schedule and raising overall hardware design risk.

[0016] Therefore, this invention provides a request processing method, which will be described in detail below.

[0017] Figure 1 This is a flowchart illustrating the steps of a request processing method provided in an embodiment of the present invention. This method can be applied to a graphics processing device including an endpoint controller, a response recording module, and a microcontroller module, such as... Figure 1As shown, the request processing method may include the following steps: Step 101: Upon receiving a request related to the target display mode, the endpoint controller forwards the request to the record response module.

[0018] Step 102: The recording response module records the request information of the relevant request and sends a specified interrupt signal to the microcontroller module.

[0019] Step 103: In response to the specified interrupt signal, the microcontroller module reads the request information through the simulation service of the target display mode, and executes the operation indicated by the relevant request based on the request information.

[0020] The graphics processing unit (GPU) is a hardware device in a computer used for graphics processing and display output. As an expansion card, the GPU can be inserted into a bus slot in an electronic device, such as a Peripheral Component Interconnect Express (PCIe) bus slot, an Industry Standard Architecture (ISA) bus slot, a Low Pin Count (LPC) bus slot, a Peripheral Component Interconnect (PCI) bus slot, or an Accelerated Graphics Port (AGP) bus slot. The GPU in this embodiment includes an endpoint controller, a Record Respond Unit (RRU), and a Microcontroller Unit (MCU) module. Specifically, the endpoint controller can be an endpoint controller adapted to the adopted bus protocol. For example, the endpoint controller can be a PCI endpoint controller, an ISA endpoint controller, an LPC endpoint controller, an AGP endpoint controller, a PCIe endpoint controller, etc. Taking the PCIe endpoint controller as an example, the PCIe endpoint controller (PCIe-EP) connects to the PCIe interface on the central processing unit or bridge chip, providing command and data paths for the graphics processing device. The record response module is used to record request information and send specified interrupt signals. The MCU module is used to run the simulation service of the target display mode, processing related requests through software simulation. The related requests for the target display mode can be VGA-related requests, and the simulation service for the target display mode can be a VGA simulation service.

[0021] Of course, the target display mode can also be other modes, such as Color Graphics Adapter (CGA) mode, Enhanced Graphics Adapter mode, etc., and the embodiments of the present invention do not limit this.

[0022] The simulation service is essentially software; it's an interrupt service used to simulate the hardware circuitry functions of the target display mode. This simulation service is pre-designed and deployed in the MCU module by the developers. In practical applications, the MCU module often deploys multiple interrupt services, each implementing different functions, and each corresponding to a different interrupt signal. The designated interrupt signal is the interrupt signal corresponding to the simulation service in the MCU module. The specific form of the designated interrupt signal can be pre-set as needed. The designated interrupt signal can be transmitted via the signal line between the recording response module and the microcontroller module; this embodiment of the invention does not impose any limitations on this. Accordingly, when the received interrupt information is the designated interrupt signal, the MCU module can run the simulation service, execute the read request information, and perform the operation indicated by the relevant request based on the request information, thus processing the relevant request. The request information is the information required to execute the operation indicated by the relevant request. For example, the request information can be used to characterize whether the relevant request is a write request or a read request, the address to be read / written, the content to be written, etc.

[0023] The relevant requests are issued by the host software-controlled Central Processing Unit (CPU), exemplarily via the PCI bus, ISA bus, AGP bus, LPC bus, or PCIe bus. These requests refer to requests where the destination address hits the address space of the target display mode. For example, the address space of the target display mode can be the VGA address space. The relevant requests include a request to instruct the writing of a specified register value to the control register of the target display mode simulated by the emulation service (hereinafter referred to as the first request), a request to instruct the reading of the current value of the control register of the target display mode simulated by the emulation service (hereinafter referred to as the second request), a request to instruct the writing of the desired display content to the display buffer of the target display mode simulated by the emulation service (hereinafter referred to as the third request), and a request to instruct the reading of the current content in the display buffer of the target display mode simulated by the emulation service (hereinafter referred to as the fourth request). For example, the control register of the simulated target display mode can be the simulated VGA control register, and the display buffer of the simulated target display mode can be the simulated VGA display buffer.

[0024] Accordingly, when the target display mode needs to be used, the operating system can first issue a first request. After the simulation service executes the operation indicated by the first request, the value of the simulated control register is configured to the specified register value. The specified register value is the register value required by the target display mode. For example, the specified register value may include the resolution required by the target display mode, the required color mode configuration value, refresh rate, etc. In this way, by configuring the value of the simulated control register to the specified register value, the display controller of the graphics processing device follows the target display mode. Further, the operating system can issue a third request. After the simulation service executes the operation indicated by the third request, the required display content is written into the simulated display buffer. Subsequently, the display controller can control the display screen to display the required content, achieving normal display in the target display mode. Further, when the operating system needs to know the current value of the simulated control register, it can issue a second request. After the simulation service executes the second request, it reads the current value of the simulated control register and feeds it back to the operating system. When it needs to update the display content, a fourth request is sent. After the simulation service executes the fourth request, it reads the display content written into the simulated display buffer and feeds it back to the operating system. The operating system can modify the displayed content and control subsequent re-display. By processing the first through fourth requests, various processing logics defined in the target display mode are implemented.

[0025] In existing technologies, endpoint controllers directly route relevant requests to the target display mode hardware circuit. The request processing method provided in this invention involves the endpoint controller forwarding a relevant request to a recording and response module upon receiving it. The recording and response module records the request information and sends a specified interrupt signal to the microcontroller module. In response to the specified interrupt signal, the microcontroller module reads the request information through the simulation service of the target display mode and executes the operation indicated by the request based on the request information. In this invention, by setting up a recording and response module and reusing an existing microcontroller module, the recording and response module provides the microcontroller module with the request information needed to process the relevant request, and the simulation service in the microcontroller module executes the operation indicated by the relevant request, thus achieving request processing in a hardware-software collaborative manner. This achieves request processing using existing hardware and software simulation. Since the newly added recording and response module only needs to record request information, send a specified interrupt signal, and respond, the hardware circuit structure is simpler, requiring fewer hardware resources. Furthermore, since the microcontroller module is part of the graphics processing device itself, the hardware implementation cost is lower.

[0026] Meanwhile, in this embodiment of the invention, there is no need to set the hardware circuit for the target display mode. Therefore, the verification workload in the chip design stage can be reduced, thereby reducing the probability of the hardware design schedule deviating from the expected progress and reducing hardware design risks.

[0027] Optionally, in this embodiment of the invention, the recording response module includes a preset register group; the step of recording the request information of the relevant request by the recording response module may specifically include: Step 1021: The record response module sets the value of the read / write type register and the value of the write data register in the register group based on the read / write type of the relevant request.

[0028] Step 1022: The record response module sets the value of the space type register in the register group based on the memory space type of the relevant request.

[0029] Step 1023: The recording response module sets the value of the request size register in the register group based on the request size of the relevant request.

[0030] Step 1024: The record response module sets the value of the address register in the register group based on the destination address carried in the relevant request.

[0031] The preset register set includes multiple registers configured in the record response module. The record response module can use locally configured registers to record the request information of related requests. In this embodiment of the invention, the request information of related requests may include the read / write type, memory access type, request size, destination address, and write data carried by the related request (the write data is empty when the related request is a read request). Accordingly, the preset register set includes a read / write type register for recording the read / write type of the related request, a write data register for recording the write data carried by the related request, a memory access type register for recording the memory access type of the related request, a request size register for recording the request size of the related request, and an address register for recording the destination address carried by the related request. For example, the read / write type register can be represented as req_write, the write data register can be represented as req_wdata, the memory access type register can be represented as req_type, the request size register can be represented as req_size, and the address register can be represented as req_addr.

[0032] When `req_write` is 1, it indicates that the request entering the logging response module (i.e., the request forwarded by the endpoint controller) is a write request; when `req_write` is 0, it indicates that the request entering the logging response module is a read request. The logging response module can set the value of `req_write` to 0 if the opcode of the request indicates a read operation, and otherwise set the value of `req_write` to 1. The value of `req_wdata` includes the write data carried by the write-type request. The logging response module can extract the content of the field used to store the write data in the request if the opcode of the request indicates a write operation, thus obtaining the write data carried by the request.

[0033] Furthermore, when `req_type` is 1, it indicates that the memory access type of the request entering the record response module is Memory (MEM), meaning the request is used to read / write data at the destination address in the MEM space. When `req_type` is 0, it indicates that the memory access type of the request entering the record response module is I / O, meaning the request is used to read / write data at the destination address in the Input / Output (IO) space. The value of `req_addr` indicates the destination address carried by the request entering the record response module.

[0034] Since different memory access spaces (IO space, MEM space) are used in practical applications, this embodiment of the invention further records the memory access space type of the relevant request using `req_type`. This allows for convenient location of the read / write position based on the memory access space type and the destination address carried by the relevant request. For example, the IO space and MEM space can be distinguished by different high-order address information, corresponding to different high-order address information. The response recording module can extract the content of the field segment used to store the high-order address information in the relevant request to obtain the high-order address information carried by the relevant request. Furthermore, in practical applications, the PCI / PCIe protocol directly defines MEM and IO types. For requests forwarded by the PCIe endpoint controller, if the information carried by the request represents the MEM type, the value of `req_type` can be set to 1. If the information carried by the request represents the IO type, the value of `req_type` can be set to 0. Furthermore, the destination address carried by the relevant request is equivalent to the low-order address information. Accordingly, the response recording module can extract the content of the field segment used to store the low-order address information in the relevant request to obtain the low-order address information carried by the relevant request. Next, the extracted low-order address information is written into the address register. In this embodiment of the invention, only the low-order address information needs to be actually stored, which can reduce the number of large-width registers required, thereby reducing the implementation cost to some extent.

[0035] The value of `req_size` indicates the specific size of the related request. For example, if the request size is 1 byte, `req_size` is set to 0; if the request size is 2 bytes, `req_size` is set to 1; and if the request size is 4 bytes, `req_size` is set to 2. In practical applications, the bit width of `req_wdata` is not less than the maximum length of write data that the related request can carry. Initially, each bit of `req_wdata` can have a default value; for example, assume the default value is 0. Related requests of different write types carry different lengths of write data. For example, assuming the write data lengths corresponding to 1 byte, 2 bytes, and 4 bytes are 8 bits, 16 bits, and 32 bits respectively, and `req_wdata` is a 32-bit register, then initially, the value of `req_wdata` is: 00000000_00000000_00000000_00000000. Assuming the related request is 1 byte, the length of the write data carried... If the data to be written is 10101010, then the value of req_wdata after writing is "00000000_00000000_00000000_10101010". Assuming the related request is 2 bytes and carries the data to be written as 11101010_01011000, then the value of req_wdata after writing is "00000000_00000000_11101010_01011000".

[0036] In this embodiment of the invention, by setting a preset register group in the recording response module, the recording response module sets the value of the register in the register group according to the read / write type, memory access space type, request size, data to be written and destination address of the relevant request. That is, the recording request information can be realized by writing to the register, thereby ensuring recording efficiency to a certain extent.

[0037] It should be noted that since the operation of recording the request information of the response module is usually short and efficient, a specified interrupt signal can be sent to the MCU module at the same time as recording the request information, thereby improving the overall processing efficiency.

[0038] Optionally, the above-mentioned step of reading the request information through the simulation service of the target display mode may specifically include: step 1031, running the simulation service, and reading the values ​​of the read / write type register, the write data register, the space type register, the request size register, and the address register through the simulation service as the request information.

[0039] Upon receiving a specified interrupt signal, the MCU module can jump to the corresponding interrupt service (i.e., simulation service). The record response module provides a register interface, through which the MCU module can access the register interface of the record response module to obtain the register values ​​of the read / write type register, write data register, space type register, request size register, and address register as request information.

[0040] In this embodiment of the invention, the simulation service in the MCU module reads the values ​​of the read / write type register, the data to be written register, the space type register, the request size register, and the address register through the access record response module. That is, the request information can be obtained by reading the registers, which can ensure the acquisition efficiency to a certain extent.

[0041] Optionally, embodiments of the present invention may further include the following steps: Step S21: The recording response module sets the valid bit register in the register group to a first value; the first value indicates that the recording response module has received a relevant request.

[0042] Step S22: When the simulation service detects that the valid bit register is the first value, it executes the step of reading the values ​​of the read / write type register, the write data register, the space type register, the request size register, and the address register.

[0043] In this embodiment of the invention, the register group of the recording response module further includes a valid bit register, which can be exemplarily represented as `req_valid`. When the recording response module receives a relevant request forwarded by the endpoint controller, it can set the valid bit register to a first value when recording the request information. This first value is pre-defined and represents the presence of a relevant request entering the recording response module; exemplarily, the first value can be 1, and initially, `req_valid` is 0. Further, after `req_rdata` is written with the request response information, the recording response module restores `req_valid` to 0.

[0044] Furthermore, the current value of the valid bit register can be obtained first through the register interface of the recording response module. If the obtained current value is 1, then the steps described above, which involve reading the values ​​of the read / write type register, the write data register, the space type register, the request size register, and the address register through the simulation service, are executed. Otherwise, if the obtained current value is 0, it indicates that there is no request information to be obtained, and the received specified interrupt signal may have been mistakenly triggered by the recording response module. Furthermore, the MCU module can provide fault information to remind the user to troubleshoot and repair the fault in a timely manner.

[0045] In this embodiment of the invention, the recording response module sets the valid bit register in the register group to a first value, which indicates that the recording response module has received a relevant request. The simulation service only reads the values ​​of the read / write type register, the data to be written register, the space type register, the request size register, and the address register when it detects that the valid bit register is the first value. This avoids unnecessary read operations and thus saves processing resources.

[0046] Optionally, the embodiments of the present invention may also include the following steps: Step S31: For any request received by the endpoint controller, if the destination address of the request matches the address space of the target display mode, the endpoint controller determines the request as the relevant request.

[0047] Accordingly, the step of forwarding the relevant request to the record response module described above may specifically include: Step 1011: Set the value of the first encoding information to the second value; the first encoding information is used to characterize whether the request is a relevant request.

[0048] Step 1012: Synchronously send the relevant request and the first encoded information to the on-chip bus; the on-chip bus is used to route the relevant request to the record response module when the first encoded information is a second value.

[0049] In this embodiment of the invention, after receiving a request, the endpoint controller can compare the destination address of the request with the configured device address space. The device address space represents the address range corresponding to the bus device, which is determined by the base address allocated to the bus device and the space size declared in the Base Address Register (BAR) in the bus device header. For example, taking the PCIe bus as an example, during the operating system startup process, the PCIe bus is enumerated and configured. Specifically, the operating system can identify PCIe devices through a PCIe scanning mechanism to perform enumeration. Then, it obtains the space type (IO type or MEM type) and declared space size declared in the BAR register of each identified PCIe device's device header, allocates the base address of the IO / MEM space to each PCIe device, and performs configuration.

[0050] In this embodiment of the invention, the target display mode is VGA mode. If the destination address of the request matches the configured PCIe device address space, that is, the destination address of the request belongs to the address range corresponding to the PCIe device, then the request is determined to be a non-VGA request. If the destination address of the request does not match the configured PCIe device address space, then the request can be considered to match the VGA address space, and the request can be directly determined to be a VGA-related request. Alternatively, in another implementation, a VGA mode address space can be configured for the endpoint controller, where the VGA mode address space is a pre-defined address range. If the destination address of the request belongs to the VGA mode address range, then the request is determined to be a VGA-related request. In this embodiment of the invention, the processing logic of the endpoint controller can be modified in advance to configure the endpoint controller to a promiscuous mode, receiving requests of all address ranges of IO type and MEM type, thereby enabling the reception of VGA-related requests without discarding them. When a VGA-related request is received, execution continues from step 1011, that is, the endpoint controller is equivalent to a promiscuous mode, and can receive and process VGA-related requests.

[0051] Further, the first encoding information is the transmission signal supported by the bus interface used by the endpoint controller. The second value can be a pre-agreed value used to indicate that the request is a VGA-related request, that is, a value used to indicate that the request did not hit the BAR. For example, the second value can be 1. For example, the bus interface used by the endpoint controller can be an AXI interface, and the first encoding information can be arprot. It should be noted that the endpoint controller can also set the second encoding information for the request. The value of the second encoding information is used to characterize the memory access space type of the request. The second encoding information is the transmission signal supported by the bus interface used by the endpoint controller. For example, the second encoding information can be awprot. arprot and awprot can be collectively referred to as prot information. For example, prot[2] represents the first encoding information, prot[1] represents the second encoding information, prot[2] is 1 when the request did not hit the BAR, prot[2] is 0 when the request hits the BAR, prot[1] is 1 when the request is of type MEM, and prot[1] is 0 when the request is of type IO.

[0052] For VGA-related requests, the endpoint controller can generate the first encoding information for the VGA-related request: prot[2]=1. For non-VGA requests, the endpoint controller can generate the first encoding information for the non-VGA request: prot[2]=0. It should be noted that in actual application scenarios, for requests that hit a BAR, the address can be transformed according to the hit BAR before the request is sent to the on-chip bus, so that the on-chip bus can route according to the address. The requests (VGA-related requests and non-VGA requests) to be sent by the endpoint controller are transmitted to the corresponding modules through the on-chip bus. Specifically, for VGA-related requests, the endpoint controller can send the VGA-related request, the first encoding information and the second encoding information to the on-chip bus. The on-chip bus in the graphics processing device can also be called the on-chip network. The routing module included in the on-chip bus can transmit the request. When the routing module in the on-chip bus recognizes prot[2]=1, it directly routes the request to the recording response module, that is, the recording response module receives requests that do not hit any BAR address space. For non-VGA requests, the endpoint controller can send the non-VGA request, the first encoding information and the second encoding information to the on-chip bus. When the routing module in the on-chip bus recognizes that prot[2]=0, it routes the request according to the destination address.

[0053] In this embodiment of the invention, for any request received by the endpoint controller, if the destination address of the request matches the address space of the target display mode, the endpoint controller determines the request as the relevant request. Further, the endpoint controller sets the value of the first encoded information to a second value, and synchronously sends the relevant request and the first encoded information to the on-chip bus. The on-chip bus is used to route the relevant request to the recording response module if the first encoded information is the second value. This ensures that the relevant request can be accurately forwarded to the recording response module.

[0054] It should be noted that when the record response module sets the value of the space type register, it can directly set req_type to 1 when prot[1] of the relevant request is 1, and directly set req_type to 0 when prot[1] of the relevant request is 0, thereby ensuring setting efficiency.

[0055] It is understood that the graphics processing apparatus of this embodiment also includes other components, for example, Figure 2 This is a schematic diagram of the structure of a graphics processing device provided in an embodiment of the present invention, such as... Figure 2 As shown, the graphics processing device includes an endpoint controller, a recording response module, an MCU module, a graphics processor module, a video processing unit (VPU) module, a display controller, an on-chip bus, and a memory controller (MC). The graphics processing device can be a chip that implements graphics processing functions; that is, it can be an image processing chip. The graphics processing device can be used in a graphics card and is part of the graphics card. It is understood that a graphics card can also include heat dissipation devices, power supply devices, etc. The MCU module is an independent control system responsible for auxiliary tasks such as power management and fan control within the chip. The MCU module can include a CPU unit, random access memory (RAM), read-only memory (ROM), and a serial peripheral interface (SPI). SPI is used to connect to an external SPI flash memory, which stores the management and control programs for the host's Video Basic Input / Output System (VBIOS) and the MCU module. The specified interrupt signal can be a CPU interrupt sent to the CPU unit in the MCU module. The CPU unit can read the request information through the simulation service and perform the operation indicated by the relevant request based on the request information.

[0056] The graphics processing unit (GPU) module accelerates graphics rendering and general-purpose computing. The video codec module handles video encoding and decoding. The display controller is responsible for transferring data from the display buffer to the monitor (display screen). The on-chip bus connects various functional modules according to data access needs. The on-chip bus can employ a multi-level bus hybrid architecture, such as Advanced eXtensible Interface (AXI), Advanced High-performance Bus (AHB), or Advanced Peripheral Bus (APB) based on the Advanced Microcontroller Bus Architecture (AMBA). The memory controller connects to external memory chips, providing high-bandwidth video memory for graphics display and other functional modules. It should be noted that... Figure 2 This is merely an example; in real-world applications, graphics processing devices may include other components not limited to these examples. Figure 2 The embodiments of the present invention do not limit the scope of the content shown.

[0057] Optionally, embodiments of the present invention may further include the following steps: Step S41: If the read / write type of the related request is write, use the preset write response information as the request response information of the related request.

[0058] Step S42: If the read / write type of the related request is read, generate the request response information of the related request based on the read data and the preset read response information.

[0059] Step S43: The microcontroller module returns the request response information of the relevant request to the record response module.

[0060] Step S44: The record response module sends the request response information to the endpoint controller.

[0061] In this embodiment of the invention, steps S41 to S44 are executed by the MCU module after performing the operation indicated by the relevant request based on the request information. After executing the operation indicated by the relevant request, that is, after performing VGA-related read / write simulation according to the request information, the MCU module returns request response information to the recording response module. Specifically, if the value of the read / write type register in the request information is 1, the read / write type of the relevant request can be determined to be write type. The preset write response information includes preset write success response information and write failure response information. The write success response information and write failure response information can be any pre-agreed data, and this embodiment of the invention does not impose any restrictions on this. For example, the write success response information can be "WRITE-TRUE" or 1, and the write failure response information can be "WRITE-FALSE" or 0. After a successful write, the MCU module can use the preset write success response information as the request response information; if the write is unsuccessful, it can use the preset write failure response information as the request response information.

[0062] Furthermore, if the value of the read / write type register in the request information is 0, the read / write type of the relevant request is determined to be read. The preset read response information includes preset read success response information and read failure response information. The read success response information and read failure response information can be any pre-agreed data format, and this embodiment of the invention does not impose any restrictions on this. For example, the read success response information can be "READ-TRUE" or 1, and the read failure response information can be "READ-FALSE" or 0. Accordingly, after a successful read, the MCU module can use the preset read success response information and the read data as the request response information; if the read is unsuccessful, the MCU module uses the preset read failure response information as the request response information.

[0063] Specifically, the response recording module also includes a response register, exemplarily represented as `req_rdata`, which records the request-response information returned by the MCU module. The MCU module can write the request-response information to `req_rdata` via the register interface. Upon detecting that `req_rdata` has been written, the response recording module reads its value and forwards it to the endpoint controller via the on-chip bus to complete a bus transaction. In this embodiment, each request from the endpoint controller corresponds to a bus transaction. Relevant requests on the PCIe bus are routed to the response recording module, and a software simulation process is inserted during a bus transaction. When the endpoint controller receives a response to the request, it terminates the bus transaction corresponding to that request.

[0064] In this embodiment of the invention, after executing the operation indicated by the relevant request based on the request information, request response information is generated for the relevant request. The microcontroller module returns the request response information of the relevant request to the response recording module, and the response recording module sends the request response information to the endpoint controller. In this way, by finally returning a response to the endpoint controller that issued the relevant request, the successful completion of the bus transaction corresponding to a request is ensured, avoiding the problem of a large number of unfinished bus transactions causing operational obstruction.

[0065] Optionally, the steps of performing the operation indicated by the relevant request based on the request information in the embodiments of the present invention may specifically include: Step 1032: If the value of the read / write type register in the request information represents the write type, determine the address to be written based on the value of the space type register and the address register in the request information, and determine the data to be written based on the value of the request size register and the write data register in the request information.

[0066] Step 1033: Write the data to be written to the address to be written; the address to be written belongs to the simulated VGA display buffer or the simulated VGA control register.

[0067] Step 1034: If the value of the read / write type register in the request information represents the read type, determine the address to be read based on the value of the space type register and the address register in the request information, and read the data at the address to be read; the address to be read belongs to the simulated VGA display buffer or the VGA control register.

[0068] Specifically, if `req_write` equals 1, then the VGA-related requests to be simulated are write requests. Accordingly, the address to be written can be determined based on the read values ​​of `req_type` and `req_addr`. Specifically, the value of `req_addr` in the memory access space represented by the value of `req_type` can be used as the address to be written. For example, the high-order bits of the address corresponding to the value of `req_type` can be combined with the value of `req_addr` to obtain the address to be written. Further, the data to be written can be determined based on the read values ​​of `req_size` and `req_wdata`. Specifically, the write data length corresponding to the request size represented by the value of `req_size` can be used as the target length `m`. The lower `m` bytes of the value of `req_wdata` are used as the data to be written.

[0069] Furthermore, if the VGA-related request to be simulated is a write request, this VGA-related request may be the aforementioned first request. Accordingly, in this case, the data to be written is a register value, and the address to be written belongs to the simulated VGA control register. After writing the data to be written to the address to be written, the value of the VGA control register is configured to the specified register value. The VGA-related request may also be the aforementioned third request. Accordingly, in this case, the data to be written is the content to be displayed, and the address to be written belongs to the simulated VGA display buffer. After writing the data to be written to the address to be written, the required display content is written into the VGA display buffer for subsequent display. Here, the simulated VGA control register can essentially be a variable, and the simulated VGA display buffer can essentially be an array.

[0070] For example, suppose the VGA-related request instructs the writing of a byte 0x5 to 0x3b4 in the I / O space. Here, 0x3b4 corresponds to the VGA's CRTC index register, and 0x5 represents the register value to be written. The record response module then records the following information in each register: req_valid = 1 req_write = 1 req_type = 0 req_size = 0 req_addr = 0x3b4 req_wdata = 0x5 The VGA emulation service acquires and parses the request information, recognizing that it is writing to 0x3b4 of the I / O space. Therefore, it fills 0x5 into the simulated CRTC index register as an index for subsequent data access to I / O space 0x3b5. After filling, it returns the request response information to the recording response module, which then forwards it to the endpoint controller, completing the request response process.

[0071] If the read `req_write` value is 0, then the VGA-related request to be simulated is a read request. Accordingly, the address to be read can be determined based on the read values ​​of `req_type` and `req_addr`. Specifically, the value of `req_addr` in the memory access space represented by the value of `req_type` can be used as the address to be read. For example, the high-order bits of the address corresponding to the value of `req_type` can be combined with the value of `req_addr` to obtain the address to be read.

[0072] Furthermore, if the VGA-related request to be simulated is a read request, this VGA-related request may be the aforementioned second request. Accordingly, in this case, the address to be read belongs to the simulated VGA control register. After reading the data at the address to be read, the current value of the VGA control register is obtained. This VGA-related request may also be the aforementioned fourth request. Accordingly, in this case, the address to be read belongs to the simulated VGA display buffer. After reading the data at the address to be read, the currently written display content in the display buffer is obtained.

[0073] For example, suppose the VGA-related request is used to instruct the reader to read the value of 0x3b4 in the I / O space. Here, 0x3b4 corresponds to the VGA's CRTC index register. Then, the registers in the response recording module will record the following information: req_valid = 1 req_write = 0 req_type = 0 req_size = 0 req_addr = 0x3b4 req_wdata = / The simulated service acquires and parses the request information, recognizing that it is reading from 0x3b4 of the I / O space. Therefore, it can read the current value of the simulated CRTC index register. After reading, it can return request response information (including the current value read and a successful read response) to the recording response module. The recording response module then forwards this information to the endpoint controller, completing the request response process.

[0074] It should be noted that, in this embodiment of the invention, the simulation service can simulate the access behavior of the corresponding IO port (i.e., the VGA control register accessed by the IO type read request) and display buffer in the software according to the functional requirements of the VGA mode. The simulation service can implement the above simulation logic by referring to a system-level virtual machine (e.g., VirtualBox, QEMU, etc.) or a preset function, and this embodiment of the invention does not limit this. In actual application scenarios, the address corresponding to the VGA control register belongs to the IO space, and the address corresponding to the VGA display buffer belongs to the MEM space. The simulation service may include a first preset write function for implementing writing to the IO space. When the VGA-related request to be simulated is the first request, the first preset write function can be called. The address to be written and the data to be written can be input into the first preset write function. For example, the first preset write function defines branch statements. Each branch statement defines a simulated VGA control register and its corresponding address. A branch statement is used to fill the data to be written into the VGA control register defined by the branch statement if the address to be written matches the address corresponding to the defined VGA control register. For example, it may include a defined CRTC index register and branch statement 0x3b4, a defined CRTC register and corresponding branch statements 0x03B5 and 0x03D5, a defined sequencer index register and corresponding branch statement 0x03C4, a defined sequencer register and corresponding branch statement 0x03C5, and so on. The simulation service may also include a second preset write function for writing to the MEM space. This second preset write function can be called when the VGA-related request to be simulated is a third request. The address to be written and the data to be written can be input into the second preset write function, which is used to fill the display buffer corresponding to the address to be written with the data. It should be noted that the simulated VGA display buffer may include multiple memory pages, and each simulated memory page corresponds to a part of an array to simulate a multi-page memory structure in VGA mode.

[0075] The simulation service may also include a first preset read function for reading from the I / O space. This first preset read function can be called when the VGA-related request to be simulated is a second request. The address to be read can be input into the first preset read function, which reads data from the VGA control register corresponding to that address. For example, the first preset read function defines branch statements. Each branch statement defines a simulated VGA control register and its corresponding address. A branch statement is used to read the value of the VGA control register defined in that branch statement if the address to be read matches the address corresponding to the defined VGA control register. The VGA control register and its corresponding address defined in the branch statements of the first preset read function are the same as those defined in the branch statements of the first preset read function.

[0076] Furthermore, the simulation service may also include a second preset read function for reading the MEM space. This second preset read function can be invoked when the VGA-related request requiring simulation processing is the fourth request. The address to be read can be input into the second preset read function, which is used to read data from the VGA display buffer corresponding to the address to be read.

[0077] In this embodiment of the invention, for write-type VGA-related requests, the address to be written and the data to be written are determined based on the request information, and the data to be written is written to the simulated VGA display buffer or simulated VGA control register corresponding to the address to be written. For read-type VGA-related requests, the address to be read is determined based on the request information, and data is read from the simulated VGA display buffer or simulated VGA control register corresponding to the address to be read. This achieves simulated processing of various types of VGA-related requests, ensuring that VGA-related requests are responded to normally.

[0078] Since VGA mode is quite different from modern GPU architecture, implementing a dedicated VGA mode hardware circuit would be costly. In this embodiment of the invention, a software-based approach separates the VGA mode functionality from the hardware design. VGA mode support is implemented through software simulation, eliminating the need for a dedicated VGA mode hardware circuit. This simplifies hardware design, increases flexibility, and lowers hardware implementation costs.

[0079] Optionally, when the data to be written is a character and the address to be written belongs to a simulated VGA display buffer, the embodiments of the present invention may further include the following steps: Step S51: When the preset conversion conditions are met, the graphics processor module is invoked to convert the characters in the VGA display buffer into pixel dot matrix data.

[0080] Step S52: The pixel matrix data is transmitted to the display memory area corresponding to the display controller; the display controller is used to transmit the pixel matrix data in the display memory area to the display screen at a preset frequency.

[0081] In practical applications, the transfer controller (e.g., a DMA controller) moves the contents of the VGA display buffer to the corresponding display memory area of ​​the display controller. This display memory area is the physical memory area. The display controller then transmits the contents of the display memory area to the display screen (i.e., the display interface to which the contents are transmitted) at a preset frequency for display. This preset frequency can be the refresh rate required by the monitor. In some functions, the contents of the display buffer may need to be processed first. Since the GPU module itself has strong graphics rendering capabilities, the simulation service can only handle the relevant simulations; the processing of the contents of the display buffer can be performed by calling the graphics processing unit (GPU). Specifically, in text mode, the data to be written is characters, i.e., ASCII-encoded characters stored in the VGA display buffer. Since the display controller needs to obtain pixel data, the GPU module can be called to convert the characters in the VGA display buffer into pixel data, thus simulating a character generator in VGA mode. Because the GPU module has strong processing capabilities, calling the GPU module for conversion ensures fast conversion speed.

[0082] For example, a graphics processing pipeline for converting characters into pixel-based data can be defined first using the OpenGL API provided by the graphics processing unit (GPU) module. This pipeline defines the implementation method for converting characters into pixel-based data. For example, this pipeline can be defined as follows: Initialize vertex attribute `idx`. Here, vertex attribute `idx` is a single-byte integer array pointing to the ASCII encoding portion in the VGA display buffer. Initialize vertex attribute `att`. Here, vertex attribute `att` is a single-byte integer array pointing to the character attribute portion in the VGA display buffer. Next, initialize the font texture. Here, the font texture is a 256-layer texture array, where the layer number corresponds to the ASCII encoding, and each layer of the texture array stores the pixel-based pattern of one character. Next, initialize the shader. Specifically, this can include the vertex shader (VS) passing vertex attribute `idx` and vertex attribute `att`, and the geometry shader (GS) using the primitive type: triangle stripes, calculating the position of the vertices of the generated character region on the screen based on the primitive ID, the size of a single character, and screen resolution information. Texture coordinates are set based on the calculated vertex positions, passing vertex attributes `idx` and `att`. The texture coordinates are specified as the four corners of the texture map and can be mapped to vertex attributes `idx`. The fragment shader (FS) samples the corresponding pixel raster pattern from the texture array based on the texture coordinates (e.g., sampling a pixel raster pattern whose layer number matches the vertex attribute `idx` mapped to the texture coordinates), and sets the color of the sampled character pattern according to the vertex attribute `att`, obtaining pixel raster data. When a preset conversion condition is met, the graphics processing pipeline defined in the graphics processor module for converting characters to pixel raster data can be invoked to convert the characters in the VGA display buffer into pixel raster data. For example, the conversion can be performed when the required characters for the entire screen are written into the VGA display buffer, indicating that the preset conversion condition has been met.

[0083] Furthermore, after the characters in the display buffer are converted into pixel dot matrix data, they can be transferred by the transfer controller (e.g., DMA controller) to the display memory area corresponding to the display controller. The display controller then transfers the display content in the display memory area to the display screen for display at a preset frequency.

[0084] In this embodiment of the invention, when a preset conversion condition is met, the graphics processor module is first invoked to convert the characters in the VGA display buffer into pixel matrix data. Then, the pixel matrix data is transmitted to the display memory area corresponding to the display controller; the display controller then transmits the pixel matrix data from the display memory area to the display screen at a preset frequency. This achieves character display in VGA mode, ensuring that the written content can be displayed correctly on the display screen.

[0085] Reference Figure 3 This shows a block diagram of a graphics processing device provided in an embodiment of the present invention, such as... Figure 3 As shown, the graphics processing device may specifically include: an endpoint controller 201, a recording response module 202, and a microcontroller module 203; The endpoint controller 201 is configured to forward the relevant request to the recording response module upon receiving a request related to the target display mode. The recording response module 202 is used to record the request information of the relevant request and send a specified interrupt signal to the microcontroller module; The microcontroller module 203 is configured to, in response to the specified interrupt signal, read the request information through the simulation service of the target display mode, and execute the operation indicated by the relevant request based on the request information.

[0086] Optionally, the recording response module 202 includes a preset register group; the recording response module 202 is specifically used for: Based on the read / write type of the relevant request, set the value of the read / write type register and the value of the write data register in the register group; Based on the memory access space type of the relevant request, set the value of the space type register in the register group; Based on the request size of the relevant request, set the value of the request size register in the register group; Based on the destination address carried in the relevant request, set the value of the address register in the register group.

[0087] Optionally, the microcontroller module 203 is specifically used for: Run the simulation service, and read the values ​​of the read / write type register, the write data register, the space type register, the request size register, and the address register through the simulation service as the request information.

[0088] Optionally, the recording response module 202 is further configured to set the valid bit register in the register group to a first value; the first value indicates that the recording response module has received a relevant request; The microcontroller module 203 is further configured to execute the steps of reading the values ​​of the read / write type register, the write data register, the space type register, the request size register, and the address register when the effective bit register is detected to be the first value through the simulation service.

[0089] Optionally, the target display mode is VGA mode; the microcontroller module 203 is further configured to: When the value of the read / write type register in the request information represents the write type, the address to be written is determined based on the value of the space type register and the address register in the request information, and the data to be written is determined based on the value of the request size register and the write data register in the request information. The data to be written is written to the address to be written; the address to be written belongs to the simulated VGA display buffer or the simulated VGA control register; When the value of the read / write type register in the request information represents the read type, the address to be read is determined based on the value of the space type register and the address register in the request information, and the data at the address to be read is read; the address to be read belongs to the simulated VGA display buffer or the VGA control register.

[0090] Optionally, when the data to be written is a character and the address to be written belongs to a simulated VGA display buffer, the microcontroller module 203 is further configured to: When the preset conversion conditions are met, the graphics processor module is invoked to convert the characters in the VGA display buffer into pixel dot matrix data; The pixel matrix data is transmitted to the display memory area corresponding to the display controller; the display controller is used to transmit the pixel matrix data in the display memory area to the display screen at a preset frequency.

[0091] Optionally, the microcontroller module 203 is further configured to: If the read / write type of the relevant request is write, the preset write response information will be used as the request / response information of the relevant request. If the read / write type of the relevant request is read, the request response information of the relevant request is generated based on the read data and the preset read response information. The request and response information of the relevant request is returned to the record response module; The recording response module is further configured to: send the request response information to the endpoint controller.

[0092] Optionally, the endpoint controller 201 is specifically configured to: for any request received by the endpoint controller, if the destination address of the request matches the address space of the target display mode, determine the request as the relevant request; Set the value of the first encoded information to the second value; the first encoded information is used to characterize whether the request is a relevant request. The relevant request and the first encoded information are synchronously sent to the on-chip bus; the on-chip bus is used to route the relevant request to the record response module when the first encoded information is a second value.

[0093] In summary, in the graphics processing device provided by this embodiment of the invention, when the endpoint controller receives a request related to a target display mode, it forwards the request to the recording and response module. The recording and response module records the request information of the request and sends a specified interrupt signal to the microcontroller module. The microcontroller module, in response to the specified interrupt signal, reads the request information through the simulation service of the target display mode and executes the operation indicated by the request based on the request information. In this embodiment of the invention, by setting up a recording and response module and reusing an existing microcontroller module, the recording and response module provides the microcontroller module with the request information required to process the request, and the simulation service in the microcontroller module executes the operation indicated by the request, thus realizing the processing of the request in a hardware-software collaborative manner. This achieves the processing of the request using existing hardware and software simulation. Since the newly added recording and response module only needs to record the request information, send the specified interrupt signal, and respond, the hardware circuit structure is simpler, the required hardware resources are less, and the microcontroller module is hardware inherent in the graphics processing device itself; therefore, the hardware implementation cost is lower.

[0094] Meanwhile, in this embodiment of the invention, there is no need to set the hardware circuit for the target display mode. Therefore, the verification workload in the chip design stage can be reduced, thereby reducing the probability of the hardware design schedule deviating from the expected progress and reducing hardware design risks.

[0095] Reference Figure 4 This is a schematic diagram of the structure of the electronic device provided in an embodiment of the present invention. For example... Figure 4 As shown, the electronic device includes: a processor, a memory, a communication interface, and a communication bus.

[0096] The processor, the memory, and the communication interface communicate with each other via the communication bus; the memory stores executable instructions, which cause the processor to execute the request processing method of the aforementioned embodiment. The executable instructions can form a program.

[0097] This invention provides a machine-readable medium storing instructions that, when executed by one or more processors, enable the processors to perform the request processing method described in the foregoing embodiments. The machine-readable medium may be one or more processors.

[0098] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0099] Those skilled in the art will understand that embodiments of the present invention can be provided as methods, apparatus, or computer program products. Therefore, embodiments of the present invention can take the form of entirely hardware embodiments, entirely software embodiments, or embodiments combining software and hardware aspects. Furthermore, embodiments of the present invention can take the form of computer program products implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code.

[0100] It should be noted that all actions involving the acquisition of signals, information, or data in this application are carried out in compliance with the relevant data protection laws and policies of the country where the application is located, and with the authorization granted by the owner of the relevant device.

[0101] Embodiments of the present invention are described with reference to flowchart illustrations and / or block diagrams of methods, terminal devices (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and / or block diagrams, and combinations of blocks in the flowchart illustrations and / or block diagrams, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, special-purpose computer, embedded processor, or other programmable data processing terminal device to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing terminal device, generate instructions for implementing the flowchart illustrations and / or block diagrams. Figure 1 One or more processes and / or boxes Figure 1 A device that provides the functions specified in one or more boxes.

[0102] These computer program instructions may also be stored in a computer-readable storage medium capable of directing a computer or other programmable data processing terminal device to operate in a predictive manner, such that the instructions stored in the computer-readable storage medium produce an article of manufacture including instruction means, which are implemented in a process Figure 1 One or more processes and / or boxes Figure 1 The function specified in one or more boxes.

[0103] These computer program instructions can also be loaded onto a computer or other programmable data processing terminal equipment, causing a series of operational steps to be performed on the computer or other programmable terminal equipment to produce a computer-implemented process, thereby providing instructions that execute on the computer or other programmable terminal equipment for implementing the process. Figure 1 One or more processes and / or boxes Figure 1The steps of the function specified in one or more boxes.

[0104] Although preferred embodiments of the present invention have been described, those skilled in the art, upon learning the basic inventive concept, can make other changes and modifications to these embodiments. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments as well as all changes and modifications falling within the scope of the embodiments of the present invention.

[0105] Finally, it should be noted that in this paper, relational terms such as first and second are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations.

[0106] Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or terminal device that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or terminal device. Without further limitation, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or terminal device that includes said element.

[0107] The above provides a detailed description of a request processing method, a graphics processing device, an electronic device, and a readable medium provided by the present invention. Specific examples have been used to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only for the purpose of helping to understand the method and core ideas of the present invention. At the same time, for those skilled in the art, there will be changes in specific implementation methods and application scope based on the ideas of the present invention. Therefore, the content of this specification should not be construed as a limitation of the present invention.

Claims

1. A request processing method, characterized in that, The method, applied to a graphics processing device including an endpoint controller, a recording response module, and a microcontroller module, comprises: Upon receiving a request related to the target display mode, the endpoint controller forwards the request to the recording response module. The recording response module records the request information of the relevant request and sends a specified interrupt signal to the microcontroller module; In response to the specified interrupt signal, the microcontroller module reads the request information through the simulation service of the target display mode and executes the operation indicated by the relevant request based on the request information.

2. The method according to claim 1, characterized in that, The recording response module includes a preset register group; the request information recorded by the recording response module for the relevant request includes: The recording response module sets the value of the read / write type register and the value of the write data register in the register group based on the read / write type of the relevant request; The recording response module sets the value of the space type register in the register group based on the memory space type of the relevant request; The recording response module sets the value of the request size register in the register group based on the request size of the relevant request; The record response module sets the value of the address register in the register group based on the destination address carried in the relevant request.

3. The method according to claim 2, characterized in that, The step of reading the request information through the simulation service of the target display mode includes: Run the simulation service, and read the values ​​of the read / write type register, the write data register, the space type register, the request size register, and the address register through the simulation service as the request information.

4. The method according to claim 3, characterized in that, The method further includes: The recording response module sets the valid bit register in the register group to a first value; the first value indicates that the recording response module has received a relevant request; When the simulation service detects that the valid bit register is the first value, it executes the steps of reading the values ​​of the read / write type register, the write data register, the space type register, the request size register, and the address register.

5. The method according to claim 1, characterized in that, The target display mode is VGA mode; the execution of the operation indicated by the relevant request based on the request information includes: When the value of the read / write type register in the request information represents the write type, the address to be written is determined based on the value of the space type register and the address register in the request information, and the data to be written is determined based on the value of the request size register and the write data register in the request information. The data to be written is written to the address to be written; the address to be written belongs to the simulated VGA display buffer or the simulated VGA control register; When the value of the read / write type register in the request information represents the read type, the address to be read is determined based on the value of the space type register and the address register in the request information, and the data at the address to be read is read; the address to be read belongs to the simulated VGA display buffer or the VGA control register.

6. The method according to claim 5, characterized in that, When the data to be written is a character and the address to be written belongs to a simulated VGA display buffer, the method further includes: When the preset conversion conditions are met, the graphics processor module is invoked to convert the characters in the VGA display buffer into pixel dot matrix data; The pixel matrix data is transmitted to the display memory area corresponding to the display controller; the display controller is used to transmit the pixel matrix data in the display memory area to the display screen at a preset frequency.

7. The method according to any one of claims 1 to 6, characterized in that, The method further includes: If the read / write type of the relevant request is write, the preset write response information will be used as the request / response information of the relevant request. If the read / write type of the relevant request is read, the request response information of the relevant request is generated based on the read data and the preset read response information. The microcontroller module returns the request and response information of the relevant request to the recording and response module; The request response information is sent from the record response module to the endpoint controller.

8. The method according to any one of claims 1 to 6, characterized in that, The method further includes: for any request received by the endpoint controller, if the destination address of the request matches the address space of the target display mode, the endpoint controller determines the request as the relevant request; The step of forwarding the relevant request to the record response module includes: Set the value of the first encoded information to the second value; the first encoded information is used to characterize whether the request is a relevant request. The relevant request and the first encoded information are synchronously sent to the on-chip bus; the on-chip bus is used to route the relevant request to the record response module when the first encoded information is a second value.

9. A graphics processing device, characterized in that, This includes an endpoint controller, a log response module, and a microcontroller module; The endpoint controller is configured to forward the relevant request to the recording response module upon receiving a request related to the target display mode. The recording response module is used to record the request information of the relevant request and send a specified interrupt signal to the microcontroller module; The microcontroller module is configured to, in response to the specified interrupt signal, read the request information through the simulation service of the target display mode, and execute the operation indicated by the relevant request based on the request information.

10. An electronic device, characterized in that, include: The processor, memory, communication interface, and communication bus are provided, wherein the processor, memory, and communication interface communicate with each other via the communication bus. The memory is used to store executable instructions that cause the processor to perform the method as described in any one of claims 1 to 8.

11. A machine-readable medium, characterized in that, It stores instructions that, when executed by one or more processors, cause the processors to perform the method as described in any one of claims 1 to 8.

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