A multi-layer nonlinear optical neural network computing system based on linear signal recoding
By designing a linear computing region, a recoding region, and a high-speed modulation region on an optical computing chip, and combining them with a feedback loop, a multi-layer nonlinear optical neural network is constructed. This solves the problem of balancing all-optical nonlinearity, CMOS compatibility, and low-power high-speed processing in existing technologies, and achieves efficient optical neural network computing.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- ZJU HANGZHOU GLOBAL SCI & TECH INNOVATION CENT
- Filing Date
- 2026-05-07
- Publication Date
- 2026-06-05
AI Technical Summary
Existing integrated optical neural networks struggle to balance all-optical nonlinearity, CMOS compatibility, and low-power, high-speed processing, limiting their application in real-world scenarios.
By integrating the linear computing region, linear recoding region, and high-speed modulation region on an optical computing chip, and combining feedback loops to achieve time dimension multiplexing of a single hidden layer, a multi-layer nonlinear optical neural network is constructed. Purely linear devices are used to simulate nonlinear activation functions, avoiding photoelectric conversion and heterogeneous materials.
It achieves low-power, highly integrated multilayer nonlinear optical neural network computing, improving computing accuracy and flexibility, reducing hardware costs, and possessing the advantages of miniaturization and easy system integration.
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Figure CN122154797A_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of optical neural network computing technology, specifically relating to a multi-layer nonlinear optical neural network computing system based on linear signal recoding. Background Technology
[0002] Optical Neural Networks (ONNs) are considered a key technology for overcoming the computational bottleneck of traditional electrical chips due to their high-speed parallelism and low-power characteristics. Integrated ONN chips, which utilize optical waveguides to transmit signals, offer advantages such as high integration, low power consumption, and CMOS compatibility, making them a highly promising implementation method for ONNs. Currently, the implementation schemes of integrated ONN chips are mainly based on Mach-Zehnder interferometer networks or micro-ring resonator arrays, capable of accurately performing linear transformations such as matrix multiplication, as well as operations such as weight adjustment and filtering. However, these devices can only perform linear transformation operations and cannot meet the computational requirements of nonlinear layers in neural networks, thus limiting the model's expressive power.
[0003] To realize integrated optical neural network systems with nonlinear capabilities, existing technologies mainly fall into two categories. One approach employs a hybrid optoelectronic architecture: linear operations are performed in the optical domain, followed by photoelectric conversion to obtain an electrical signal, which is then used to implement nonlinear functions in the electrical domain. While this approach can achieve complete neural network functionality, the frequent photoelectric / electro-optical conversion processes often introduce high energy losses. Furthermore, the overall signal processing speed of the system is limited by the electrical chip, failing to fully utilize the high-speed parallel characteristics of optical computing. Moreover, multiple analog-to-digital and digital-to-analog conversions can easily introduce noise and sampling errors, reducing computational accuracy and limiting its application in precision-sensitive scenarios such as scientific computing.
[0004] Another approach is the all-optical nonlinear scheme: directly realizing the nonlinear activation function by utilizing the nonlinear processes inherent in the material itself. Researchers have explored various physical mechanisms; taking silicon-based platforms as an example, silicon's third-order nonlinear coefficient is only 10. -14 m 2 On the order of / W, it is difficult to achieve high-performance nonlinear functions. Some high-performance nonlinear materials, such as lithium niobate and III-V semiconductor materials, can achieve nonlinear processes with good performance, but the manufacturing processes of these materials are incompatible with CMOS processes. The introduction of heterogeneous materials also greatly increases manufacturing costs and yield risks, further weakening system performance.
[0005] Both of these technical approaches face common bottlenecks in practical system construction: the multiple domain transitions in optoelectronic hybrid architectures and the weak nonlinear coefficients in all-optical material schemes make it difficult to achieve a balance between scalability, energy efficiency, and computational accuracy. Furthermore, existing solutions often require complex peripheral control circuits or stringent optical power conditions, limiting their potential for large-scale integration and practical application.
[0006] In summary, existing integrated optical neural networks still struggle to simultaneously meet core requirements such as high speed, low power consumption, and all-optical nonlinearity, severely limiting their application in practical scenarios. Therefore, exploring a nonlinear implementation mechanism that can maintain the advantages of all-optical processing without relying on weakly nonlinear materials or complex heterogeneous integration has become crucial to breaking through the current bottlenecks in the development of optical neural networks. Summary of the Invention
[0007] In view of the above, the purpose of this invention is to provide a multi-layer nonlinear optical neural network computing system based on linear signal recoding. By integrating the linear computing region, linear recoding region and high-speed modulation region on the optical computing chip in a coordinated design, and combining feedback loops to realize the time dimension multiplexing of a single hidden layer, a compact multi-layer nonlinear optical neural network with nonlinear functions is realized, opening up a new path for the practical application of photonic computing.
[0008] To achieve the above-mentioned objectives, the present invention provides the following technical solution: In a first aspect, the present invention provides a multilayer nonlinear optical neural network computing system based on linear signal recoding, comprising: a control circuit and an optical processing chip system; The control circuit is used to load the input signal and read the output result; The optical processing chip system includes a light source, an integrated optical computing chip, and a detector. The optical carrier emitted by the light source is modulated by the input signal to generate an input optical signal. The input optical signal undergoes multi-layer nonlinear activation processing on the integrated optical computing chip through a linear calculation area, a linear recoding area, and a high-speed modulation area. The detector then reads the output result and returns it to the control circuit.
[0009] Preferably, the integrated optical computing chip includes an input layer, N (N≥1) hidden layers, and an output layer; The input layer is used to load the input signal onto the optical carrier to modulate and generate the input optical signal; The N hidden layers are used to implement multi-layer nonlinear activation processing. Each hidden layer includes a linear computation region, a linear recoding region, and a high-speed modulation region. The linear computation region is used to perform a linear transformation on the input optical signal of the current layer and output it to the linear recoding region. The linear recoding region is used to perform weighted fusion of the received linear transformation result and the original input optical signal to generate a fused optical signal. The high-speed modulation region modulates the fused optical signal according to a pseudo-random sequence to jointly simulate the function of the nonlinear activation function. The output layer is used to output the optical signal processed by the hidden layer to the detector.
[0010] Preferably, the N hidden layers are time-multiplexed through a feedback loop of a single physical layer to achieve cyclic processing; the feedback loop includes a feedback waveguide disposed between the output and input ends of the hidden layer, which is used to reroute the optical signal processed by the linear computation region, the linear recoding region and the high-speed modulation region to the input end of the linear computation region of the hidden layer for cyclic calculation at the next level.
[0011] Preferably, the linear computation region includes a static weight part and a dynamic weight part. The weight of the static weight part remains unchanged in the multi-layer loop computation, while the weight of the dynamic weight part is dynamically adjusted layer by layer through the high-speed modulation region and the delay line, so as to jointly increase the complexity of the nonlinear optical neural network structure with the assistance of the linear recoding region.
[0012] Preferably, the linear computation region is implemented using a reconfigurable Mach-Zehnder interferometer array, which is used to configure weighting coefficients through thermo-optical tuning or electro-optical tuning.
[0013] Preferably, the linear recoding region is implemented using a tunable optical coupler array, which is used to multiply and accumulate the amplitude of the output optical signal of the linear computation region with the amplitude of the original input optical signal and modulate and superimpose their phases.
[0014] Preferably, the high-speed modulation region is implemented using a micro-ring resonator high-speed modulator or a Mach-Zehnder high-speed modulator. Its optical input end is connected to the output end of the linear recoding region, and its electrical modulation end is connected to the pseudo-random sequence output end of the control circuit. The control circuit dynamically adjusts the pseudo-random sequence according to different neural network weight configurations to achieve intensity and phase modulation of the optical signal.
[0015] Preferably, the control circuit further includes a real-time monitoring and calibration module, which monitors the intensity of the light signal output by the detector and dynamically adjusts the power of the light source, the weighting coefficient of the linear calculation area, or the coupling coefficient of the recoding area according to the monitoring results, so as to compensate for the effects of changes in ambient temperature or process deviations.
[0016] Secondly, embodiments of the present invention also provide a multilayer nonlinear optical neural network computation method based on linear signal recoding, implemented using the aforementioned multilayer nonlinear optical neural network computation system based on linear signal recoding, comprising the following steps: S1, the control circuit loads the input signal and obtains the input optical signal after being modulated by the light source, which then enters the input layer of the integrated optical computing chip; S2, the input optical signal undergoes linear transformation in the linear computing region of the integrated optical computing chip; S3, the linear transformation result enters the linear recoding region of the integrated optical computing chip, and is optically domain weighted and fused with the original input optical signal to obtain the fused optical signal, thus completing the nonlinear transformation; S4, the fused optical signal enters the high-speed modulation region and is modulated according to the pseudo-random sequence to complete the nonlinear activation processing of the current layer; S5, the optical signal processed in step S4 is re-inputted into the linear computing area of the integrated optical computing chip through the feedback loop, and steps S2-S4 are repeated until the preset number of cyclic calculations are completed. S6. After the loop calculation is completed, the optical signal is sent to the detector through the output layer of the integrated optical computing chip, and the control circuit reads and parses the calculation result.
[0017] Compared with the prior art, the beneficial effects of the present invention include at least the following: (1) This invention uses a linear recoding region to weight and fuse the current layer output with the original input signal, and combines it with a high-speed modulation region to perform modulation based on a pseudo-random sequence, thereby realizing the simulation of nonlinear activation functions by a chip composed of purely linear devices, breaking through the bottleneck of traditional optical neural networks that are difficult to integrate nonlinear functions.
[0018] (2) This invention reroutes the output of a single hidden layer to its input through a feedback loop, thereby achieving multi-layer computation reuse in the time dimension. As the photon loss of the chip decreases, the number of loops can be increased accordingly, thus effectively improving the network depth and the number of effective network nodes without significantly expanding the hardware scale, providing a scalable hardware implementation scheme for building large-scale optical neural networks.
[0019] (3) The present invention realizes an all-optical domain computing architecture based on an integrated optical computing chip. The signal does not need to undergo frequent photoelectric / electro-optical conversion during multi-layer processing, avoiding energy loss and speed bottleneck caused by conversion. Compared with traditional electrical chips, it has higher computing accuracy and stronger flexibility.
[0020] (4) The present invention integrates the optical processing chip system and the control circuit on the same platform. The core components are all fabricated using CMOS compatible technology, and the number of physical layers is reduced by time reuse, which significantly reduces the chip area and hardware cost. It has the advantages of miniaturization, mass production and easy system integration. Attached Figure Description
[0021] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0022] Figure 1 This is a schematic diagram of the structure of a multilayer nonlinear optical neural network computing system based on linear signal recoding provided in an embodiment of the present invention; Figure 2 This is a schematic diagram of the unfolded architecture of a multi-layer neural network based on an integrated optical computing chip provided in an embodiment of the present invention; Figure 3 This is a network diagram illustrating chip reuse using a feedback loop, provided in an embodiment of the present invention. Figure 4 This is a schematic diagram of the implementation scheme of the integrated optical computing chip provided in the embodiment of the present invention; Figure 5 This is a simulation result diagram of a nonlinear dataset by a multilayer nonlinear optical neural network computing system based on linear signal recoding, provided in an embodiment of the present invention. Figure 6 This is a flowchart illustrating the multilayer nonlinear optical neural network computation method based on linear signal recoding provided in an embodiment of the present invention. Detailed Implementation
[0023] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the invention and do not limit the scope of protection of this invention.
[0024] The inventive concept of this invention is as follows: Addressing the problem in existing technologies where integrated optical neural networks struggle to simultaneously achieve all-optical nonlinearity, CMOS compatibility, and low-power, high-speed processing, this invention provides a multi-layer nonlinear optical neural network computing system based on linear signal recoding. By cascading a linear recoding region and a high-speed modulation region after the linear computation region, the current layer output and the original input optical signal are weighted and fused, and then modulated using a high-speed pseudo-random sequence. This simulates a nonlinear activation function using purely linear devices. Simultaneously, a feedback loop is used to achieve cyclic reuse of a single hidden layer in the time dimension, constructing a deep network architecture without increasing the number of physical layers. The entire system is implemented using CMOS-compatible technology, eliminating reliance on intrinsic material nonlinearity effects or photoelectric conversion. Thus, while maintaining the advantages of all-optical high-speed parallel processing, it achieves low-power, high-integration optical neural network computing with strong nonlinear expression capabilities.
[0025] like Figure 1 As shown, this embodiment provides a multi-layer nonlinear optical neural network computing system based on linear signal recoding, including a control circuit and an optical processing chip system. The control circuit is used to load the input signal and read the output result. The optical processing chip system includes a light source, an integrated optical computing chip, and a detector. The optical carrier emitted by the light source is modulated by the input signal to generate an input optical signal. The input optical signal undergoes multi-layer nonlinear activation processing on the integrated optical computing chip through a linear computation region, a linear recoding region, and a high-speed modulation region. The detector then reads the output result and returns it to the control circuit.
[0026] The integrated optical computing chip serves as the core processing unit of the system, used to receive and execute multilayer nonlinear optical calculations on the input optical signal. Layered unfolding architecture such as Figure 2 As shown, it includes five core network components: 1: Input layer ( 2: Linear computation region (representing input information vector) 3: Linear recoding region (representing linear matrix vectors) 4: High-speed modulation region (representing repeated input information vector) 5: Output layer (representing high-speed pseudo-random sequences) (Represents the output matrix vector). To achieve multi-layer network computation, feedback loops are added at both ends of the linear computation region, high-speed modulation region, and linear recoding region. By reusing the time dimension of a single-layer neural network containing linear and nonlinear functions, multi-layer computation of deep neural networks is realized, such as... Figure 3 As shown.
[0027] In this embodiment, the input layer uses a Mach-Zehnder interferometer array to perform linear mapping and optical encoding on the input signal, thereby loading the original data from the electrical domain input onto the optical carrier and completing preliminary feature transformation. Since both the amplitude and phase of the optical carrier can be encoded, the input information vector of the input layer... As a complex vector, the space for information encoding is improved compared to traditional real-field computation.
[0028] In this embodiment, the linear computation region is implemented using a Mach-Zehnder interferometer array with square or triangular topology, used to perform weighted summation and linear transformation operations in the hidden layers of the neural network. The linear computation region and the input layer are connected and coupled using waveguides. The signal encoded by the input layer is further subjected to linear matrix-vector multiplication operations in the linear computation region, i.e. The optical weight of this region Arbitrary unitary matrix encoding of complex numbers can be achieved by programming configuration using thermo-optical or electro-optical tuning methods with Mach-Zehnder interferometer arrays of square or triangular topologies.
[0029] In this embodiment, the linear recoding region uses a Mach-Zehnder interferometer array to repeatedly encode the input information, achieving a weighted fusion of the linear transformation result of the current layer and the original input optical signal in the optical domain, thus simulating the function of a nonlinear activation function. This region recodes the results of the aforementioned linear calculation region, and the loaded vector values... With the input vector of the input layer Numerical consistency is maintained. Weighted fusion involves optical multiplication and addition, implemented via tunable optical couplers or waveguide cross arrays. Through recoding operations, the input information participates again in the network's computation, introducing higher-order terms of the input signal, thus simulating nonlinear activation functions.
[0030] In this embodiment, the high-speed modulation region is implemented using a micro-ring resonator high-speed modulator or a Mach-Zehnder high-speed modulator, used for high-speed encoding and nonlinear modulation of the time-series signal. This region is a key module for realizing the dynamic response of the neuron activation function. The aforementioned linear recoding region introduces higher-order terms of the input signal, thereby achieving nonlinearity. Its nonlinear response has a certain correlation between higher-order terms. By adding the high-speed modulation region, the higher-order terms are decoupled, thereby achieving a richer nonlinear expression.
[0031] In this embodiment, the output layer performs a linear mapping on the calculation results of the multilayer network using a Mach-Zehnder interferometer array, transforming the high-dimensional optical field information into a form suitable for detector reading. This information can be received and read using a direct photoelectric conversion detector, which is equivalent to performing a modulus-square operation on a complex number. Alternatively, balanced zero-beat detectors can be used to read the real and imaginary parts of the complex output signal, respectively.
[0032] Multilayer networks are implemented by time-multiplexing single-layer networks through optical feedback loops. Specifically, after completing one linear computation-modulation-recoding process, the optical signal is re-inputted to the linear computation region entrance via a feedback waveguide for the next level of computation. Considering the transmission and coupling losses of photons, the splitting ratio of the output and feedback signals needs to be optimized to dynamically adjust the proportion of each network's output in the total signal, ensuring the signal-to-noise ratio and dynamic range of the multilayer computation. In this process, insufficient feedback signals limit the number of layers and result in insufficient equivalent depth; conversely, weak output signals affect the final readout signal-to-noise ratio. Taking into account factors such as losses and detector response, calculations show that a feedback signal strength ratio of 90:10 results in a deeper network and the best performance.
[0033] Furthermore, the high-speed modulation zone needs to achieve precise encoding and modulation of the timing signal. To ensure that the optical signal fed back in each cycle is strictly synchronized with the modulation timing of the modulator and that there is no crosstalk between them, a 6: delay line needs to be added to the feedback loop. The delay line is implemented using a spiral optical waveguide structure. By precisely designing the waveguide length, the transmission delay of the optical signal is matched with the modulation period of the modulator, ensuring that the signal in each cycle can accurately fall within the corresponding modulation time slot window. Specifically, this can be achieved by calculating the refractive index of the optical waveguide group. Waveguide length This causes delay in optical signal transmission. Less than the modulation period of the modulator The waveguide length can be calculated using this formula, i.e. Considering the relatively long on-chip centimeter-level delay lines, a helical waveguide structure can be used. Attention should be paid to the design of the bending radius and bending profile. Additional bending losses can be reduced by using Euler bending and increasing the bending radius.
[0034] In practical implementation, the chip layout design follows the aforementioned network architecture, mainly including: an input layer composed of Mach-Zehnder interferometers, a linear computation area, and a linear recoding area; a high-speed modulation area composed of high-speed micro-rings or Mach-Zehnder interferometers; delay line units composed of helical waveguide structures; and auxiliary functional units such as optical input / output coupling structures, electrical tuning electrode arrays, and thermoelectric electrode arrays. Figure 4As shown, the input layer is cascaded with the linear recoding region and the linear computation region. The output layer adjusts the output ratio of a single-layer network through different coupling ratios. Considering hardware factors such as loss and detector response, the feedback signal strength is set to 90:10 compared to the output signal strength. In this architecture, a high-speed modulation region and a matching delay line are introduced between the front end of the linear computation region and the back end of the output layer to achieve independent adjustment of single-layer network parameters and inter-layer signal reconstruction. Although the linear recoding region can introduce nonlinear expressions, there is an inherent statistical correlation between the high-order polynomial terms it generates. This correlation limits the network's ability to fit complex functions and leads to information coupling between layers. To overcome this limitation, mutually orthogonal pseudo-random sequences can be injected into the cyclic signals of each layer of the network through the high-speed modulation region. A pseudo-random sequence is a periodic binary sequence (such as an m-sequence or a Gold sequence) with deterministic statistical characteristics similar to white noise. It is generated by deterministic algorithms such as linear feedback shift registers (LFSRs) and has good autocorrelation peaks and extremely low cross-correlation. Its core components include: the generator polynomial of the sequence, the initial seed, the sequence length (period), and the chip rate. In practice, each layer of the network is assigned a different orthogonal pseudo-random code. Before the signal completes a layer's computation and is ready to be fed back to the next layer, the high-speed modulator multiplies (modulates) the layer's dedicated pseudo-random code with the optical signal. Since the cross-correlation between the pseudo-random codes of different layers is close to zero, the receiver (or the input of the next layer) can effectively distinguish signal components from different layers through matched filtering or correlation detection. This process physically decouples the layers, suppresses redundant information transmission caused by the correlation of the recoded polynomial, and thus significantly improves the overall network's effective nonlinear expression capability and information processing capacity.
[0035] In one embodiment, the first chip fabrication platform is an SOI (Silicon-on-Insulator) material platform, which adopts a three-layer structure: a top layer of single-crystal silicon (device layer), a middle layer of buried silicon dioxide, and a bottom layer of silicon substrate. This platform possesses mature CMOS-compatible technology, enabling monolithic integration of low-loss passive devices and high-speed active modulation devices, meeting the requirements of large-scale, high-density photonic integration. The overall chip structure includes the following functional blocks: a linear computation region: composed of a Mach-Zehnder interferometer (MZI) array, micro-ring resonators, or directional couplers, performing matrix-vector multiplication; a nonlinear recoding region: based on the Mach-Zehnder interferometer array, introducing input signal recoding; a high-speed modulation region: used to inject pseudo-random sequences to achieve interlayer decoupling; a delay line: a helical waveguide structure used for timing matching; and a feedback waveguide network: transmitting the output signal back to the input, forming a time-multiplexed loop. All devices are implemented on the same SOI chip, with no discrete optical components.
[0036] Specifically, an SOI standard wafer is used, with a top layer of single-crystal silicon thickness of 220nm±10nm, a middle layer of buried oxide silicon dioxide thickness of 2μm±0.1μm, and a bottom layer of silicon substrate thickness of 725μm. The process flow is based on standard silicon photonics lines (such as IMEC, CUMEC, AMF, etc.), and the key steps are as follows: 1. Substrate preparation, using an 8-inch SOI wafer; 2. Active region doping, forming the pn junction or pin structure required for the modulator through ion implantation; 3. Waveguide pattern definition, forming waveguides, multimode interferometers (MMIs), grating couplers, etc., through 193nm deep ultraviolet lithography; 4. Dry etching, etching the silicon layer using inductively coupled plasma reactive ion etching (ICP-RIE) to form ridge or strip waveguides; 5. Oxide layer deposition, depositing a silicon dioxide cladding layer with a thickness of 1.5-2μm using plasma-enhanced chemical vapor deposition (PECVD); 6. Contact hole opening, etching the oxide layer to expose the doped region for electrode connection; 7. Metal electrode fabrication, sputtering TiN or AlCu alloy, and peeling or etching to form heating and modulation electrodes; 8. Annealing treatment, rapid thermal annealing to activate the doped ions; 9. End face polishing / etching to form chip end face or etch grating coupler.
[0037] In another embodiment, the second chip fabrication platform is a thin-film lithium niobate or thin-film lithium tantalate platform, which consists of a top single-crystal lithium niobate (or lithium tantalate) thin film (device layer), an intermediate low-refractive-index buffer layer (such as... The chip consists of a thin-film platform and a bottom silicon substrate. Compared with traditional bulk lithium niobate devices, the thin-film platform significantly improves the electro-optic interaction efficiency through strong optical field confinement, achieving low-voltage, high-bandwidth optical modulation. Simultaneously, the platform possesses low transmission loss characteristics, making it suitable for constructing high-fidelity deep optical neural networks. The overall chip structure includes the following functional modules: Linear computation region: a thin-film lithium niobate waveguide MZI array, performing matrix-vector multiplication and weighted summation; Nonlinear activation region: a lithium niobate-based electromodulation unit, introducing input signal recoding; High-speed modulation region: a thin-film lithium niobate traveling wave modulator, injecting pseudo-random sequences to achieve interlayer decoupling; Delay line: a high-Q spiral waveguide or micro-ring resonator for timing matching and optical buffering; Feedback network: a low-loss bent waveguide signal feedback, forming a time-multiplexed loop. All functional devices are monolithically integrated on the same thin-film substrate.
[0038] Specifically, the fabrication of the thin-film lithium niobate / lithium tantalate platform is based on wafer bonding + thinning or ion slicing technology, compatible with standard micro / nano fabrication processes. Substrate fabrication includes the following processes: 1. Ion implantation, implanting ions into the lithium niobate bulk wafer. or 1. Ions; 2. Wafer bonding, connecting the implanted surface to the band 3. Silicon substrate bonding of the buffer layer; 4. Peeling / thinning, removing excess material by thermal peeling or chemical mechanical polishing; 5. Surface planarization, achieving atomic-level flatness through chemical mechanical polishing (CMP). The device fabrication process is compatible with micro / nano fabrication processes and will not be elaborated upon.
[0039] Ultimately, a multi-layer nonlinear optical neural network computing system built upon integrated optical computing chips can achieve nonlinear classification tasks, such as... Figure 5 As shown, a nonlinear dataset classification task was implemented on circular and hyperbolic datasets, achieving a classification accuracy exceeding 97.2%, demonstrating the nonlinear expressive power of this invention. Furthermore, it can perform computational tasks including, but not limited to, the following types: solving typical pattern recognition and classification problems (such as image recognition and signal classification); solving complex combinatorial optimization problems (such as graph theory problems, maximum cut problems, and traveling salesman problems); and other machine learning tasks requiring the nonlinear mapping capabilities of deep neural networks.
[0040] Based on the same inventive concept, such as Figure 6 As shown, this embodiment of the invention also provides a multilayer nonlinear optical neural network computation method based on linear signal recoding, including the following steps: S1, the control circuit loads the input signal and obtains the input optical signal after being modulated by the light source, which then enters the input layer of the integrated optical computing chip; S2, the input optical signal undergoes linear transformation in the linear computing region of the integrated optical computing chip; S3, the linear transformation result enters the linear recoding region of the integrated optical computing chip, and is optically domain weighted and fused with the original input optical signal to obtain the fused optical signal, thus completing the nonlinear transformation; S4, the fused optical signal enters the high-speed modulation region and is modulated according to the pseudo-random sequence to complete the nonlinear activation processing of the current layer; S5, the optical signal processed in step S4 is re-inputted into the linear computing area of the integrated optical computing chip through the feedback loop, and steps S2-S4 are repeated until the preset number of cyclic calculations are completed. S6. After the loop calculation is completed, the optical signal is sent to the detector through the output layer of the integrated optical computing chip, and the control circuit reads and parses the calculation result.
[0041] It should be noted that the multilayer nonlinear optical neural network computing method based on linear signal recoding provided in the above embodiments belongs to the same inventive concept as the multilayer nonlinear optical neural network computing system based on linear signal recoding. For details of its specific implementation process, please refer to the embodiments of the multilayer nonlinear optical neural network computing system based on linear signal recoding, which will not be repeated here.
[0042] The specific embodiments described above illustrate the technical solution and beneficial effects of the present invention in detail. It should be understood that the above description is only the most preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, additions, and equivalent substitutions made within the scope of the principles of the present invention should be included within the protection scope of the present invention.
Claims
1. A multilayer nonlinear optical neural network computing system based on linear signal recoding, characterized in that, include: Control circuitry and optical processing chip system; The control circuit is used to load the input signal and read the output result; The optical processing chip system includes a light source, an integrated optical computing chip, and a detector. The optical carrier emitted by the light source is modulated by the input signal to generate an input optical signal. The input optical signal undergoes multi-layer nonlinear activation processing on the integrated optical computing chip through a linear calculation area, a linear recoding area, and a high-speed modulation area. The detector then reads the output result and returns it to the control circuit.
2. The multilayer nonlinear optical neural network computing system based on linear signal recoding according to claim 1, characterized in that, The integrated optical computing chip includes an input layer, N hidden layers, and an output layer; The input layer is used to load the input signal onto the optical carrier to modulate and generate the input optical signal; The N hidden layers are used to implement multi-layer nonlinear activation processing. Each hidden layer includes a linear computation region, a linear recoding region, and a high-speed modulation region. The linear computation region is used to perform a linear transformation on the input optical signal of the current layer and output it to the linear recoding region. The linear recoding region is used to perform weighted fusion of the received linear transformation result and the original input optical signal to generate a fused optical signal. The high-speed modulation region modulates the fused optical signal according to a pseudo-random sequence to jointly simulate the function of the nonlinear activation function. The output layer is used to output the optical signal processed by the hidden layer to the detector.
3. The multilayer nonlinear optical neural network computing system based on linear signal recoding according to claim 2, characterized in that, The N hidden layers are time-multiplexed through a feedback loop of a single physical layer to achieve cyclic processing; the feedback loop includes a feedback waveguide disposed between the output and input of the hidden layer, which is used to reroute the optical signal processed by the linear computation region, the linear recoding region and the high-speed modulation region to the input of the linear computation region of the hidden layer for cyclic calculation at the next level.
4. The multilayer nonlinear optical neural network computing system based on linear signal recoding according to claim 1 or 2, characterized in that, The linear computation region includes a static weight part and a dynamic weight part. The weights of the static weight part remain unchanged in the multi-layer loop computation, while the weights of the dynamic weight part are dynamically adjusted layer by layer through the high-speed modulation region and the delay line, so as to jointly increase the complexity of the nonlinear optical neural network structure with the assistance of the linear recoding region.
5. The multilayer nonlinear optical neural network computing system based on linear signal recoding according to claim 1 or 2, characterized in that, The linear computation region is implemented using a reconfigurable Mach-Zehnder interferometer array, which is used to configure weighting coefficients through thermo-optical tuning or electro-optical tuning.
6. The multilayer nonlinear optical neural network computing system based on linear signal recoding according to claim 1 or 2, characterized in that, The linear recoding region is implemented using a tunable optical coupler array, which is used to multiply and accumulate the amplitude of the output optical signal of the linear computation region with the amplitude of the original input optical signal, and modulate and superimpose the phases of the two.
7. The multilayer nonlinear optical neural network computing system based on linear signal recoding according to claim 1 or 2, characterized in that, The high-speed modulation region is implemented using a micro-ring resonator high-speed modulator or a Mach-Zehnder high-speed modulator. Its optical input is connected to the output of the linear recoding region, and its electrical modulation is connected to the pseudo-random sequence output of the control circuit. The control circuit dynamically adjusts the pseudo-random sequence according to different neural network weight configurations to achieve intensity and phase modulation of the optical signal.
8. The multilayer nonlinear optical neural network computing system based on linear signal recoding according to claim 1, characterized in that, The control circuit also includes a real-time monitoring and calibration module, which monitors the intensity of the light signal output by the detector and dynamically adjusts the power of the light source, the weighting coefficient of the linear calculation area, or the coupling coefficient of the recoding area based on the monitoring results to compensate for the effects of changes in ambient temperature or process deviations.
9. A multilayer nonlinear optical neural network computation method based on linear signal recoding, implemented using the multilayer nonlinear optical neural network computation system based on linear signal recoding as described in any one of claims 1 to 8, characterized in that, Includes the following steps: S1, the control circuit loads the input signal and obtains the input optical signal after being modulated by the light source, which then enters the input layer of the integrated optical computing chip; S2, the input optical signal undergoes linear transformation in the linear computing region of the integrated optical computing chip; S3, the linear transformation result enters the linear recoding region of the integrated optical computing chip, and is optically domain weighted and fused with the original input optical signal to obtain the fused optical signal, thus completing the nonlinear transformation; S4, the fused optical signal enters the high-speed modulation region and is modulated according to the pseudo-random sequence to complete the nonlinear activation processing of the current layer; S5, the optical signal processed in step S4 is re-inputted into the linear computing area of the integrated optical computing chip through the feedback loop, and steps S2-S4 are repeated until the preset number of cyclic calculations are completed. S6. After the loop calculation is completed, the optical signal is sent to the detector through the output layer of the integrated optical computing chip, and the control circuit reads and parses the calculation result.