Inductive component, inductive module and power module

Abstract

The embodiments of the present disclosure provide an inductor assembly, an inductor module and a power module. The inductor assembly comprises a magnetic core having a first surface and a second surface opposite in a first direction; a plurality of first conductors and a plurality of second conductors extending through the magnetic core in the first direction to extend from the first surface to the second surface of the magnetic core; wherein the plurality of first conductors are embedded in the magnetic core and are arranged at intervals around an inner region, the plurality of second conductors comprise a first sub-conductor and a second sub-conductor, the first sub-conductor is located in the inner region, and the second sub-conductor is located outside the inner region, wherein the inner region is a circular region defined by a diameter of a line connecting centers of two first conductors farthest apart in the plurality of first conductors.

Description

Technical Field

[0001] Embodiments of this disclosure relate to an inductor assembly, an inductor module, and a power supply module. Background Technology

[0002] With the rapid development of cloud computing, artificial intelligence, and other fields, higher demands are being placed on the processing speed and power consumption of processors in computing chips such as CPUs and GPUs (e.g., central processing units (CPUs) and graphics processing units (GPUs)). As the power supply unit for these core chips, voltage regulator modules (VRMs) face multiple challenges, including continuously increasing power density, stringent transient response requirements, and a sharp rise in heat density. The performance of the voltage regulator module directly determines the stability and energy efficiency of the entire system. A voltage regulator module typically includes components such as power switches, capacitors, and inductors; these components, as crucial elements within the voltage regulator module, significantly impact its performance. Summary of the Invention

[0003] An inductor assembly is provided according to at least one embodiment of the present disclosure, comprising: a magnetic core having a first surface and a second surface opposite each other in a first direction; a plurality of first conductors and a plurality of second conductors extending through the magnetic core in the first direction to extend at least from the first surface of the magnetic core to the second surface; wherein the plurality of first conductors are embedded in the magnetic core and spaced apart around an inner region, the plurality of second conductors including a first sub-conductor and a second sub-conductor, the first sub-conductor being located in the inner region and the second sub-conductor being located outside the inner region, wherein the inner region is a circular region defined by a diameter of a line connecting the centers of the two farthest first conductors among the plurality of first conductors.

[0004] In an inductor assembly provided according to at least one embodiment of the present disclosure, the first sub-conductor is located in the central region of the magnetic core, and the second sub-conductor is located at the edge of the magnetic core.

[0005] In an inductor assembly provided according to at least one embodiment of the present disclosure, the minimum distance between each of the plurality of first conductors and the first sub-conductor is a first distance, and the minimum distance between each of the plurality of first conductors and the adjacent second sub-conductor is a second distance, wherein the absolute value of the difference between the first distance and the second distance is less than or equal to 50% of the maximum value of the first distance and the second distance.

[0006] In an inductor assembly provided according to at least one embodiment of the present disclosure, the first distance is approximately equal to the second distance.

[0007] In an inductor assembly provided according to at least one embodiment of the present disclosure, the minimum distance between each of the plurality of first conductors and the first sub-conductor is approximately equal.

[0008] In an inductor assembly provided according to at least one embodiment of the present disclosure, the second conductor includes a plurality of second sub-conductors, and the plurality of second sub-conductors includes one or more symmetrical groups of second sub-conductors, each symmetrical group of second sub-conductors including two second sub-conductors symmetrically arranged relative to the first sub-conductor.

[0009] In an inductor assembly provided according to at least one embodiment of the present disclosure, the center line connecting the two second sub-conductors in each symmetrical group of second sub-conductors with the center line connecting the center lines of two adjacent first conductors in the plurality of first conductors intersects or is parallel to them.

[0010] In an inductor assembly provided according to at least one embodiment of the present disclosure, the plurality of first conductors includes one or more symmetrical groups of first conductors, each symmetrical group of first conductors including two first conductors symmetrically arranged relative to the first sub-conductor.

[0011] In an inductor assembly provided according to at least one embodiment of the present disclosure, the first center line connecting the two first conductors of each of the one or more first conductor symmetrical groups intersects with the second center line connecting the first sub-conductor and two second sub-conductors located on opposite sides of the first sub-conductor.

[0012] In an inductor assembly provided according to at least one embodiment of the present disclosure, the intersection of the first center line and the second center line substantially coincides with the midpoint of the first center line and the midpoint of the second center line.

[0013] In an inductor assembly provided according to at least one embodiment of the present disclosure, the number of the plurality of first conductors is greater than 2, and the first sub-conductor is located within a polygonal region formed by the center line connecting the plurality of first conductors; or the number of the plurality of first conductors is 2, and the midpoint of the center line connecting the plurality of first conductors approximately coincides with the center of the first sub-conductor.

[0014] In an inductor assembly provided according to at least one embodiment of the present disclosure, the magnetic core has a plurality of first holes and second holes; the plurality of first conductors are respectively located in the plurality of first holes and are surrounded by the magnetic core in a direction parallel to the first surface of the magnetic core; the first sub-conductor is located in the second hole and is surrounded by the magnetic core in a direction parallel to the first surface of the magnetic core.

[0015] In an inductor assembly provided according to at least one embodiment of the present disclosure, the magnetic core has a groove region located at its edge, and the second sub-conductor is placed in the groove region and engages with the magnetic core.

[0016] In an inductor assembly provided according to at least one embodiment of the present disclosure, the recessed region includes: a first recess recessed in a first direction from a first surface of the magnetic core toward the center of the magnetic core; a second recess recessed in the first direction from a second surface of the magnetic core toward the center of the magnetic core; and a lateral recess recessed in a direction parallel to the first surface of the magnetic core toward the inner region from a side surface of the magnetic core and communicating with the first recess and the second recess, wherein a second sub-conductor is disposed in the recessed region and includes a first conductor portion, a second conductor portion, and a third conductor portion respectively located in the first recess, the second recess, and the lateral recess and connected to each other.

[0017] In an inductor assembly provided according to at least one embodiment of the present disclosure, the surface of the first conductor portion away from the magnetic core is coplanar with the first surface of the magnetic core; and / or the surface of the second conductor portion away from the magnetic core is coplanar with the second surface of the magnetic core; and / or the side surface of the third conductor portion away from the magnetic core is coplanar with the side surface of the magnetic core.

[0018] In an inductor assembly provided according to at least one embodiment of the present disclosure, the plurality of first conductors are configured to transmit current along the same first current direction, and the plurality of second conductors are configured to transmit current along the same second current direction, wherein the first current direction is opposite to the second current direction.

[0019] In an inductor assembly provided according to at least one embodiment of the present disclosure, each of the plurality of first conductors is configured to transmit current from a power supply terminal to a load.

[0020] In an inductor assembly provided according to at least one embodiment of the present disclosure, the first sub-conductor and the second sub-conductor of the plurality of second conductors are configured to be shorted to each other and configured to transmit a ground return current flowing from the load.

[0021] In an inductor assembly provided according to at least one embodiment of the present disclosure, each of the plurality of first conductors is configured to together form an inductor with an adjacent second conductor.

[0022] In an inductor assembly provided according to at least one embodiment of the present disclosure, each of the plurality of first conductors has a planar shape that is circular or square; the first sub-conductor of the plurality of second conductors has a planar shape that is circular or square; and the planar shape formed by the outer contour of the second sub-conductor and the outermost contour of the magnetic core is circular or square.

[0023] At least one embodiment of this disclosure provides an inductor module, including the inductor component described in any of the preceding claims.

[0024] The inductor module provided according to at least one embodiment of the present disclosure further includes: a circuit board, wherein the inductor component is embedded in the circuit board.

[0025] In an inductor module provided according to at least one embodiment of the present disclosure, the circuit board is provided with a plurality of first conductive terminals and a plurality of second conductive terminals on one side near the first surface of the inductor assembly, the plurality of first conductive terminals being electrically connected to the plurality of first conductors, and the plurality of second conductive terminals being electrically connected to the plurality of second conductors.

[0026] In an inductor module provided according to at least one embodiment of the present disclosure, the plurality of first conductive terminals and the plurality of second conductive terminals are alternately arranged in at least one direction parallel to the main surface of the circuit board.

[0027] In an inductor module provided according to at least one embodiment of the present disclosure, the circuit board includes a plurality of first terminal regions, each of which is respectively disposed corresponding to a plurality of first conductors. In each set of correspondingly disposed first terminal regions and first conductors, the first terminal region includes a plurality of first conductive terminals electrically connected to the same first conductor. In the correspondingly disposed first terminal regions and first conductors, the orthographic projection of the first conductor on the main surface of the circuit board overlaps with the orthographic projection of a portion of the first conductive terminals in the first terminal region on the main surface of the circuit board.

[0028] In an inductor module provided according to at least one embodiment of the present disclosure, the conductive lines of the circuit board include one or more line layers electrically connecting the plurality of first conductive terminals and the first conductor, and the orthographic projection of the plurality of first conductive terminals on the main surface of the circuit board is located within the orthographic projection of the one or more line layers on the main surface of the circuit board.

[0029] In an inductor module provided according to at least one embodiment of the present disclosure, a portion of the plurality of second conductive terminals are distributed in the plurality of first terminal regions.

[0030] In an inductor module provided according to at least one embodiment of the present disclosure, the circuit board further includes a second terminal region located outside the plurality of first terminal regions, and another portion of the plurality of second conductive terminals is located in the second terminal region.

[0031] In an inductor module provided according to at least one embodiment of the present disclosure, at least a portion of the second terminal region is located between adjacent first terminal regions in the plurality of first terminal regions.

[0032] At least one embodiment of this disclosure provides a power module, including the inductor module described in any of the preceding claims. Attached Figure Description

[0033] To more clearly illustrate the technical solutions of the embodiments of this disclosure, the accompanying drawings of the embodiments will be briefly described below. Obviously, the drawings described below only relate to some embodiments of this disclosure and are not intended to limit this disclosure.

[0034] Figure 1 A schematic perspective view of an inductor component is shown.

[0035] Figure 2A A schematic perspective view of an inductor assembly according to some embodiments of the present disclosure is shown; Figure 2B A schematic exploded view of an inductor assembly according to some embodiments of the present disclosure is shown.

[0036] Figure 3 A schematic plan view of an inductor assembly according to some embodiments of the present disclosure is shown.

[0037] Figures 4A to 4G A schematic plan view of an inductor assembly according to other embodiments of the present disclosure is shown.

[0038] Figure 5 This diagram illustrates an inductor assembly according to some embodiments of the present disclosure generating an induced magnetic field during operation.

[0039] Figure 6A A schematic perspective view of an inductor module according to some embodiments of the present disclosure is shown; Figure 6B A perspective top view of an inductor module according to some embodiments of the present disclosure is shown; Figure 6C A perspective bottom view of an inductor module according to some embodiments of the present disclosure is shown.

[0040] Figure 7A A schematic top view of an inductor module according to some embodiments of the present disclosure is shown; Figure 7B A schematic plan view of an inductor module according to some embodiments of the present disclosure is shown.

[0041] Figure 8A and Figure 8B A schematic cross-sectional view of an inductor module according to some embodiments of the present disclosure is shown.

[0042] Figure 9 A schematic cross-sectional view of a power module according to some embodiments of the present disclosure is shown.

[0043] Figure 10 A schematic bottom view of a power module according to some embodiments of the present disclosure is shown.

[0044] Figure 11A A schematic cross-sectional view showing a more specific structure of a circuit board and a power chip of a power module according to some embodiments of the present disclosure; Figure 11B and Figure 11C A schematic perspective top view of a power module according to some embodiments of the present disclosure is shown.

[0045] Figure 12A A schematic cross-sectional view of a power chip according to some embodiments of the present disclosure is shown; Figure 12B A schematic plan view of a transistor region in a power chip according to some embodiments of the present disclosure is shown; Figure 12C This diagram schematically illustrates the planar arrangement of multiple conductive pads on a power chip.

[0046] Figure 13A A schematic cross-sectional view of a voltage regulation module according to some embodiments of the present disclosure is shown; Figure 13B A schematic perspective view of a voltage regulation module according to some embodiments of the present disclosure is shown; Figure 13C and Figure 13D Schematic exploded top and bottom views of a voltage regulation module according to some embodiments of the present disclosure are shown respectively.

[0047] Figures 14A to 14E A schematic cross-sectional view of a power chip according to other embodiments of the present disclosure is shown.

[0048] Figures 15A to 15C A circuit topology diagram is shown for the application of a voltage regulation module according to some embodiments of the present disclosure.

[0049] Figure 16A Show Figure 1 The diagram shows a simulation of the magnetic field distribution of the inductor component during operation. Figure 16B Some embodiments according to this disclosure are shown. Figure 2A The diagram shows a simulation of the magnetic field distribution of the inductor component during operation. Detailed Implementation

[0050] To make the objectives, technical solutions, and advantages of the embodiments of this disclosure clearer, the technical solutions of the embodiments of this disclosure will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some, not all, of the embodiments of this disclosure. All other embodiments obtained by those skilled in the art based on the described embodiments of this disclosure without creative effort are within the scope of protection of this disclosure.

[0051] Unless otherwise defined, the technical or scientific terms used in this disclosure shall have the ordinary meaning understood by one of ordinary skill in the art to which this disclosure pertains. The terms “first,” “second,” and similar terms used in this disclosure do not indicate any order, quantity, or importance, but are merely used to distinguish different components. Terms such as “comprising” or “including” mean that an element or object preceding the word encompasses the elements or objects listed following the word and their equivalents, without excluding other elements or objects. Terms such as “connected” or “linked” are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect.

[0052] In voltage regulation modules, the output inductor needs to carry high current and store large amounts of energy, thus having a significant impact on the power density and efficiency of the power module. Traditional solutions often use discrete inductors, which, although simple in structure and mature in technology, are bulky, have high parasitic inductance and DC resistance, and are prone to imbalance between multi-phase currents, seriously affecting the system's dynamic response and heat distribution.

[0053] In response, provide Figure 1 The inductor assembly shown employs magnetic integration technology, integrating multiple inductors into a single magnetic core. By directly passing metal conductors such as copper foil or copper strips through the magnetic core to form a winding, the current loop can be significantly shortened, the inductor volume reduced, and the power density increased.

[0054] like Figure 1 As shown, the inductor assembly includes a magnetic core 1, a power conductor 2, and a ground conductor 3. The power conductor 2 and the ground conductor 3 extend through the magnetic core 1 and serve as the power winding and ground winding, respectively. For example, during the operation of the voltage regulation module, the power conductor 2 is configured to transmit input current to the load, and the ground conductor 3 is configured to transmit ground return current flowing from the load, thus forming a complete circuit. In some examples, multiple power conductors 2 are embedded in the magnetic core 1, and the ground conductors 3 are located at both edges of the magnetic core 1.

[0055] Figure 16A Show Figure 1 The diagram shows a simulation of the magnetic field distribution of the inductor component during operation.

[0056] refer to Figure 1 and Figure 16AIn this inductor assembly, since the grounding conductor 3 is only located on both sides of the magnetic core, the magnetic field is unevenly distributed inside the magnetic core. For example, the magnetic flux density is significantly higher in the region 6 near the four power conductors 2, while the magnetic flux is weaker in the central region 5 of the magnetic core 1. This uneven magnetic field distribution may lead to excessively high local magnetic flux density, which can easily cause magnetic core saturation, reduce the effective inductance value, cause current spikes, and increase eddy current losses in the magnetic core. Eddy current losses are concentrated in the high magnetic flux density region, leading to abnormal temperature rise and affecting the long-term reliability of the inductor assembly. At the same time, the utilization rate of the magnetic core is also low. On the other hand, the coupling coefficient between the power conductors 2 is large, which may cause the voltage recovery to be slower and the overshoot to increase when the load changes due to excessive magnetic field coupling. This will affect the overall dynamic response speed and performance of the power module, including the inductor assembly.

[0057] To address the aforementioned issues, this disclosure provides an inductor component that improves the uniformity of its magnetic field distribution during operation, significantly reduces the risks of local core saturation and increased eddy current losses, thereby avoiding problems caused by uneven magnetic field distribution and improving the performance and reliability of the inductor component and its inductor module and power supply module.

[0058] For example, embodiments of this disclosure provide an inductor assembly including: a magnetic core, a plurality of first conductors, and a plurality of second conductors; the magnetic core has a first surface and a second surface opposite each other in a first direction; the plurality of first conductors and the plurality of second conductors extend through the magnetic core in the first direction to extend at least from the first surface of the magnetic core to the second surface; wherein the plurality of first conductors are embedded in the magnetic core and spaced apart around an inner region, the plurality of second conductors including a first sub-conductor and a second sub-conductor, the first sub-conductor being located in the inner region and the second sub-conductor being located outside the inner region, wherein the inner region is a circular region defined by a diameter of the line connecting the centers of the two farthest first conductors among the plurality of first conductors.

[0059] In this embodiment of the disclosure, by optimizing the layout of multiple conductors in the inductor assembly, the first sub-conductor of the second conductor is located within the internal region defined by multiple first conductors, and the second sub-conductor is located outside the internal region. This makes the magnetic field distribution within the entire magnetic core more uniform during the operation of the inductor assembly, avoiding the phenomenon of magnetic flux accumulating near the first conductor and being weaker in the internal region. This significantly reduces the risk of local saturation of the magnetic core and increased eddy current losses, thereby improving the performance and reliability of the inductor assembly.

[0060] Figure 2A A schematic perspective view of an inductor assembly according to some embodiments of the present disclosure is shown; Figure 2B A schematic exploded view of an inductor assembly according to some embodiments of the present disclosure is shown; Figure 3 A schematic plan view, such as a top view, is shown of an inductor assembly according to some embodiments of the present disclosure.

[0061] refer to Figure 2A , Figure 2B and Figure 3 In some embodiments, the inductor assembly 10 includes a magnetic core 100, a plurality of first conductors 101, and a plurality of second conductors 102. The magnetic core 100 has a first surface 100a and a second surface 100b opposite each other in a first direction D1; the plurality of first conductors 101 and the plurality of second conductors 102 extend through the magnetic core 100 in the first direction D1, extending at least from the first surface 100a to the second surface 100b. That is, the plurality of first conductors 101 and the plurality of second conductors 102 penetrate the magnetic core 100 in the first direction D1 and are exposed at the first surface 100a and the second surface 100b of the magnetic core 100. The first surface 100a and the second surface 100b of the magnetic core 100 may be collectively referred to as the main surface of the magnetic core 100.

[0062] In some embodiments, a plurality of first conductors 101 are embedded in the magnetic core 100 and surround the inner region IR ( Figure 3 The second conductors 102 are spaced apart. Each second conductor 102 includes a first sub-conductor 102a and a second sub-conductor 102b. The first sub-conductor 102a is embedded in the magnetic core 100 and located within an inner region IR surrounded by the multiple first conductors 101. The second sub-conductor 102b is located outside the inner region IR.

[0063] refer to Figure 3 The internal region IR refers to the circular region defined by the line connecting the centers of the two farthest first conductors 101 among the plurality of first conductors 101, with the diameter being the line connecting the centers. The circular region defined by the line connecting the centers refers to the circular region defined by the midpoint of the line connecting the centers as its center and the length of the line connecting the centers as its diameter. In this document, the centers, line connecting the centers, internal regions, etc., described regarding each first conductor, second conductor, and magnetic core are all described from the perspective of a planar view (e.g., a top view); that is, the center of a conductor refers to the geometric center of the planar shape of the conductor. The planar view is taken along a plane parallel to the main surface of the magnetic core.

[0064] refer to Figure 3For example, the plurality of first conductors 101 includes first conductors 101a, 101b, 101c, and 101d, wherein first conductors 101a and 101d are the two farthest first conductors among the plurality of first conductors 101. Therefore, the inner region IR is the circular region defined by the diameter of the line ad connecting the centers of first conductors 101a and 101d, and the center of this circular region is the midpoint of the line ad. In some examples, the distance between first conductors 101b and 101c may be approximately equal to the distance between first conductors 101a and 101d, and the length of the line bc connecting the centers of first conductors 101b and 101c may be approximately equal to the length of the line ad; first conductors 101b and 101c are also the two farthest first conductors among the plurality of first conductors; the circular region defined by the line bc as the diameter and the circular region defined by the line ad as the diameter approximately overlap with each other, which is the inner region IR shown. In other examples, the distance between the first conductors 101b and 101c may also be different from the distance between the first conductors 101a and 101d, and the inner region IR is defined by the center line between the two farthest first conductors.

[0065] In some embodiments, a first sub-conductor is located in the central region of the magnetic core, and a second sub-conductor is located at the edge of the magnetic core. The first sub-conductor is disposed within the internal region defined by a plurality of first conductors and is located in the central region of the magnetic core, while the second sub-conductor is disposed at the edge of the magnetic core, thereby further optimizing the magnetic field distribution of the inductor assembly and making the magnetic field distribution within the magnetic core more uniform.

[0066] refer to Figures 2A to 3 In some embodiments, the first sub-conductor 102a is located in the inner region IR and in the central region of the magnetic core 100, while the second sub-conductor 102b is located at the edge of the magnetic core 100. It should be understood that the central region of the magnetic core refers to the region of the magnetic core away from its edge, and may include, but is not limited to, the location of its geometric center. For example, it may include the region where its geometric center is located, and may also include regions located inside the magnetic core but off-center from its geometric center. In some embodiments, the center of the first sub-conductor 102a substantially coincides with the center of the magnetic core 100.

[0067] In some embodiments, the minimum distance between each of the plurality of first conductors and the first sub-conductor is a first distance, and the minimum distance between each of the plurality of first conductors and the adjacent second sub-conductor is a second distance, wherein the absolute value of the difference between the first distance and the second distance is less than or equal to 50% of the maximum value of the first distance and the second distance. For example, the first distance is approximately equal to the second distance.

[0068] In some embodiments, the minimum distance between each of the plurality of first conductors and the first sub-conductor is approximately equal.

[0069] In some embodiments, the second conductor includes a plurality of second sub-conductors, and the plurality of second sub-conductors includes one or more symmetrical groups of second sub-conductors, each symmetrical group of second sub-conductors including two second sub-conductors symmetrically arranged relative to the first sub-conductor.

[0070] In some embodiments, the line connecting the centers of the two second sub-conductors in each symmetrical group of second sub-conductors to the center of the first sub-conductor intersects or is parallel to the line connecting the centers of two adjacent first conductors in a plurality of first conductors.

[0071] In some embodiments, the plurality of first conductors includes one or more symmetrical groups of first conductors, each symmetrical group of first conductors including two first conductors arranged symmetrically with respect to the first sub-conductor.

[0072] In some embodiments, the first center line connecting the two first conductors of each of the one or more first conductor symmetric groups intersects with the second center line connecting the first sub-conductor and the two second sub-conductors located on opposite sides of the first sub-conductor.

[0073] In some embodiments, the intersection of the first center line and the second center line coincides approximately with the midpoint of the first center line and the midpoint of the second center line.

[0074] In some embodiments, the number of multiple first conductors is greater than 2, and the first sub-conductor is located within a polygonal region formed by the center line connecting the multiple first conductors; or the number of multiple first conductors is 2, and the center line connecting the two first conductors approximately coincides with the midpoint of the first sub-conductor.

[0075] In some embodiments, the magnetic field distribution of the inductor component can be further optimized by one or more of the above-mentioned optimized layouts of the first conductor and the second conductor, so that the magnetic field distribution in the core of the inductor component is more uniform during operation.

[0076] refer to Figure 3 For example, the positional relationship between each first conductor 101 and its adjacent second conductor 102 is similar; taking the first conductor 101a as an example, the minimum distance between the first conductor 101a and the first sub-conductor 102a is the first distance L1, and the minimum distance between the first conductor 101a and its adjacent second sub-conductor 102b is the second distance L2. In some embodiments, the absolute value of the difference between the first distance L1 and the second distance L2 is less than or equal to 50% of the maximum value of the first distance L1 and the second distance L2. In some examples, the first distance L1 may be approximately equal to the second distance L2. In this document, the approximate equality of values ​​a and b can include the case where values ​​a and b are completely equal, and also includes the case where values ​​a and b are not completely equal but close, such as the case where the ratio of the difference between values ​​a and b to the average value of values ​​a and b is in the range of 0 to 5%.

[0077] In some embodiments, for the first conductor 101a and the adjacent first sub-conductor 102a and second sub-conductor 102b, at least a portion of the orthographic projection of the first conductor 101a onto a reference plane that is perpendicular to the main surface of the magnetic core 100 and parallel to the line connecting the centers of the first sub-conductor 102a and the second sub-conductor 102b lies between the orthographic projections of the first sub-conductor 102a and the second sub-conductor 102b onto the reference plane.

[0078] The distance settings and positional relationships between the other first conductors 101b, 101c and 101d and the first sub-conductor 102a and the adjacent second sub-conductors 102b or 102c are similar to those of the first conductor 101a, and will not be described in detail here.

[0079] In some embodiments, the minimum distance L1 between each first conductor 101 and the first sub-conductor 102a may be approximately equal to each other; for example, the minimum distance L1 between each of the first conductors 101a, 101b, 101c, and 101d and the first sub-conductor 102a may all be approximately equal. In some embodiments, the minimum distance L2 between each first conductor 101 and the adjacent second sub-conductor 102b or 102c may also be approximately equal to each other; for example, the minimum distance L2 between the first conductor 101a and the second sub-conductor 102b and the minimum distance L2 between the first conductor 101b and the second sub-conductor 102c may be approximately equal. In some embodiments, the center distance (i.e., the distance between the centers of the two conductors) between each first conductor 101 and the first sub-conductor 102a may be approximately equal to each other; the center distance between each first conductor 101 and the adjacent second sub-conductor may be approximately equal to each other.

[0080] In some embodiments, the second sub-conductor 102b and the second sub-conductor 102c are symmetrically arranged with respect to the first sub-conductor 102a, and constitute a symmetrical group of second sub-conductors. For example, symmetrical arrangement of two conductors with respect to another conductor means that the two conductors are symmetrically arranged with respect to the center of that other conductor.

[0081] For example, the center line CL connecting the two second sub-conductors 102b and 102c in the symmetrical group of second sub-conductors with the center of the first sub-conductor 102a intersects or is parallel to the center line connecting two adjacent first conductors 101 among the plurality of first conductors 101. It should be understood that two adjacent first conductors 101 refer to two first conductors without other first conductors in between, but a second conductor may be placed between two adjacent first conductors. For example, in the plurality of groups of two adjacent first conductors 101, the center line ad connecting the first conductors 101a and 101d, the center line bc connecting the first conductors 101b and 101c, the center line ac connecting the first conductors 101a and 101c, and the center line bd connecting the first conductors 101b and 101d each intersects the center line CL of the second conductor 102. For example, the center line ab connecting the first conductors 101a and 101b, and the center line cd connecting the first conductors 101c and 101d each are approximately parallel to the center line CL of the second conductor 102.

[0082] Figure 3 A symmetrical group of second sub-conductors is shown, but this is merely illustrative and is not intended to limit the scope of this disclosure. In other embodiments, the plurality of second conductors 102 may also include a plurality of symmetrical groups of second sub-conductors arranged symmetrically with respect to the first sub-conductor 102a.

[0083] Continue to refer to Figure 3 In some embodiments, among the plurality of first conductors 101, first conductor 101a and first conductor 101d are symmetrically arranged with respect to first sub-conductor 102a and together form a first conductor symmetrical group; first conductor 101b and first conductor 101c are symmetrically arranged with respect to first sub-conductor 102a and together form a first conductor symmetrical group. Figure 3 Two symmetrical groups of first conductors are shown, but this is only an example. In other embodiments, the plurality of first conductors 101 may also include one or more symmetrical groups of first conductors.

[0084] In some embodiments, the first center line connecting two first conductors in each symmetrical group of first conductors (e.g., the center line ad connecting first conductors 101a and 101d, and the center line bc connecting first conductors 101b and 101c) intersects the second center line connecting the first sub-conductor 102a and the two second sub-conductors 102b and 102c located on opposite sides of it (e.g., the center line CL). In some embodiments, the center line connecting each first conductor 101 and the first sub-conductor 102a intersects the center line connecting the first conductor 101 and the adjacent second sub-conductor, i.e., the included angle between the two center lines is a non-zero angle. In some embodiments, the intersection point of the first center line and the second center line substantially coincides with the midpoint of the first center line and the midpoint of the second center line, for example, it may substantially coincide with the center of the first sub-conductor 102a.

[0085] Continue to refer to Figure 3 In some embodiments, the centers of the plurality of first conductors 101 may all be arranged along the contour of the inner region IR. The spacing between adjacent first conductors 101 may be approximately equal to each other.

[0086] In some embodiments, the center of the first sub-conductor 102a substantially coincides with the center of the magnetic core 100, and the centers of the plurality of first conductors 101 substantially coincide with the centers of the plurality of magnetic core sub-regions of the magnetic core 100, respectively. The number of first conductors 101 may be the same as the number of magnetic core sub-regions. For example, based on the required number of first conductors, the magnetic core is divided into the same number of magnetic core sub-regions, and each first conductor is disposed in the corresponding magnetic core sub-region, such that the center of each first conductor substantially coincides with the center of the corresponding magnetic core sub-region. This arrangement can further optimize the magnetic field distribution of the inductor assembly during operation, making the magnetic field distribution within the magnetic core more uniform.

[0087] refer to Figure 3 For example, the inductor assembly 10 includes four first conductors 101a-101d. Correspondingly, the magnetic core 100 is divided into four equal parts, namely, four magnetic core sub-regions 100a, 100b, 100c, and 100d. The four first conductors 101a, 101b, 101c, and 101d are respectively disposed in the four magnetic core sub-regions 100a, 100b, 100c, and 100d. The center of the first conductor 101a is approximately coincident with the center of the magnetic core sub-region 100a, the center of the first conductor 101b is approximately coincident with the center of the magnetic core sub-region 100b, the center of the first conductor 101c is approximately coincident with the center of the magnetic core sub-region 100c, and the center of the first conductor 101d is approximately coincident with the center of the magnetic core sub-region 100d.

[0088] In some embodiments, the magnetic core has a plurality of first holes and second holes; a plurality of first conductors are respectively located in the plurality of first holes and are surrounded by the magnetic core in a direction parallel to the first surface of the magnetic core; a first sub-conductor is located in the second hole and is surrounded by the magnetic core in a direction parallel to the first surface of the magnetic core.

[0089] In some embodiments, the magnetic core has a recessed region located at its edge, and a second sub-conductor is disposed in the recessed region and engages with the magnetic core. For example, the recessed region includes: a first recess recessed in a first direction from a first surface of the magnetic core toward the center of the magnetic core; a second recess recessed in a first direction from a second surface of the magnetic core toward the center of the magnetic core; and a lateral recess recessed in a direction parallel to the first surface of the magnetic core toward an inner region from a side surface of the magnetic core and communicating with the first and second recesses, wherein the second sub-conductor is disposed in the recessed region and includes a first conductor portion, a second conductor portion, and a third conductor portion located in the first recess, the second recess, and the lateral recess and connected to each other.

[0090] In some embodiments, the surface of the first conductor portion away from the magnetic core is coplanar with the first surface of the magnetic core; and / or the surface of the second conductor portion away from the magnetic core is coplanar with the second surface of the magnetic core; and / or the side surface of the third conductor portion away from the magnetic core is coplanar with the side surface of the magnetic core.

[0091] By employing one or more of the aforementioned configurations of the magnetic core and conductor, the inductor assembly, including the magnetic core and conductor, can be assembled into a well-integrated structure, ensuring good thermal contact and mechanical stability between the magnetic core and conductor, and facilitating the embedding of the inductor assembly into the circuit board during subsequent assembly in the inductor module.

[0092] refer to Figure 2A and Figure 2B In some embodiments, the magnetic core 100 has a first hole V1 and a second hole V2. The first hole V1 and the second hole V2 are through holes penetrating the magnetic core 100 in a first direction. For example, a plurality of first holes V1 may be provided in a one-to-one correspondence with a plurality of first conductors 101, and a plurality of second holes V2 may be provided in a one-to-one correspondence with a first sub-conductor 102a of a second conductor 102. For example, the plurality of first holes V1 may include first holes V1a, first holes V1b, first holes V1c and first holes V1d, and a plurality of first conductors 101a, 101b, 101c and 101d are respectively provided in the plurality of first holes V1a, V1b, V1c and V1d, and are surrounded and covered by the magnetic core 100 in a direction parallel to the main surface of the magnetic core 100. The first sub-conductor 102a of the second conductor 102 is located in the second hole V2 and is surrounded and covered by the magnetic core 100 in a direction parallel to the main surface of the magnetic core 100.

[0093] In some embodiments, the magnetic core 100 has a plurality of recessed regions CR located at its edges, and a plurality of second sub-conductors are respectively placed in the plurality of recessed regions CR and are fitted with each other with the magnetic core 100. For example, each recessed region CR includes a first recess CR1, a second recess CR2, and a lateral recess CR3. The first recess CR1 is recessed from the first surface 100a of the magnetic core 100 toward the center of the magnetic core 100 in a first direction D1. The second recess CR2 is recessed from the second surface 100b of the magnetic core 100 toward the center of the magnetic core 100 in the first direction D1. The lateral recess CR3 is recessed from the side surface of the magnetic core 100 toward the inner region of the magnetic core 100 in a direction parallel to the main surface of the magnetic core 100, and communicates with the first recess CR1 and the second recess CR2. The center of the magnetic core 100 refers to its middle portion in the first direction D1.

[0094] In some embodiments, the second sub-conductor 102 is disposed in a corresponding recessed region CR and has a shape that mates with the recessed region CR. For example, the second sub-conductor 102 includes a first conductor portion P1, a second conductor portion P2, and a third conductor portion P3 respectively disposed in a first recess CR1, a second recess CR2, and a lateral recess CR3 and connected to each other. In some embodiments, the conductor portions of the second sub-conductor 102 fill the corresponding recesses and together with the magnetic core form a generally flat surface of the inductor assembly. For example, the thickness of the first conductor portion P1 may be approximately the same as the depth of the first recess CR1, such that the surface of the first conductor portion P1 away from the magnetic core 100 is coplanar with the first surface 100a of the magnetic core 100, i.e., approximately flush with the first surface in a direction parallel to the main surface of the magnetic core 100 (e.g., the second direction D2). For example, the thickness of the second conductor portion P2 may be approximately the same as the depth of the second recess CR2, such that the surface of the second conductor portion P2 away from the magnetic core 100 is coplanar with the second surface 100b of the magnetic core 100, i.e., approximately flush with the second surface in a direction parallel to the main surface of the magnetic core 100. In some embodiments, the thickness of the third conductor portion P3 is approximately the same as the depth of the lateral recess CR3, such that the side surface of the third conductor portion P3 away from the magnetic core 100 is coplanar with the side surface of the magnetic core 100. It should be understood that the thickness of a component refers to its thickness in a direction perpendicular to its extension direction; that is, the thickness of the first conductor portion P1 and the second conductor portion P2 refers to their thickness in a first direction D1 perpendicular to the main surface of the magnetic core, and the thickness of the third conductor portion P3 refers to its thickness in a direction parallel to the main surface of the magnetic core (e.g., a second direction D2).

[0095] In some embodiments, each conductor extends through the magnetic core, and the corresponding surface of each conductor is coplanar with the corresponding surface of the magnetic core, such that the surfaces of the inductor assembly can be generally flat. This arrangement facilitates the subsequent assembly of the inductor assembly with the circuit board in the inductor module. However, this disclosure is not limited thereto. In other embodiments, the first conductor and / or the second conductor may also protrude from the corresponding surface of the magnetic core to be reused as conductive terminals and / or conductive connectors of the inductor module, etc.

[0096] In some embodiments, a plurality of first conductors are configured to transmit current along the same first current direction, and a plurality of second conductors are configured to transmit current along the same second current direction, wherein the first current direction is opposite to the second current direction.

[0097] In some embodiments, each of the plurality of first conductors is configured to transmit current from the power supply terminal to the load.

[0098] In some embodiments, the first sub-conductor and the plurality of second sub-conductors are configured to be short-circuited to each other and configured to carry ground return current flowing from the load. In some embodiments, each of the plurality of first conductors is configured to form an inductor together with an adjacent second conductor. Short-circuiting the plurality of second conductors to each other can help to make the plurality of second conductors substantially evenly share the total current, and can also help to make the magnetic field generated by the plurality of conductors within the magnetic core more uniform.

[0099] refer to Figures 2A to 3 In some embodiments, a plurality of first conductors 101 are configured to transmit current along the same first current direction, and a plurality of second conductors 102 are configured to transmit current along the same second current direction, wherein the first current direction is opposite to the second current direction. For example, Figure 2B The direction of the first current is schematically shown by a dashed arrow; for example, the direction of the first current may be downward in the first direction in the diagram, and the direction of the second current may be upward in the first direction in the diagram. That is to say, during the operation of the inductor assembly 10, the first induced magnetic field generated by the plurality of first conductors 101 is in the same direction, and the second induced magnetic field generated by the plurality of second conductors 102 is in the same direction and opposite to the direction of the first induced magnetic field.

[0100] For example, the inductor assembly 10 can be applied to a power supply module (e.g., a voltage regulation module), where a plurality of first conductors 101 can be configured to be connected in parallel with each other, and each can be configured to carry current from the power supply terminal to the load. For example, a first sub-conductor 102a and a second sub-conductor 102b of a plurality of second conductors can each be configured to carry a ground return current flowing from the load. For example, the first conductor 101 can also be referred to as a power conductor, and the second conductor 102 can also be referred to as a ground conductor.

[0101] In some embodiments, the plurality of sub-conductors in the second conductor 102 may be configured to be short-circuited to each other, and the magnitude of the current flowing through each sub-conductor may be approximately the same. In some embodiments, the first conductor 101 and the adjacent second conductor 102 may be considered to together form an inductor, and the first conductor and the second conductor work together to generate a uniform magnetic field.

[0102] Figures 4A to 4G Schematic plan views of inductor assemblies according to other embodiments of the present disclosure are shown, these inductor assemblies being... Figure 3 The inductor assembly shown is similar and has the features described above. Figure 3 Similar structural features described herein will not be repeated below. Figures 4A to 4G This illustrates that inductor components may have other types of shapes, conductor arrangements, etc.

[0103] refer to Figure 3 , Figures 4A to 4C , Figure 4F and Figure 4G In some embodiments, the number of multiple first conductors 101 in the inductor assembly 10 is greater than two; for example, the inductor assembly 10 may include four first conductors, six first conductors; or, in other examples, the inductor assembly 10 may include three first conductors, five first conductors, or more, which are not listed here. In these embodiments, the first sub-conductor 102a is located within a polygonal region formed by the center lines connecting the multiple first conductors 101, and this polygonal region overlaps with the inner region IR, for example, it is located within the inner region IR. For example, the polygonal region may be concentrically arranged with the inner region IR.

[0104] refer to Figure 4D and Figure 4E In some embodiments, the number of first conductors 101 in the inductor assembly 10 is two, for example, first conductor 101a and first conductor 101d. The two first conductors 101 are disposed on opposite sides of the first sub-conductor 102a, and the midpoint of the line connecting the centers of the two first conductors 101 approximately coincides with the center of the first sub-conductor 102a. For example, the two first conductors 101 are symmetrically arranged with respect to the first sub-conductor 102a.

[0105] In some embodiments, the planar shape of each of the plurality of first conductors is circular or square; the planar shape of the first sub-conductors of the plurality of second conductors is circular or square; the planar shape formed by the outer contours of each second sub-conductor of the plurality of second conductors and the outermost contour of the magnetic core is circular or square. In this document, a square can be a square, rectangle, or rhombus, and can be a conventional square or a rounded square. In other embodiments, the conductors may also have other shapes, such as a self-symmetrical shape.

[0106] refer to Figure 3 In some embodiments, the planar shape of the first conductor 101 may be circular. For example, multiple first conductors 101 may have the same planar shape; for example, multiple first conductors 101 may have approximately the same size. In some embodiments, the planar shape of the first sub-conductor 102a may be rhomboid. For example, the side length direction of the first sub-conductor 102a may intersect with, for example, the line connecting the centers of two first conductors 101 located on opposite sides, for example, approximately perpendicular. The planar shape formed by the outer contours of the second sub-conductors 102b and 102c together with the outer contour of the magnetic core 100 may be square, for example, a rounded square.

[0107] refer to Figure 4A In other embodiments, the planar shape of the first conductor 101 and the first sub-conductor 102a may both be circular, and the planar shape formed by the second sub-conductors 102b and 102c and the outer contour of the magnetic core 100 may be square.

[0108] refer to Figure 4B In some embodiments, the planar shape of the first conductor 101 is circular; the planar shape of the first sub-conductor 102a is rhomboid; the planar shape formed by the outer contours of the second sub-conductors 102b and 102c together with the outer contour of the magnetic core 100 can be circular; for example, this circle can be concentric with the circular region of the inner region IR.

[0109] refer to Figure 4C In some embodiments, the planar shape of each of the plurality of first conductors 101 is circular; the planar shape of the first sub-conductor 102a is circular; the planar shape formed by the outer contours of the plurality of second sub-conductors and the outer contour of the magnetic core 100 may also be circular. In this example, the plurality of second conductors 102 includes first sub-conductor 102a, second sub-conductor 102b, second sub-conductor 102c, second sub-conductor 102d, and second sub-conductor 102e, and may include two sets of symmetrical groups of second sub-conductors. For example, second sub-conductors 102b and 102c are symmetrically arranged with respect to first sub-conductor 102a, and second sub-conductors 102d and 102e are symmetrically arranged with respect to first sub-conductor 102a.

[0110] refer to Figure 4D In some embodiments, the plurality of first conductors 101 include a symmetrical group of first conductors, such as first conductors 101a and 101d symmetrically arranged relative to the first sub-conductor 102a. The planar shape of the first conductor 101 may be circular; the planar shape of the first sub-conductor 102a may be square, wherein a set of opposite sides of the square may be substantially perpendicular to the line connecting the centers of the two first conductors. The planar shape formed by the second sub-conductors 102b / 102c and the outer contour of the magnetic core 100 may also be square.

[0111] refer to Figure 4E In some embodiments, the planar shape of each of the plurality of first conductors 101 is circular; the planar shape of the first sub-conductor 102a is square; the planar shape formed by the outer contours of the plurality of second sub-conductors 102b, 102c, 102d, and 102e together with the outer contour of the magnetic core 100 may be square. In some embodiments, each second sub-conductor may be arranged along the corner of the magnetic core 100, for example, it may be L-shaped.

[0112] In some embodiments, the first conductors 101a and 101b are symmetrically arranged with respect to the first sub-conductor 102a, and the center line connecting the first conductors 101a and 101b may coincide with the center line connecting the first sub-conductor 102a and the second sub-conductors 102d and 102e, and intersect with the center line connecting the first sub-conductor 102a and the second sub-conductors 102b and 102c.

[0113] refer to Figure 4F In some embodiments, the planar shape of each of the plurality of first conductors 101 is circular; the planar shape of the first sub-conductor 102a is square; the planar shape formed by the outer contours of the plurality of second sub-conductors 102b, 102c, 102d, and 102e together with the outer contour of the magnetic core 100 may also be square. For example, the plurality of first conductors 101 may include two or more symmetrical groups of first conductors; for example, the first conductors 101a and 101d are symmetrically arranged with respect to the first sub-conductor 102a, the first conductors 101b and 101e are symmetrically arranged with respect to the first sub-conductor 102a, and the first conductors 101c and 101f are symmetrically arranged with respect to the first sub-conductor 102a. Figure 4G Inductor components and Figure 4F The similarity shown is only Figure 4G The planar shape of the first sub-conductor 102a of the inductor component is circular.

[0114] Figure 5 A schematic diagram illustrating an inductor assembly according to some embodiments of the present disclosure generating an induced magnetic field during operation is shown.

[0115] refer to Figure 5 In some embodiments, the current directions in the first conductor 101 and the second conductor 102 are opposite. Figure 5 Taking an example where the current direction of multiple first conductors 101 is perpendicular to the paper and inwards, and the current direction of multiple second conductors 102 is perpendicular to the paper and outwards, this example illustrates the magnetic field generated when current flows through multiple conductors during the operation of an inductor assembly. The magnetic field lines of the induced magnetic field generated by each conductor are schematically shown in the figure using dashed circles with arrows.

[0116] like Figure 5As shown, when the inductor assembly 10 is in operation, multiple first conductors 101 generate a magnetic field in the clockwise direction, and multiple second conductors 102 generate a magnetic field in the counterclockwise direction. The multiple second conductors 102 are distributed in the internal region and edge of the magnetic core 100, which increases the flow path of magnetic flux, so that the magnetic flux is not concentrated near the first conductors 101, thereby making the magnetic field distribution inside the entire magnetic core 100 more uniform.

[0117] In some embodiments, the side length direction of the first sub-conductor 102a is tangent to the direction of the magnetic field lines generated by the first conductor 101. This arrangement maximizes the magnetic permeability area of ​​the magnetic field lines formed by each first conductor and the first sub-conductor, thereby making the magnetic field distribution more uniform. For example, in Figure 5 In the example shown, the outer contour of the inductor assembly formed by the magnetic core 100 and the second sub-conductor 102c is square, and the side length of the first sub-conductor 102a is rotated by about 45° relative to the outer contour; the area between the magnetic lines of force of the plurality of first conductors 101 is similar to a rhombus, and each side length of the first sub-conductor 102a is tangent to the direction of the magnetic lines of force of each first conductor.

[0118] Compared to Figure 1 The inductor assembly shown in this embodiment adds a first sub-conductor to the internal region of the magnetic core, which can avoid the accumulation of magnetic flux near the first conductor and the phenomenon of a void in the center of the magnetic core, thereby significantly reducing the risk of local saturation of the magnetic core and increased eddy current loss.

[0119] Furthermore, since the first sub-conductor is located in the internal region of multiple first conductors, and the current direction of the first sub-conductor is opposite to that of the first conductor, the magnetic flux generated by each first conductor passes through the adjacent first conductor less, thereby weakening the mutual inductive coupling between adjacent first conductors. This makes the dynamic response of each phase inductor more independent and faster, and greatly improves the voltage regulation capability and stability of the power module under load changes.

[0120] In some embodiments, the first sub-conductors and the multiple second sub-conductors of the multiple second conductors are connected in parallel to each other to form multiple parallel grounding loops, thereby effectively reducing the total impedance of the second conductors, reducing the conduction loss in the conductive loops, and further improving the overall system efficiency.

[0121] For example, Figure 16B Some embodiments according to this disclosure are shown. Figure 2A The magnetic field simulation diagram of the inductor component 10 during operation is shown. Figure 16B and Figure 16A The simulation conditions are consistent.

[0122] like Figure 16B As shown, region 103 is a region with a strong magnetic field, and region 104 is a region with a weak magnetic field. (Comparison) Figure 16Aand Figure 16B It can be seen that, compared to Figure 1 The magnetic field generated by the inductor assembly shown in the diagram exhibits no obvious concentrated or weak field regions in the magnetic field distribution within the inductor assembly 10. The magnetic flux uniformly covers the entire cross-section of the magnetic core, resulting in a more uniform magnetic field and a significant improvement in core utilization. On the other hand, the magnetic field distribution reveals that less magnetic flux generated by each first conductor 101 passes through adjacent first conductors 101, thus reducing the coupling coefficient.

[0123] In some embodiments, the formation process of the inductor assembly 10 may include: prefabricating a magnetic core, processing a conductor, assembling the magnetic core and conductor, and curing and testing. Figure 2B As shown, for example, the magnetic core 100 may include a high-permeability material such as ferrite or magnetic powder core, and the magnetic core 100 is formed into the desired shape through processes such as molding and sintering, for example, a magnetic core including holes and edge grooves. In some embodiments, the magnetic core 100 is a one-piece molded structure, and each region of it uses a material with the same permeability. For example, the magnetic core material around the first conductor 101 is the same as the magnetic core material around the second conductor 102, that is, it has approximately the same permeability. In some embodiments, the first conductor 101 and the second conductor 102 may include metal conductors, such as copper strips; for example, high-purity electrolytic copper can be used, and copper strips of the corresponding shape can be formed by stamping or etching processes. The surface of the copper strip is cleaned, degreased, and micro-roughened, and in some embodiments, a thin layer of high-temperature resistant insulating coating can be coated on the surface of the metal conductor. Next, each conductor is passed through the magnetic core to assemble with the magnetic core. After assembly, the contact interface between the conductor and the magnetic core is fixed by dispensing with high-temperature adhesive or thermosetting resin. Next, the assembled magnetic core and conductor can be cured, for example, by low-temperature curing of the corresponding adhesive layer, thus forming an inductor assembly. Afterwards, preliminary electrical tests can be performed on the manufactured inductor assembly to measure its performance parameters such as inductance, DC resistance, and insulation resistance, thereby selecting suitable inductor assemblies.

[0124] This disclosure provides an inductor module, including the inductor component of any of the above embodiments. The inductor module has the same technical effects as described above for the inductor component.

[0125] In some embodiments, the inductor module further includes a circuit board, and the inductor assembly is embedded in the circuit board.

[0126] In some embodiments, the circuit board has a plurality of first conductive terminals and a plurality of second conductive terminals on one side near the first surface of the inductor assembly, the plurality of first conductive terminals being electrically connected to a plurality of first conductors, and the plurality of second conductive terminals being electrically connected to a plurality of second conductors.

[0127] In some embodiments, a plurality of first conductive terminals and a plurality of second conductive terminals are alternately arranged in at least one direction parallel to the main surface of the circuit board. Alternating the first and second conductive terminals can help to shorten the current loop path and reduce losses when the inductor module is used in a power supply module.

[0128] Figure 6A A schematic perspective view of an inductor module according to some embodiments of the present disclosure is shown; Figure 6B A perspective top view of an inductor module according to some embodiments of the present disclosure is shown; Figure 6C A perspective bottom view of an inductor module according to some embodiments of the present disclosure is shown. Figure 7A A schematic top view of an inductor module according to some embodiments of the present disclosure is shown; Figure 7B A schematic plan view of an inductor module according to some embodiments of the present disclosure is shown, for example, a plan view taken along the plane where the inductor component is located. Figure 8A and Figure 8B A schematic cross-sectional view of an inductor module according to some embodiments of the present disclosure is shown.

[0129] refer to Figures 6A to 6C In some embodiments, the inductor module IM includes an inductor assembly 10 and a circuit board 20. The inductor assembly 10 may be the inductor assembly of any of the above embodiments, and... Figure 6A by Figure 2A The inductor component shown is used as an example for illustration. The circuit board 20 can be, for example, a printed circuit board.

[0130] In some embodiments, the inductor assembly 10 is embedded in a circuit board 20, which includes conductive terminals and conductive lines electrically connected to the inductor assembly 10. For example, multiple conductive terminals may be disposed on opposite surfaces of the circuit board 20 in a first direction.

[0131] refer to Figure 6A , Figure 6B , Figure 7A and Figure 7BIn some embodiments, the circuit board 20 has a plurality of conductive terminals 120 on the side near the first surface 100a of the inductor assembly 10. Each of the plurality of conductive terminals 120 is electrically connected to a corresponding first conductor 101 or a second conductor 102, thereby serving as an external connection terminal of the inductor assembly 10. For example, the plurality of conductive terminals 120 includes a plurality of first conductive terminals S1 and a plurality of second conductive terminals G1. Each of the plurality of first conductive terminals S1 is electrically connected to a corresponding first conductor 101, and each of the plurality of second conductive terminals G1 is electrically connected to a corresponding second conductor 102. In some embodiments, the first conductive terminal S1 may also be referred to as a switch terminal, for example, the connection node of two power switches corresponds to a switch terminal, and the second conductive terminal G1 may also be referred to as a ground terminal. Here, the switch terminal and the ground terminal correspond to the conductive terminals disposed on the inductor module.

[0132] In some embodiments, the plurality of conductive terminals 120 may be arranged in an array along a direction parallel to the main surface of the circuit board 20, for example, in an array comprising multiple rows and columns. The plurality of first conductive terminals S1 and the plurality of second conductive terminals G1 may be alternately arranged in at least one direction parallel to the main surface of the circuit board (e.g., row direction and / or column direction). In this document, the alternating arrangement of components A and B in a certain direction means that a first component unit including one or more components A and a second component unit including one or more components B are alternately arranged, and the number of corresponding components included in each component unit may be the same or different; that is, it includes the case of A and B alternating one-to-one (e.g., ABABAB…), and also includes the case where some or all of the first component units each include multiple A and / or some or all of the second component units each include multiple B and are alternately arranged, such as AABBAABB…, ABAABBAB…, etc., and also includes the case where other components C are inserted into adjacent first and second component units, such as AACBBCAACBB, etc.

[0133] For example, the plurality of conductive terminals 120 may include a plurality of terminal rows and a plurality of terminal columns. In each terminal row, a plurality of first conductive terminals S1 and a plurality of second conductive terminals G1 may be alternately arranged in a first arrangement direction AD1. In each terminal column, a plurality of conductive terminals of the same type are arranged in a column in a second arrangement direction AD2. For example, the plurality of terminal columns may include a first conductive terminal column and a second conductive terminal column. The first conductive terminal column includes a plurality of first conductive terminals S1 arranged along the second arrangement direction AD2, and the second conductive terminal column includes a plurality of second conductive terminals G1 arranged along the second arrangement direction AD2. The first conductive terminal column and the second conductive terminal column are alternately arranged in the first arrangement direction AD1.

[0134] In some embodiments, each conductor of the inductor assembly 10 may be connected to a plurality of conductive terminals. A plurality of first conductive terminals S1 connected to the same first conductor 101 may be disposed in the same terminal region and may be electrically connected to the first conductor 101 through conductive lines in the circuit board 20. In some embodiments, a plurality of second conductive terminals G1 may be distributed in a plurality of terminal regions to alternate with the first conductive terminals.

[0135] In some embodiments, the circuit board includes a plurality of first terminal regions, each corresponding to a plurality of first conductors. In each pair of corresponding first terminal regions and first conductors, the first terminal region includes a plurality of first conductive terminals electrically connected to the same first conductor. Furthermore, in the corresponding first terminal regions and first conductors, the orthographic projection of the first conductor on the main surface of the circuit board overlaps with the orthographic projection of a portion of the first conductive terminals in the first terminal region on the main surface of the circuit board. This configuration reduces the connection path between the first conductive terminals and the first conductors, thereby reducing the impedance of the current loop, decreasing conduction losses, and ultimately improving power supply efficiency and device performance.

[0136] In some embodiments, the conductive lines of the circuit board include one or more line layers that electrically connect a plurality of first conductive terminals and a first conductor, and the orthographic projections of the plurality of first conductive terminals on the main surface of the circuit board lie within the orthographic projections of the one or more line layers on the main surface of the circuit board. This enables electrical connections between the plurality of first conductive terminals and the first conductor, for example, achieving electrical connections with relatively low conduction losses.

[0137] In some embodiments, a portion of the second conductive terminals are distributed in a plurality of first terminal regions.

[0138] In some embodiments, the circuit board further includes a second terminal region located outside the plurality of first terminal regions, and another portion of the plurality of second conductive terminals is located within the second terminal region. In some embodiments, at least a portion of the second terminal region is located between adjacent first terminal regions within the plurality of first terminal regions. This arrangement of the second conductive terminals facilitates their staggered distribution with the first conductive terminals.

[0139] refer to Figure 7A and Figure 7B For example, the circuit board 20 includes a plurality of first terminal regions R1 corresponding to a plurality of first conductors 101, such as first terminal regions R1a, R1b, R1c, and R1d respectively corresponding to a plurality of first conductors 101a, 101b, 101c, and 101d. Each first terminal region R1 is provided with a plurality of first conductive terminals S1 electrically connected to the corresponding first conductor 101.

[0140] refer to Figure 7A , Figure 7B and Figure 8A In the correspondingly configured first terminal region R1 and first conductor 101, a plurality of first conductive terminals S1 are electrically connected to the first conductor 101 through conductive lines 121. The conductive lines 121 may include one or more line layers that electrically connect the plurality of first conductive terminals S1 and the first conductor 101, as well as conductive vias. The conductive vias are located between the line layers and the first conductor, between adjacent line layers, and / or between the line layers and the conductive terminals to provide electrical connections between the corresponding conductive components. The orthographic projection of the first conductor 101 on the main surface of the circuit board 20 overlaps with the orthographic projection of at least a portion of the first conductive terminals S1 in the first terminal region R1 on the main surface of the circuit board 20, and the orthographic projections of the plurality of first conductive terminals S1 on the main surface of the circuit board 20 are located within the orthographic projections of one or more line layers of the conductive lines 121 on the main surface of the circuit board 20.

[0141] In some embodiments, a portion of the second conductive terminals G1 are distributed in a plurality of first terminal regions R1, such that each first terminal region R1 includes alternating first conductive terminals S1 and second conductive terminals G1, thereby making the conductive circuit from the first conductive terminal S1 to the second conductive terminal G1 have a shorter conductive path.

[0142] In some embodiments, the circuit board 20 further includes one or more second terminal regions R2 located outside of a plurality of first terminal regions R1, and another portion of the plurality of second conductive terminals G1 located in the second terminal region R2. In some embodiments, at least a portion of the second terminal region R2 is located between adjacent first terminal regions R1, and the second conductive terminals G1 in the second terminal region R2 may be located between adjacent first conductive terminals S1 in adjacent first terminal regions R1.

[0143] In some embodiments, the orthographic projections of a portion of the second conductive terminals G1 on the main surface of the circuit board 20 overlap with the orthographic projections of the second conductor 102 on the main surface of the circuit board 20, thereby shortening the connection distance between the second conductive terminals G1 and the second conductor 102. For example, the orthographic projection of the first sub-conductor 102a on the main surface of the circuit board 20 overlaps with the orthographic projections of one or more second conductive terminals G1 on the main surface of the circuit board 20. For example, the conductive terminals located in the central region of the circuit board 20 are second conductive terminals G1 corresponding to the first sub-conductor 102a.

[0144] It should be understood that Figure 8A Only schematically shown are the conductive lines and conductive terminals of the inductor assembly 10 and circuit board 20 in the inductor module that are electrically connected to the first conductor 101; Figure 8BA more detailed structural diagram of the circuit board in the inductor module is shown.

[0145] refer to Figure 8B In some embodiments, the circuit board 20 includes a core layer 21 and build-up layers 22 and 23 disposed on opposite sides of the core layer 21 in a first direction D1. In some embodiments, the inductor component 10 may be embedded in the core layer 21 of the circuit board 20; for example, the core layer 21 includes an insulating layer and conductive vias penetrating the insulating layer, and a groove is provided in the insulating layer, and the inductor component 10 may be disposed in the groove of the insulating layer of the core layer 21. In this document, conductive vias refer to various conductive structures embedded in vias or grooves in an insulating layer to electrically connect components located on both sides thereof. For example, conductive vias may be or include buried vias located in the inner layer of the circuit board and not penetrating the entire circuit board, blind vias located in the surface layer of the circuit board and not penetrating the entire circuit board, through vias penetrating the entire circuit board, etc., which can be understood in conjunction with the context and related figures.

[0146] Stacked layers 22 and 23 each include a stacked insulating layer and a conductive wiring layer. The conductive wiring layer includes conductive traces (e.g., copper cladding) and conductive vias, and the outermost layer of the conductive wiring layer includes conductive terminals (e.g., conductive pads) for use as external connection terminals of the inductor module. In some embodiments, the circuit board 20 may also include a solder mask layer located on the side of each stacked layer away from the core layer, the solder mask layer covering the conductive wiring layer and exposing the conductive terminals.

[0147] In some embodiments, the manufacturing process of the inductor module IM may include the following steps: slotting and pre-processing the circuit board; for example, forming an embedding groove matching the shape of the inductor component on the inner substrate (i.e., core layer) of the circuit board, such as FR-4, using a slotting process such as laser processing, with a gap reserved for resin filling; embedding the pre-fabricated inductor component into the core layer of the circuit board, for example, placing a tested and qualified inductor component into the embedding groove, using epoxy resin or molding compound with high thermal conductivity and low expansion coefficient for potting and filling to fill the gap between the inductor component and the circuit board, and ensuring that the conductor leads of the inductor component are aligned with the circuit board. The corresponding conductive components are aligned, and the circuit board completely covers the perimeter of the magnetic core; a lamination process is performed to form a stacked layer, for example, the inner layer board embedded in the inductor component is stacked with other signal layers, power layers, insulating layers, etc. according to design requirements, and then a lamination process is performed to form an integrated structure; drilling and through-hole plating are performed, drilling is performed at the locations where conductive through-holes need to be formed, and conductive through-holes can be formed through chemical copper plating and electroplating processes, thereby forming a conductive path; then the outer layer circuitry and surface treatment are performed, for example, circuit traces and conductive terminals (e.g., pads) are formed on the outer layer of the circuit board through patterning processes.

[0148] This disclosure provides a power supply module, including the inductor module described in any of the above embodiments. The power supply module has the same technical effects as described above regarding the inductor module.

[0149] refer to Figures 6A to 6C In some embodiments, in the power module, the side of the inductor module IM near the first surface 100a of the magnetic core 10 can be configured to be connected to the power module, and the plurality of conductive terminals 120 disposed on this side, in addition to including Figure 7A In addition to the switch terminal S1 and ground terminal G1 shown, other types of functional terminals such as voltage input (Vin) terminals and signal terminals may also be included, and these terminals may be located, for example, in the area near the edge of the circuit board. In some embodiments, the side of the inductor module IM near the second surface of the magnetic core 10 may be configured to connect to an external system board and load, and may be provided with a plurality of conductive terminals 130. Figure 6CThe inductor module IM serves as the connection point between the inductor module and external system boards and loads. For example, the multiple conductive terminals 130 may include functional terminals such as voltage input (Vin) terminals, voltage output (Vout) terminals, pulse width modulation (PWM) signal terminals, and auxiliary power supply terminals, and this disclosure is not limited thereto. For example, during the operation of the power module including the above-mentioned inductor module, current flows from the voltage input terminal of the inductor module into the power chip of the power module and then flows out of the power module. It then flows through the power conductor via the conductive terminal 120 of the inductor module, and then flows to the load via the conductive terminal 130 of the inductor module. Finally, it returns through the grounding conductor at the center and edge of the magnetic core, thereby forming a complete loop with low impedance and high symmetry.

[0150] In the power module, the aforementioned configuration of the inductor module results in a more uniform magnetic field distribution within the core, thereby improving the inductor module's performance and reliability, and significantly enhancing the power module's voltage regulation capability and stability. Furthermore, the arrangement of various conductors and terminals reduces circuit impedance and conduction losses, further improving the overall system efficiency.

[0151] Another important component of a power module is the power module, and the performance of the power module also has a significant impact on the overall performance and stability of the power module.

[0152] This disclosure provides a power module, including: a first circuit board having a first side and a second side opposite to each other in a first direction; a power chip and a plurality of input capacitors disposed on opposite sides of at least one layer of the first circuit board in the first direction, and at least partially overlapping each other, and electrically connected through the first circuit board; and a plurality of conductive terminals disposed on the first side of the first circuit board and electrically connected to the power chip, wherein the plurality of conductive terminals include a plurality of switching terminals and a plurality of grounding terminals, and the plurality of switching terminals and the plurality of grounding terminals are alternately arranged in at least one direction parallel to the main surface of the first circuit board.

[0153] In the power module of this disclosure, by placing the power chip and the input capacitor on opposite sides of at least one layer of the circuit board, the connection path between the power chip and the input capacitor can be shortened, thereby reducing loop inductance and loop impedance, and improving the performance and stability of the power module and the power supply module including it. In some embodiments, alternating the arrangement of switching terminals and grounding terminals can help reduce the loop conduction path from the power terminal to the ground terminal and reduce losses.

[0154] Figure 9 A schematic cross-sectional view of a power module according to some embodiments of the present disclosure is shown. Figure 10 A bottom view of a power module according to some embodiments of the present disclosure is shown.

[0155] refer to Figure 9 and Figure 10 In some embodiments, the power module PM includes a circuit board 40, a power chip 200, an input capacitor 210, a plurality of conductive terminals 220, and a plurality of additional connection terminals 211. The circuit board 40 has a first side 40a and a second side 40b opposite each other in a first direction D1; the power chip 200 and the input capacitor 210 are disposed on opposite sides of at least one layer of the circuit board 40 in the first direction D1 and are electrically connected to each other through the circuit board 40. At least one layer of the circuit board may include a core layer stacked in the first direction and one or more material layers of the stacked layers.

[0156] The power chip 200 and the plurality of input capacitors 210 at least partially overlap each other in a first direction D1. Herein, overlapping of the plurality of components in a certain direction means that the plurality of components overlap on a reference plane perpendicular to that direction; that is, the orthographic projection of the power chip 200 on a reference plane perpendicular to the first direction D1 (e.g., the main surface of the circuit board 40) overlaps with the orthographic projections of the plurality of input capacitors 210 on that reference plane. In some embodiments, the orthographic projections of most of the input capacitors 210 on the main surface of the circuit board lie within the orthographic projection of the power chip 200 on the main surface of the circuit board, which can help shorten the connection path between the plurality of input capacitors 210 and the power chip 200.

[0157] In some embodiments, a plurality of conductive terminals 220 are disposed on a first side 40a of the circuit board 40 and can be electrically connected to the power chip 200 via conductive lines in the circuit board 40. The plurality of conductive terminals 220 may include various types of terminals, such as a switch terminal S2, a ground terminal G2, a voltage input terminal Vi, and a signal terminal SP. In some embodiments, the conductive terminals may be conductive pads exposed on the surface of the circuit board. In some embodiments, the plurality of conductive terminals 220 may include suitable types of pads such as metal pads and surface mount technology (SMT) pads.

[0158] Those skilled in the art should understand that power modules and inductor modules include multiple conductive terminals with similar or identical functions. For example, an inductor module includes a switch terminal S1, and a power module includes a switch terminal S2. Switch terminals S1 and S2 are conductive terminals of the same type, only located in different modules. For simplicity, the names of conductive terminals of the same type are not distinguished. Generally speaking, a switch terminal refers to the conductive terminal corresponding to the connection node of a power switch. For example, in a Buck circuit, the conductive terminal corresponding to the connection node SW between two power switches is a switch terminal.

[0159] In some embodiments, a plurality of conductive connectors 30 may be provided on the side of the plurality of conductive terminals 220 away from the circuit board 40. The plurality of conductive connectors 30 are respectively provided corresponding to the plurality of conductive terminals 220 and provide electrical connection between the plurality of conductive terminals 220 and other components (e.g., inductor modules). For example, each conductive connector 30 is connected to a corresponding conductive terminal 220, and each conductive terminal 220 can serve as an external connection terminal of the power module PM, and can be further electrically connected to other components outside the power module PM through the conductive connectors 30.

[0160] In some embodiments, the input capacitor 210 is electrically connected to the conductive lines of the circuit board 40 via a plurality of additional connection terminals 211. For example, one end of the input capacitor 210 can be electrically connected to the voltage input terminal Vi via the additional connection terminals 211 and the conductive lines in the circuit board 40, and can thus be configured to be connected to the voltage input terminal. The other end of the input capacitor 210 can be electrically connected to the ground terminal G2 via the additional connection terminals 211 and the conductive lines in the circuit board 40, and can thus be configured to be connected to the ground terminal. For example, the additional connection terminals 211 can also be conductive pads exposed on the surface of the circuit board, or surface mount pads, such as surface mount pads implemented by SMT process.

[0161] It should be understood that, in this document, the multiple conductive terminals of the power module refer to terminals that are external connection terminals, corresponding to conductive connectors and capable of being further electrically connected to external components via conductive connectors, excluding additional connection terminals that are directly connected to the input capacitor.

[0162] refer to Figure 10 The diagram schematically shows the conductive connectors 30 and input capacitors 210 on the circuit board 40. The corresponding conductive terminals 220 of the circuit board 40 are covered by the conductive connectors 30 and are not shown. However, it should be understood that the circuit board 40 has a corresponding conductive terminal 220 at the location of each conductive connector 30. Therefore, the component symbol for the conductive terminal 220 is also marked at the location of each conductive connector in the diagram, indicating that a conductive terminal connected to that conductive connector is provided at the corresponding position on the surface of the circuit board. Additional connection terminals are covered by the input capacitor 210, while... Figure 10 Not shown in the image. Furthermore, for ease of understanding, Figure 9 The diagram schematically shows the input capacitor 210 positioned immediately adjacent to the voltage input terminal Vi and the ground terminal G2, but this disclosure is not limited thereto; Figure 10 As shown, the input capacitors 210 can be adjacent to or not adjacent to the voltage input terminal Vi and the ground terminal G2, respectively.

[0163] In some embodiments, the orthographic projections of multiple input capacitors on the main surface of the first circuit board and the orthographic projections of multiple conductive terminals on the main surface of the first circuit board are alternately arranged in at least one direction parallel to the main surface of the first circuit board. By arranging the multiple input capacitors and conductive terminals alternately, the distances between each input capacitor and the power chip in the first direction, and the distances between each conductive terminal and the power chip in the first direction, are both smaller, thereby reducing the connection path between the power chip and the input capacitors and corresponding conductive terminals.

[0164] For example, multiple switching terminals and multiple grounding terminals are arranged alternately in a first arrangement direction, and at least some of the input capacitors and at least some of the conductive terminals are arranged alternately in a second arrangement direction, wherein the first and second arrangement directions intersect. In some embodiments, the direction in which the switching terminals and grounding terminals are arranged alternately is different from the direction in which the input capacitors and conductive terminals are arranged alternately, which can minimize the connection path between the switching terminals and grounding terminals while optimizing the layout.

[0165] refer to Figure 9 and Figure 10 In some embodiments, the plurality of conductive terminals 220 include a plurality of switching terminals S2 and a plurality of grounding terminals G2, and the plurality of switching terminals S2 and the plurality of grounding terminals G2 may be alternately arranged in at least one direction parallel to the main surface of the circuit board 40. In some embodiments, the orthographic projections of the plurality of input capacitors 210 on the main surface of the circuit board 40 and the orthographic projections of the plurality of conductive terminals 220 on the main surface of the circuit board 40 are alternately arranged in at least one direction parallel to the main surface of the circuit board 40. For brevity, when describing the positional relationship between the input capacitors and conductive terminals below, the alternate arrangement of input capacitors and conductive terminals means that the orthographic projections of the input capacitors on the main surface of the circuit board and the orthographic projections of the conductive terminals on the main surface of the circuit board are alternately arranged in a direction parallel to the main surface of the circuit board. It should be understood that the alternate arrangement of the plurality of components in a certain direction includes the case where the components are spaced apart from each other, and includes the case where adjacent components partially overlap each other.

[0166] For example, such as Figure 10As shown, the switching terminals S2 and grounding terminals G2 of the plurality of conductive terminals 220 may be alternately arranged in a first arrangement direction AD1 parallel to the main surface of the circuit board; at least some of the input capacitors 210 and at least some of the conductive terminals 220 of the plurality of conductive terminals 220 may be alternately arranged in a second arrangement direction AD2, wherein the first arrangement direction AD1 and the second arrangement direction AD2 intersect each other, for example, substantially perpendicular. However, this disclosure is not limited thereto. In other embodiments, the switching terminals S2 and grounding terminals G2 may also be alternately arranged in the second arrangement direction AD2; the input capacitors 210 may also be alternately arranged with the plurality of conductive terminals in the first arrangement direction AD1.

[0167] In some embodiments, the plurality of conductive terminals include a plurality of terminal rows and a plurality of terminal columns, and each terminal row includes a plurality of switch terminals and a plurality of ground terminals arranged alternately along a first arrangement direction, and each terminal column includes a plurality of switch terminals or a plurality of ground terminals arranged along a second arrangement direction.

[0168] In some embodiments, in one or more terminal rows of a plurality of terminal rows, the orthographic projection of the space between each adjacent conductive terminal in the second arrangement direction onto the main surface of the first circuit board overlaps with the orthographic projection of one or more input capacitors onto the main surface of the first circuit board.

[0169] In some embodiments, the plurality of input capacitors include a plurality of capacitor rows, each plurality of capacitor rows including a plurality of input capacitors arranged along a first arrangement direction, and the plurality of input capacitor rows and the plurality of terminal rows are arranged alternately in a second arrangement direction.

[0170] refer to Figure 9 and Figure 10 For example, multiple conductive terminals 220 can be arranged in a multi-row, multi-column array along a first arrangement direction AD1 and a second arrangement direction AD2 parallel to the main surface of the circuit board, for example, multiple terminal rows and multiple terminal columns. For example, the circuit board 40 includes a main area BR and a peripheral area PR, the peripheral area PR surrounding the main area BR and close to the edge of the circuit board 40. The orthographic projection of the power chip 200 on the main surface of the circuit board 40 is located within the main area BR. In some embodiments, multiple switching terminals S2 and multiple grounding terminals G2 are disposed within the main area BR. Partial voltage input terminals Vi, signal terminals SP and / or other types of terminals may be disposed in the peripheral area PR; or, partial voltage input terminals Vi and / or signal terminals SP may also be disposed within the main area BR.

[0171] In some embodiments, within the main body region BR, each terminal row includes a plurality of switching terminals S2 and a plurality of grounding terminals G2 alternately arranged along a first arrangement direction AD1, and the plurality of conductive terminals 220 in each terminal column may be conductive terminals of the same type arranged along a second arrangement direction AD2. For example, each terminal column may include a plurality of switching terminals S2 or a plurality of grounding terminals G2 arranged along the second arrangement direction AD2. For example, the plurality of terminal columns include a first terminal column and a second terminal column, the first terminal column including a plurality of switching terminals S2 arranged along the second arrangement direction AD2, and the second terminal column including a plurality of grounding terminals G2 arranged along the second arrangement direction AD2, the first terminal column and the second terminal column being alternately arranged in the first arrangement direction AD1.

[0172] In some embodiments, at least a portion of the plurality of input capacitors 210 are disposed within the main body region BR; for example, most of the input capacitors 210 are disposed within the main body region BR; for example, some of the input capacitors 210 may also be disposed within the peripheral region PR. In some embodiments, the number of input capacitors 210 within the main body region BR is greater than the number of input capacitors 210 within the peripheral region PR.

[0173] refer to Figure 9 and Figure 10 In some embodiments, within the main body region BR, the orthographic projection of each input capacitor 210 on the circuit board 40 lies between the orthographic projections of adjacent conductive terminals 220 on the circuit board 40. In some embodiments, the orthographic projection of the input capacitor 210 on the circuit board 40 may also overlap with the orthographic projection of the corresponding conductive terminal 220 on the circuit board 40, and the input capacitor 210 is electrically connected to the corresponding conductive terminal 220.

[0174] In some embodiments, in one or more terminal rows, the orthographic projection of the space between each adjacent conductive terminal 220 in the second arrangement direction AD2 onto the main surface of the circuit board 40 overlaps with the orthographic projection of one or more input capacitors 210 onto the main surface of the circuit board 40.

[0175] For example, multiple input capacitors 210 and multiple conductive terminals 220 may be arranged alternately in the second arrangement direction AD2. For example, multiple input capacitors 210 may be distributed in the space between multiple terminal rows.

[0176] For example, the multiple input capacitors 210 include multiple capacitor rows, each capacitor row including multiple input capacitors 210 arranged along a first arrangement direction AD1, and the multiple input capacitor rows and multiple terminal rows may be arranged alternately in a second arrangement direction AD2. In some embodiments, a capacitor row may include only input capacitors 210 and additional connection terminals overlapping with them; or one or more other types of conductive terminals, such as ground terminals, may be inserted between adjacent input capacitors 210 in a capacitor row.

[0177] In some embodiments, the power module PM and Figure 2A The inductor module IM shown is configured to form a voltage regulation module together with it. Multiple conductive terminals of the power module PM can be configured one-to-one with the multiple conductive terminals of the inductor module IM, and have a roughly identical arrangement. For example, a ground terminal G2 is provided in the central region of the circuit board 40. This ground terminal G2 is arranged between adjacent terminal rows in the second arrangement direction AD2 and can also be referred to as the center ground terminal G2. In the first arrangement direction AD1, multiple input capacitors 210 are arranged on opposite sides of the center ground terminal G2. The area where these input capacitors 210 and the center ground terminal G2 are located can also be referred to as the center capacitor area. That is, the center ground terminal G2 is inserted between adjacent input capacitors in this center capacitor area.

[0178] In some embodiments, the central capacitor region may include a plurality of input capacitors 210 arranged along a first arrangement direction AD1 and / or one or more input capacitors 210 arranged along a second arrangement direction AD2; for example, the size of the central capacitor region in the second arrangement direction AD2 may be larger than the size of other capacitor rows in the second arrangement direction AD2, and one or more areas of the central capacitor region may include a plurality of input capacitors 210 arranged along the second arrangement direction AD2. In the central capacitor region, the plurality of input capacitors 210 may be positioned with the same or different orientations to maximize the utilization of the area in the space other than the central ground terminal G2. For example, the plurality of input capacitors 210 may include an input capacitor 210a positioned with a first orientation and / or an input capacitor 210b positioned with a second orientation. An input capacitor 210a positioned with a first orientation means that its long side extends in a direction substantially the same as the first arrangement direction AD1, and an input capacitor 210a positioned with a second orientation means that its long side extends in a direction substantially the same as the second arrangement direction AD2.

[0179] refer to Figure 7A , Figure 7B and Figure 10 In some embodiments, the center ground terminal G2 of the power module PM is configured to correspond to the center ground terminal G1 in the inductor module IM and the ground conductor 101 of the inductor assembly. For example, in the inductor assembly, no power conductors are provided on opposite sides of the ground conductor 101 in the first arrangement direction AD1. Therefore, no switch terminals are provided on opposite sides of the center ground terminal in the first arrangement direction in each circuit board. This allows input capacitors to be provided in this area, for example, more input capacitors can be provided in the area between other terminal rows to optimize space utilization. Moreover, the switch terminals are provided in the terminal area corresponding to the power conductors, thereby simultaneously optimizing the connection path between the corresponding terminals and conductors, as well as the connection path between the input capacitors, conductive terminals, and power chips.

[0180] Continue to refer to Figure 9 and Figure 10 In some embodiments, at least a portion of the plurality of switch terminals S2, at least a portion of the plurality of ground terminals G2, and the orthographic projection of the plurality of input capacitors 210 on the main surface of the circuit board 40 are located within the orthographic projection of the power chip 200 on the main surface of the circuit board 40.

[0181] In some embodiments, the power module may include one or more power chips; for example, the power chips are embedded in a circuit board or located on the surface of the circuit board to form a multiphase conversion circuit. The overlap area between the orthographic projection of the power chips on the main surface of the circuit board and the main area of ​​the circuit board is greater than 60% of the area of ​​the main area. In some embodiments, the orthographic projection of the power chips on the main surface of the circuit board is located in the main area of ​​the circuit board.

[0182] For example, the main area of ​​the circuit board includes multiple sub-regions, and the division and number of sub-regions correspond one-to-one with the position and number of power chips on the circuit board. Each sub-region includes multiple switching terminals, multiple grounding terminals, and multiple input capacitors. The number of switching terminals included in any two sub-regions can be the same or different. The absolute value of the difference in the number of switching terminals in any two sub-regions is less than 30% of the number of switching terminals in either of the two sub-regions. The absolute value of the difference in the number of grounding terminals in any two sub-regions is less than 30% of the number of grounding terminals in either of the two sub-regions. The absolute value of the difference in the number of input capacitors in any two sub-regions is less than 30% of the number of input capacitors in either of the two sub-regions. The number of conductive terminals and the number of input capacitors in each sub-region are the same or close, which is beneficial for achieving an even distribution of power in various areas of the circuit board. The overlapping area of ​​the orthographic projection of each power chip on the main surface of the circuit board with one of the sub-regions is greater than 60% of the area of ​​the sub-region. In some embodiments, the orthographic projection of each power chip on the main surface of the circuit board is located within one of the sub-regions.

[0183] Continue to refer to Figure 9 and Figure 10 In some embodiments, four power chips 200 are embedded in the circuit board 40, and the overlap area between the orthographic projection of the four power chips 200 on the main surface of the circuit board 40 and the main body region BR of the circuit board 40 is greater than 60% of the area of ​​the main body region BR. In some embodiments, the orthographic projection of the plurality of power chips 200 on the main surface of the circuit board is located in the main body region BR of the circuit board. For example, the power chip 200 may be a DrMOS, including a plurality of transistors in the power element and a driving circuit for controlling the transistors.

[0184] In some embodiments, the main area BR of the circuit board 40 includes four sub-regions R1', and the overlap area between the orthographic projection of each power chip 200 on the main surface of the circuit board 40 and one of the sub-regions R1' is greater than 60% of the area of ​​the sub-region. In some embodiments, the orthographic projection of each power chip 200 on the main surface of the circuit board 40 is located within a corresponding sub-region R1'.

[0185] In some embodiments, a power chip is embedded in a circuit board or located on the surface of a circuit board. The power chip includes multiple dies to form a multiphase conversion circuit. The area of ​​the orthographic projection of the power chip onto the main surface of the circuit board overlaps with the main area of ​​the circuit board by more than 60% of the area of ​​the main area. In some embodiments, the orthographic projection of the power chip onto the main surface of the circuit board is located in the main area of ​​the circuit board. For example, the power chip may be or formed from a power wafer, which includes multiple die regions and dicing regions located between adjacent die regions. Each die region corresponds to one die (or sub-die). In this example, the multiple dies in the power wafer used for the power module may not need to be cut by a dicing process. That is, the dicing regions between these dies have not undergone a dicing process, allowing these dies to be connected to each other and jointly constitute the power chip. In other words, the power chip may include multiple power dies (or power sub-dies) that are connected to each other, share the same substrate, and are spaced apart by dicing regions located between adjacent dies.

[0186] For example, the overlap area between the orthographic projection of each die on the main surface of the circuit board and a sub-region of the main region is greater than 60% of the area of ​​the sub-region. In some embodiments, the orthographic projection of each die on the main surface of the circuit board is located within a corresponding sub-region. For example, the die may include DrMOS, which includes a plurality of transistors in a power element and drive circuitry for controlling those transistors.

[0187] In some embodiments, the arrangement of the conductive terminals and the input capacitor described above can help reduce the connection path between the power chip and the switching terminals and the grounding terminals, as well as the connection path between the power chip and the input capacitor.

[0188] In some embodiments, one of the power chip and one of the input capacitors is embedded in the circuit board, while the other of the power chip and one of the input capacitors is disposed on the surface of the circuit board. By embedding the power chip or the input capacitors in the circuit board, the connection path between the power chip and the input capacitors can be further shortened.

[0189] In some embodiments, a plurality of input capacitors are embedded in the first circuit board, and the power chip is disposed on the second side of the first circuit board. Embedding the input capacitors and disposing the power chip on the second side of the circuit board not only shortens the connection path but also facilitates heat dissipation of the chip.

[0190] In some embodiments, the power chip is embedded in the circuit board, and multiple input capacitors are disposed on the first side of the circuit board. In some embodiments, embedding the power chip in the circuit board can not only shorten the connection path between the power chip and the input capacitors / conductive terminals, but also improve the structural stability and reliability of the power module. For example, since the power chip is embedded in the circuit board, the power chip is tightly wrapped by the dielectric material of the circuit board, and the solder joints between the power chip and the circuit board can be omitted, thereby avoiding solder joint fatigue problems caused by mismatch of thermal expansion coefficients, improving the connection reliability between the power chip and the circuit board, and thus improving the reliability of the power module, for example, in harsh temperature environments. Furthermore, embedding the power chip in the circuit board does not occupy the surface space of the circuit board, and the freed surface area can be used to lay out other components or add more functions, which is beneficial for product miniaturization and thinning.

[0191] In some embodiments, the power chip is embedded in the circuit board and can be electrically connected to the circuit board by electroplating. For example, the conductive vias in the circuit board can be directly connected to the conductive pads of the power chip, and the conductive pads of the power chip and the conductive traces in the circuit board can be electrically connected through the conductive vias. This can greatly reduce the connection path between the power chip and the circuit board. For example, the connection path can be extremely short, thereby greatly reducing the loop inductance and on-resistance.

[0192] For example, such as Figure 9 As shown, the power chip 200 is embedded in the circuit board 40, and multiple input capacitors 210 are disposed on the first side 40a of the circuit board 40. The power chip 200 can be electrically connected to the input capacitors 210 and the conductive terminals 220 through conductive lines in the circuit board 40.

[0193] In some embodiments, the first circuit board includes: a first stacked layer disposed between the power chip and a first side of the first circuit board, and including conductive lines electrically connecting the power chip and a plurality of conductive terminals and a plurality of input capacitors.

[0194] In some embodiments, the first circuit board further includes a second stacked layer disposed between the power chip and a second side of the first circuit board, and including a thermally conductive layer connecting the power chip. By providing a thermally conductive layer in the circuit board, a heat dissipation path is provided for the chip to dissipate heat.

[0195] In some embodiments, the overlapping area of ​​the orthographic projection of the thermal conductive layer on the main surface of the first circuit board and the orthographic projection of the power chip on the main surface of the first circuit board accounts for more than 50% of the area of ​​the orthographic projection of the power chip. By setting the area of ​​the thermal conductive layer within the above range, the heat dissipation efficiency of the thermal conductive layer can be ensured, which is beneficial to the heat dissipation of the chip.

[0196] In some embodiments, the power module further includes a heat dissipation component disposed on a second side of the first circuit board and connected to a thermally conductive layer. By providing the heat dissipation component, heat dissipation efficiency is further improved.

[0197] In some embodiments, the first circuit board includes a core layer and a stacked layer disposed on at least one side of the core layer in a first direction, and the power chip is embedded in the core layer of the first circuit board.

[0198] Figure 11A A schematic cross-sectional view showing a more specific structure of a circuit board and a power chip of a power module according to some embodiments of the present disclosure; Figure 11B and Figure 11C A schematic perspective top view of a power module according to some embodiments of the present disclosure is shown.

[0199] refer to Figure 9 and Figure 11A In some embodiments, the circuit board 40 includes a core layer 41 and stacked layers 42 and 43 disposed on opposite sides of the core layer 41 in a first direction D1. For example, stacked layers 42 and 43 may also be referred to as a first stacked layer and a second stacked layer.

[0200] For example, the stacked layer 42 is located between the power chip 200 and the first side 40a of the circuit board 40, and includes conductive lines that electrically connect the power chip 200 to a plurality of conductive terminals 220 and an input capacitor 210 located on the first side of the circuit board 40. The stacked layer 43 may be located between the power chip 200 and the second side 43 of the circuit board 40, and includes one or more thermally conductive layers connected to the power chip 200. For example, the conductive lines of the stacked layer 42 and the thermally conductive layers of the stacked layer 43 both include metallic materials. For example, the conductive lines include metal traces and vias, and the thermally conductive layers include metal traces and / or metal layers and vias.

[0201] For example, the power chip 200 can be embedded in the core layer 41 of the circuit board 40, and can be electrically connected to the input capacitor 210, the conductive terminal 220 and other components through the conductive lines in the stacked layer 42, and can be dissipated through the heat-conducting layer in the stacked layer 42.

[0202] In some embodiments, the core layer 41 of the circuit board 40 includes an insulating material and has a groove, in which the power chip 200 is disposed. The stacked layers 42 and 43 each include an insulating structure composed of one or more insulating layers, and the conductive lines and heat-conducting layers may each include a conductor layer, such as a metal layer, stacked with the insulating layers.

[0203] For example, circuit board 40 includes metal layers M1, M2, M3, M4, M5, M6, MB, and MT. Metal layers M1 to M3 are located in stacked layers 42, and multiple conductive vias are provided between adjacent metal layers, between metal layer M1 and power chip 200, and between metal layer M3 and metal layer MB to provide electrical connections between adjacent metal layers, between metal layers and power chip, and between metal layer M3 and metal layer MB. Metal layer MB is the outermost metal layer of the multiple metal layers in circuit board 40 closest to its first side, and includes multiple conductive terminals 220. Metal layers M1 to M3 may each include multiple conductive traces, and together with the multiple conductive vias, they form conductive lines that electrically connect the power chip 200 and the multiple conductive terminals 200.

[0204] In some embodiments, the chip is embedded in the circuit board, and the parasitic inductance and resistance of the loop are minimized by replacing long surface traces with extremely short vertical interconnects (e.g., laser blind vias), resulting in lower conduction losses and improved efficiency.

[0205] In some embodiments, metal layers M4 to M6 are located in the stacked layer 43. Metal layers M4 to M6, as well as the outermost metal layer MT located near the second side of the circuit board 40, can all be used as thermally conductive layers for heat dissipation of the power chip 200. For example, one or more of metal layers M4 to M6 and MT may comprise a whole layer of metal material to facilitate heat dissipation. Multiple metal vias may be provided between the metal layers to provide thermal conduction paths between adjacent metal layers. In some embodiments, by using the metal layers in the stacked layer as thermally conductive layers, the heat generated by the power chip embedded in the circuit board can be conducted and dissipated throughout the entire circuit board. The heat is uniformly transferred to the entire substrate heat dissipation area through the metal layers and vias, and can be further absorbed by heat dissipation components disposed above the circuit board, thereby reducing thermal resistance and improving heat dissipation efficiency.

[0206] In some embodiments, the overlapping area of ​​the orthographic projection of the thermal conductive layer (i.e., metal layers M4 to M6, MT) on the main surface of the circuit board 40 and the orthographic projection of the power chip 200 on the main surface of the circuit board accounts for more than 50% of the orthographic projection area of ​​the power chip 200 on the main surface of the circuit board.

[0207] For example, refer to Figures 11A to 11CIn some embodiments, the metal layer in the thermally conductive layer can cover almost the entire surface of the circuit board, thereby achieving higher heat dissipation efficiency. In some embodiments, the metal layer in the thermally conductive layer can also extend to the edge of the circuit board.

[0208] refer to Figure 11A In some embodiments, the circuit board 40 further includes a solder mask layer 45 and a solder mask layer 46, wherein the solder mask layer 45 is located on the side of the stacked layer 42 away from the core layer 41, and the solder mask layer 46 is located on the side of the stacked layer 43 away from the core layer 41. A portion of the metal layer MB is exposed to the solder mask layer 45 and serves as a plurality of conductive terminals 220. A metal layer MT is exposed to the solder mask layer 46 and may be further connected to a heat dissipation component.

[0209] refer to Figure 9 and Figure 10 In some embodiments, the power module PM may further include a heat dissipation component 50, which is disposed on the second side 40b of the circuit board 10 and connected to the thermally conductive layer, so that the heat generated by the power chip 200 can be transferred to the heat dissipation component 50 through the thermally conductive layer and then dissipated through the heat dissipation component 50.

[0210] In some embodiments, such as Figure 9 As shown, the power module PM illustrates a power chip 200. In other embodiments, such as Figure 11C As shown, the power module PM illustrates multiple (e.g., two) power chips 200, all of which may be embedded within the circuit board 40. It should be understood that in various embodiments, the number of power chips 200 is not limited, regardless of whether they are embedded in the circuit board, and can be configured according to product design and requirements.

[0211] Figure 12A A schematic cross-sectional view of a power chip according to some embodiments of the present disclosure is shown. Figure 12B A schematic plan view of a transistor region in a power chip according to some embodiments of the present disclosure is shown.

[0212] refer to Figure 12AIn some embodiments, the power chip 200 includes a substrate 201, a device layer 202, an interconnect layer 203, and a plurality of conductive pads 205. The substrate 201 may be or include a silicon substrate; the device layer 202 is disposed on one side of the substrate 201 and may include a plurality of active and / or passive devices, such as a plurality of power elements (e.g., switching elements), which may include a plurality of transistors. The interconnect layer 203 is disposed on the side of the device layer 203 away from the substrate 201 and may include a dielectric structure and conductive lines (not shown) embedded in the dielectric structure; the plurality of conductive pads 205 are located on the side of the interconnect layer 203 away from the device layer 202 and serve as external connection terminals of the power chip 200. The plurality of conductive pads 205 are electrically connected to corresponding devices in the device layer 202 through conductive lines of the interconnect layer 203. For example, the plurality of conductive pads 205 may include a plurality of first conductive pads PD1, second conductive pads PD2, and third conductive pads PD3. In some embodiments, the plurality of conductive pads 205 may include suitable types of pads such as metal pads and surface mount technology (SMT) pads. In this document, "pad" refers generally to a contact pad used for electrical connection, and is not limited to the method of electrical connection with other components being soldering. For example, pads and other components can be electrically connected in any suitable manner.

[0213] In some embodiments, the power chip includes multiple dies, and the symbol 200 shown in the figure corresponds to one die in the power chip.

[0214] In some embodiments, the power chip includes a transistor region comprising one or more first transistor regions and one or more second transistor regions alternately arranged in a direction parallel to the main surface of the first circuit board; each of the one or more first transistor regions includes one or more first transistors, for example, corresponding to an upper switch or a main power switch in a power circuit; each of the one or more second transistor regions includes one or more second transistors, for example, corresponding to a lower switch or a rectifier switch in a power circuit; for example, the first transistor includes a first electrode configured to be connected to an input voltage terminal and a second electrode electrically connected to a corresponding switch terminal, and the second transistor includes a first electrode electrically connected to a corresponding switch terminal and a second electrode electrically connected to a corresponding ground terminal.

[0215] In some embodiments, the power chip includes a plurality of voltage input pads, a plurality of switch pads, and a plurality of ground pads connected to transistor regions. The first and second terminals of a first transistor are respectively connected to corresponding voltage input pads and switch pads. The first and second terminals of a second transistor are respectively connected to corresponding switch pads and ground pads. The plurality of switch pads are electrically connected to a plurality of switch terminals via conductive lines in a first circuit board. The plurality of ground pads are electrically connected to a plurality of ground terminals via conductive lines in the first circuit board. The plurality of switch pads and the plurality of ground pads are arranged alternately in a direction parallel to the main surface of the first circuit board. For example, the plurality of voltage input pads can be electrically connected to voltage input terminals via conductive lines in the first circuit board.

[0216] refer to Figure 9 , Figure 12A and Figure 12B For example, the device layer 202 of the power chip 200 includes transistor regions TR. For instance, transistor regions TR may include one or more first transistor regions TR1 and one or more second transistor regions TR2 arranged alternately in a direction parallel to the main surface of the chip; the first transistor region TR1 includes one or more first transistors T1 (not specifically shown), and the second transistor region TR2 includes one or more second transistors T2. The number of transistor regions TR shown in the figures is merely illustrative and is not intended to limit the scope of this disclosure. In some embodiments, the number of each transistor region is less than the number of transistors; for example, each transistor region may include multiple transistors.

[0217] In some embodiments, the plurality of conductive pads 205 include a first conductive pad PD1, a second conductive pad PD2, and a third conductive pad PD3 electrically connected to corresponding transistors in the plurality of transistor regions TR. For example, the first conductive pad PD1 may be a switch pad, the second conductive pad PD2 may be a ground pad, and the third conductive pad PD3 may be a voltage input pad. In some embodiments, the plurality of transistors in the transistor regions TR may be electrically connected to the corresponding conductive pads via conductive lines in the interconnect layer 203. For example, each transistor may include a control electrode, a first electrode, and a second electrode; wherein one of the first electrode and the second electrode is a source electrode, and the other of the first electrode and the second electrode is a drain electrode. For example, the first electrode of the first transistor T1 is connected to the third conductive pad PD3 (i.e., the voltage input pad) and may be further configured to be electrically connected to the corresponding voltage input terminal Vi in the power module via conductive lines in the circuit board 40, and the second electrode of the first transistor T1 is connected to the first conductive pad PD1 (i.e., the switch pad) and may be further configured to be electrically connected to the corresponding switch terminal S2 in the power module via conductive lines in the circuit board 40. For example, the first terminal of the second transistor T2 is connected to the first conductive pad PD1 (i.e., the switch pad), and can be further configured to be electrically connected to the corresponding switch terminal S2 in the power module via conductive lines in the circuit board 40. The second terminal of the second transistor T2 is connected to the second conductive pad PD2 (i.e., the ground pad), and can be further configured to be electrically connected to the corresponding ground terminal G2 in the power module via conductive lines in the circuit board 40.

[0218] In some embodiments, multiple transistors in each transistor region TR are configured to be electrically connected to a switch terminal S2 (e.g., a switch terminal connected to the same power conductor in an inductor module), a ground terminal G2, and an input capacitor 210, all within the same conductive network. Alternating the arrangement of the first and second transistors in the transistor region TR allows for smaller vertical distances between each transistor and its corresponding conductive terminal and input capacitor, thus enabling shorter connection paths.

[0219] In some embodiments, different types of pads among the plurality of conductive pads 205 of the power chip 200 may be arranged alternately in at least one direction parallel to the main surface of the chip. For example, a plurality of first conductive pads PD1 and a plurality of second conductive pads PD2 are arranged alternately in a direction parallel to the main surface of the chip. In this document, the main surface of the power chip is substantially parallel to the main surface of the circuit board, that is, the direction parallel to the main surface of the chip is also the direction parallel to the main surface of the circuit board.

[0220] In some embodiments, the number of multiple conductive pads 205 of the power chip 200 is greater than the number of multiple conductive terminals 220 of the circuit board 40. For example, the number of multiple switch pads and multiple ground pads is greater than the number of multiple switch terminals and ground terminals of the circuit board; the number of multiple transistor regions is greater than the number of multiple switch pads and ground pads of the power chip 200, and the number of multiple transistors is greater than the number of multiple transistor regions.

[0221] Figure 12C This diagram schematically illustrates the planar arrangement of multiple conductive pads on a power chip.

[0222] refer to Figure 12C In some embodiments, the plurality of conductive pads 205 include a plurality of first conductive pads PD1, a plurality of second conductive pads PD2, a plurality of third conductive pads PD3, and a plurality of fourth conductive pads PD4. For example, the first conductive pad PD1 may be a switch pad and is configured to be electrically connected to the second terminal of the first transistor and the first terminal of the second transistor of the power chip 200, the switch terminal of the circuit board 40, the switch terminal of the circuit board in the inductor module, and the first conductor of the inductor assembly; the second conductive pad PD2 may be a ground pad and is configured to be electrically connected to the second terminal of the second transistor of the power chip 200, the ground terminal of the circuit board 40, the ground terminal of the circuit board in the inductor module, and the second conductor of the inductor assembly. For example, the third conductive pad PD3 may be a voltage input terminal and is configured to be connected to a voltage input terminal, for example, it may be configured to be electrically connected to the first terminal of the first transistor, the voltage input terminal of the circuit board 40, and the voltage input terminal of the circuit board in the inductor module; the fourth conductive pad PD4 may be a functional terminal, for example, it may be configured to transmit signals, etc.

[0223] In some embodiments, the plurality of pads 205 may be arranged in an array, for example, along a first arrangement direction AD1 and a second arrangement direction AD2 to form an array comprising multiple rows and columns, and including multiple pad rows and multiple pad columns. For example, each pad row includes conductive pads of the same type arranged along the first arrangement direction AD1, and pad rows of different types are alternately arranged along the second arrangement direction AD2.

[0224] For example, multiple pad rows include a first pad row PL1, a second pad row PL2, and a third pad row PL3. The first pad row PL1 includes multiple first conductive pads PD1 arranged along a first arrangement direction AD1, the second pad row PL2 includes multiple second conductive pads PD2 arranged along the first arrangement direction AD1, and the third pad row PL3 includes multiple third conductive pads PD3 arranged along the first arrangement direction AD1. For example, first pad units composed of one or more first pad rows PL1 and second pad units composed of one or more second pad rows PL2 are alternately arranged in the second arrangement direction AD2. The number of pad rows included in each pad unit may be the same or different, and one or more third pad rows PL3 may be arranged between adjacent first pad units and second pad units.

[0225] In some embodiments, each first pad row PL1 is disposed between the second pad row PL2 and the third pad row PL3, thereby making each switch pad PD1 closer to the ground pad PD2 and the voltage input pad PD3.

[0226] refer to Figure 12C In some embodiments, the power chip 200 includes a first pad area PR1 and a second pad area PR2 alternately arranged in a second arrangement direction AD2, each pad area including one or more corresponding pad rows. For example, the first pad area PR1 includes two first pad rows PL1 and a third pad row PL3 located between the two first pad rows PL1, and the second pad area PR2 includes one or more second pad rows PL2. In some embodiments, the pad area located in the central region of the power chip 200 is the second pad area PR2. The arrangement of the plurality of first pad areas PR1 can be similar to and corresponding to the arrangement of the first terminal areas on the circuit board 40 and circuit board 20.

[0227] refer to Figure 10 and Figure 12C For example, the orthographic projection of each first pad area PR1 on the main surface of the circuit board may at least partially overlap with the orthographic projection of the corresponding first terminal area of ​​the circuit board 40 on the main surface of the circuit board. For example, at least a portion of the orthographic projection of the first pad area PR1 on the main surface of the circuit board may be located within the orthographic projection range of the first terminal area R1' on the main surface of the circuit board. In this way, it is beneficial to shorten the connection distance between the switch pad and the switch terminal, shorten the connection distance between the ground pad and the ground terminal, and thus shorten the loop path.

[0228] In some embodiments, the signal pads and / or other types of pads in the fourth pad row PL4 may be located in other areas, such as areas near the chip edge.

[0229] refer to Figure 10 and Figure 12CIn some embodiments, the number of conductive pads 205 on the power chip 200 is greater than the number of conductive terminals 220 on the circuit board 40. For example, the number of switch pads PD1 is greater than the number of switch terminals S1; the number of ground pads PD2 is greater than the number of ground terminals G1.

[0230] In some embodiments, forming a power module including an embedded power chip may include the following process flow: First, a groove is machined in the core layer (or core board) of a circuit board using a grooving process such as high-precision mechanical milling or laser ablation. Then, a high-precision flip-chip placement machine picks up the power chip, and the chip is precisely positioned by identifying alignment marks between the chip and the circuit board groove using machine vision, and then placed into the reserved groove. Electrical connection between the chip and the circuit board is achieved through a specific process, and a special filler adhesive is injected into the gap between the chip and the groove wall. Next, a stacked layer is formed on the opposite side of the core layer where the chip has been embedded. For example, an insulating layer and a conductor layer (e.g., copper foil) can be symmetrically stacked on the opposite side of the core layer, and then placed in a vacuum press for high-temperature pressing. Electrical connection between the chip and the copper foil of the circuit board is achieved through laser processing and electroplating of through-hole copper, and the conductor layer is patterned into the required conductive traces using patterning processes such as exposure, development, and etching. The integrity of the circuit board lines, pads, and solder mask layer is checked by automated optical inspection. The embedding quality of the chip is inspected by X-ray, and the functionality of the embedded chip circuit can be verified subsequently using fixtures and automated test circuits.

[0231] This disclosure provides a voltage regulation module, including a power module according to any embodiment of this disclosure, and having the same technical effects as described herein with respect to the power module.

[0232] In some embodiments, the voltage regulation module further includes an inductor module electrically connected to the power module via a conductive connector and disposed on a first side of the first circuit board in a first direction, wherein the inductor module includes a second circuit board and an inductor assembly.

[0233] In some embodiments, the inductor assembly is embedded in a second circuit board and includes a magnetic core and a plurality of first conductors and a plurality of second conductors extending through the magnetic core in a first direction; the inductor module also includes a plurality of switching terminals and a plurality of grounding terminals disposed on the side of the second circuit board near the power module, and each of the plurality of first conductors is electrically connected to a corresponding switching terminal among the plurality of switching terminals, and each of the plurality of second conductors is electrically connected to a corresponding grounding terminal among the plurality of grounding terminals.

[0234] In some embodiments, the multiple switching terminals of the inductor module are configured one-to-one with the multiple switching terminals of the power module and are electrically connected to each other, and the multiple grounding terminals of the inductor module are configured one-to-one with the multiple grounding terminals of the power module and are electrically connected to each other.

[0235] Figure 13A A schematic cross-sectional view of a voltage regulation module 500 according to some embodiments of the present disclosure is shown. Figure 13B A schematic perspective view of a voltage regulation module according to some embodiments of the present disclosure is shown; Figure 13C and Figure 13D Schematic exploded top and bottom views of a voltage regulation module according to some embodiments of the present disclosure are shown respectively.

[0236] refer to Figures 13A to 13D In some embodiments, the voltage regulation module 500 includes a power module PM, an inductor module IM, and a conductive connector 30. The power module PM and the inductor module IM can be the power module and inductor module described in any embodiment of this disclosure.

[0237] In some embodiments, the inductor module IM is disposed near the first side 40a of the power module PM in the first direction D1, and is electrically connected to the power module PM via a conductive connector 30. The inductor module IM may be... Figures 1 to 8B The inductor module of any of the embodiments described above, and its related structural features can be referred to the relevant description above.

[0238] For example, the inductor module IM includes a circuit board 20, an inductor assembly 10, and multiple conductive terminals 120. The inductor assembly 10 may be embedded in the circuit board 20, and the multiple conductive terminals 120 are located on the side of the circuit board 20 closer to the power module PM. The multiple conductive terminals 120 include multiple switching terminals S1 and a ground terminal G1.

[0239] In some embodiments, one of the circuit board 40 of the power module PM and the circuit board 20 of the inductor module IM may be referred to as a first circuit board, and the other of the circuit board 40 of the power module PM and the circuit board 20 of the inductor module IM may be referred to as a second circuit board; one of the switching terminals S2 of the power module PM and the switching terminals S1 of the inductor module IM may be referred to as a first switching terminal, and the other of the switching terminals S2 and S1 may be referred to as a second switching terminal; correspondingly, one of the grounding terminals G2 of the power module PM and the grounding terminals G1 of the inductor module IM may be referred to as a first grounding terminal, and the other of the grounding terminals G2 and G1 may be referred to as a second grounding terminal.

[0240] In some embodiments, the plurality of conductive terminals 120 of the inductor module IM and the plurality of conductive terminals 220 of the power module PM are arranged in a one-to-one correspondence and electrically connected to each other. For example, the plurality of switching terminals S1 of the inductor module IM and the plurality of switching terminals S2 of the power module PM are arranged in a one-to-one correspondence and electrically connected to each other, and the plurality of ground terminals G1 of the inductor module IM and the plurality of ground terminals G2 of the power module PM are arranged in a one-to-one correspondence and electrically connected to each other. Accordingly, the arrangement of the plurality of conductive terminals 220 in the power module PM is substantially the same as the arrangement of the plurality of conductive terminals 120 in the inductor module IM.

[0241] In some embodiments, the arrangement of multiple conductive terminals in each circuit board and / or the arrangement of multiple conductive pads in the power chip are configured to correspond to the arrangement of the first conductor 101 and the second conductor 102 in the inductor assembly 10, thereby making the connection paths between each pad of the power chip and each terminal of the circuit board and the corresponding conductor of the inductor assembly shorter, thus shortening the current loop path.

[0242] In some embodiments, the conductive connector includes a plurality of conductive posts disposed in a first direction between a first circuit board and a second circuit board, forming an accommodating space between the first circuit board and the second circuit board, and a plurality of input capacitors disposed within the accommodating space.

[0243] In some embodiments, a plurality of input capacitors are soldered to a first circuit board, and there is a gap between the plurality of input capacitors and a second circuit board; or a plurality of input capacitors are soldered to both the first and second circuit boards.

[0244] Continue to refer to Figure 13A In some embodiments, the conductive connector 30 includes a plurality of conductive posts 30a disposed between the circuit board 20 and the circuit board 40 in a first direction D1, forming an accommodating space between the two circuit boards. For example, a plurality of input capacitors 210 may be disposed within this accommodating space and may be soldered to the first side 40a of the circuit board 40. For example, the plurality of conductive posts 30a may include copper posts and may be soldered to corresponding conductive terminals of the circuit boards 20 and 40 using conductive solder. The conductive terminals of the circuit board may be or include conductive pads of the circuit board.

[0245] In some embodiments, the height of the accommodating space between circuit boards 20 and 40 in the first direction D1 may be greater than or equal to (e.g., greater than) the height of the input capacitor 210 in the first direction D1. The input capacitor 210 may be soldered to the first side 40a of the circuit board 40 with conductive solder, and a gap may exist between the input capacitor 210 and the circuit board 20. However, this disclosure is not limited thereto.

[0246] In some embodiments, the second circuit board includes a circuit layer disposed on the side of the magnetic core near the first circuit board, and includes conductive lines electrically connecting a plurality of second switch terminals and a plurality of first conductors, as well as conductive lines electrically connecting a plurality of second ground terminals and a plurality of second conductors.

[0247] In some embodiments, one or more of the plurality of first conductors of the inductor module protrudes from the surface of the magnetic core in a first direction and extends through the second circuit board to expose the surface of the second circuit board near the first circuit board, and serves as at least a portion of the plurality of second switching terminals; one or more of the plurality of second conductors of the inductor module protrudes from the surface of the magnetic core in a first direction and extends through the second circuit board to expose the surface of the second circuit board near the first circuit board, and serves as at least a portion of the plurality of second ground terminals.

[0248] In some embodiments, one or more of the plurality of first conductors of the inductor module further extend through the second circuit board in a first direction, protruding from the surface of the second circuit board near the first circuit board, and further extending to connect with a first switching terminal of the first circuit board; one or more of the plurality of second conductors of the inductor module further extend through the second circuit board in a first direction, protruding from the surface of the second circuit board near the first circuit board, and further extending to connect with a first ground terminal of the first circuit board. One or more conductors of the inductor module protruding from the magnetic core surface or the circuit board and serving as corresponding conductive terminals or conductive connectors can further shorten the connection path between the corresponding conductors and terminals.

[0249] Figures 14A to 14E Schematic cross-sectional views of voltage regulation modules according to other embodiments of the present disclosure are shown. Figure 13A The voltage regulation module shown is similar, with only some structural changes. The following description primarily focuses on the differences between each embodiment and the aforementioned embodiments, while features identical or similar to those in the aforementioned embodiments will not be repeated. It should be understood that, for the sake of brevity, [the following text is incomplete and requires further context]. Figures 14A to 14E Only the main components of the voltage regulation module are shown briefly, without showing the conductive lines and / or conductive terminals of the circuit board in detail.

[0250] refer to Figure 14A In some embodiments, multiple conductive posts 30a provide electrical connections between circuit board 20 and circuit board 40, forming an accommodating space between the two circuit boards. Multiple input capacitors 210 are disposed within the accommodating space and soldered to both circuit board 40 and circuit board 20. Soldering the input capacitors 210 to both circuit boards can improve overall structural stability.

[0251] In some embodiments, one or more conductors in the inductor module 10 may protrude from the surface of the magnetic core 100 (e.g., the first surface 100a) in the first direction D1 and extend through the second circuit board 20 to expose the surface of the circuit board 20 on the side of the circuit board 40, and may be used as corresponding conductive terminals 120.

[0252] For example, one or more first conductors 101 in the inductor assembly 10 protrude from the first surface 100a of the magnetic core 100 in the first direction D1, and extend through the circuit board 20 and expose the surface of the circuit board 20 near the circuit board 40, so as to serve as at least a portion of the multiple switch terminals S1 and be electrically connected to the corresponding conductive connector 30.

[0253] For example, one or more second conductors 102 in the inductor assembly 10 protrude from the first surface 100a of the magnetic core 100 in the first direction D1, and extend through the circuit board 20 and expose the surface of the circuit board 20 near the circuit board 40, so as to serve as at least a portion of the ground terminals G1 among the plurality of ground terminals G1, and be electrically connected to the corresponding conductive connector 30.

[0254] In some embodiments, the corresponding conductors of the inductor assembly 10 pass directly through the circuit board as corresponding conductive terminals, which can further reduce the connection path between the conductive terminals and the conductors.

[0255] In some embodiments, the protruding first conductor 101 and / or second conductor 102 of the inductor assembly 10 replace the conductive terminals of the portion. The circuit board 20 may also include other conductive terminals (not shown), which are electrically connected to the corresponding conductors through the conductive lines of the circuit board. The arrangement of the multiple conductive terminals may be similar to that in the foregoing embodiments, and will not be described again here.

[0256] refer to Figure 14BIn some embodiments, the power module PM includes a circuit board 40, a power chip 200, and a plurality of input capacitors 210. The plurality of input capacitors 210 are embedded in the circuit board 40, and the power chip 200 is disposed on a second side 40b of the circuit board 40. At least a portion (e.g., most) of the plurality of input capacitors 210 have their orthographic projections on the main surface of the circuit board overlapping with the orthographic projections of the power chip 200 on the main surface of the circuit board, thereby enabling the power chip and the plurality of input capacitors to be connected with a shorter connection path. For example, the plurality of input capacitors 210 may be embedded in the core layer 41 of the circuit board 40 and may be electrically connected to the power chip 200 through conductive lines in the stacked layer 43. In some embodiments, the stacked layers 42 and 43 include conductive lines that electrically connect the power chip 200 and a plurality of conductive terminals. For example, the power chip 200 may be electrically connected to conductive terminals located on a first side 40a of the circuit board 40 through conductive lines in the stacked layers 43 and 42 and conductive vias in the core layer, and further electrically connected to the inductor module IM through conductive connectors 30.

[0257] In some embodiments, the arrangement of the multiple input capacitors 210 embedded in the circuit board 40 in a direction parallel to the main surface of the circuit board is roughly the same as the arrangement of the multiple input capacitors 210 on the first side of the circuit board 40 in the previous embodiments. The only difference is that in this embodiment, the input capacitors 210 are vertically moved into the circuit board, while the positions of the input capacitors in the horizontal direction can remain roughly unchanged.

[0258] For example, the orthographic projections of multiple input capacitors 210 on the main surface of the circuit board can be alternated with the orthographic projections of multiple conductive terminals on the first side 40a of the circuit board 40 on the main surface of the circuit board in at least one direction parallel to the main surface of the circuit board. The specific arrangement is the same as described above. Figure 10 The descriptions are similar and have the same technical effects, so they will not be repeated here.

[0259] In some embodiments, since multiple input capacitors 210 are embedded in the circuit board 40, a large accommodating space is not required between the circuit board 40 and the circuit board 20. For example, the conductive connector 30 between the circuit board 40 and the circuit board 20 may be a thin solder layer 30b, which solders the corresponding conductive terminals of the circuit board 20 and the circuit board 40 to provide an electrical connection between the circuit board 20 and the circuit board 40.

[0260] exist Figure 14B In the illustrated embodiment, multiple conductors of the inductor assembly 10 protrude from the surface of the magnetic core and serve as conductive terminals, but this disclosure is not limited thereto; the inductor module IM may also employ the inductor module of any of the foregoing embodiments, for example, it may employ... Figure 13A The inductor module shown.

[0261] In the foregoing embodiments, power chips or input capacitors are embedded in the circuit board 40, but this disclosure is not limited thereto. In other embodiments, in the power module, multiple input capacitors may be disposed on a first side of the first circuit board, and the power chip may be disposed on a second side of the first circuit board.

[0262] refer to Figure 14C For example, in a power module PM, input capacitors 210 and power chip 200 are disposed on opposite sides of a circuit board 40 in a first direction D1; for example, multiple input capacitors 210 are disposed on the surface of a first side 40a of the circuit board 40, and located in the accommodating space between the circuit board 40 and the circuit board 20. Power chip 200 is disposed on the surface of a second side 40b of the circuit board 40. In this embodiment, neither the power chip 200 nor the input capacitors 210 may be embedded in the circuit board 40; for example, the thickness of the circuit board 40 may be relatively small, thereby reducing the connection path between the power chip 200 and the input capacitors 210. For example, the power chip 200 and the multiple input capacitors 210 may be electrically connected through conductive lines in the circuit board 40.

[0263] In some embodiments, the arrangement of multiple transistor regions in the power chip 200, as well as the arrangement of multiple conductive terminals and input capacitors on each circuit board, are similar to those in the aforementioned embodiments and have roughly the same technical effects, and will not be described again here.

[0264] refer to Figure 14D In some embodiments, one or more conductors in the inductor module IM may extend through the magnetic core 100 and the circuit board 20, and may further protrude from the surface of the circuit board 20 near the side of the circuit board 40, extending to be electrically connected to the corresponding conductive terminals of the circuit board 40. That is, the protruding conductors may serve as conductive terminals of the circuit board 20 and conductive connectors connecting the corresponding conductive terminals.

[0265] For example, in an inductor module IM, one or more first conductors 101 extend in a first direction D1 through the portion of the magnetic core 100 and the circuit board 20 located on the first surface 100a of the magnetic core 100, and protrude from the surface of the circuit board 20 near the side of the circuit board 40, and further extend to the first side 40a of the circuit board 40 to be electrically connected to the corresponding conductive terminals (e.g., switch terminals) of the circuit board 40.

[0266] For example, in an inductor module IM, one or more second conductors 102 extend in a first direction D1 through the portion of the magnetic core 100 and the circuit board 20 located on the first surface 100a of the magnetic core 100, and protrude from the surface of the circuit board 20 near the side of the circuit board 40, and further extend to the first side 40a of the circuit board 40 to be electrically connected to the corresponding conductive terminal (e.g., ground terminal) of the circuit board 40.

[0267] The protruding portions of the first conductor 101 and / or the second conductor 102 that protrude from the circuit board 20 serve as conductive connectors and, together with other conductive connectors 30a, form an accommodating space between the circuit board 20 and the circuit board 40.

[0268] In some embodiments, the second circuit board has a recess with its opening facing a first side of the first circuit board, and a plurality of input capacitors soldered to the first side of the first circuit board are located in the recess. By providing a recess in the second circuit board, accommodating space for the input capacitors can be provided.

[0269] refer to Figure 14E For example, circuit board 20 has a recess 20c with an opening facing a first side 40a of circuit board 40, and a plurality of input capacitors 210 soldered to the first side of circuit board 40 are located in the recess 20c. For example, the recess 20c may be recessed from a surface of circuit board 20 near the side of circuit board 40 toward inductor assembly 10, for example, it may be recessed to expose the surface of inductor assembly 10. For example, the first surface 100a of magnetic core 100 and the surfaces of a plurality of conductors may be exposed in the recess 20c.

[0270] In some embodiments, the inductor assembly 10 may further include conductive traces 105 and 106, which are electrically connected to the first conductor 101 and the second conductor 102, respectively, to lead the corresponding conductors to the side of the magnetic core 100 and further to the corresponding conductive terminals through conductive lines (e.g., conductive traces and / or conductive vias) in the circuit board 20.

[0271] For example, the first conductor 101 can be connected to the corresponding switch terminal through the conductive trace 105 and the conductive via in the circuit board 20, and the second conductor 102 can be connected to the corresponding ground terminal through the conductive trace 106 and the conductive via in the circuit board 20.

[0272] In some embodiments, the voltage regulation module 500 may be applied in an electronic device and used to convert an input voltage into a regulated voltage required by a load. For example, the voltage regulation module 500 may be applied in a buck regulator circuit.

[0273] Figures 15A to 15C A circuit topology diagram is shown for the application of a voltage regulation module according to some embodiments of the present disclosure.

[0274] refer to Figure 13A and Figure 15AIn some embodiments, the buck regulator circuit includes an input capacitor Cin, a switching element (or power element) including a first transistor T1 and a second transistor T2, an inductor L, and an output capacitor Co. The input capacitor Cin corresponds to the input capacitor 210 in the voltage regulation module 500, and the power element including the first transistor T1 and the second transistor T2 corresponds to the power chip 200 in the voltage regulation module 500. For example, the power chip 200 may be a DrMOS, including multiple transistors in the power element and a drive circuit controlling these transistors. The inductor L corresponds to the inductance formed by the first conductor 101 of the inductor module in the voltage regulation module 500. For example, there is a one-to-one correspondence between the inductor L and the first conductor 101.

[0275] For example, the input capacitor Cin is connected to the input voltage terminal Vin and is configured to filter the input voltage to stabilize it and provide input current to the power chip 200. The power chip 200 is configured to control the timing of the input current transfer to the inductor L by periodically alternating the switching on and off of the first transistor T1 and the second transistor T2. For example, the power chip 200 is configured to provide input current to the inductor L when the first transistor T1 is on and the second transistor T2 is off, and to provide a freewheeling path for the inductor L when the first transistor T1 is off and the first transistor T2 is on. The inductor L is configured to store energy when the first transistor T1 is on and the second transistor T2 is off, to convert input electrical energy into stored magnetic energy, and to release energy when the first transistor T1 is off and the second transistor T2 is on, to convert the stored magnetic energy into electrical energy and supply power to the load, thereby achieving voltage reduction, and is configured to output the reduced output voltage to the load. The output capacitor Co is connected to the inductor L and the load, and is configured to filter the stepped-down output voltage before outputting it to the load to provide a stable output voltage Vo.

[0276] For example, the first terminal of the input capacitor Cin is connected to the positive terminal of the voltage input terminal Vin and to the first electrode of the first transistor T1. The second terminal of the input capacitor Cin is connected to the negative terminal of the voltage input terminal Vin and to the second electrode of the second transistor T2. The first transistor T1 and the second transistor T2 each include a control electrode, a first electrode, and a second electrode. The control electrode of each transistor is connected to the drive circuit in the power chip to receive the corresponding drive control signal from the drive circuit. The first electrode of the first transistor T1 is connected to the positive terminal of the voltage input terminal and the first terminal of the input capacitor Cin. The second electrode of the first transistor T1 and the first electrode of the second transistor T2 are connected to the first terminal of the inductor L, and then connected to the load terminal through the inductor L. The second electrode of the second transistor T2 is connected to the ground terminal and the negative terminal of the voltage input terminal. The first transistor T1 can also be called the upper switching transistor or the main power switch, and the second transistor T2 can also be called the lower switching transistor or the rectifier switch. The second terminal of the inductor L is connected to the first terminal of the output capacitor Co and the positive terminal of the voltage output terminal. The second terminal of the output capacitor Co is connected to the negative terminal of the voltage output terminal (i.e., the ground terminal).

[0277] Figure 15A The dashed box shown in the diagram, which includes the first transistor T1 and the second transistor T2, corresponds to a transistor region TR in the power chip 200. It should be understood that, although Figure 15A The diagram shows a first transistor T1 and a transistor T2, but this disclosure is not limited thereto. In a voltage regulation circuit, the transistor region TR connected to each inductor may include multiple first transistors T1 and multiple second transistors T2.

[0278] In the circuit topology diagram, the node SW located between the first transistor T1, the second transistor T2, and the inductor L corresponds to the switching terminals of each circuit board in the voltage regulation module and / or the switching pads of the power chip. For example, the switching terminals of each circuit board can also be referred to as SW terminals, and the switching pads of the power chip can also be referred to as SW pads. In the circuit topology diagram, the inductor L and the line section G correspond to the first conductor 101 and the second conductor 102 in the inductor assembly 10, respectively, and there is a one-to-one correspondence between the inductor L and the first conductor 101. The line section G is part of the ground return circuit. The node GND between the second transistor T2 and the line section G corresponds to the ground terminal of each circuit board in the voltage regulation module and / or the ground pad of the power chip.

[0279] exist Figure 15A The circuit topology diagram uses arrows to schematically show the alternating current (AC) and direct current (DC) paths in the buck converter circuit; correspondingly, in Figure 13A The voltage regulation module structure diagram also schematically illustrates the AC path and DC current path with dashed arrows. (Reference) Figure 13A and Figure 15A The AC current path mainly exists between the input capacitor Cin / 210 and the power chip 200, while the DC current path mainly exists between the first conductor 101 and the second conductor 102 of the inductor module and the corresponding transistor of the power chip 200.

[0280] Figure 15A The application of a voltage regulation module is illustrated using a single-phase buck circuit as an example. In some embodiments, the voltage regulation module includes a multi-phase interleaved parallel buck circuit, for example, it may be a... Figure 15B The multiphase buck circuit is shown. The multiphase circuits are connected in parallel, and the multiple inductors L in the multiphase circuit correspond one-to-one with the multiple first conductors 101 of the inductor module in the voltage regulation module. The multiple switching circuits of the multiphase buck circuit correspond one-to-one with the multiple transistor regions TR of the power chip 200. That is to say, in each phase buck circuit, the inductor L corresponds to one first conductor 101, and the switching element corresponds to one transistor region TR.

[0281] refer to Figure 2A , Figure 13A and Figure 15B , Figure 15B The diagram shows a four-phase step-down circuit, in which the inductor module uses... Figure 2A The inductor module shown in the circuit topology diagram has four inductors L corresponding to the four first conductors 101 in the inductor module 10, and four switching elements in the dashed boxes corresponding to the four transistor regions TR in the power chip 200.

[0282] In some embodiments, the ground terminals GND of the multiphase buck circuit are short-circuited, that is, multiple second conductors 102 in the voltage regulation module 500 are short-circuited; for example, multiple second conductors 102 together form a grounding network, and the multiphase buck circuit shares this grounding network. The number of multiple second conductors 102 may be the same as or different from the number of phases of the multiphase buck circuit, and may be set according to the number of first conductors 101, so that the magnetic field generated by the inductor component during operation is more uniform. In some embodiments, multiple second conductors 102 are short-circuited, so that the multiple second conductors 102 can share the total current equally, that is, the current of each second conductor 102 may be approximately the same, which is beneficial to make the magnetic field generated by the inductor module more uniform during operation. It should be understood that the number of phases of the multiphase buck circuit is not limited thereto, and may include circuits with fewer or more phases.

[0283] Figure 15C and Figure 15B Similarly, except that the ellipsis "…" indicates that the voltage regulation module may include more phases of buck circuitry. Figure 15C Arrows are also used to schematically show the direction of current in each phase of the step-down circuit.

[0284] refer to Figure 13A and Figure 15C In some embodiments, the voltage regulation module 500 can be connected to a load. For example, the load can be located on the side of the inductor module IM away from the power module PM. One end of the first conductor 101 of the inductor component 10 in the inductor module IM is connected to the power module PM, and the other end of the first conductor 101 is connected to the positive terminal of the load. One end of the second conductor 102 is connected to the negative terminal of the load, and the other end of the second conductor 102 is connected to the power module PM. During the operation of the voltage regulation module, the current in each phase step-down circuit is input from the power module PM to the first conductor 101 of the inductor module IM through the conductive lines and switching terminals of each circuit board. Then, it flows from the first conductor 101 to the positive terminal of the load, and then flows back from the negative terminal of the load to the second conductor 102 of the inductor module IM. Finally, it flows back to the power module PM through the grounding terminals and / or conductive lines of each circuit board, forming a current loop. Therefore, the current directions in the first conductor 101 and the second conductor 102 are opposite. In some embodiments, the first conductor can also be referred to as a power winding, and the second conductor can also be referred to as a ground winding (GND winding).

[0285] In some embodiments of this disclosure, embedding either the power chip or the input capacitor within the circuit board can reduce the connection path between the power chip and the input capacitor, thus shortening the AC current path. This allows the input capacitor to be closer to the power chip's network, resulting in lower parasitic inductance in the input circuit. This significantly reduces voltage spikes and ringing in the power chip during switching, enabling stable operation at higher frequencies. For example, a faster switching frequency and lower parasitic parameters allow the voltage regulation module to respond more quickly to transient load changes, resulting in better dynamic performance. Embedding the power chip within the circuit board also helps reduce the connection path between the power chip and the inductor module, thereby also shortening the DC current path.

[0286] In some embodiments, by alternating the arrangement of switch terminals and ground terminals in each circuit board, the loop path (e.g., DC current path) from the switch node to the ground terminal can be shortened. This loop path can also be referred to as the SW-GND loop.

[0287] In some embodiments, the inductor module and the power module are stacked vertically in the first direction to form a complete voltage regulation module. This vertical stacking shortens the DC path from SW to GND, reducing impedance and DC loop losses, thus improving efficiency. Furthermore, the vertical arrangement saves board space, making the board layout more compact and increasing power density. It also minimizes the switching loop area, reduces parasitic inductance, suppresses electromagnetic interference, and further improves switching performance.

[0288] In some embodiments, the alternating arrangement of the input capacitor and multiple conductive terminals of the power module, the alternating arrangement of the first transistor region including the first transistor and the second transistor region including the second transistor in the transistor region of the power chip, and / or the alternating arrangement of the switch pad and the ground pad of the power chip, can all help to make the connection path between each transistor of the power chip and the corresponding input capacitor, as well as the connection path between each transistor and the switch pad and the ground pad, relatively short, thereby shortening both the AC current path and the DC current path.

[0289] The following points need to be explained:

[0290] (1) The accompanying drawings of the embodiments of this disclosure only involve the structures involved in the embodiments of this disclosure. Other structures can be referred to the general design.

[0291] (2) Where there is no conflict, features of the same embodiment and different embodiments of this disclosure can be combined with each other.

[0292] The above are merely specific embodiments of this disclosure, but the scope of protection of this disclosure is not limited thereto. Any variations or substitutions that can be easily conceived by those skilled in the art within the scope of the technology disclosed in this disclosure should be included within the scope of protection of this disclosure. Therefore, the scope of protection of this disclosure should be determined by the scope of the claims.

Claims

1. An inductor assembly, comprising: A magnetic core having a first surface and a second surface opposite each other in a first direction; A plurality of first conductors and a plurality of second conductors extend through the magnetic core in the first direction to extend at least from the first surface of the magnetic core to the second surface; The plurality of first conductors are embedded in the magnetic core and spaced apart around an inner region. The plurality of second conductors include a first sub-conductor and a second sub-conductor, wherein the first sub-conductor is located in the inner region and the second sub-conductor is located outside the inner region. The inner region is a circular region defined by the diameter of the line connecting the centers of the two first conductors that are furthest apart among the plurality of first conductors.

2. The inductor assembly of claim 1, wherein the first sub-conductor is located in the central region of the magnetic core, and the second sub-conductor is located at the edge of the magnetic core.

3. The inductor assembly according to claim 1, wherein the minimum distance between each of the plurality of first conductors and the first sub-conductor is a first distance, and the minimum distance between each of the plurality of first conductors and the adjacent second sub-conductor is a second distance, wherein the absolute value of the difference between the first distance and the second distance is less than or equal to 50% of the maximum value of the first distance and the second distance.

4. The inductor assembly of claim 3, wherein the first distance is approximately equal to the second distance.

5. The inductor assembly of claim 1, wherein the minimum distance between each of the plurality of first conductors and the first sub-conductor is substantially equal.

6. The inductor assembly of claim 1, wherein the second conductor comprises a plurality of second sub-conductors, and the plurality of second sub-conductors comprises one or more symmetrical groups of second sub-conductors, each symmetrical group of second sub-conductors comprising two second sub-conductors symmetrically arranged relative to the first sub-conductor.

7. The inductor assembly of claim 6, wherein the center line connecting the two second sub-conductors in each symmetrical group of second sub-conductors to the center line connecting the two adjacent first conductors in the plurality of first conductors intersects or is parallel to the center line connecting the two adjacent first conductors in each symmetrical group of second sub-conductors.

8. The inductor assembly of claim 1, wherein the plurality of first conductors comprises one or more symmetrical groups of first conductors, each symmetrical group of first conductors comprising two first conductors symmetrically disposed relative to the first sub-conductor.

9. The inductor assembly of claim 8, wherein the first center line connecting two first conductors in each of the one or more symmetrical groups of first conductors intersects with the second center line connecting the first sub-conductor and two second sub-conductors located on opposite sides of the first sub-conductor.

10. The inductor assembly of claim 9, wherein the intersection of the first center line and the second center line substantially coincides with the midpoint of the first center line and the midpoint of the second center line.

11. The inductor assembly according to any one of claims 1-10, wherein The number of the plurality of first conductors is greater than 2, and the first sub-conductor is located within the polygonal region formed by the center lines connecting the plurality of first conductors; or The number of the plurality of first conductors is 2, and the midpoint of the line connecting the centers of the plurality of first conductors roughly coincides with the center of the first sub-conductor.

12. The inductor assembly according to any one of claims 1-10, wherein The magnetic core has multiple first holes and second holes; The plurality of first conductors are respectively located in the plurality of first holes, and are surrounded and covered by the magnetic core in a direction parallel to the first surface of the magnetic core; The first sub-conductor is located in the second hole and is surrounded by the magnetic core in a direction parallel to the first surface of the magnetic core.

13. The inductor assembly of claim 12, wherein the magnetic core has a groove region located at its edge, and the second sub-conductor is disposed in the groove region and engages with the magnetic core.

14. The inductor assembly of claim 13, wherein the recessed region comprises: The first groove is recessed in the first direction from the first surface of the magnetic core toward the middle of the magnetic core; The second groove is recessed in the first direction from the second surface of the magnetic core toward the middle of the magnetic core; as well as A lateral groove is recessed from the side surface of the magnetic core toward the inner region in a direction parallel to the first surface of the magnetic core, and communicates with the first groove and the second groove. The second sub-conductor is disposed in the groove region and includes a first conductor portion, a second conductor portion, and a third conductor portion located in the first groove, the second groove, and the lateral groove and connected to each other.

15. The inductor assembly of claim 14, wherein... The surface of the first conductor portion away from the magnetic core is coplanar with the first surface of the magnetic core; and / or The surface of the second conductor portion away from the magnetic core is coplanar with the second surface of the magnetic core; and / or The side surface of the third conductor portion away from the magnetic core is coplanar with the side surface of the magnetic core.

16. The inductor assembly according to any one of claims 1-10, wherein the plurality of first conductors are configured to transmit current along the same first current direction, the plurality of second conductors are configured to transmit current along the same second current direction, and the first current direction is opposite to the second current direction.

17. The inductor assembly of claim 16, wherein each of the plurality of first conductors is configured to transmit current from a power source to a load.

18. The inductor assembly of claim 16, wherein the first sub-conductor and the second sub-conductor of the plurality of second conductors are configured to be shorted to each other and configured to transmit a ground return current flowing from the load.

19. The inductor assembly of claim 16, wherein each of the plurality of first conductors is configured to together form an inductor with an adjacent second conductor.

20. The inductor assembly according to any one of claims 1-10, wherein Each of the plurality of first conductors has a planar shape that is either circular or square; The planar shape of the first sub-conductor of the plurality of second conductors is circular or square; and The planar shape formed by the outer contour of the second sub-conductor and the outermost contour of the magnetic core is circular or square.

21. An inductor module comprising an inductor component according to any one of claims 1-20.

22. The inductor module according to claim 21, further comprising: A circuit board, wherein the inductor assembly is embedded within the circuit board.

23. The inductor module according to claim 22, wherein The circuit board has a plurality of first conductive terminals and a plurality of second conductive terminals on one side near the first surface of the inductor assembly. The plurality of first conductive terminals are electrically connected to the plurality of first conductors, and the plurality of second conductive terminals are electrically connected to the plurality of second conductors.

24. The inductor module of claim 23, wherein the plurality of first conductive terminals and the plurality of second conductive terminals are alternately arranged in at least one direction parallel to the main surface of the circuit board.

25. The inductor module according to claim 23 or 24, wherein The circuit board includes a plurality of first terminal regions, each corresponding to a plurality of first conductors. In each pair of corresponding first terminal regions and first conductors, the first terminal region includes a plurality of first conductive terminals electrically connected to the same first conductor. In the correspondingly configured first terminal region and first conductor, the orthographic projection of the first conductor on the main surface of the circuit board overlaps with the orthographic projection of a portion of the first conductive terminal in the first terminal region on the main surface of the circuit board.

26. The inductor module of claim 25, wherein the conductive lines of the circuit board include one or more line layers electrically connecting the plurality of first conductive terminals and the first conductor, and the orthographic projection of the plurality of first conductive terminals on the main surface of the circuit board lies within the orthographic projection of the one or more line layers on the main surface of the circuit board.

27. The inductor module of claim 25, wherein a portion of the plurality of second conductive terminals are distributed in the plurality of first terminal regions.

28. The inductor module of claim 27, wherein the circuit board further includes a second terminal region located outside the plurality of first terminal regions, and another portion of the plurality of second conductive terminals is located in the second terminal region.

29. The inductor module of claim 28, wherein at least a portion of the second terminal region is located between adjacent first terminal regions in the plurality of first terminal regions.

30. A power supply module comprising an inductor module according to any one of claims 22-29.

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