A super capacitor charging and discharging protection circuit and a working method thereof

Abstract

The application discloses a super capacitor charging and discharging protection circuit and a working method thereof, and relates to the technical field of industrial control. The application discloses a super capacitor charging and discharging protection circuit and a working method thereof, and relates to the technical field of industrial control. The charging circuit is connected with the voltage equalization circuit, the voltage equalization circuit is connected with the discharging circuit, and the temperature acquisition circuit is connected with the charging circuit, the voltage equalization circuit and the discharging circuit respectively. The charging circuit controls the charging voltage and the charging current through a voltage feedback and current feedback circuit. The voltage equalization circuit realizes the series connection and voltage equalization control of multiple super capacitor groups through voltage detection and adjustment. The discharging circuit is used for realizing the step-up conversion and controllable output of super capacitor electric energy. The temperature acquisition circuit is used for acquiring the temperature of the super capacitor and converting the temperature into a sampling voltage value of the temperature indication. The application can guarantee the safety of the super capacitor from the root cause and reduce the failure rate of the super capacitor in a complex environment.

Description

Technical Field

[0001] This invention relates to the field of industrial control technology, specifically to a supercapacitor charging and discharging protection circuit and its operating method. Background Technology

[0002] Supercapacitors (referred to as "supercapacitors") are high-power-density energy storage devices. During charging and discharging, supercapacitors are highly sensitive to overvoltage, overcurrent, and temperature anomalies. Under actual operating conditions, when supercapacitors face grid voltage fluctuations, sudden load changes, or external electromagnetic interference, voltage pulses exceeding the rated threshold (e.g., a single supercapacitor's voltage instantaneously exceeding 2.8V) or large current surges (e.g., a sudden discharge current exceeding the rated value by 1.5 times) can occur in the charging and discharging circuit. Simultaneously, prolonged high-current charging and discharging can easily cause the supercapacitor's temperature to rise (e.g., the internal temperature exceeding 60℃). These anomalies directly lead to two core failures: firstly, the electrolyte inside the supercapacitor decomposes, shortening its cycle life (a single 10% overvoltage can reduce lifespan by more than 30%); secondly, the charging and discharging control chip may malfunction due to overcurrent or excessive temperature, causing the supercapacitor to lose protection and face the risk of burnout.

[0003] Existing overcapacitance protection solutions are insufficient to address overcapacitance charging and discharging safety issues in a timely manner. For example, the technical solution disclosed in the paper titled "A Supercapacitor Protection Circuit" (document number CN207835135U) includes a supercapacitor bank formed by several supercapacitors SCn connected in series, a fuse F1 and a charging / discharging protection module installed between the supercapacitor bank and the charging power supply or load, a single-cell balancing and protection module installed on each supercapacitor, and an over-temperature protection module installed between the negative terminal of the supercapacitor bank and ground. However, the solution in this paper still has the following drawbacks: when the module voltage exceeds the rated voltage U... R At this time, the current is limited by the series connection of diode D2 and fixed resistor R9. R9 needs to bear the function of voltage division and current limiting for a long time. If the power of R9 is not selected with sufficient margin, it will burn out due to overheating during continuous operation, resulting in the failure of discharge protection. Summary of the Invention

[0004] This invention provides a supercapacitor charge and discharge protection circuit that can fundamentally ensure the safety of supercapacitors and reduce their failure rate in complex environments.

[0005] The present invention provides the following technical solution: a supercapacitor charging and discharging protection circuit, comprising a charging circuit, a voltage equalization circuit, a discharging circuit and a temperature acquisition circuit, wherein the charging circuit is connected to the voltage equalization circuit, the voltage equalization circuit is connected to the discharging circuit, and the temperature acquisition circuit is connected to the supercapacitor group in the voltage equalization circuit.

[0006] The charging circuit controls the charging voltage and charging current through voltage feedback and current feedback circuits.

[0007] The voltage equalization circuit achieves series connection and voltage equalization control of multiple supercapacitor groups through voltage detection and adjustment;

[0008] The discharge circuit is used to realize the boost conversion and controllable output of supercapacitive electrical energy;

[0009] The temperature acquisition circuit is used to acquire the temperature of the supercapacitor and convert it into a sampling voltage value for temperature reading.

[0010] As a further improvement of the present invention, the charging circuit is specifically as follows: pin 1 of the charging chip U7 is connected to one end of capacitor C24, and the other end of capacitor C24 is connected to one end of resistor R42; pin 3 of the charging chip U7 is connected to the feedback voltage signal FB1; pin 4 of the charging chip U7 is simultaneously connected to the overcapacitor charging enable output signal, resistor R44, and one end of capacitor C31; pin 5 of the charging chip U7 is connected to one end of capacitor C26 and capacitor C27, and the 12V power supply; pin 6 of the charging chip U7 is connected to the other end of resistor R42 and one end of inductor L3, and the other end of inductor L3 is connected in two ways: one way is connected to one end of the parallel sampling resistors R37, R38, R39, and R40, and the other way is connected to transistor Q7. Pin 2 of the transistor; pin 1 of transistor Q7 is connected to one end of resistor R41 and one end of capacitor C33 respectively. The other ends of sampling resistors R37, R38, R39, and R40 are connected to the other end of resistor R41 and the anode of diode D4 respectively. The cathode of diode D4 is connected to one end of resistor R43, capacitor C25, and the supercapacitor group respectively. The other end of resistor R43 is connected to resistor R45, and the other end of capacitor C25 is connected to R46. The other ends of capacitors C26, C27, R44, C31, C33, R45, and R46 and pin 2 of charging chip U7 are all grounded. Pin 3 of transistor Q7 is also connected to voltage feedback signal FB1. Capacitor C32 is connected in parallel across resistors R45 and R46.

[0011] As a further improvement of the present invention, the voltage equalization circuit includes multiple voltage regulating circuits, each group of overcapacitors is provided with a voltage regulating circuit, and the two voltage regulating circuits are cascaded in such a way that the positive terminal of each group of overcapacitors is connected to the negative terminal of the next group of overcapacitors.

[0012] As a further improvement of the present invention, the voltage regulation circuit is specifically as follows: pin 1 of the monitoring chip U1 is connected to one end of resistor R4 and the gate of N-channel MOSFET Q1; pin 2 of the monitoring chip U1 is connected to the negative terminal of supercapacitor C1 and one end of capacitor C2; pin 3 of the monitoring chip U1 is connected to the positive terminal of supercapacitor C1 and the other end of bleeder resistors R2, R3 and R4; pin 4 of the monitoring chip U1 is connected to one end of voltage divider resistors R5 and R7; wherein the other end of voltage divider resistor R5 is connected to the positive terminal of supercapacitor C1, the other end of resistor R7 is connected to the negative terminal of supercapacitor C1; the drain of N-channel MOSFET Q1 is connected to one end of bleeder resistors R2 and R3, the other end of bleeder resistors R2 and R3 is connected to the positive terminal of supercapacitor C1, and the source of N-channel MOSFET Q1 is connected to the negative terminal of supercapacitor C1.

[0013] As a further improvement of the present invention, the discharge circuit is specifically as follows: pin 1 of the boost chip U6 is connected to one end of inductor L2 and the anode of diode D2; pin 3 of the boost chip U6 is connected to one end of capacitor C20, voltage divider feedback resistors R31, R33, and R24; pin 4 of the boost chip U6 is connected to the output terminal of the voltage divider network composed of resistors R22, R25, and R29 to obtain the voltage divider signal, and the other end of resistor R25 is connected to the drain of MOSFET Q3; pin 5 of the boost chip U6 is connected to the cathode of diode D2, the other end of resistor R22, capacitor C20, and resistor R24, one end of capacitors C12, C13, C14, C15, and C16, and the anode of diode D3, and the boosted voltage is output to the 12V main power supply network through diode D3; pin 2 of the boost chip U6, resistor... The other ends of resistors R29, R31, R33, C12, C13, C14, C15, and C16 are all grounded. The other end of inductor L2 is connected to capacitors C18 and C19 and the drain of MOSFET Q3, respectively. The other ends of capacitors C18 and C19 are grounded. The source of MOSFET Q3 is connected to one end of capacitor C17, resistor R23, and the overcapacitor group, respectively. The gate of MOSFET Q3 is connected to the other end of capacitor C17, resistor R23, and resistor R26, respectively. The other end of resistor R26 is connected to pin 3 of transistor Q6. Pin 1 of transistor Q6 is connected to resistor R34. The other end of resistor R34 is connected in parallel with resistor R36, capacitor C23, and the main system power supply. The other end of capacitor C23 is grounded. Pin 2 of transistor Q6 is connected to the overcapacitor boost discharge control signal.

[0014] As a further improvement of the present invention, the temperature acquisition circuit is specifically as follows: the NTC thermistor RT1 is connected in series with the voltage divider resistor R8 and then connected to a 3.3V power supply. The voltage divider node is connected to the ADC pin of the control module to acquire the working temperature of the supercapacitor group in real time. The NTC thermistor RT1 is attached to the surface of the aluminum shell of the supercapacitor group with thermally conductive adhesive.

[0015] A method for operating a supercapacitor charge / discharge protection circuit, applicable to the aforementioned protection circuit, comprising:

[0016] During the charging phase: The voltage equalization circuit monitors the voltage of each supercapacitor cell in real time and compares it with the maximum voltage value that the supercapacitor can withstand.

[0017] If the voltage of a single supercapacitor cell exceeds the maximum voltage that the supercapacitor can withstand, charging should be stopped immediately.

[0018] If the voltage of the overcapacitor cell is lower than the maximum voltage that the overcapacitor can withstand, the temperature of the overcapacitor is checked. If the temperature of the overcapacitor is higher than the safe temperature, charging is stopped immediately. If the temperature of the overcapacitor is lower than the safe temperature, charging of the overcapacitor is started until the voltage of the overcapacitor cell is higher than the maximum voltage that the overcapacitor can withstand or the temperature is higher than the safe temperature.

[0019] Discharge phase: The discharge circuit receives the overcapacitor discharge enable signal and causes the overcapacitor group to discharge, while monitoring the voltage of each individual overcapacitor cell in real time.

[0020] If the voltage of the supercapacitor cell is lower than the minimum voltage value of the supercapacitor, switch to other backup power and turn off the supercapacitor discharge enable signal;

[0021] If the voltage of the overcapacitor cell is higher than the minimum voltage value of the overcapacitor, the temperature of the overcapacitor is determined. If the temperature of the overcapacitor is higher than the safe temperature value, other backup power is switched and the overcapacitor discharge enable signal is turned off. If the temperature of the overcapacitor is lower than the safe temperature value, the overcapacitor continues to discharge until the voltage of the overcapacitor cell is lower than the minimum voltage value of the overcapacitor.

[0022] The present invention has the following beneficial effects:

[0023] In this invention, the charging circuit limits the output voltage of the power supply and automatically reduces the output current based on the current feedback circuit, achieving overcurrent protection and current limiting regulation. The voltage equalization circuit can adjust the voltage of each supercapacitor. When the voltage of a single supercapacitor is too high, a high-level output controls the capacitor voltage to discharge through the bleed resistor. When the supercapacitor voltage returns to normal, a low-level output is used to ensure that the supercapacitor voltage is not discharged. The discharge circuit realizes the boost conversion and controllable output of the supercapacitor's energy, effectively avoiding over-discharge of the supercapacitor. The temperature acquisition circuit monitors the supercapacitor temperature in real time to prevent the supercapacitor from charging and discharging at high or low temperatures. It takes into account multi-dimensional protection of voltage, current, and temperature, greatly reducing the failure rate of the supercapacitor. It can avoid overcharging, over-discharging, and over-temperature damage from the source, effectively extending the service life of the supercapacitor. It is compatible with various devices containing supercapacitors and supercapacitor groups with different numbers of series. Moreover, it can recover quickly after a fault occurs, ensuring the stable operation of the supercapacitor and the whole machine. Attached Figure Description

[0024] Figure 1 This is a circuit connection block diagram of the present invention.

[0025] Figure 2 This is a charging circuit diagram of the present invention.

[0026] Figure 3 This is the discharge circuit diagram of the present invention.

[0027] Figure 4 This is a circuit diagram for temperature acquisition in this invention.

[0028] Figure 5 This is a circuit diagram for the voltage equalization circuit of the present invention.

[0029] Figure 6 Flowchart of the overcapacity charging determination method.

[0030] Figure 7 Flowchart of the method for determining overcapacitance discharge. Detailed Implementation

[0031] The technical solutions of the embodiments of this specification will be explained and described below with reference to the accompanying drawings. However, the following embodiments are only preferred embodiments of this specification and not all of them. Other embodiments obtained by those skilled in the art based on the embodiments in the implementation methods without creative effort are all within the protection scope of this specification.

[0032] Example 1

[0033] Please see Figure 1-5 As shown, a supercapacitor charging and discharging protection circuit includes a charging circuit, a voltage equalization circuit, a discharging circuit, and a temperature acquisition circuit. The charging circuit is connected to the voltage equalization circuit, the voltage equalization circuit is connected to the discharging circuit, and the temperature acquisition circuit is connected to the supercapacitor group in the voltage equalization circuit.

[0034] The charging circuit controls the charging voltage and charging current through voltage feedback and current feedback circuits. The main system provides a charging enable signal to start the charging chip and begin supplying power. The charging chip controls the charging voltage and charging current through voltage feedback and current feedback circuits to achieve stable output of charging voltage and current.

[0035] The voltage equalization circuit achieves series connection and voltage equalization control of multiple supercapacitor groups through voltage detection and adjustment. In view of the problem that voltage unevenness is easy to occur when the supercapacitor group is charging, a supercapacitor voltage equalization circuit is added. Each supercapacitor is paired with a voltage detection chip. When the voltage detection chip detects that the voltage of a single supercapacitor is too high, it outputs a high level to control the capacitor voltage to be discharged through the discharge resistor. When the supercapacitor voltage returns to normal, it outputs a low level to ensure that the supercapacitor voltage is not discharged.

[0036] The discharge circuit is used to realize the boost conversion and controllable output of supercapacitive power; when the main system detects that the normal power supply has stopped, the control MOSFET and boost chip start to work, and the backup power supply starts to output.

[0037] The temperature acquisition circuit is used to acquire the temperature of the supercapacitor and convert it into a sampling voltage value for temperature reading.

[0038] like Figure 2As shown, the charging circuit is specifically as follows: pin 1 of charging chip U7 is connected to one end of capacitor C24, and the other end of capacitor C24 is connected to one end of resistor R42; pin 3 of charging chip U7 is connected to feedback voltage signal FB1; pin 4 of charging chip U7 is simultaneously connected to the overcapacitor charging enable output signal, resistor R44, and one end of capacitor C31; pin 5 of charging chip U7 is connected to one end of capacitor C26 and capacitor C27, and the 12V power supply; pin 6 of charging chip U7 is connected to the other end of resistor R42 and one end of inductor L3, and the other end of inductor L3 is connected in two ways: one way is connected to one end of sampling resistors R37, R38, R39, and R40 connected in parallel, and the other way is connected to pin 2 of transistor Q7; the transistor... Pin 1 of transistor Q7 is connected to one end of resistor R41 and one end of capacitor C33. The other ends of sampling resistors R37, R38, R39, and R40 are connected to the other end of resistor R41 and the anode of diode D4. The cathode of diode D4 is connected to one end of resistor R43, capacitor C25, and the supercapacitor group. The other end of resistor R43 is connected to resistor R45, and the other end of capacitor C25 is connected to R46. The other ends of capacitors C26, C27, R44, C31, C33, R45, and R46, as well as pin 2 of charging chip U7, are all grounded. Pin 3 of transistor Q7 is also connected to the voltage feedback signal FB1. Capacitor C32 is connected in parallel across resistors R45 and R46. The system feedback voltage signal FB1 is formed by superimposing two parts: one part is the voltage obtained by the boost circuit output voltage through resistor R43 and resistor group (resistors R45 and R46 in parallel); the other part is the feedback voltage output from the current feedback loop.

[0039] In the charging circuit, the Silergy SY8201 is selected as the core charging chip. The chip is activated by an enable signal from the main system, enabling charging and power output. In terms of control logic, the charging output voltage can be precisely tuned through a feedback network composed of voltage divider resistors R43 and R45. By adjusting the resistance values ​​of the current sampling resistors R37 to R40, the rated threshold of the output current can be flexibly set. When the charging circuit current exceeds the set threshold, the voltage drop across the sampling resistor increases synchronously, triggering transistor Q7 to conduct, thereby raising the voltage at the chip's feedback pin FB. After detecting the voltage change at the chip's feedback pin FB, the charging chip U7 automatically reduces the output voltage and current, achieving overcurrent protection and current limiting regulation.

[0040] The voltage equalization circuit includes multiple voltage regulating circuits. Each group of supercapacitors is equipped with a voltage regulating circuit, and the two voltage regulating circuits are cascaded in such a way that the positive terminal of each group of supercapacitors is connected to the negative terminal of the next group of supercapacitors. The voltage regulation circuit is as follows: pin 1 of monitoring chip U1 is connected to one end of resistor R4 and the gate of N-channel MOSFET Q1; pin 2 of monitoring chip U1 is connected to the negative terminal of supercapacitor C1 and one end of capacitor C2; pin 3 of monitoring chip U1 is connected to the positive terminal of supercapacitor C1 and the other end of bleeder resistors R2, R3 and R4; pin 4 of monitoring chip U1 is connected to one end of voltage divider resistors R5 and R7; the other end of voltage divider resistor R5 is connected to the positive terminal of supercapacitor C1, and the other end of resistor R7 is connected to the negative terminal of supercapacitor C1; the drain of N-channel MOSFET Q1 is connected to one end of bleeder resistors R2 and R3, and the other end of bleeder resistors R2 and R3 is connected to the positive terminal of supercapacitor C1; the source of N-channel MOSFET Q1 is connected to the negative terminal of supercapacitor C1; and the gate of N-channel MOSFET Q1 is connected to the gate of N-channel MOSFET Q1.

[0041] The voltage regulation circuit uses the SGM890B from Sanbang Microelectronics as the core chip for voltage monitoring of a single supercapacitor. When the supercapacitor voltage rises to 2.5V, pin 1 of the monitoring chip U1 outputs a high-level signal, driving the MOSFET Q1 to conduct. The supercapacitor then forms a discharge circuit with the MOSFET Q1 through the discharge resistors R2 and R3, achieving rapid voltage reduction. When the supercapacitor voltage drops back to 2.4V, pin 1 of the monitoring chip U1 returns to a low level, the MOSFET Q1 turns off, and the discharge circuit is disconnected, effectively avoiding unnecessary loss of supercapacitor charge. This voltage regulation circuit has strong scalability and can be cascaded in series with multiple circuits, that is, cascaded with each supercapacitor's positive terminal connected to the next supercapacitor's negative terminal to achieve series voltage equalization control of multiple supercapacitors. At the same time, the voltage threshold can be flexibly changed by adjusting the parameters of the voltage divider resistors R5 and R7 to adapt to the voltage protection requirements of different supercapacitor models. It is widely applicable to various supercapacitor applications such as energy storage power supplies, industrial backup power, and vehicle auxiliary power supplies.

[0042] The discharge circuit is specifically as follows: Pin 1 of the boost chip U6 is connected to one end of inductor L2 and the anode of diode D2; Pin 3 of the boost chip U6 is connected to one end of capacitor C20, voltage divider feedback resistors R31, R33, and R24; Pin 4 of the boost chip U6 is connected to the output terminal of the voltage divider network composed of resistors R22, R25, and R29 to obtain the divided voltage signal, and the other end of resistor R25 is connected to the drain of MOSFET Q3; Pin 5 of the boost chip U6 is connected to the cathode of diode D2, the other end of resistor R22, capacitor C20, and resistor R24, one end of capacitors C12, C13, C14, C15, and C16, and the anode of diode D3, and the boosted voltage is output to the 12V main power supply network through diode D3; Pin 2 of the boost chip U6, resistor R29, voltage divider feedback resistors R31, R33, and R24 are ... R22, R23, and R24 to obtain the divided voltage signal, and the other end of resistor R25 is connected to the drain of MOSFET Q3; the boosted voltage The other ends of the feedback resistor R31, voltage divider feedback resistor R33, capacitors C12, C13, C14, C15, and C16 are all grounded; the other end of inductor L2 is connected to capacitors C18 and C19 and the drain of MOSFET Q3, respectively, and the other ends of capacitors C18 and C19 are grounded; the source of MOSFET Q3 is connected to one end of capacitor C17, resistor R23, and the overcapacitor group, respectively, and the gate of MOSFET Q3 is connected to the other end of capacitor C17, resistor R23, and resistor R26, respectively, and the other end of resistor R26 is connected to pin 3 of transistor Q6, pin 1 of transistor Q6 is connected to resistor R34, and the other end of resistor R34 is connected in parallel with resistor R36, capacitor C23, and the main system power supply, and the other end of capacitor C23 is grounded; pin 2 of transistor Q6 is connected to the overcapacitor boost discharge control signal.

[0043] The discharge circuit uses the SGM6623 from Sanbang Microelectronics as the core boost chip to achieve boost conversion and controllable output of supercapacitor energy, adapting to the power supply requirements of the main system. Whether the supercapacitor output voltage is input to the boost circuit is controlled by the main system control signal through the linkage of transistor Q6 and MOSFET Q3: when the main system inputs a low-level control signal, transistor Q6 is turned on, the gate of MOSFET Q3 is pulled low, and MOSFET Q3 is then turned on, and the supercapacitor voltage is input to the boost circuit; after being boosted by the boost chip U6, the ripple is filtered out by the filter network composed of capacitors C12~C16, and finally output to the main system power supply terminal through diode D3.

[0044] In terms of the function adjustment of the discharge circuit, the voltage feedback resistors R24, R31, and R33 form a voltage feedback network, which can flexibly adjust the boost output voltage to adapt to the power requirements of different levels of the main system. The enable pin of the boost chip U6 is connected to the voltage divider signal between the voltage after the MOSFET Q3 and the boost output voltage, thereby limiting the operating range of the boost chip U6 and effectively avoiding over-discharge of the supercapacitor.

[0045] The temperature acquisition circuit is specifically designed as follows: an NTC thermistor RT1 is connected in series with a voltage divider resistor R8 and then connected to a 3.3V power supply. The voltage divider node is connected to the ADC pin of the control module to acquire the working temperature of the supercapacitor group in real time and convert it into a sampling voltage value of the temperature reading. The NTC thermistor RT1 is attached to the surface of the aluminum shell of the supercapacitor group with thermally conductive adhesive.

[0046] Example 2

[0047] The protection circuit in this application can also be divided into the following modules:

[0048] Temperature acquisition unit: An NTC thermistor (B value 3950K / 10kΩ@25℃) is attached to the surface of the aluminum shell of the supercapacitor group with thermally conductive adhesive. After being connected in series with a 510Ω voltage divider resistor, it is connected to a 3.3V power supply. The voltage divider node is connected to the ADC pin of the control module to acquire the working temperature of the supercapacitor group in real time. The temperature measurement range is -80℃~120℃, with an error of ±1℃.

[0049] Voltage acquisition unit: It adopts a charging chip, whose input terminal is connected in parallel to the two ends of the supercapacitor group to directly acquire the total voltage after series connection. The output signal is filtered and then transmitted to the control module. The total voltage detection range is 0V~10V with an accuracy of ±0.01V. At the same time, the voltage equalization circuit assists in the equalization of the supercapacitor voltage distribution.

[0050] Current feedback unit: A sampling resistor (5.1Ω / 0.5W) is connected in series in the main circuit of the overcapacitive charging and discharging circuit. The voltage across the resistor controls the conduction of the transistor and limits the maximum charging current.

[0051] Software control logic and dynamic adjustment unit:

[0052] Preset safety threshold: Temperature safety range -40℃ to 75℃;

[0053] Real-time monitoring and adjustment: Recovery from extreme low temperature fault (temperature < -40℃): The software reads the temperature data of the NTC thermistor RT1 at 4ms intervals. If the temperature remains below -40℃ for 100ms, the charging circuit is immediately cut off. After the temperature rises to above -38℃ and the total voltage stabilizes at 7~9.6V, and there are no abnormalities after 5s of monitoring, the charging function is gradually restored.

[0054] High-temperature fault (temperature > 75℃) recovery: If the temperature remains above 75℃ for 100ms, the charging and discharging circuit is simultaneously cut off. Once the temperature drops below 73℃, the circuit is then restored via the auxiliary circuit. Figure 5 The voltage equalization circuit stabilizes the total voltage, and then the charging and discharging are restored in stages.

[0055] Recovery from sudden temperature change fault (fluctuation exceeding 10℃ in 500ms): When a sudden temperature change is detected, charging and discharging are paused, and the temperature acquisition unit is activated for verification (comparing the data with the backup NTC thermistor RT1); once the fluctuation is ≤5℃ / 500ms and the data is valid, and there are no abnormalities in the monitoring, the system returns to normal protection.

[0056] The above modules can form two protection mechanisms: an active anomaly avoidance mechanism and a rapid fault recovery mechanism.

[0057] The proactive anomaly avoidance mechanism is implemented using a combination of hardware and software: the hardware side is equipped with a charging chip, a current feedback loop, a voltage detection chip, and an NTC thermistor. The charging chip is used to stabilize the output voltage, the current feedback loop is used to control the maximum charging current, the voltage detection chip is used to monitor the voltage of each supercapacitor cell, and the NTC thermistor is used to collect the temperature of the supercapacitor; the software side presets the safe temperature range and safe voltage range of the supercapacitor and reads the temperature and voltage data collected by the hardware side in real time. When the temperature of the supercapacitor exceeds the safe temperature range, or the voltage approaches the overcharge or over-discharge threshold of the safe voltage range, the software side triggers a control signal to cut off the charging and discharging circuit of the supercapacitor through the MOSFET.

[0058] The rapid fault recovery mechanism includes: when the supercapacitor experiences overvoltage due to external interference or other factors, the voltage detection chip outputs a trigger signal to drive the MOSFET to conduct and reduce the supercapacitor voltage; when the supercapacitor's control chip malfunctions and crashes, the system automatically triggers a reset logic to restore circuit stability.

[0059] In the active anomaly avoidance mechanism, when the software detects that the supercapacitor voltage is close to 90% of the overcharge threshold or 110% of the over-discharge threshold, it can also buffer energy by adjusting the chip output power in an intermittent power reduction manner to prevent voltage surges.

[0060] The rapid fault recovery mechanism also includes a fault recording function: after a fault is recovered, the software automatically records the fault type and corresponding parameters. Fault types include overvoltage faults, overcurrent faults, and system crashes caused by interference.

[0061] Tests showed that the hardware single-cell overvoltage protection response time in this embodiment is ≤50μs, the overvoltage discharge accuracy is ±0.02V, and the fault fast recovery mechanism has a 100% success rate.

[0062] Example 3

[0063] Please see Figure 6 , 7 As shown, a method for operating a supercapacitor charge / discharge protection circuit is described. This method is applicable to the aforementioned protection circuit and includes:

[0064] During the charging phase: The voltage equalization circuit monitors the voltage of each supercapacitor cell in real time and compares it with the maximum voltage value that the supercapacitor can withstand.

[0065] If the voltage of a single supercapacitor cell exceeds the maximum voltage that the supercapacitor can withstand, charging should be stopped immediately.

[0066] If the voltage of the overcapacitor cell is lower than the maximum voltage that the overcapacitor can withstand, the temperature of the overcapacitor is checked. If the temperature of the overcapacitor is higher than the safe temperature, charging is stopped immediately. If the temperature of the overcapacitor is lower than the safe temperature, charging of the overcapacitor is started until the voltage of the overcapacitor cell is higher than the maximum voltage that the overcapacitor can withstand or the temperature is higher than the safe temperature.

[0067] Discharge phase: The discharge circuit receives the overcapacitor discharge enable signal and causes the overcapacitor group to discharge, while monitoring the voltage of each individual overcapacitor cell in real time.

[0068] If the voltage of the supercapacitor cell is lower than the minimum voltage value of the supercapacitor, switch to other backup power and turn off the supercapacitor discharge enable signal;

[0069] If the voltage of the overcapacitor cell is higher than the minimum voltage value of the overcapacitor, the temperature of the overcapacitor is determined. If the temperature of the overcapacitor is higher than the safe temperature value, other backup power is switched and the overcapacitor discharge enable signal is turned off. If the temperature of the overcapacitor is lower than the safe temperature value, the overcapacitor continues to discharge until the voltage of the overcapacitor cell is lower than the minimum voltage value of the overcapacitor.

[0070] The embodiments described above are merely preferred embodiments of this specification and are not intended to limit the scope of this specification. Any modifications and improvements made by those skilled in the art to the technical solutions of this specification without departing from the spirit of this specification should fall within the protection scope defined by the claims of this specification.

Claims

1. A supercapacitor charge / discharge protection circuit, characterized in that, It includes a charging circuit, a voltage equalization circuit, a discharging circuit, and a temperature acquisition circuit. The charging circuit is connected to the voltage equalization circuit, the voltage equalization circuit is connected to the discharging circuit, and the temperature acquisition circuit is connected to the overcapacitor group in the voltage equalization circuit. The charging circuit controls the charging voltage and charging current through voltage feedback and current feedback circuits. The voltage equalization circuit achieves series connection and voltage equalization control of multiple supercapacitor groups through voltage detection and adjustment; The discharge circuit is used to realize the boost conversion and controllable output of supercapacitive electrical energy; The temperature acquisition circuit is used to acquire the temperature of the supercapacitor and convert it into a sampling voltage value for temperature reading.

2. The supercapacitor charge / discharge protection circuit according to claim 1, characterized in that, The charging circuit is specifically as follows: Pin 1 of charging chip U7 is connected to one end of capacitor C24, and the other end of capacitor C24 is connected to one end of resistor R42; Pin 3 of charging chip U7 is connected to feedback voltage signal FB1; Pin 4 of charging chip U7 is simultaneously connected to the overcapacitance charging enable output signal, resistor R44, and one end of capacitor C31; Pin 5 of charging chip U7 is connected to one end of capacitor C26 and capacitor C27, and the 12V power supply; Pin 6 of charging chip U7 is connected to the other end of resistor R42 and one end of inductor L3, and the other end of inductor L3 is connected in two ways: one way is connected to one end of sampling resistors R37, R38, R39, and R40 connected in parallel, and the other way is connected to pin 2 of transistor Q7; the transistor... Pin 1 of Q7 is connected to one end of resistor R41 and one end of capacitor C33. The other ends of sampling resistors R37, R38, R39, and R40 are connected to the other end of resistor R41 and the anode of diode D4. The cathode of diode D4 is connected to one end of resistor R43, capacitor C25, and the supercapacitor group. The other end of resistor R43 is connected to resistor R45, and the other end of capacitor C25 is connected to R46. The other ends of capacitors C26, C27, R44, C31, C33, R45, and R46, as well as pin 2 of charging chip U7, are all grounded. Pin 3 of transistor Q7 is also connected to voltage feedback signal FB1. Capacitor C32 is connected in parallel across resistors R45 and R46.

3. The supercapacitor charge / discharge protection circuit according to claim 1, characterized in that, The voltage equalization circuit includes multiple voltage regulating circuits. Each group of supercapacitors is equipped with a voltage regulating circuit, and the two voltage regulating circuits are cascaded in such a way that the positive terminal of each group of supercapacitors is connected to the negative terminal of the next group of supercapacitors.

4. The supercapacitor charge / discharge protection circuit according to claim 3, characterized in that, The voltage regulation circuit is as follows: pin 1 of monitoring chip U1 is connected to one end of resistor R4 and the gate of N-channel MOSFET Q1; pin 2 of monitoring chip U1 is connected to the negative terminal of supercapacitor C1 and one end of capacitor C2; pin 3 of monitoring chip U1 is connected to the positive terminal of supercapacitor C1 and the other end of bleeder resistors R2, R3 and R4; pin 4 of monitoring chip U1 is connected to one end of voltage divider resistors R5 and R7; the other end of voltage divider resistor R5 is connected to the positive terminal of supercapacitor C1, and the other end of resistor R7 is connected to the negative terminal of supercapacitor C1; the drain of N-channel MOSFET Q1 is connected to one end of bleeder resistors R2 and R3, and the other end of bleeder resistors R2 and R3 is connected to the positive terminal of supercapacitor C1; the source of N-channel MOSFET Q1 is connected to the negative terminal of supercapacitor C1.

5. The supercapacitor charge / discharge protection circuit according to claim 1, characterized in that, The discharge circuit is specifically as follows: Pin 1 of the boost chip U6 is connected to one end of inductor L2 and the anode of diode D2; Pin 3 of the boost chip U6 is connected to one end of capacitor C20, voltage divider feedback resistors R31, R33, and R24; Pin 4 of the boost chip U6 is connected to the output terminal of the voltage divider network composed of resistors R22, R25, and R29 to obtain the divided voltage signal, and the other end of resistor R25 is connected to the drain of MOSFET Q3; Pin 5 of the boost chip U6 is connected to the cathode of diode D2, the other end of resistor R22, capacitor C20, and resistor R24, one end of capacitors C12, C13, C14, C15, and C16, and the anode of diode D3, and the boosted voltage is output to the 12V main power supply network through diode D3; Pin 2 of the boost chip U6, resistor R29, voltage divider feedback resistors R31, R33, and R24 are ... R22, R23, and R24 to obtain the divided voltage signal, and the other end of resistor R25 is connected to the drain of MOSFET Q3; the boosted voltage The other ends of the feedback resistor R31, voltage divider feedback resistor R33, capacitors C12, C13, C14, C15, and C16 are all grounded; the other end of inductor L2 is connected to capacitors C18 and C19 and the drain of MOSFET Q3, respectively, and the other ends of capacitors C18 and C19 are grounded; the source of MOSFET Q3 is connected to one end of capacitor C17, resistor R23, and the overcapacitor group, respectively, and the gate of MOSFET Q3 is connected to the other end of capacitor C17, resistor R23, and resistor R26, respectively, and the other end of resistor R26 is connected to pin 3 of transistor Q6, pin 1 of transistor Q6 is connected to resistor R34, and the other end of resistor R34 is connected in parallel with resistor R36, capacitor C23, and the main system power supply, and the other end of capacitor C23 is grounded; pin 2 of transistor Q6 is connected to the overcapacitor boost discharge control signal.

6. The supercapacitor charge / discharge protection circuit according to claim 1, characterized in that, The temperature acquisition circuit is specifically designed as follows: an NTC thermistor RT1 is connected in series with a voltage divider resistor R8 and then connected to a 3.3V power supply. The voltage divider node is connected to the ADC pin of the control module to acquire the working temperature of the supercapacitor group in real time. The NTC thermistor RT1 is attached to the surface of the aluminum shell of the supercapacitor group with thermally conductive adhesive.

7. A method for operating a supercapacitor charge / discharge protection circuit, the method being applicable to the protection circuit of claim 1, characterized in that, include, During the charging phase: The voltage equalization circuit monitors the voltage of each supercapacitor cell in real time and compares it with the maximum voltage value that the supercapacitor can withstand. If the voltage of a single supercapacitor cell exceeds the maximum voltage that the supercapacitor can withstand, charging should be stopped immediately. If the voltage of the overcapacitor cell is lower than the maximum voltage that the overcapacitor can withstand, the temperature of the overcapacitor is checked. If the temperature of the overcapacitor is higher than the safe temperature, charging is stopped immediately. If the temperature of the overcapacitor is lower than the safe temperature, charging of the overcapacitor is started until the voltage of the overcapacitor cell is higher than the maximum voltage that the overcapacitor can withstand or the temperature is higher than the safe temperature. Discharge phase: The discharge circuit receives the overcapacitor discharge enable signal and causes the overcapacitor group to discharge, while monitoring the voltage of each individual overcapacitor cell in real time. If the voltage of the supercapacitor cell is lower than the minimum voltage value of the supercapacitor, switch to other backup power and turn off the supercapacitor discharge enable signal; If the voltage of the overcapacitor cell is higher than the minimum voltage value of the overcapacitor, the temperature of the overcapacitor is determined. If the temperature of the overcapacitor is higher than the safe temperature value, other backup power is switched and the overcapacitor discharge enable signal is turned off. If the temperature of the overcapacitor is lower than the safe temperature value, the overcapacitor continues to discharge until the voltage of the overcapacitor cell is lower than the minimum voltage value of the overcapacitor.

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