High-gain dc boost converter

Abstract

The application discloses a high-gain DC boost converter, and belongs to the technical field of power electronics. The converter comprises a DC power supply, two staggered control switch tubes, two coupled inductors and a specific switch capacitor network composed of five capacitors and five diodes. The key improvement lies in that the two coupled inductor secondary winding is reversely connected in series and is cross-connected with the capacitor-diode network, forming a composite boost structure and a cross-passive voltage clamping loop. The switch tube is staggered on with a duty cycle greater than 0.5. The application can realize super-high voltage gain without relying on extreme duty cycle, effectively reduce the voltage stress of the switch tube through natural clamping, and reduce the input current ripple through the staggered structure. The topology structure is compact, has fewer devices, is high in efficiency, has clear scalability, and is particularly suitable for the low-voltage input and high-voltage DC bus generation scene of a new energy power generation system.

Description

Technical Field

[0001] This invention relates to the field of power electronics technology, specifically to a high-gain DC-DC boost converter, suitable for applications in new energy power generation systems such as photovoltaics and fuel cells that require boosting low input voltage to a high-voltage DC bus. Background Technology

[0002] Against the backdrop of the accelerated construction of new power systems, new energy power generation systems, represented by photovoltaics, fuel cells, and energy storage, are developing towards a high proportion of grid connection. The output voltage of these distributed power sources is typically low; for example, the output voltage of photovoltaic modules may range from 20V to 40V under complex operating conditions. However, to meet the power quality and power regulation requirements of subsequent grid-connected inverters, the DC bus voltage required for their upstream stage often needs to be stabilized at 380V or even higher. Therefore, the DC-DC boost converter connected between the low-voltage power source and the inverter not only needs to achieve ultra-high voltage gains of more than ten or even dozens of times, but must also simultaneously achieve high efficiency, high reliability, low electromagnetic interference, and reasonable cost. This poses a severe challenge to traditional boost topologies.

[0003] To achieve higher voltage gain, the industry has explored various technical approaches, such as using multi-stage cascaded boost converters, introducing coupled inductors to leverage their turns ratio to increase voltage, or combining switched capacitors / switched inductors to form voltage multiplier networks. While these methods can theoretically increase output voltage, they still present a series of inherent challenges in practical engineering applications, especially in grid-connected scenarios requiring high reliability and long lifespan. Specifically, as gain increases, the voltage stress on power switching devices and diodes typically increases dramatically. This not only raises the requirements for device withstand voltage ratings and costs but also introduces greater switching losses and reliability risks. On the other hand, using auxiliary circuits such as passive or active clamps to control device stress increases system complexity and component count, leading to decreased power density and increased costs. Furthermore, traditional single-phase converters have large input current ripple, which can adversely affect the maximum power point tracking performance of photovoltaic cells and exacerbate the electromagnetic compatibility design challenges of the system. Although existing technologies have attempted to integrate different boost technologies to synergistically improve performance, such as combining coupled inductors with switched capacitors, it is often difficult to achieve the optimal balance between the simplicity of the topology, the balance of device stress, and the complexity of the control strategy.

[0004] Therefore, how to achieve synergistic optimization of ultra-high gain, low voltage stress, low input current ripple, and high efficiency with a compact structure and simple control topology under a limited number of devices remains a practical and urgent technical problem to be solved in this field. Summary of the Invention

[0005] The technical problem to be solved by the present invention is to provide a high-gain DC-DC boost converter and its control method to solve the problem that it is difficult to balance gain, efficiency, device stress and cost in existing high-gain converters, especially to achieve an ultra-high boost ratio under low input voltage while maintaining low switching stress and high power density.

[0006] To achieve the above objectives, the present invention adopts the following technical solution:

[0007] On one hand, the present invention provides a high-gain DC-DC boost converter, characterized in that it includes a DC power supply, a first switching transistor, a second switching transistor, a first coupling inductor, a second coupling inductor, multiple capacitors, and multiple diodes;

[0008] The primary windings of the first coupled inductor and the primary windings of the second coupled inductor are connected in series with the first switch and the second switch, respectively, and then connected in parallel to the two ends of the DC power supply to form a two-phase interleaved main power circuit.

[0009] The secondary winding of the first coupled inductor and the secondary winding of the second coupled inductor are connected in reverse series with opposite terminals connected to the same terminals, forming a secondary series branch.

[0010] Multiple capacitors and multiple diodes are connected to form a switched capacitor network. This network is connected between the two ends of the secondary series branch, the drains of the first and second switching transistors, and between the output terminal of the converter and the negative terminal of the DC power supply. It is used to superimpose and transfer the energy from the coupled inductor when the first and second switching transistors are alternately turned on, and to form a cross clamp on the drain voltage of the switching transistor on the off side.

[0011] As an optional implementation, the switched capacitor network includes a first capacitor, a second capacitor, a third capacitor, a fourth capacitor, a fifth capacitor, a first diode, a second diode, a third diode, a fourth diode, and a fifth diode;

[0012] The first end of the secondary series branch is connected to the output end through a second diode, a first diode, and a fifth diode connected in series in sequence. The second capacitor is connected between the junction of the fifth diode and the first diode and the anode of the second diode. The first capacitor is connected between the junction of the first diode and the second diode and the negative terminal of the DC power supply.

[0013] The second end of the secondary series branch is connected to the cathode of the third diode, and the third capacitor is connected between the cathode of the third diode and the anode of the fourth diode; the anode of the fourth diode is connected to the drain of the second switching transistor; the cathode of the fourth diode is connected to one end of the fourth capacitor, and the other end of the fourth capacitor is connected to the negative terminal of the DC power supply.

[0014] The fifth capacitor is connected between the output terminal and the negative terminal of the DC power supply.

[0015] As an optional implementation, the first switch and the second switch are configured to conduct alternately, and their conduction times differ by half a switching cycle.

[0016] As an optional implementation, the duty cycle of the first switch and the second switch is greater than 0.5 and less than 1.

[0017] As an optional implementation, the turns ratio of the first secondary winding to the first primary winding of the first coupled inductor is equal to the turns ratio of the second secondary winding to the second primary winding of the second coupled inductor.

[0018] As an optional implementation, in continuous conduction mode, the voltage gain M of the converter satisfies the formula: , where D is the duty cycle.

[0019] As an optional implementation, the converter has four operating modes within one switching cycle:

[0020] In the first mode, the first switch is turned on and the second switch is turned off. The DC power supply charges the second capacitor through the second primary winding, the third capacitor, the secondary series branch, and the second diode. At the same time, it charges the fifth capacitor through the second primary winding, the third capacitor, the secondary series branch, the first capacitor, and the fifth diode. The voltage stress of the second switch is clamped by the loop formed by the fourth diode and the fourth capacitor.

[0021] In the second mode, the first switch is turned on, the second switch is turned on, the DC power supply charges the first primary winding and the second primary winding simultaneously, and the fifth capacitor supplies power to the load.

[0022] In the third mode, the first switch is turned off and the second switch is turned on. The DC power supply charges the first capacitor and the third capacitor through the first primary winding, the second capacitor and the first diode. The voltage stress of the first switch is clamped by the loop composed of the third diode, the fourth capacitor and the third capacitor.

[0023] In the fourth mode, the first switch is turned on, the second switch is turned on, the DC power supply charges the first primary winding and the second primary winding simultaneously, and the fifth capacitor supplies power to the load.

[0024] As an optional implementation, in the secondary series branch, the connection point between the first secondary winding and the second secondary winding is not directly connected to other circuit nodes.

[0025] As an optional implementation, the switched capacitor network is scalable. Each additional expansion unit requires two capacitors and two diodes, cascaded according to the same connection rules as the first-stage unit. If the number of switched capacitor units after the reverse series coupling inductors is m, then the gain is... .

[0026] This invention integrates a two-phase interleaved inductor with a specifically connected switched capacitor network to construct a composite mechanism of magnetic energy boosting and capacitive voltage multiplication. This achieves an ultra-high voltage gain far exceeding that of traditional DC-DC boost converters without relying on extreme duty cycles, effectively solving the boosting challenge in low-voltage input scenarios. Furthermore, thanks to a unique cross-passive clamping circuit design, this topology naturally and effectively limits the peak voltage experienced by the power switches during turn-off, significantly reducing the voltage stress on the switches to a level far below the output voltage. This reduces the voltage rating requirements for power devices, lowering costs, and also significantly reduces switching losses, improving overall efficiency and reliability.

[0027] Furthermore, the control of the two-phase interleaved drive enables the ripples of the two-phase input currents to cancel each other out in the time domain, thereby significantly smoothing the input current from the DC power supply side. This not only helps to improve the maximum power point tracking accuracy and efficiency of the upstream photovoltaic and other power supplies, but also improves the electromagnetic compatibility performance of the system.

[0028] Furthermore, this topology allows the clamping function to share the same capacitors and diodes with the power transfer and voltage superposition functions, thereby achieving the aforementioned high performance while maintaining a smaller number of components, making the overall structure more compact, which helps to improve power density and reduce system cost. Attached Figure Description

[0029] To more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the accompanying drawings used in the description of the embodiments or the prior art will be briefly introduced below.

[0030] Figure 1 This is a schematic diagram of the circuit topology of a high-gain DC-DC boost converter provided in an embodiment of the present invention;

[0031] Figure 2 A schematic diagram of the equivalent circuit and current path of the converter in the first operating mode (S1 on, S2 off) provided in an embodiment of the present invention;

[0032] Figure 3 A schematic diagram of the equivalent circuit and current path of the converter in the second operating mode (S1 on, S2 on) provided in an embodiment of the present invention;

[0033] Figure 4A schematic diagram of the equivalent circuit and current path of the converter in the third operating mode (S1 off, S2 on) provided in the embodiment of the present invention;

[0034] Figure 5 A schematic diagram of the equivalent circuit and current path of the converter in the fourth operating mode (S1 on, S2 on) provided in the embodiment of the present invention;

[0035] Figure 6 The input voltage waveform diagram of the converter under specific parameters provided in the embodiments of the present invention;

[0036] Figure 7 The output voltage waveform diagram of the converter under specific parameters provided in the embodiments of the present invention;

[0037] Figure 8 The drain-source voltage waveform of the switching transistor S1 in the converter provided in the embodiment of the present invention;

[0038] Figure 9 The drain-source voltage waveform of the switching transistor S2 in the converter provided in the embodiment of the present invention;

[0039] Figure 10 The waveform diagram of the primary current of the coupled inductor in the converter provided in the embodiment of the present invention;

[0040] Figure 11 A waveform diagram of the converter input current provided in an embodiment of the present invention;

[0041] Figure 12 The embodiments of the present invention are based on Figure 1 A schematic diagram of a multi-stage boost converter with topological extension;

[0042] In the diagram: Vin, DC power supply; S1, first switching transistor; S2, second switching transistor; Lk1, first leakage inductance; Lm1, first magnetizing inductance; N11, first primary winding; N12, first secondary winding; Lk2, second leakage inductance; Lm2, second magnetizing inductance; N21, second primary winding; N22, second secondary winding; C1, first capacitor; C2, second capacitor; C3, third capacitor; C4, fourth capacitor; C0, fifth capacitor; D1, first diode; D2, second diode; D3, third diode; D4, fourth diode; D0, fifth diode; R, load resistor. Detailed Implementation

[0043] like Figure 1As shown, the high-gain DC-DC boost converter provided in this embodiment adopts a topology combining an interleaved parallel coupled inductor input stage and a multi-stage switched capacitor voltage multiplier network. The converter mainly consists of a DC input source, a power switching module, a magnetic coupling element module, a passive clamping and voltage multiplier rectifier network, and an output filtering module. Specific components include: a DC power supply Vin, representing a low-voltage DC source such as a photovoltaic panel, fuel cell stack, or battery pack; a first switch S1 and a second switch S2, serving as the core active power control devices; a first coupled inductor and a second coupled inductor, serving as the main energy storage and boosting elements; and a switched capacitor network consisting of five diodes (first diode D1, second diode D2, third diode D3, fourth diode D4, and fifth diode D0) and five capacitors (first capacitor C1, second capacitor C2, third capacitor C3, fourth capacitor C4, and fifth capacitor C0). The fifth capacitor C0 is connected in parallel at the output terminal to smooth the output voltage and provide energy to the load R.

[0044] To achieve low-ripple input current, the input stage employs a two-phase interleaved parallel structure. The first coupling inductor comprises a first primary winding N11 and a first secondary winding N12, whose electrical model implicitly includes a first leakage inductance Lk1 and a first magnetizing inductance Lm1. The same-name terminal of the first primary winding N11 is connected to the positive terminal of the DC power supply Vin, and the opposite-name terminal is connected to the drain of the first switching transistor S1. The source of the first switching transistor S1 is connected to the negative terminal of the DC power supply Vin. Similarly, the second coupling inductor comprises a second primary winding N21 and a second secondary winding N22, and implicitly includes a second leakage inductance Lk2 and a second magnetizing inductance Lm2. The opposite-name terminal of the second primary winding N21 is connected to the positive terminal of the DC power supply Vin, and the same-name terminal is connected to the drain of the second switching transistor S2. The source of the second switching transistor S2 is connected to the negative terminal of the DC power supply Vin. This primary winding connection method, combined with the 180° phase difference control described later, enables the current ripple flowing through the first and second coupling inductors to cancel each other out at the total input terminal, thereby significantly reducing the current pulsation on the power supply side. This is crucial for extending battery life and improving the maximum power point tracking efficiency of photovoltaics.

[0045] like Figure 1As shown, the opposite-named terminal of the first secondary winding N12 is connected to the same-named terminal of the second secondary winding N22, forming a reverse series structure of the secondary windings. This connection ensures that when the switching transistors are alternately turned on, the voltages induced by the two secondary windings can participate in the voltage multiplication process by superposition, rather than canceling each other out. This secondary series branch is suspended in the middle of the circuit, with one end (the same-named terminal of the first secondary winding N12) connected to the anode of the second diode D2. The cathode of the second diode D2 is connected to the anode of the first diode D1. The cathode of the first diode D1 is connected to the anode of the fifth diode D0. The cathode of the fifth diode D0 is directly connected to the positive terminal of the output. Based on this diode chain, the connection of the capacitor determines the voltage multiplication factor.

[0046] The second capacitor C2 is connected between the junction of the fifth diode D0 and the first diode D1 and the anode of the second diode D2. The first capacitor C1 is connected between the junction of the first diode D1 and the second diode D2 and the negative terminal of the DC power supply Vin.

[0047] On the other side of the circuit, the other end of the secondary series branch (the opposite-named end of the second secondary winding N22) is connected to the cathode of the third diode D3. One end of the third capacitor C3 is connected to the cathode of the third diode D3, and the other end is connected to the anode of the fourth diode D4. The anode of the fourth diode D4 is connected to the drain of the second switching transistor S2, and the cathode of the fourth diode D4 is connected to one end of the fourth capacitor C4, with the other end of the fourth capacitor C4 grounded. This part of the circuit structure (C3, C4, D3, D4) has a dual function: on the one hand, it forms a passive and lossless clamping circuit for the second switching transistor S2, which can absorb the voltage spike caused by the leakage inductance when the second switching transistor S2 is turned off; on the other hand, it is also part of a voltage multiplier circuit, using the switching action of the second switching transistor S2 and the energy of the coupled inductor to help improve the overall system gain. Furthermore, the relevant nodes of the switched capacitor network form a cross-coupled relationship with the drain node of the first switch S1 and the drain node of the second switch S2, thereby forming a cross-clamping on the drain voltage of the turn-off switch when any relevant node is turned off, so as to reduce the voltage stress of the switch.

[0048] The drive signals for the first switch S1 and the second switch S2 are set to be 180° out of phase, and the duty cycle D is greater than 0.5. This means that at any given time, at least one switch will be in the on state, and there will be an overlapping phase where both switches are simultaneously on. We analyze a complete switching cycle by dividing it into the main operating modes.

[0049] First is the first working mode, corresponding to Figure 2The state is shown. In this stage, the first switch S1 is on, while the second switch S2 has just been off (or is in the off-state maintenance period). On the input side, the DC power supply Vin magnetizes and charges the primary winding N11 of the first coupled inductor through the on-state first switch S1. Current flows from the positive terminal of Vin, through the primary winding N11 and the first switch S1, and back to the negative terminal (e.g., ...). Figure 2 (As shown by the red arrow on the primary side), the magnetic flux in the core of the first coupled inductor increases, and the stored energy rises. Simultaneously, since the second switch S2 is off, the second primary winding N21 of the second coupled inductor is in the discharge demagnetization stage, and the polarity of its voltage reverses. Induced by the voltage on the primary side of the first coupled inductor, the second secondary winding N22 generates an induced electromotive force. At this time, a crucial charging loop is formed in the circuit (such as...). Figure 2 (As shown by the green dashed arrow): Current originates from the DC power supply Vin, passes through the primary winding N21 of the second coupled inductor, the third capacitor C3, the second secondary winding N22, the first secondary winding N12, and the second diode D2, charging the second capacitor C2, and finally flows back to ground through the conducting S1. That is, the circuit path is: Vin(+)→N21→C3→N22→N12→D2→C2→S1→Vin(-). During this process, the second capacitor C2 not only absorbs energy from the power supply Vin, but also absorbs the magnetic energy released from the primary winding of the second coupled inductor and the energy induced by the two secondary windings (N22 and N12). Therefore, the voltage across C2 is charged to a relatively high level. At the same time, at the instant the second switch S2 is turned off, its drain voltage would normally rise sharply, but due to the presence of the fourth diode D4 and the fourth capacitor C4, the current will flow through the fourth diode D4 to the fourth capacitor C4, thereby clamping the drain voltage of the second switch S2 at the voltage level of the fourth capacitor C4, effectively protecting the second switch S2.

[0050] Then it enters the second working mode, corresponding to Figure 3 The state shown is as follows. In this stage, the first switch S1 is turned on and the second switch S2 is turned on. The DC power supply Vin simultaneously excites and charges the first primary winding N11 and the second primary winding N21, and the two-phase coupled inductor enters the energy storage stage. At the same time, the output side is mainly supplied to the load R by the fifth capacitor C0, thereby reducing the output voltage ripple and ensuring the continuity of load energy.

[0051] Then it enters the third working mode, corresponding to Figure 4The state is shown. In this stage, the first switch S1 is off, while the second switch S2 is on. On the input side, the DC power supply Vin instead magnetizes and charges the second primary winding N21 of the second coupled inductor through the on-state second switch S2. Current flows back to the negative terminal through the second primary winding N21 and the second switch S2, and the second coupled inductor stores energy. Simultaneously, the first primary winding N11 of the first coupled inductor begins to discharge, its voltage polarity reverses, and a high voltage is induced in the first secondary winding N12. At this time, another complex energy transfer loop is formed in the circuit (such as...). Figure 4 (As shown by the green dashed arrow). Current flows from Vin, through the primary winding N11 of the first coupled inductor, through the second capacitor C2 and the first diode D1, charging the first capacitor C1. The back electromotive force of the primary winding of the first coupled inductor, plus Vin, plus the voltage stored on C2, together act on the subsequent circuit. The charge pump circuit is: Vin(+)→N11→C2→D1→C1→N12→N22→C3→S2→Vin(-). In this circuit, the second capacitor C2, which was fully charged in the first operating mode, acts as a series voltage source, "pumping" its stored energy into the first capacitor C1. At the same time, the induced voltages of the first secondary winding N12 and the second secondary winding N22 are also superimposed in the circuit, causing the voltage across the first capacitor C1 to increase significantly, reaching a level much higher than the input voltage Vin. Furthermore, the clamping of the first switch S1 is also completed in this mode: when the first switch S1 is turned off, the leakage current of the primary side of the first coupling inductor is discharged through the loop formed by the fourth capacitor C4, the third diode D3 and the third capacitor C3 (or through the C2 and D1 loop), limiting the turn-off voltage spike of the first switch S1 to a safe range.

[0052] Then it enters the fourth working mode, corresponding to Figure 5 The state is shown. In this stage, the first switch S1 is turned on and the second switch S2 is turned on. The two-phase coupled inductor enters the energy storage stage again, and the fifth capacitor C0 continues to supply power to the load R. As the next cycle enters the first or third mode, the voltage multiplier network and the clamping network alternately complete the energy superposition, transfer and cross-clamping of the off-side devices, thereby achieving stable high-gain output.

[0053] Through the alternating operation of the four modes and the progressive superposition of energy, the converter ultimately achieves a stable ultra-high voltage gain. This gain can be designed and adjusted using explicit mathematical relationships. In continuous conduction mode, the voltage gain M of the converter is determined by the following formula: Where D is the duty cycle of the first switch S1 and the second switch S2, and n is the turns ratio of the coupling inductor (i.e., the turns ratio of the first secondary winding N12 to the first primary winding N11, which is also equal to the turns ratio of the second secondary winding N22 to the second primary winding N21). This formula reveals two degrees of freedom for increasing gain: one is by adjusting the duty cycle D, and the other is by designing the turns ratio n of the coupling inductor. For example, when the design requires boosting the DC power supply from 20V to an output voltage of 345V (gain M=17.25), if the turns ratio n=1 is selected, the required duty cycle D can be calculated from the formula to be approximately 0.55. This explicit gain relationship provides a direct theoretical basis for parameter design and optimization in engineering applications, enabling this converter to flexibly adapt to application scenarios with different input voltages and target bus voltages.

[0054] Furthermore, during the alternating operation of the two modes, the output terminal always receives energy support. When the fifth diode D0 is turned on (usually occurring at a specific moment of mode transition, or when the voltage of C1 is high enough), the high-voltage energy stored in the first capacitor C1 and the induced energy of the secondary winding are released through the fifth diode D0 to the output capacitor C0 and the load R.

[0055] Figures 6 to 11 The simulated waveforms of the converter under specific parameters are shown, verifying the correctness of the above analysis.

[0056] Figure 6 and Figure 7 The display shows that when the input voltage is 20V, the output voltage is stable at around 345V, achieving a voltage gain of about 17 times.

[0057] Figure 8 and Figure 9 The drain-source voltage waveforms of the first switching transistors S1 and S2 show that they withstand a peak voltage of only about 45V, which is only about one-eighth of the output voltage. This characteristic is highly advantageous because it allows designers to use MOSFETs with low withstand voltage (such as 60V or 80V) and low on-resistance, thereby significantly reducing conduction losses and resolving the trade-off between efficiency and withstand voltage in high-gain circuits.

[0058] Figure 10 The inductor current waveform confirms that the converter operates in continuous conduction mode and the two-phase currents are interleaved.

[0059] Figure 11 The total input current waveform exhibits extremely low ripple characteristics. This smooth DC input is very friendly to the power supply side, avoiding the damage to battery life caused by pulse current.

[0060] Furthermore, the topology of this embodiment has good modular scalability. For example... Figure 12As shown in Figure 1, to further improve the voltage gain, the existing diode-capacitor network can be cascaded. The expansion method is as follows: for each additional voltage multiplier unit between the secondary series branch and the output terminal, two diodes and two capacitors (e.g., D11, D21 and C11, C21 in the figure) need to be added. With each additional stage, the coefficient in the voltage gain formula will increase accordingly, thus theoretically achieving an infinite voltage gain. If the number of switched capacitor units after the reverse-series coupled inductor is m, then the gain is: Where D is the duty cycle, n is the turns ratio of the coupled inductor, and m is the number of switched capacitor units after the reverse series coupled inductor. When m=1, the above formula degenerates into the basic structure. This scalability allows the converter to flexibly adapt to different voltage levels, from hundreds of volts to thousands of volts, for example, for high-voltage power supplies for specialized medical equipment or industrial-grade DC microgrid interfaces.

[0061] In summary, the converter in this embodiment achieves excellent overall performance of high gain, low stress, and low ripple through three degrees of freedom: coupling inductor turns ratio adjustment, duty cycle adjustment, and switching capacitor stage expansion.

Claims

1. A high-gain DC-DC boost converter, characterized in that, It includes a DC power supply (Vin), a first switching transistor (S1), a second switching transistor (S2), a first coupling inductor, a second coupling inductor, multiple capacitors, and multiple diodes; The primary winding (N11) of the first coupled inductor and the primary winding (N21) of the second coupled inductor are connected in series with the first switch (S1) and the second switch (S2) respectively, and then connected in parallel to the two ends of the DC power supply (Vin) to form a two-phase interleaved main power circuit. The secondary winding (N12) of the first coupled inductor and the secondary winding (N22) of the second coupled inductor are connected in reverse series with opposite terminals connected to the same terminals to form a secondary series branch. Multiple capacitors and multiple diodes are connected to form a switched capacitor network. This network is connected between the two ends of the secondary series branch, the drains of the first switch (S1) and the second switch (S2), and between the output terminal of the converter and the negative terminal of the DC power supply (Vin). It is used to superimpose and transfer the energy from the coupled inductor when the first switch (S1) and the second switch (S2) are alternately turned on, and to form a cross clamp on the drain voltage of the switch on the off side.

2. The high-gain DC-DC boost converter according to claim 1, characterized in that: The switched capacitor network includes a first capacitor (C1), a second capacitor (C2), a third capacitor (C3), a fourth capacitor (C4), a fifth capacitor (C0), a first diode (D1), a second diode (D2), a third diode (D3), a fourth diode (D4), and a fifth diode (D0). The first end of the secondary series branch is connected to the output end through a second diode (D2), a first diode (D1), and a fifth diode (D0) connected in series. The second capacitor (C2) is connected between the junction of the fifth diode (D0) and the first diode (D1) and the anode of the second diode (D2). The first capacitor (C1) is connected between the junction of the first diode (D1) and the second diode (D2) and the negative terminal of the DC power supply (Vin). The second end of the secondary series branch is connected to the cathode of the third diode (D3), and the third capacitor (C3) is connected between the cathode of the third diode (D3) and the anode of the fourth diode (D4); the anode of the fourth diode (D4) is connected to the drain of the second switch (S2); the cathode of the fourth diode (D4) is connected to one end of the fourth capacitor (C4), and the other end of the fourth capacitor (C4) is connected to the negative terminal of the DC power supply (Vin); The fifth capacitor (C0) is connected between the output terminal and the negative terminal of the DC power supply (Vin).

3. The high-gain DC-DC boost converter according to claim 1, characterized in that: The first switch (S1) and the second switch (S2) are configured to conduct alternately, and their conduction times differ by half a switching cycle.

4. The high-gain DC-DC boost converter according to claim 3, characterized in that: The duty cycle (D) of the first switch (S1) and the second switch (S2) is greater than 0.5 and less than 1.

5. The high-gain DC-DC boost converter according to claim 1, characterized in that: The turns ratio of the first secondary winding (N12) to the first primary winding (N11) of the first coupled inductor is equal to the turns ratio of the second secondary winding (N22) to the second primary winding (N21) of the second coupled inductor.

6. The high-gain DC-DC boost converter according to claim 5, characterized in that: In continuous conduction mode, the voltage gain M of the converter satisfies the formula: Where D is the duty cycle and n is the turns ratio.

7. The high-gain DC-DC boost converter according to claim 2, characterized in that: Within one switching cycle, the converter has four operating modes: In the first mode, the first switch (S1) is turned on and the second switch (S2) is turned off. The DC power supply (Vin) charges the second capacitor (C2) through the second primary winding (N21), the third capacitor (C3), the secondary series branch, and the second diode (D2). At the same time, it charges the fifth capacitor (C0) through the second primary winding (N21), the third capacitor (C3), the secondary series branch, the first capacitor (C1), and the fifth diode (D0). The voltage stress of the second switch (S2) is clamped by the loop formed by the fourth diode (D4) and the fourth capacitor (C4). In the second mode, the first switch (S1) is turned on, the second switch (S2) is turned on, the DC power supply (Vin) charges the first primary winding (N11) and the second primary winding (N21) at the same time, and the fifth capacitor (C0) supplies power to the load. In the third mode, the first switch (S1) is turned off and the second switch (S2) is turned on. The DC power supply (Vin) charges the first capacitor (C1) and the third capacitor (C3) through the first primary winding (N11), the second capacitor (C2) and the first diode (D1). The voltage stress of the first switch (S1) is clamped by the loop composed of the third diode (D3), the fourth capacitor (C4) and the third capacitor (C3). In the fourth mode, the first switch (S1) is turned on, the second switch (S2) is turned on, the DC power supply (Vin) simultaneously charges the first primary winding (N11) and the second primary winding (N21), and the fifth capacitor (C0) supplies power to the load.

8. The high-gain DC-DC boost converter according to claim 1, characterized in that: In the secondary series branch, the connection point between the first secondary winding (N12) and the second secondary winding (N22) is not directly connected to other circuit nodes.

9. The high-gain DC-DC boost converter according to claim 1, characterized in that: The switched capacitor network is scalable. Each additional expansion unit requires two capacitors and two diodes, cascaded according to the same connection rules as the first-stage unit. If the number of switched capacitor units after adding the reverse-series coupled inductors is m, then the gain is... .

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