Loop time offset determination method and apparatus, terminal, chip and chip module

Abstract

The application relates to a loop time offset determination method and device, a terminal, a chip and a chip module, and relates to the technical field of mobile communication. The method can overcome the limitation of a single measurement index, avoid errors and interference introduced by invalid time offset estimation attempts, and improve the efficiency and accuracy of time offset determination. The method comprises the following steps: obtaining time offset estimation results of multiple rounds of time offset estimation attempts for a control channel; the time offset estimation results comprise a control format indication measurement value and a cell-specific reference signal signal-to-noise ratio; for each round of time offset estimation attempt, a time offset adaptation degree representing the advantages and disadvantages of the time offset estimation result of the round is determined according to the control format indication measurement value and the cell-specific reference signal signal-to-noise ratio corresponding to the round; and the loop time offset is determined according to the time offset adaptation degrees corresponding to the rounds.

Description

Technical Field

[0001] This application relates to the field of mobile communication technology, and in particular to a loop timing offset determination method, apparatus, terminal, chip, chip module, computer equipment, computer-readable storage medium, and computer program product. Background Technology

[0002] In LTE (Long Term Evolution) systems, terminals still need to receive paging messages during the PO (Paging Occasion) phase even in DRX (Discontinuous Reception) sleep mode. This requires demodulation of the PCFICH (Physical Control Format Indicator Channel) and PDCCH (Physical Downlink Control Channel), and time offset estimation is used to ensure signal synchronization. Traditional time offset determination methods typically rely on SNR (Signal-to-Noise Ratio) estimates or the intermediate MI Metric (Metric Indicator Metric) from the PDCCH decoding process.

[0003] However, the robustness of time offset estimation results determined solely by intermediate quantities (such as MI Metric) in the PDCCH decoding process is insufficient. When the PDCCH is decoded correctly or not at all in all rounds of time offset estimation attempts, it cannot effectively distinguish whether PDCCH transmission actually exists, leading to misjudgments in most scenarios without paging messages. On the other hand, relying solely on the CFI Metric (Control Format Indicator Metric) generated by PCFICH demodulation as the cost function is not robust enough and it is difficult to stably reflect the time offset estimation error under low signal-to-noise ratio or multipath conditions. Summary of the Invention

[0004] Therefore, it is necessary to provide a loop time offset determination method, device, terminal, chip, chip module, computer equipment, computer-readable storage medium, and computer program product to address the above-mentioned technical problems.

[0005] Firstly, this application provides a method for determining loop time offset, including:

[0006] Obtain the time offset estimation results of multiple rounds of time offset estimation attempts for the control channel; the time offset estimation results include control format indication metric and cell-specific reference signal-to-noise ratio;

[0007] For each round of time offset estimation attempts, a time offset fit degree, which characterizes the quality of the time offset estimation result for that round, is determined based on the control format indication metric value corresponding to that round and the signal-to-noise ratio of the cell-specific reference signal.

[0008] The loop time offset is determined based on the time offset fit degree corresponding to each round.

[0009] In one embodiment, determining the loop time offset based on the time offset fit degree corresponding to each of the rounds includes:

[0010] Based on the time-biased fit degree corresponding to each round, a target round is determined in each round; the time-biased fit degree corresponding to the target round is greater than or equal to the time-biased fit degree corresponding to each round.

[0011] If the time offset fit corresponding to the target round is greater than a set threshold, the loop time offset is updated based on the time offset estimate of the target round.

[0012] In one embodiment, obtaining the time offset estimation results of multiple rounds of time offset estimation attempts for the control channel includes:

[0013] In each round of time offset estimation attempts, in response to the time domain signal received by the demodulation module, the time domain signal is converted into frequency domain data;

[0014] The log-likelihood ratio is determined based on the frequency domain data, channel estimation information, and noise estimation information.

[0015] Based on the scrambling code of the cell, the log-likelihood ratio is descrambled to obtain the descrambled data;

[0016] Based on the codebook sequence and the descrambled data, determine the control format indication metric value;

[0017] Obtain the signal-to-noise ratio of the cell-specific reference signal passed in from the front-end module.

[0018] In one embodiment, determining the time offset fit, which characterizes the quality of the time offset estimation result for the round, based on the control format indication metric value corresponding to the round and the cell-specific reference signal-to-noise ratio, includes:

[0019] Obtain the influence of the cell-specific reference signal-to-noise ratio corresponding to the round on the control format indication metric value;

[0020] Based on the control format indicator metric and the influence degree, a time-bias fit degree, which characterizes the quality of the time-bias estimation result for the round, is determined.

[0021] In one embodiment, obtaining the influence of the cell-specific reference signal-to-noise ratio corresponding to the round on the control format indication metric includes:

[0022] Based on the signal-to-noise ratio (SNR) of the cell-specific reference signal corresponding to the round, determine the degree of influence of the cell-specific reference signal SNR of the round on the control format indication metric.

[0023] In one embodiment,

[0024] Before determining the time offset fit, which characterizes the quality of the time offset estimation result for the round, based on the control format indication metric value corresponding to the round and the cell-specific reference signal-to-noise ratio, the method further includes:

[0025] For each round of time offset estimation attempt, after time offset compensation is performed on the control channel for the round of time offset estimation attempt, the physical downlink control channel is demodulated to obtain the demodulation result of the round of time offset estimation attempt;

[0026] If the total number of rounds in which the downlink control information included in the demodulation result passes the cyclic redundancy check is equal to 1, the time offset estimation result corresponding to the round in which the downlink control information included in the demodulation result passes the cyclic redundancy check is determined as the loop time offset.

[0027] Secondly, this application also provides a loop time offset determination device, comprising:

[0028] The acquisition module is used to acquire the time offset estimation results of multiple rounds of time offset estimation attempts for the control channel; the time offset estimation results include control format indication metric and cell-specific reference signal-to-noise ratio;

[0029] The first determining module is used to determine the time offset fit degree, which characterizes the quality of the time offset estimation result for each round of time offset estimation attempts, based on the control format indication metric value corresponding to the round and the signal-to-noise ratio of the cell-specific reference signal.

[0030] The second determining module is used to determine the loop time offset based on the time offset adaptation degree corresponding to each round.

[0031] Thirdly, this application also provides a terminal, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to perform the following steps:

[0032] Obtain the time offset estimation results of multiple rounds of time offset estimation attempts for the control channel; the time offset estimation results include control format indication metric and cell-specific reference signal-to-noise ratio;

[0033] For each round of time offset estimation attempts, a time offset fit degree, which characterizes the quality of the time offset estimation result for that round, is determined based on the control format indication metric value corresponding to that round and the signal-to-noise ratio of the cell-specific reference signal.

[0034] The loop time offset is determined based on the time offset fit degree corresponding to each round.

[0035] Fourthly, this application also provides a chip, including a processor and a communication interface, wherein the processor is configured to cause the chip to perform the following steps when executing:

[0036] Obtain the time offset estimation results of multiple rounds of time offset estimation attempts for the control channel; the time offset estimation results include control format indication metric and cell-specific reference signal-to-noise ratio;

[0037] For each round of time offset estimation attempts, a time offset fit degree, which characterizes the quality of the time offset estimation result for that round, is determined based on the control format indication metric value corresponding to that round and the signal-to-noise ratio of the cell-specific reference signal.

[0038] The loop time offset is determined based on the time offset fit degree corresponding to each round.

[0039] Fifthly, this application also provides a chip module, including a communication module, a power module, a storage module, and a chip, wherein:

[0040] The power module is used to provide power to the chip module;

[0041] The storage module is used to store data and instructions;

[0042] The communication module is used for internal communication within the chip module, or for communication between the chip module and external devices.

[0043] The chip is used to perform the steps of the method provided in the first aspect above.

[0044] Sixthly, this application also provides a computer device, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to perform the following steps:

[0045] Obtain the time offset estimation results of multiple rounds of time offset estimation attempts for the control channel; the time offset estimation results include control format indication metric and cell-specific reference signal-to-noise ratio;

[0046] For each round of time offset estimation attempts, a time offset fit degree, which characterizes the quality of the time offset estimation result for that round, is determined based on the control format indication metric value corresponding to that round and the signal-to-noise ratio of the cell-specific reference signal.

[0047] The loop time offset is determined based on the time offset fit degree corresponding to each round.

[0048] Seventhly, this application also provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, performs the following steps:

[0049] Obtain the time offset estimation results of multiple rounds of time offset estimation attempts for the control channel; the time offset estimation results include control format indication metric and cell-specific reference signal-to-noise ratio;

[0050] For each round of time offset estimation attempts, a time offset fit degree, which characterizes the quality of the time offset estimation result for that round, is determined based on the control format indication metric value corresponding to that round and the signal-to-noise ratio of the cell-specific reference signal.

[0051] The loop time offset is determined based on the time offset fit degree corresponding to each round.

[0052] Eighthly, this application also provides a computer program product, including a computer program that, when executed by a processor, performs the following steps:

[0053] Obtain the time offset estimation results of multiple rounds of time offset estimation attempts for the control channel; the time offset estimation results include control format indication metric and cell-specific reference signal-to-noise ratio;

[0054] For each round of time offset estimation attempts, a time offset fit degree, which characterizes the quality of the time offset estimation result for that round, is determined based on the control format indication metric value corresponding to that round and the signal-to-noise ratio of the cell-specific reference signal.

[0055] The loop time offset is determined based on the time offset fit degree corresponding to each round.

[0056] The aforementioned loop time offset determination method, apparatus, terminal, chip, chip module, computer equipment, computer-readable storage medium, and computer program product acquire time offset estimation results from multiple rounds of time offset estimation attempts for the control channel. The time offset estimation results include control format indication metric and cell-specific reference signal-to-noise ratio (SNR). For each round, a time offset fit degree, characterizing the quality of the time offset estimation results for that round, is determined based on the control format indication metric and cell-specific reference signal-to-noise ratio corresponding to that round. A round is the round in which the demodulation result of the time offset estimation attempt meets the target condition. The demodulation result is determined by demodulating the physical downlink control channel. The loop time offset is determined based on the time offset fit degree corresponding to each round. Compared to traditional methods, this application enhances the robustness of time offset estimation by jointly utilizing the Control Format Indicator Metric (CFI Metric) and the cell-specific reference signal-to-noise ratio (SNR). It also introduces a time offset fit metric to comprehensively evaluate the time offset estimation results, effectively overcoming the limitations of a single metric and avoiding misjudgments of time offset caused by the inability of a single metric to distinguish the actual transmission state of the PDCCH in scenarios without paging messages. This makes the time offset determination results more closely reflect the actual signal transmission situation, thereby improving the accuracy of time offset judgment. Furthermore, by introducing a round-based screening mechanism, only time offset estimation attempts whose PDCCH demodulation results meet the target conditions are evaluated, avoiding unnecessary time offset fit calculations and reducing errors and interference introduced by invalid demodulation results. This further improves the efficiency and accuracy of time offset determination, enabling the terminal to quickly complete synchronization and paging detection through more accurate time offset estimation, reducing unnecessary signal processing or repeated wake-ups. Attached Figure Description

[0057] To more clearly illustrate the technical solutions in the embodiments of this application or related technologies, the drawings used in the description of the embodiments of this application or related technologies will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other related drawings can be obtained based on these drawings without creative effort.

[0058] Figure 1 This is a flowchart illustrating a loop time offset determination method in one embodiment;

[0059] Figure 2 This is a flowchart illustrating the CFI detection steps in one embodiment;

[0060] Figure 3 This is a flowchart illustrating the loop time offset determination method in another embodiment;

[0061] Figure 4 This is a structural block diagram of a loop time offset determination device in one embodiment;

[0062] Figure 5 This is a schematic diagram of a verification result in one embodiment;

[0063] Figure 6 This is an internal structural diagram of a computer device in one embodiment. Detailed Implementation

[0064] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0065] It should be noted that the term "comprising" and any variations thereof, as used in this application, are intended to cover non-exclusive inclusion. The term "multiple" as used in this application refers to two or more. The term "and / or" as used in this application refers to one of the solutions, or any combination of multiple solutions.

[0066] The loop timing offset determination method provided in this application can be applied to LTE-enabled electronic devices. The electronic device can refer to any device including memory, such as a terminal, base station, server, or one or more of these. The terminal can be, but is not limited to, various personal computers, laptops, smartphones, tablets, etc. The electronic device can have a chip deployed on it, and the method can be executed through the chip. Furthermore, the method can also be applied to chip modules, virtual devices, and storage media. For example, a virtual device can include a chip, and the various modules in the virtual device can include software and / or hardware.

[0067] In one exemplary embodiment, such as Figure 1 As shown, a method for determining loop time offset is provided, which may include the following steps:

[0068] Step S101: Obtain the time offset estimation results of multiple rounds of time offset estimation attempts for the control channel; the time offset estimation results include the control format indication metric and the cell-specific reference signal-to-noise ratio.

[0069] Among them, time offset estimation attempt can refer to attempting to estimate the time offset according to the set parameters; Control Format Indicator Metric (CFI Metric) can refer to a confidence value output by the PCFICH demodulation module, which can be used to quantify the reliability or confidence level of the current detection of CFI values ​​(1,2,3); Cell Specific Reference Signal-to-Noise Ratio (CRS SNR) can refer to the estimated value of the current channel signal-to-noise ratio calculated based on the Cell Specific Reference Signal (CRS); the estimated value can be filtered and smoothed to reflect the average channel quality over a period of time.

[0070] For example, when the terminal is in LTE IDRX (Idle Discontinuous Reception) mode and in a low signal-to-noise ratio scenario, or when the terminal is in LTE non-IDRX mode, the terminal enables the PCFICH multitry function in the PO phase, that is, it performs multiple rounds of time offset estimation attempts for PCFICH to obtain the time offset estimation result of each round of time offset estimation attempts.

[0071] Step S102: For each round, determine the time offset fit degree, which characterizes the quality of the time offset estimation result of the round, based on the control format indication metric value corresponding to the round and the signal-to-noise ratio of the cell-specific reference signal; the round is the round in which the demodulation result of the time offset estimation attempt meets the target condition; the demodulation result is determined by demodulating the physical downlink control channel.

[0072] The target condition refers to the condition that the demodulation result of the time bias estimation attempt in each round must satisfy.

[0073] For example, for each round, the physical downlink control channel is demodulated to obtain the demodulation result of the time offset estimation attempt for the current round. Based on the demodulation result of each round, rounds whose demodulation results meet the target conditions are selected from all rounds. For each round, based on the signal-to-noise ratio of the cell-specific reference signal corresponding to the round, the correction value or weight coefficient corresponding to the control format indication metric value of the round is determined. The control format indication metric value of the round is corrected according to the correction value or weighted according to the weight coefficient to obtain the time offset fit degree characterizing the quality of the time offset estimation result of the round.

[0074] Step S103: Determine the loop time offset based on the time offset adaptation degree corresponding to each round.

[0075] Among them, loop time offset can refer to the output state of the receiver symbol timing synchronization loop.

[0076] For example, an optimal time-biased fit is determined based on the time-biased fit corresponding to each round, and the loop time bias is updated based on this optimal time-biased fit when the time bias update condition is met.

[0077] In this embodiment, when the terminal is in an LTE IDRX state and supports sleep mode, there is no need to wake it up in advance (if it is woken up in advance, there will be more ways to obtain timing, such as using CRS pilots for timing offset estimation, but this will increase power consumption). In the scenario without early wake-up, in order to determine a more accurate timing deviation, this embodiment supports the CFI metric judgment criterion based on the timing offset estimation attempt. During the process of performing multiple rounds of timing offset estimation attempts, when all rounds of PDCCH are decoded correctly, multiple rounds of PDCCH are decoded correctly, or all rounds of PDCCH are decoded correctly, the optimal loop timing offset can be determined by this embodiment based on the timing offset estimation results of multiple rounds. When only one round of PDCCH is decoded correctly, the timing offset estimation result of that round can be directly selected as the loop timing offset.

[0078] In the above-mentioned loop time offset determination method, the time offset estimation results of multiple rounds of time offset estimation attempts for the control channel are obtained. The time offset estimation results include the control format indication metric and the cell-specific reference signal-to-noise ratio. For each round, the time offset fit degree, which characterizes the quality of the time offset estimation results of the round, is determined based on the control format indication metric and the cell-specific reference signal-to-noise ratio corresponding to the round. The round is the round in which the demodulation result of the time offset estimation attempt meets the target condition. The demodulation result is determined by demodulating the physical downlink control channel. The loop time offset is determined based on the time offset fit degree corresponding to each round. Compared to traditional methods, this embodiment enhances the robustness of time offset estimation by jointly utilizing the Control Format Indicator Metric (CFIMetric) and the cell-specific reference signal-to-noise ratio (SNR). It also introduces a time offset fit metric to comprehensively evaluate the time offset estimation results, effectively overcoming the limitations of a single metric and avoiding misjudgments of time offset caused by the inability of a single metric to distinguish the actual transmission state of the PDCCH in scenarios without paging messages. This makes the time offset determination results more closely reflect the actual signal transmission situation, thereby improving the accuracy of time offset judgment. Furthermore, by introducing a round-based screening mechanism, only time offset estimation attempts that meet the target conditions in the PDCCH demodulation results are evaluated, avoiding unnecessary time offset fit calculations and reducing errors and interference introduced by invalid demodulation results. This further improves the efficiency and accuracy of time offset determination, enabling the terminal to quickly complete synchronization and paging detection through more accurate time offset estimation, reducing unnecessary signal processing or repeated wake-ups.

[0079] In an exemplary embodiment, step S103, determining the loop time offset based on the time offset fit degree corresponding to each round, may include:

[0080] Based on the time-biased fit degree corresponding to each round, the target round is determined in each round; the time-biased fit degree corresponding to the target round is greater than or equal to the time-biased fit degree corresponding to each round; if the time-biased fit degree corresponding to the target round is greater than the set threshold, the loop time bias is updated based on the time bias estimation of the target round.

[0081] Among them, the target round is the round corresponding to the largest time bias fit among all rounds; the round number corresponding to the target round is the number of the optimal time bias attempt.

[0082] For example, in each round, the round corresponding to the largest time-biased fit is selected and determined as the target round; if the time-biased fit corresponding to the target round is greater than a set threshold, the loop time bias is updated based on the time bias estimate of the target round.

[0083] In this embodiment, if the time offset fit corresponding to the target round is not greater than a set threshold, the current loop time offset is kept unchanged to avoid introducing unstable updates when the channel conditions are poor.

[0084] In an exemplary embodiment, step S101, obtaining the time offset estimation results of multiple rounds of time offset estimation attempts for the control channel, may include:

[0085] In each round of time offset estimation attempts, in response to the time-domain signal received by the demodulation module, the time-domain signal is converted into frequency-domain data; based on the frequency-domain data, channel estimation information, and noise estimation information, the log-likelihood ratio is determined; based on the cell's scrambling code, the log-likelihood ratio is descrambled to obtain the descrambled data; based on the codebook sequence and the descrambled data, the control format indication metric is determined; and the cell-specific reference signal-to-noise ratio input from the preceding module is obtained.

[0086] Among them, channel estimation information can characterize the impairment of the transmitted signal caused by the wireless channel (such as PDCCH); noise estimation information can characterize the statistical characteristics and power of noise plus interference in the received signal.

[0087] It should be noted that in LTE systems, CFI is used to indicate the number of symbols occupied by the PDCCH, and CFI is located on the first symbol. The CFI detection process is as follows: Figure 2 As shown.

[0088] For example, such as Figure 2As shown, in each round of time offset estimation attempts, in response to the time-domain signal received by the demodulation module, the time-domain signal is converted to frequency-frequency (TFC) to obtain frequency-domain data rx_data, channel estimation (CE) is performed to obtain the channel matrix H, and noise estimation (NE) is performed to obtain noise estimation information Rn. For PCFICH, the frequency-domain data, channel estimation information, and noise estimation information are processed by the MIMO (Multi-Input Multi-Output) module to obtain the log-likelihood ratio (LLR). The LLR is descrambled using a cell-specific scrambling code sequence to obtain descrambled data. The descrambled data is correlated with all possible CFI codebooks to obtain the correlation result, and the maximum value of the correlation result is taken as the CFI Metric. The CRS SNR input from the previous module is received.

[0089] In an exemplary embodiment, step S102, determining the time offset fit degree, which characterizes the quality of the time offset estimation result for a given round, based on the control format indication metric value corresponding to the round and the cell-specific reference signal-to-noise ratio, may include:

[0090] Obtain the influence of the cell-specific reference signal-to-noise ratio corresponding to the round on the control format indication metric; based on the control format indication metric and the influence, determine the time offset fit degree, which characterizes the quality of the time offset estimation result for the round.

[0091] Among them, the influence of the cell-specific reference signal-to-noise ratio corresponding to the round on the control format indication metric can characterize the contribution weight of the cell-specific reference signal-to-noise ratio corresponding to the round to the time offset fit.

[0092] For example, for each round, based on the working environment of the UE (User Equipment), the CFI Metric generated by the PCFICH demodulation module in the CTP (Control Process) is used together with the CRS SNR passed from the front-end module as an evaluation index for the quality of signal time offset estimation. Referring to Equation (1), the time offset fit degree, which characterizes the quality of the time offset estimation result of the round, is calculated based on the cell-specific reference signal-to-noise ratio corresponding to the round and the influence of the cell-specific reference signal-to-noise ratio corresponding to the round on the control format indication metric.

[0093] (1)

[0094] In the formula, The time-biased fit degree corresponding to the nth round; This is the control format indicator metric value corresponding to the nth round; The influence of the cell-specific reference signal-to-noise ratio on the control format indication metric value corresponding to the nth round; N is the total number of rounds.

[0095] In an exemplary embodiment, obtaining the influence of the cell-specific reference signal-to-noise ratio corresponding to a round on the control format indication metric may include:

[0096] Based on the signal-to-noise ratio (SNR) of the cell-specific reference signal corresponding to the round, determine the degree of influence of the cell-specific reference signal SNR on the control format indication metric.

[0097] For example, referring to equation (2), the cell-specific reference signal-to-noise ratios corresponding to each round are sorted in ascending order to obtain the sorting result. Based on the sorting result, the influence of the cell-specific reference signal-to-noise ratios corresponding to each round on the control format indication metric is determined.

[0098] (2)

[0099] In the formula, The influence of the cell-specific reference signal-to-noise ratio corresponding to the nth round on the control format indication metric; The signal-to-noise ratio of the cell-specific reference signal corresponding to the nth round; for The sorted index number in the set that includes the signal-to-noise ratio of the cell-specific reference signal corresponding to each round; The values ​​are 1, 2, ..., N; the elements in the set including the cell-specific reference signal-to-noise ratio corresponding to each round are sorted in ascending order of numerical value.

[0100] In an exemplary embodiment, before determining the time offset fit, which characterizes the quality of the time offset estimation result for a round, based on the control format indication metric value corresponding to the round and the cell-specific reference signal-to-noise ratio, the method further includes:

[0101] For each round of time offset estimation attempt, after time offset compensation is performed on the control channel for the round of time offset estimation attempt, the physical downlink control channel is demodulated to obtain the demodulation result of the round of time offset estimation attempt; if the total number of rounds in which the downlink control information included in the demodulation result passes the cyclic redundancy check is equal to 1, the time offset estimation result corresponding to the round in which the downlink control information included in the demodulation result passes the cyclic redundancy check is determined as the loop time offset.

[0102] Cyclic Redundancy Check (CRC) verifies whether data is erroneous or valid using CRC codes.

[0103] For example, for each round of time offset estimation attempt, after time offset compensation is performed on the control channel for the current round of time offset estimation attempt, the PDCCH is demodulated to obtain the DCI and CRC check code. Based on the CRC check code, cyclic redundancy check is performed on the DCI (i.e., downlink control information). If the DCI passes the cyclic redundancy check, it is determined that the demodulation result of the current round passes the cyclic redundancy check. The total number of rounds in which the demodulation result passes the cyclic redundancy check is counted. If the total number is equal to 1 (i.e., only one round of demodulation result passes the cyclic redundancy check), the time offset estimation result of that round can be used as the loop time offset.

[0104] In this embodiment, the UE receiver, in IDLE state, can listen to the PDCCH at a specific PO based on the DRX mechanism, and obtain the paging message (i.e., the paging message sent by the base station) on the corresponding PDSCH based on the listening result. All processing procedures of IDLE DRX PO are performed in DL Offline mode (i.e., the data transmission link from the base station to the UE is in RRC disconnected mode).

[0105] Currently, in LTE systems, control channels include three types: PCFICH, PHICH (Physical Hybrid ARQIndicator Channel), and PDCCH. Among them, PCFICH is fixed in the first OFDM symbol of each subframe in the time domain and is transmitted in every subframe. Therefore, PCFICH becomes the channel that the UE prioritizes for demodulation. The core function of this channel is to indicate the number of OFDM symbols in the control area, thereby indirectly determining the starting position of the data area in the subframe. At the same time, PCFICH has a low demodulation threshold, and can maintain a high demodulation accuracy even in low signal-to-noise ratio scenarios. This makes the intermediate quantity generated during demodulation—the CFI Metric value—an effective indicator of signal quality in low signal-to-noise ratio scenarios. The definition of CFI Metric is given in Equation (3).

[0106] (3)

[0107] Where M is the CFI Metric value; CW is the CFI codebook bit information (32 bits); X is the descrambled PCFICH soft bit data; and j is the selected CFI codebook sequence number (values ​​1, 2, 3). The codebook sequence is a fixed value, and its values ​​are specified in 3GPP standard 36.212 in Table 1.

[0108] Table 1 CFI Codebook

[0109]

[0110] When demodulating the PCFICH channel, the conventional procedure is to use multiple CFI codebooks to calculate the corresponding CFI Metric (i.e., the correlation value between the demodulated data and the codebook), and finally select the CFI sequence number corresponding to the CFI Metric with the largest value as the demodulation result.

[0111] In IDRX sleep mode, since the UE needs to receive Paging messages transmitted via PDCCH during the PO phase, it will still demodulate PCFICH and PDCCH. This means that the CFI Metric value can still be generated and used normally in IDRX mode. It should be noted that different time offset estimation levels in IDRX mode will correspond to different data time offset compensation effects, resulting in differences in signal quality. The scenario with the smallest time offset corresponds to the best signal quality. At this time, if only the correctness of PDCCH demodulation is used as the criterion for judging the quality of time offset compensation, there are obviously limitations: in some scenarios, the PDCCH may be demodulated correctly in multiple time offset attempts, making it impossible to accurately select the optimal time offset compensation value.

[0112] Previously, two related solutions existed for this problem, but both had significant shortcomings. One solution utilizes the intermediate values ​​from the Viterbi decoding of the PDCCH to calculate the LLR quality metric for each candidate set at aggregation levels 4 and 8 in the common search space (where Paging messages are only sent). The maximum value is recorded in the MIMetric array, which is then used as the basis for signal quality judgment. The scenario with the largest MIMetric among multiple attempts at time-bias estimation is selected as the scenario with the smallest time-bias estimation error. However, the core flaw of this solution lies in the design flaw of the cost function constructed based on Viterbi decoding: the value of the MIMetric does not differ significantly in scenarios with or without PDCCH transmission, while the proportion of scenarios without PDCCH transmission is higher in IDRX state. This makes it unable to accurately distinguish whether Paging messages actually exist in PO scenarios, thus failing to meet the prerequisite of using it as a multitry bin selection metric for time-bias estimation in IDRX, and therefore it is unapplicable. The other solution only uses the CFI Metric in the PCFICH as the cost function for judgment, but practical evaluation shows that this solution lacks robustness and is difficult to cope with the needs of complex scenarios.

[0113] In this regard, in one exemplary embodiment, such as Figure 3 As shown, a method for determining loop time offset is also provided, which may include the following steps:

[0114] Step S301: Perform a time bias estimation attempt for the current round.

[0115] In this example, when the terminal is in LTE IDRX (Idle Discontinuous Reception) mode and a low signal-to-noise ratio scenario, or when the terminal is in LTE non-IDRX mode, the terminal enables the PCFICH multitry function in the PO phase, that is, to perform multiple rounds of time offset estimation attempts for PCFICH.

[0116] In one specific implementation of this example, after time offset compensation is performed for the time offset estimation attempt in the current round (the sequence number of the current round is n), the PDCCH can be demodulated to obtain downlink control information and CRC checksum. Based on the CRC checksum, cyclic redundancy check (CRC) is performed on the downlink control information to determine whether the downlink control information passes the CRC check. If the downlink control information passes the CRC check, it can be determined that the demodulation result of the current round passes the CRC check. The total number of rounds in which the demodulation result passes the CRC check is counted. If the total number is equal to 1 (that is, only one round of demodulation result passes the CRC check), the time offset estimation result of that round can be taken as the loop time offset, and no further steps need to be executed. If the total number is not equal to 1, step S302 can be executed.

[0117] Step S302: Record the control format indication metric and cell-specific reference signal-to-noise ratio for the current round.

[0118] In this example, if the downlink control information passes the cyclic redundancy check, the current round is determined to be a round, and the control format indication metric and cell-specific reference signal-to-noise ratio of that round are recorded, and step S303 is continued.

[0119] Step S303: Determine whether the current round number is less than or equal to the set number of rounds. If yes, proceed to step S304; otherwise, proceed to step S305.

[0120] In this example, the current round number is n, and the number of rounds is set to N. When n > N, it indicates that the time offset estimation attempt has been completed, that is, the control format indication metric and cell-specific reference signal-to-noise ratio of each round have been recorded.

[0121] Step S304: Increment the round number by 1 to obtain a new round number, and return to step S301.

[0122] In this example, the current round number is n. The round number n is increased by 1 to obtain a new round number n, and then the process returns to step S301 to attempt time bias estimation for the next round.

[0123] Step S305: Calculate the joint value of the control format indication metric and the cell-specific reference signal-to-noise ratio.

[0124] It should be noted that this example primarily focuses on UE behavior during the IDRX phase of DRX mode in a 4G network. During this phase, a UE in RRC_IDLE state will attempt to detect and receive paging messages that the base station may send at the corresponding paging time. To maintain power saving, the UE receiver can choose to process paging reception in DL Offline (Downlink Offline) mode in IDLE state. However, when using offline processing, there may be significant time and frequency deviations in IDLE state, therefore time-frequency offset estimation is required to improve paging reception performance. Time offset estimation supports multiple attempts within the possible time deviation range caused by sleep or other factors; the time offset search range typically does not exceed 150Ts. By setting a small time offset step, the estimation uncertainty can be reduced.

[0125] In this example, the influence of the CRS SNR on the CFI Metric is determined based on the magnitude of the CRS SNR corresponding to the current round. Then, the time-biased fit degree corresponding to the current round is determined based on the CFI Metric and the influence of the CRS SNR on the CFI Metric. This time-biased fit degree can characterize the quality of the time-biased estimation result of the current round. Based on the time-biased fit degree corresponding to each round, the target round is determined among each round. The time-biased fit degree corresponding to the target round is greater than or equal to the time-biased fit degree corresponding to each round. The time-biased fit degree corresponding to the target round is the joint value of the CFI Metric and the CRS SNR.

[0126] Step S306: Determine whether the combined value is greater than the set threshold. If yes, proceed to step S307; otherwise, end.

[0127] In this example, it is determined whether the combined value of the control format indicator metric and the cell-specific reference signal-to-noise ratio is greater than a set threshold; otherwise, the process ends, that is, the current loop time offset remains unchanged.

[0128] Step S307: Update loop time offset.

[0129] In this example, if the combined value of the control format indicator metric and the cell-specific reference signal-to-noise ratio is greater than a set threshold, the loop time offset is updated based on the time offset estimation of the target round.

[0130] In this example, by performing multiple rounds of time offset estimation attempts and combining the control format indicator metric with the cell-specific reference signal-to-noise ratio (SNR) calculation, the time offset estimation results can be effectively optimized, significantly improving the estimation accuracy in low SNR scenarios and reducing time offset errors. Furthermore, by utilizing parameters from the PCFICH demodulation process as robustness indicators, the adaptability and reliability under different channel conditions and UE environments are enhanced, ensuring the ability to distinguish and select the optimal time offset estimation attempt. In addition, this example supports offline processing in LTE IDRX mode, helping to maintain the UE's power-saving characteristics. Simultaneously, accurate time offset updates improve paging message reception performance. Moreover, the method provided in this example has wide applicability, not only applicable to paging reception in IDRX mode but also extend to scenarios with multiple time offset adjustments in non-IDRX modes, improving the overall system's flexibility and robustness. It possesses strong versatility and scalability, providing a reliable optimal result selection scheme for various time offset estimation multiple-attempt scenarios, contributing to improved overall communication system stability and reliability.

[0131] Based on the method provided in this application, this study verifies the selection probability of the joint value of the control format indication metric and the cell-specific reference signal-to-noise ratio when Rx (receiver) is selected under different SNR conditions in an AWGN (Additive White Gaussian Noise) channel and a scenario with no timing deviation at the transmitter (Tx), under different time offset estimation attempts (e.g., -60Ts, 0Ts, 60Ts). The verification results are as follows: Figure 4 As shown. Based on the verification results, it can be found that when the SNR (signal-to-noise ratio) is greater than the demodulation threshold (1dB in this scenario), the probability of 0Ts (theoretically optimal time offset) being selected rises rapidly and exceeds 80%, and as the SNR further increases, this probability remains at a high level. This indicates that the method provided in this application has good discrimination effect in AWGN channels and Tx without time offset scenarios.

[0132] It should be understood that although the steps in the flowcharts of the embodiments described above are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the embodiments described above may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least some of the steps or stages in other steps. It is understood that the steps in different embodiments can be freely combined as needed, and all non-contradictory solutions formed by such combinations are within the scope of protection of this application.

[0133] Based on the same inventive concept, this application also provides a loop time offset determination device for implementing the loop time offset determination method described above. This device can be applied to or integrated into a chip or chip module, for example. The solution provided by this device is similar to the implementation scheme described in the above method; therefore, the specific limitations of one or more loop time offset determination device embodiments provided below can be found in the limitations of the loop time offset determination method above, and will not be repeated here.

[0134] In one exemplary embodiment, such as Figure 5 As shown, a loop time offset determination device is provided, comprising:

[0135] The acquisition module 501 is used to acquire the time offset estimation results of multiple rounds of time offset estimation attempts for the control channel; the time offset estimation results include the control format indication metric and the cell-specific reference signal-to-noise ratio.

[0136] The first determining module 502 is used to determine the time offset fit degree, which characterizes the quality of the time offset estimation result for each round, based on the control format indication metric value corresponding to the round and the signal-to-noise ratio of the cell-specific reference signal.

[0137] The second determining module 503 is used to determine the loop time offset based on the time offset adaptation degree corresponding to each round.

[0138] In an exemplary embodiment, the second determining module 503 is further configured to determine a target round in each round based on the time-biased adaptation degree corresponding to each round; the time-biased adaptation degree corresponding to the target round is greater than or equal to the time-biased adaptation degree corresponding to each round; and when the time-biased adaptation degree corresponding to the target round is greater than a set threshold, the loop time bias is updated based on the time bias estimation of the target round.

[0139] In an exemplary embodiment, the acquisition module 501 is further configured to, in each round of time offset estimation attempt, convert the time-domain signal into frequency-domain data in response to the time-domain signal received by the demodulation module; determine the log-likelihood ratio based on the frequency-domain data, channel estimation information, and noise estimation information; descramble the log-likelihood ratio based on the cell's scrambling code to obtain the descrambled data; determine the control format indication metric based on the codebook sequence and the descrambled data; and acquire the cell-specific reference signal-to-noise ratio passed from the preceding module.

[0140] In an exemplary embodiment, the first determining module 502 is further configured to obtain the influence of the cell-specific reference signal-to-noise ratio corresponding to the round on the control format indication metric; and determine the time offset fit degree, which characterizes the quality of the time offset estimation result of the round, based on the control format indication metric and the influence degree.

[0141] In an exemplary embodiment, the first determining module 502 is further configured to determine the degree of influence of the cell-specific reference signal-to-noise ratio corresponding to the round on the control format indication metric value based on the magnitude of the cell-specific reference signal-to-noise ratio corresponding to the round.

[0142] In an exemplary embodiment, the first determining module 502 is further configured to, before determining the time offset fit degree, which characterizes the quality of the time offset estimation result of the round, based on the control format indication metric value corresponding to the round and the cell-specific reference signal-to-noise ratio, demodulate the physical downlink control channel for each round's time offset estimation attempt after performing time offset compensation on the control channel for the round's time offset estimation attempt, to obtain the demodulation result of the round's time offset estimation attempt; if the total number of rounds in which the downlink control information included in the demodulation result passes the cyclic redundancy check is equal to 1, determine the time offset estimation result corresponding to the round in which the downlink control information included in the demodulation result passes the cyclic redundancy check as the loop time offset.

[0143] Regarding the modules / units included in the various devices and products described in the above embodiments, they can be software modules / units, hardware modules / units, or a combination of both. For example, for various devices and products applied to or integrated into a chip, all of their modules / units can be implemented using hardware methods such as circuits, or at least some modules / units can be implemented using software programs that run on a processor integrated within the chip, while the remaining (if any) modules / units can be implemented using hardware methods such as circuits; for various devices and products applied to or integrated into a chip module, all of their modules / units can be implemented using hardware methods such as circuits, and different modules / units can be located in the same component (e.g., chip, circuit module, etc.) or different components of the chip module, or at least some modules / units can be implemented using hardware methods such as circuits. The components can be implemented using software programs that run on the processor integrated within the chip module. The remaining (if any) modules / units can be implemented using hardware methods such as circuits. For various devices and products applied to or integrated into the terminal, each of its components / units can be implemented using hardware methods such as circuits. Different modules / units can be located in the same component (e.g., chip, circuit module, etc.) or in different components within the terminal. Alternatively, at least some modules / units can be implemented using software programs that run on the processor integrated within the terminal, while the remaining (if any) modules / units can be implemented using hardware methods such as circuits.

[0144] In one exemplary embodiment, a computer device is provided, which may be a terminal, and its internal structure diagram may be as follows: Figure 6 As shown, the computer device includes a processor, memory, input / output interfaces, and a communication interface. The processor, memory, and input / output interfaces are connected via a system bus, and the communication interface is also connected to the system bus via the input / output interfaces. The processor provides computational and control capabilities. The memory includes non-volatile storage media and internal memory. The non-volatile storage media stores the operating system and computer programs. The internal memory provides an environment for the operation of the operating system and computer programs stored in the non-volatile storage media. The input / output interfaces are used for exchanging information between the processor and external devices. The communication interface is used for wired or wireless communication with external terminals; wireless communication can be achieved through Wi-Fi, mobile cellular networks, Near Field Communication (NFC), or other technologies. When executed by the processor, the computer program implements a loop time offset determination method.

[0145] Those skilled in the art will understand that Figure 6 The structure shown is merely a block diagram of a portion of the structure related to the present application and does not constitute a limitation on the computer device to which the present application is applied. Specific computer devices may include more or fewer components than those shown in the figure, or combine certain components, or have different component arrangements.

[0146] Based on the same inventive concept, this application also provides a terminal, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps in the above-described method embodiments.

[0147] Based on the same inventive concept, this application also provides a chip, including a processor and a communication interface; the communication interface is used to receive or send data; the processor is coupled to a memory; the processor is used to read computer programs or instructions stored in the memory through the communication interface, and execute the computer programs or instructions stored in the memory; when the processor executes the computer programs or instructions, it implements the steps in the above method embodiments.

[0148] It is understood that the chip involved in the embodiments of this application may be a field-programmable gate array (FPGA), may be an application-specific integrated circuit (ASIC), may be a system on chip (SoC), may be a central processor unit (CPU), may be a network processor (NP), may be a digital signal processor (DSP), may be a microcontroller unit (MCU), may be a programmable logic device (PLD), or other integrated chips, etc.

[0149] Based on the same inventive concept, this application also provides a chip module, which includes a communication module, a power module, a storage module, and a chip. Wherein:

[0150] The power module is used to provide power to the chip module; the storage module is used to store data and instructions; the communication module is used for internal communication within the chip module, or for communication between the chip module and external devices; this chip corresponds to the chip in the above chip embodiment.

[0151] The implementation method of this chip module can be found in the relevant content of the above chip embodiment, and will not be repeated here.

[0152] Based on the same inventive concept, this application also provides a computer device, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps in the above-described method embodiments.

[0153] Based on the same inventive concept, embodiments of this application also provide a computer-readable storage medium storing a computer program thereon, which, when executed by a processor, implements the steps in the above-described method embodiments.

[0154] Based on the same inventive concept, this application also provides a computer program product, including a computer program that, when executed by a processor, implements the steps in the above-described method embodiments.

[0155] Those skilled in the art will understand that all or part of the processes in the methods of the above embodiments can be implemented by a computer program instructing related hardware. The computer program can be stored in a non-volatile computer-readable storage medium, and when executed, it can include the processes of the embodiments of the above methods. Any references to memory, databases, or other media used in the embodiments provided in this application can include at least one of non-volatile memory and volatile memory. Non-volatile memory can include read-only memory (ROM), magnetic tape, floppy disk, flash memory, optical memory, high-density embedded non-volatile memory, resistive random access memory (ReRAM), magnetic random access memory (MRAM), ferroelectric random access memory (FRAM), phase change memory (PCM), graphene memory, etc. Volatile memory can include random access memory (RAM) or external cache memory, etc. By way of illustration and not limitation, RAM can take many forms, such as Static Random Access Memory (SRAM) or Dynamic Random Access Memory (DRAM). The databases involved in the embodiments provided in this application may include at least one type of relational database and non-relational database. Non-relational databases may include, but are not limited to, blockchain-based distributed databases. The processors involved in the embodiments provided in this application may be general-purpose processors, central processing units, graphics processing units, digital signal processors, programmable logic devices, quantum computing-based data processing logic devices, artificial intelligence (AI) processors, etc., and are not limited to these.

[0156] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this application.

[0157] The embodiments described above are merely illustrative of several implementation methods of this application, and while the descriptions are specific and detailed, they should not be construed as limiting the scope of this patent application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. A method for determining loop time offset, characterized in that, The method includes: Obtain the time offset estimation results of multiple rounds of time offset estimation attempts for the control channel; the time offset estimation results include control format indication metric and cell-specific reference signal-to-noise ratio; For each round of time offset estimation attempts, a time offset fit degree, which characterizes the quality of the time offset estimation result for that round, is determined based on the control format indication metric value corresponding to that round and the signal-to-noise ratio of the cell-specific reference signal. The loop time offset is determined based on the time offset fit degree corresponding to each round.

2. The method according to claim 1, characterized in that, The step of determining the loop time offset based on the time offset fit degree corresponding to each round includes: Based on the time-biased fit degree corresponding to each round, a target round is determined in each round; the time-biased fit degree corresponding to the target round is greater than or equal to the time-biased fit degree corresponding to each round. If the time offset fit corresponding to the target round is greater than a set threshold, the loop time offset is updated based on the time offset estimate of the target round.

3. The method according to claim 1, characterized in that, The process of obtaining the time offset estimation results of multiple rounds of time offset estimation attempts for the control channel includes: In each round of time offset estimation attempts, in response to the time domain signal received by the demodulation module, the time domain signal is converted into frequency domain data; The log-likelihood ratio is determined based on the frequency domain data, channel estimation information, and noise estimation information. Based on the scrambling code of the cell, the log-likelihood ratio is descrambled to obtain the descrambled data; Based on the codebook sequence and the descrambled data, determine the control format indication metric value; Obtain the signal-to-noise ratio of the cell-specific reference signal passed in from the front-end module.

4. The method according to claim 1, characterized in that, The step of determining the time offset fit, which characterizes the quality of the time offset estimation result for the round, based on the control format indication metric value corresponding to the round and the signal-to-noise ratio of the cell-specific reference signal, includes: Obtain the influence of the cell-specific reference signal-to-noise ratio corresponding to the round on the control format indication metric value; Based on the control format indicator metric and the influence degree, a time-bias fit degree, which characterizes the quality of the time-bias estimation result for the round, is determined.

5. The method according to claim 4, characterized in that, The step of obtaining the influence of the cell-specific reference signal-to-noise ratio corresponding to the round on the control format indication metric includes: Based on the signal-to-noise ratio (SNR) of the cell-specific reference signal corresponding to the round, determine the degree of influence of the cell-specific reference signal SNR of the round on the control format indication metric.

6. The method according to any one of claims 1 to 5, characterized in that, Before determining the time offset fit, which characterizes the quality of the time offset estimation result for the round, based on the control format indication metric value corresponding to the round and the cell-specific reference signal-to-noise ratio, the method further includes: For each round of time offset estimation attempt, after time offset compensation is performed on the control channel for the round of time offset estimation attempt, the physical downlink control channel is demodulated to obtain the demodulation result of the round of time offset estimation attempt; If the total number of rounds in which the downlink control information included in the demodulation result passes the cyclic redundancy check is equal to 1, the time offset estimation result corresponding to the round in which the downlink control information included in the demodulation result passes the cyclic redundancy check is determined as the loop time offset.

7. A loop time offset determination device, characterized in that, The device includes: The acquisition module is used to acquire the time offset estimation results of multiple rounds of time offset estimation attempts for the control channel; the time offset estimation results include control format indication metric and cell-specific reference signal-to-noise ratio; The first determining module is used to determine the time offset fit degree, which characterizes the quality of the time offset estimation result for each round of time offset estimation attempts, based on the control format indication metric value corresponding to the round and the signal-to-noise ratio of the cell-specific reference signal. The second determining module is used to determine the loop time offset based on the time offset adaptation degree corresponding to each round.

8. A terminal comprising a memory and a processor, the memory storing a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 1 to 6.

9. A chip, characterized in that, The device includes a processor and a communication interface, wherein the processor is configured to cause the chip to perform the steps of the method described in any one of claims 1 to 6.

10. A chip module, characterized in that, This includes communication modules, power modules, storage modules, and chips, among which: The power module is used to provide power to the chip module; The storage module is used to store data and instructions; The communication module is used for internal communication within the chip module, or for communication between the chip module and external devices. The chip is used to perform the steps of the method according to any one of claims 1 to 6.

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