A two-bus bidirectional time width modulation communication method and system for substation sensor network

Abstract

The application discloses a two-bus bidirectional time width modulation communication method and system, and relates to the technical field of industrial measurement and control and communication; the method comprises the following steps: grouping and mapping to-be-sent data according to a preset bit number into corresponding pulse duration; a master station unit sends data to a slave station unit by controlling the duration of bus voltage jump; the slave station unit uploads data to the master station unit by controlling the duration of load current jump; a receiving end decodes data by measuring pulse width; and the two buses realize direct current power supply and bidirectional communication simultaneously. The application encodes data in the dimension of pulse duration, effectively isolates amplitude interference, and significantly improves the anti-interference ability and communication reliability of the system in a complex electromagnetic environment.

Description

Technical Field

[0001] This invention relates to the field of industrial measurement and control and communication technology, and in particular to a two-bus bidirectional time-width modulation communication method and system for substation sensor networks. Background Technology

[0002] With the rapid development of smart grids and substation automation systems, the deployment scale of various environmental monitoring sensors (such as temperature and humidity, smoke, water immersion, and gas concentration) in substations is expanding, placing higher demands on the reliability, ease of construction, and operation and maintenance efficiency of sensor networks. Traditional sensors mostly use a four-wire connection method, that is, two independent power lines and two independent signal lines, which has problems such as complex wiring, high construction costs, easy to connect incorrect polarity, and difficult maintenance, especially in renovation projects or wiring in confined spaces.

[0003] While existing two-bus technologies (such as MBUS and POWERBUS) can integrate power supply and communication, they often have limitations in terms of communication speed, anti-interference capability, power supply stability, and bidirectional communication efficiency. Specifically, traditional two-bus technologies mostly use current or voltage amplitude modulation, which is susceptible to common-mode interference, signal attenuation, and load fluctuations in complex electromagnetic environments such as substations, leading to increased communication error rates. Furthermore, existing solutions are often complex to implement in bidirectional communication or have limited communication speeds. Therefore, providing a two-bus communication solution that simplifies wiring structure and significantly improves communication reliability and anti-interference capability is a pressing technical problem that needs to be solved. Summary of the Invention

[0004] The purpose of this invention is to provide a two-bus bidirectional time-width modulation communication method and system for substation sensor networks, thereby solving the aforementioned problems existing in the prior art.

[0005] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0006] A two-bus bidirectional time-width modulation communication method includes the following steps:

[0007] S1. Divide the data stream to be sent into groups according to a preset number of bits to form multiple data code groups;

[0008] S2. According to the preset mapping rules, the value of each data code group is mapped to the corresponding pulse duration, where the pulse duration is an integer multiple of the reference time width; S3. When sending data to the slave unit via the two-wire bus, the control bus voltage transitions between a high power supply level and a low power supply level, and the duration of the transition corresponds to the pulse duration of the data code group, thereby modulating the data onto the time width; S4. When the slave unit receives data, it detects the voltage transition signal on the bus, measures the pulse width of the transition signal, and decodes it into the corresponding data code group according to the preset mapping rules, restoring the original data stream; S5. The slave unit sends data to the slave unit via the two-wire bus. When the master station unit uploads data, it generates a current jump of preset amplitude by controlling the load current and controls the duration of the current jump to correspond to the pulse duration of the data code group. The master station unit detects the current jump signal on the bus, measures the pulse width of the current jump, and decodes it into the corresponding data code group. The two buses achieve DC power supply and bidirectional data communication simultaneously through only two wires. When communication is static, the bus voltage is maintained at the power supply high level, corresponding to the data state of "1". Communication starts with a "0" state jump of a reference time width as the start mark and ends with multiple consecutive "0" state jumps as the end mark.

[0009] Furthermore, the preset bit count is 3 bits, the data code group is a 3-bit code group, and the decimal value m ranges from 0 to 7; the reference time width is T. base The pulse duration T corresponding to data code group m m Satisfy: T m =T base ×(m+1)

[0010] This allows the 3-bit data code group to be mapped to 8 different pulse durations, thus achieving multi-level time-width encoding.

[0011] Furthermore, according to the preset mapping rules, the value of each data code group is mapped to the corresponding pulse duration. Specifically, nonlinear mapping coding is adopted: the pulse duration corresponding to the data code group is mapped according to the non-uniform distribution rule, so that the time interval between different code groups is not exactly the same. The time interval between some code groups is greater than the reference time width, thereby providing a larger recognition margin between easily confused code groups, reducing the equivalent noise bandwidth, and improving the anti-interference capability.

[0012] Furthermore, during static communication, the bus voltage is maintained at +12V, corresponding to a data state of "1". The start flag is a "0" state transition of one reference time width, corresponding to the bus voltage transitioning from +12V to +15V and maintaining the reference time width. The end flag is N consecutive "0" state transitions, where N≥2, used to distinguish between the communication start flag and the code group separator.

[0013] Furthermore, when the master unit sends data to the slave unit, the bus voltage jumps between +12V and +15V, and the average voltage remains within the range that can power the slave unit and the sensor; when the slave unit uploads data to the master unit, it generates a current jump of about 20mA by controlling the load switching, and the duration of the current jump corresponds to the pulse duration of the data code group.

[0014] The main station unit detects current jump signals by: acquiring bus current signals through Hall current sensors, shaping them into level signals through comparators, and setting the threshold of the comparators to only respond to steep jumps exceeding the preset current change amplitude, thereby filtering out load variation interference and noise below the threshold; the microprocessor measures the duration of the shaped level signal through the input capture function of a timer.

[0015] Furthermore, it also includes half-duplex communication control steps: after the master station unit finishes sending, it sets the transmitting circuit to a high-impedance state and starts the receiving circuit; after the slave station unit detects the communication start flag and the address matches, it obtains the sending permission and controls the current jump to upload data, thereby avoiding bus conflicts.

[0016] Furthermore, a two-bus bidirectional time-width modulation communication system includes a master station unit, a slave station unit, and a two-bus connecting the two; the two-bus is used to transmit DC power and modulation data; the master station unit includes a master station microprocessor, a voltage modulation circuit, a current detection circuit, and a first interface circuit;

[0017] The master microprocessor is used to execute the transmitting step of the above method, controlling the voltage modulation circuit to generate a voltage transition signal; it is also used to execute the receiving step of the above method, detecting and decoding the current transition signal on the bus through the current detection circuit; the slave unit includes a slave microprocessor, a voltage detection circuit, a current modulation circuit, a rectifier power supply circuit, and a second interface circuit; the slave microprocessor is used to detect and decode the voltage transition signal on the bus through the voltage detection circuit, execute the receiving step of the above method; it is also used to execute the transmitting step of the above method, controlling the current modulation circuit to generate a current transition signal; the rectifier power supply circuit is used to obtain power from the two buses and supply power to the slave unit.

[0018] Furthermore, the voltage modulation circuit of the master station unit includes a first switching transistor and a second switching transistor. The master station microprocessor drives the first switching transistor and the second switching transistor to switch on and off through opto-isolation, controlling the bus voltage to jump between +12V and +15V. The current detection circuit includes a Hall current sensor and a comparator. The Hall current sensor is used to collect the bus current signal, and the comparator shapes the current signal into a level signal and outputs it to the master station microprocessor for time measurement.

[0019] The current modulation circuit of the slave unit includes a third switching transistor and a load resistor. The slave microprocessor controls the third switching transistor to turn on or off to generate a current jump of about 20mA. The voltage detection circuit includes a comparator, which is used to shape the voltage jump signal on the bus into a square wave signal and output it to the slave microprocessor. The first interface circuit and the second interface circuit are both RS485 interfaces, which are used to connect to external devices and perform transparent data transmission.

[0020] Furthermore, an electronic device includes: a memory for storing computer programs;

[0021] The processor is used to execute computer programs to implement the above-described two-bus bidirectional time-width modulation communication method.

[0022] Furthermore, a computer-readable storage medium is provided for storing a computer program; wherein, when the computer program is executed by a processor, it implements the aforementioned two-bus bidirectional time-width modulation communication method.

[0023] The beneficial effects of this invention are:

[0024] Simplified cabling structure: Power and communication share two lines, which greatly simplifies the cabling structure, reduces construction costs and complexity, and is particularly suitable for substation renovation projects and deployment in confined spaces.

[0025] Significantly enhanced anti-interference capability: Employing time-width modulation technology, data information is encoded along the pulse duration dimension, providing inherent resistance to common-mode interference, signal attenuation, and load abrupt changes. Furthermore, communication reliability in complex electromagnetic environments is enhanced through nonlinear mapping optimization and comparator threshold setting.

[0026] High and stable communication speed: Based on a high-precision timer of a microprocessor, precise time control is achieved, supporting high data transmission rates. 3-bit packets achieve a good balance between communication speed, anti-interference capability, and implementation complexity.

[0027] High efficiency is achieved through bidirectional communication: the master station uses voltage-hopping transmission, while the slave station uses current-hopping transmission, resulting in clear logic and avoiding bus conflicts. The half-duplex mechanism is implemented through hardware state switching, ensuring high reliability.

[0028] High compatibility: As a transparent physical layer transmission channel, the system is transparent to upper layer application protocols, making it easy to integrate with existing systems.

[0029] Stable and reliable power supply: The bus voltage fluctuates between +12V and +15V, and the average voltage can still stably power the slave units and sensors. The correct power supply polarity is ensured through the rectifier bridge. Attached Figure Description

[0030] Figure 1This is a schematic diagram of the code group duration and waveform of a short data frame in one embodiment of the present invention;

[0031] Figure 2 This is a schematic diagram of the DC power supply and data bus system composition in one embodiment of the present invention;

[0032] Figure 3 This is a schematic diagram of the main station unit in one embodiment of the present invention;

[0033] Figure 4 This is a schematic diagram of a slave station unit in one embodiment of the present invention;

[0034] Figure 5 This is a schematic diagram of the data sending and receiving process in one embodiment of the present invention;

[0035] Figure 6 This is a flowchart of a two-bus bidirectional time-width modulation communication method in one embodiment of the present invention. Detailed Implementation

[0036] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0037] Reference Figure 6 The present invention discloses a two-bus bidirectional time-width modulation communication method, comprising the following steps:

[0038] S1. Divide the data stream to be sent into groups according to a preset number of bits to form multiple data code groups;

[0039] The specific operation of step S1 is as follows: the data sending end divides the received data stream to be transmitted into several data code groups according to the preset number of bits.

[0040] In this embodiment, the microprocessor of the master or slave unit (e.g., an embedded chip of model STM32F427 or STM32F247) receives a continuous binary data stream from an external RS485 interface through its built-in UART serial communication module. The microprocessor internally runs data grouping logic, with a preset bit count of 3 bits. After the data stream enters the buffer, the microprocessor divides the data stream into groups of three binary bits. For example, the continuous binary sequence "101100111" is divided into three data code groups: "101", "100", and "111". The decimal values ​​of these code groups are limited to between 0 and 7, resulting in eight possible code group combinations, providing the basic data units for subsequent time-width mapping.

[0041] S2. According to the preset mapping rules, the value of each data code group is mapped to the corresponding pulse duration, and the pulse duration is an integer multiple of the reference time width.

[0042] The specific operation of step S2 is as follows: according to the preset mapping rules, the value of each data code group is mapped to the corresponding pulse duration, which is an integer multiple of the reference time width.

[0043] In this embodiment, a mapping rule table is pre-stored in the microprocessor's internal memory. For linear mapping rules, the microprocessor configures the base time width Tbase as a fixed time constant, such as 6.25 microseconds. When a data code group needs to be transmitted, the microprocessor reads the decimal value m of the code group and calculates its corresponding pulse duration Tm according to the linear formula Tm=Tbase×(m+1).

[0044] For example, if the code group to be sent is "011" and its m value is 3, then the calculated pulse duration is 6.25×(3+1)=25 microseconds.

[0045] For nonlinear mapping rules, the microprocessor directly calls the pre-stored nonlinear mapping lookup table and reads the corresponding non-uniformly distributed pulse duration value according to the code group value, so as to provide a greater recognition tolerance between easily confused code groups and thus enhance the anti-interference capability.

[0046] S3. When sending data to the slave unit via the two-wire bus, the control bus voltage switches between the power supply high level and the power supply low level, and the duration of the switch corresponds to the pulse duration of the data code group, thereby modulating the data onto the time width.

[0047] The specific operation of step S3 is as follows: when sending data to the slave unit through the two-bus, the bus voltage is controlled to switch between the power supply high level and the power supply low level, and the duration of the switch is controlled to correspond to the pulse duration of the data code group, thereby modulating the data onto the time width.

[0048] In this embodiment, the master station unit acts as the transmitter, and its voltage modulation circuit specifically includes a driver and a power switch (e.g., a MOSFET). In the communication idle state, the master station maintains the bus voltage at a high supply level, such as +12V, corresponding to the data state "1", and supplies power to the slave station units. When data transmission begins, the master station microprocessor first controls the bus voltage to transition to a low supply level, such as +15V, and maintains it for a reference time width Tbase, serving as the start marker for communication. Subsequently, for each data code group to be transmitted, the microprocessor, based on the pulse duration Tm calculated in step S2, controls the switch to remain on, maintaining the bus voltage at +15V for Tm duration, and then controls the switch to turn off, causing the voltage to drop back to +12V, forming a voltage pulse. This process is repeated for each subsequent code group transmission, with the voltage transition duration directly carrying the data information. At the end of communication, the master station continuously sends multiple (e.g., 3) transition pulses of the reference time width as a termination marker. Because the "0" state (+15V) lasts for a very short time, the average bus voltage remains above 12V, ensuring the continuity of power supply to the slave units.

[0049] S4. When receiving data from the slave unit, detect the voltage transition signal on the bus, measure the pulse width of the transition signal, and decode it into the corresponding data code group according to the preset mapping rule to restore the original data stream;

[0050] The specific operation of step S4 is as follows: when receiving data from the station unit, the voltage transition signal on the bus is detected, the pulse width of the transition signal is measured, and the signal is decoded into the corresponding data code group according to the preset mapping rule to restore the original data stream.

[0051] In this embodiment, the voltage detection circuit of the slave unit continuously monitors the bus voltage. This circuit includes a voltage comparator whose inverting input is connected to a threshold voltage (e.g., 13.5V) located between the high and low power supply levels. When the voltage transition signal sent by the master station arrives, the bus voltage rises from +12V to +15V, the comparator output level flips, triggering an interrupt in the slave microprocessor. The slave microprocessor uses the input capture function of its internal high-precision timer to record the timer count value on the rising and falling edges of the level transition. The difference between the two counts, converted to clock cycles, is the pulse width T. The microprocessor performs decoding calculations according to a stored mapping rule (linear or nonlinear) consistent with the master station: for linear rules, the operation m = (T / Tbase) − 1 is performed to obtain the code value m; for nonlinear rules, the measured value T is matched most recently with the standard value in a preset table. The decoded data code is reassembled sequentially to recover the original data stream and output to the connected sensor device via the local RS485 interface.

[0052] S5. When the slave unit uploads data to the master unit, it generates a current jump of a preset amplitude by controlling the load current, and controls the duration of the current jump to correspond to the pulse duration of the data code group; the master unit detects the current jump signal on the bus, measures the pulse width of the current jump and decodes it into the corresponding data code group.

[0053] The two-wire bus achieves DC power supply and bidirectional data communication simultaneously through only two wires. When communication is static, the bus voltage is maintained at the power supply high level, corresponding to the data state as "1". Communication starts with a "0" state transition of a reference time width as the start flag, and communication ends with a series of "0" state transitions as the end flag.

[0054] The specific operation of step S5 is as follows: when the slave unit uploads data to the master unit, it generates a current jump of a preset amplitude by controlling the load current, and controls the duration of the current jump to correspond to the pulse duration of the data code group; the master unit detects the current jump signal on the bus, measures the pulse width of the current jump and decodes it into the corresponding data code group.

[0055] In this embodiment, the slave unit acts as the transmitter, and its current modulation circuit includes a switching transistor and a current-limiting resistor connected in series. When the slave unit gains transmission permission, its microprocessor controls the switching transistor to turn on based on the pulse duration Tm of the data code group to be uploaded. At this time, a current increment of approximately 20mA is superimposed in the bus loop, forming a current jump. The microprocessor precisely controls the duration of this current pulse to Tm. The master unit acts as the receiver, and its current detection circuit includes a Hall effect current sensor (e.g., model CC6902). This sensor is connected in series in the bus power supply loop, capable of sensing current changes and outputting a proportional voltage signal. This voltage signal is shaped by a comparator and becomes a square wave signal, which is input to the timer input capture pin of the master microprocessor. The master microprocessor also uses the input capture function to measure the high-level duration of this square wave and decodes the pulse width into a data code group value according to a preset mapping rule (linear or nonlinear), thereby realizing the reception of uplink data. In addition, the system adopts half-duplex communication control. After the master station finishes sending downlink data, it will set its transmitting circuit to a high-impedance state and start the receiving mode. The slave station will only start transmitting when the address matches and the bus is idle, thereby avoiding communication conflicts.

[0056] This invention provides a two-bus bidirectional time-width modulation communication method. Its core idea is to encode data information in the pulse duration (i.e., time width) dimension, simultaneously achieving DC power supply and high-speed bidirectional data communication on two wires. For detailed implementation, please refer to... Figure 5 The data sending and receiving process shown mainly includes the following steps:

[0057] Step 1: Data processing and modulation at the data transmitting end

[0058] When the master or slave unit needs to send data, its microprocessor (e.g., an STM32F427 or STM32F247) performs the following operations:

[0059] Data Packetization: The microprocessor receives the data stream to be transmitted from the RS485 interface and segments the continuous binary sequence into multiple data code groups according to a preset number of bits (3 bits in this embodiment). For example, the sequence "101100111..." is segmented into "101", "100", "111", etc.

[0060] Time width mapping: The microprocessor pre-stores mapping rules. For linear mapping rules, the microprocessor calculates the corresponding pulse duration T_m based on the decimal value m of the data code group (range 0-7). Assuming the base time width T_base is 6.25 microseconds (corresponding to a certain symbol rate), the calculation formula is: T_m = T_base × (m + 1). For example, the code group "000" (m=0) corresponds to T_m = 6.25 microseconds, and the code group "111" (m=7) corresponds to T_m = 50 microseconds. For nonlinear mapping rules, the microprocessor directly looks up the pulse duration of the corresponding code group according to the pre-stored nonlinear mapping table.

[0061] Waveform generation and transmission:

[0062] Downlink transmission (master to slave): The master station microprocessor controls the voltage modulation circuit. First, it controls the bus voltage to switch from the static supply level (e.g., +12V) to the communication level (e.g., +15V) and maintains it for a T... base The duration is determined by generating a "0" state pulse as a communication start marker. Subsequently, for each data code group, the microprocessor determines the duration based on the mapped T... m The control voltage is maintained at +15V for a duration precisely T. m Each code group begins and ends with a "0" state transition from +12V to +15V. After a frame of data is transmitted, multiple (e.g., 3) "0" state pulses of T_base width are transmitted consecutively as a termination marker.

[0063] Uplink transmission (slave to master): The slave microprocessor controls the current modulation circuit. By controlling the on / off state of a switch, a current pulse of preset amplitude (e.g., approximately 20mA) is superimposed in the bus loop. The slave sequentially generates current pulse trains with widths modulated to the corresponding T_m based on the sequence of data codes to be uploaded. The transmission of communication start and stop flags is similar to downlink communication, also indicated by current pulses of specific widths.

[0064] Step 2: Demodulation and Decoding at the Data Receiver

[0065] The slave unit receives downlink data: its voltage detection circuit continuously monitors the bus voltage. This circuit includes a comparator with a threshold set between +12V and +15V (e.g., 13.5V). When the bus voltage changes, the comparator output flips, triggering an interrupt in the slave microprocessor. The slave microprocessor uses its internal high-precision timer's input capture function to accurately measure the width T of the high-level pulse. Based on a stored mapping rule (linear or non-linear) consistent with the master station, the microprocessor decodes T into the corresponding data code value m and reassembles it sequentially into the original data stream.

[0066] The master station receives uplink data: The current detection circuit of the master station unit monitors the bus loop current in real time. This circuit includes a Hall effect current sensor and a comparator. The sensor converts current changes into a voltage signal, and the comparator's threshold is set to respond only to signals exceeding the communication current jump amplitude (e.g., superimposed 20mA current). The master station microprocessor captures the pulse width of the shaped square wave signal through a timer and decodes it according to the mapping rules to recover the data uploaded by the slave station.

[0067] Step 3: Half-duplex communication control

[0068] The system employs a half-duplex mechanism to avoid bus collisions. After the master unit sends the termination flag of a data frame, its microprocessor program sets the transmitting circuit to a high-impedance state (electrical isolation) and immediately starts the receiving process. Slave units are assigned a unique address during system initialization. When a slave unit detects the start flag on the bus and decodes the address information, if the address matches, it gains transmission permission and starts the current modulation circuit to upload data after the bus becomes silent; if the address does not match, it ignores the data frame and remains silent.

[0069] Furthermore, the specific implementation of the preset bit count of 3 bits is as follows: the microprocessor groups the data stream to be transmitted into groups of 3 binary bits. Taking a symbol rate of 100 kbit / s as an example, the corresponding reference time width T_base can be selected as 6.25 microseconds. Under the linear mapping rule, for the current code group value m to be transmitted, the microprocessor performs an arithmetic operation, that is, performs multiplication (m+1) and multiplies it with the constant T_base, directly obtaining the pulse duration T_m corresponding to the code group. During decoding, the receiving end microprocessor divides the measured pulse width T by T_base and subtracts 1 to obtain the code group value m. For example, if the measured pulse width is 25 microseconds, m=3 is calculated, corresponding to the code group "011".

[0070] Furthermore, the specific implementation of nonlinear mapping coding is as follows: a nonlinear mapping lookup table is pre-stored in the non-volatile memory of the microprocessor. This table is designed with anti-interference optimization in mind; for example, the code group "000" corresponds to a pulse width of 6.25 microseconds; "001" corresponds to 12.5 microseconds; "010" corresponds to 25.0 microseconds; "011" corresponds to 37.5 microseconds; "100" corresponds to 50.0 microseconds; "101" corresponds to 62.5 microseconds; "110" corresponds to 75.0 microseconds; and "111" corresponds to 87.5 microseconds. In this mapping, the time interval between intermediate code groups is increased (e.g., the interval from "010" to "011" is 12.5 microseconds), thus providing a larger decision tolerance. During transmission, the microprocessor directly reads T_m from the table according to the code group value; during decoding at the receiving end, the measured pulse width T is matched with the preset value in the table to determine the most likely code group value.

[0071] Furthermore, during static communication, the master station unit maintains the bus voltage at +12V, which is the data state "1", and supplies power to the slave station units. The start flag is implemented as follows: the master station microprocessor controls the bus voltage to jump from +12V to +15V, precisely maintaining this voltage for T_base (e.g., 6.25 microseconds) before dropping back, forming a single "0" state pulse. The end flag is implemented as follows: after the last data code group is transmitted, the master station microprocessor continuously transmits N (N≥2, e.g., 3) identical "0" state pulse sequences (each with a width of T_base). The receiving end determines the end of the frame by continuously detecting multiple "0" state pulses.

[0072] Furthermore, when the master unit sends data, it switches the bus voltage between +12V and +15V by controlling the on / off ratio of the switching transistor. Since the "0" state (+15V) lasts for a very short time, the average bus voltage stabilizes between approximately 12.1V and 12.5V, which is sufficient to meet the power supply requirements of the slave unit. When the slave unit uploads data, its current modulation circuit is implemented as follows: a GPIO output port of the microprocessor controls the gate of an N-channel MOSFET through a driver circuit. The source of this MOSFET is grounded through a current-limiting resistor (e.g., approximately 300 ohms), and the drain is connected to the positive power supply. When the MOSFET is turned on, a current increment of approximately 20mA is generated in the bus loop. The slave unit controls the duration of this current pulse strictly according to the mapping rule based on the data code sequence.

[0073] Furthermore, the specific implementation of the master station unit's current jump signal detection is as follows: A Hall effect current sensor (e.g., model CC6902) is connected in series in the bus power supply loop, and its output is connected to the non-inverting input of a comparator (e.g., model OPA2333). The inverting input of the comparator is connected to a reference voltage V_ref generated by a precision resistor divider. The value of V_ref is calculated and set according to the static bus current and the communication current jump threshold, so that the comparator only responds to current jumps exceeding the preset threshold. The output of the comparator is connected to a timer input capture pin of the master station microprocessor. The microprocessor is configured to use the timer to capture count values ​​on the rising and falling edges of the input signal, thereby accurately calculating the pulse width.

[0074] Furthermore, the specific implementation of half-duplex communication control is as follows: After the master station unit sends the termination flag, its microprocessor executes a state switching program, sets the GPIO pin of the driving voltage modulation circuit to a high-impedance input mode to achieve electrical isolation between the transmitting circuit and the bus, and immediately reconfigures the receive timer to start receiving. On the slave station unit's side, after its microprocessor decodes the start flag and address information of the downlink frame through the voltage detection circuit, it compares the local address. If the address matches, it prepares to receive response data. After the bus detects an idle period (e.g., no voltage transition), the slave station microprocessor controls the current modulation circuit to upload data according to the uplink transmission process of claim 1. This ensures that only one node on the bus is in the transmitting state at any given time.

[0075] Furthermore, the present invention provides a two-bus bidirectional time-width modulation communication system, including a master station unit, a slave station unit, and a two-core bus connecting the two.

[0076] Master Station Unit: Centered around a master station microprocessor. The voltage modulation circuit includes optocouplers (e.g., TLP785) and power MOSFETs (e.g., IRLML2502). The microprocessor outputs a PWM signal, which, after optocoupler isolation, drives the MOSFETs, switching the bus voltage between +12V and +15V. The current detection circuit includes a Hall effect current sensor and a comparator, used to detect and shape current transition signals transmitted from slave stations. The first interface circuit is an RS485 transceiver (e.g., MAX13487), connecting to the host computer.

[0077] Slave Unit: Centered around a slave microprocessor. The voltage detection circuit includes a comparator for shaping bus voltage transition signals. The current modulation circuit, similar in structure to the master voltage modulation circuit, generates approximately 20mA current pulses. The rectifier power supply circuit includes a full-bridge rectifier and filter capacitors, drawing power from the bus to provide a stable DC power supply to the slave unit and downstream sensors, enabling non-polarity connection. The second interface circuit is also an RS485 transceiver, connecting to local sensors.

[0078] Furthermore, in the voltage modulation circuit of the master station unit, the first and second switching transistors are specifically N-channel MOSFETs of model IRLML2502TRPBF, and their gate drive circuits use TLP785 series high-speed optocouplers for isolated driving. The Hall current sensor is specifically model CC6902SO, with a sensitivity of 200mV / A. The comparator is specifically model OPA2333AIDCKR, configured in comparator mode, and its reference voltage is provided by a precision resistor network. The master station microprocessor utilizes one channel of its internal general-purpose timer, configured in input capture mode, to automatically measure the pulse width.

[0079] Furthermore, the third switch in the current modulation circuit of the slave unit also uses an IRLML2502TRPBF MOSFET, with its drain connected in series with a power resistor of approximately 300 ohms to the positive terminal of the bus, and its source grounded. The comparator in the voltage detection circuit also uses an OPA2333AIDCKR, whose threshold voltage is obtained by dividing +12V and +15V with two metal film resistors with an accuracy of 0.1%, precisely set to 13.5V. Both the first and second interface circuits use a MAX13487ESA RS485 transceiver, which has built-in transmit / receive enable control and ESD protection.

[0080] This invention provides an electronic device, including a memory and a processor. The memory may include high-speed random access memory (RAM) and non-volatile memory (Flash or EEPROM) for storing temporary runtime data, buffered data, and fixed mapping rule tables, device addresses, communication parameters, and computer program code. The processor may be an embedded microcontroller, such as the STM32F427 series, which integrates a CPU core, high-precision timers, a UART communication interface, and a GPIO controller. The processor executes the computer program stored in the memory to implement the steps of the method described above.

[0081] This invention provides a computer-readable storage medium, which may be a ROM, PROM, EPROM, EEPROM, flash memory, magnetic storage, or optical storage, etc. A computer program is stored on this medium. When the computer program is executed by a processor of an electronic device, the processor performs the steps of the method described above. For example, the program code includes modules such as data grouping functions, mapping calculation or lookup table functions, transition control timing generation functions, and pulse width measurement and decoding functions, which exist in the form of instructions.

[0082] By adopting the above-disclosed technical solution of this invention, the following beneficial effects are obtained:

[0083] Simplified cabling structure: Power and communication share two lines, which greatly simplifies the cabling structure, reduces construction costs and complexity, and is particularly suitable for substation renovation projects and deployment in confined spaces.

[0084] Significantly enhanced anti-interference capability: Employing time-width modulation technology, data information is encoded along the pulse duration dimension, providing inherent resistance to common-mode interference, signal attenuation, and load abrupt changes. Furthermore, communication reliability in complex electromagnetic environments is enhanced through nonlinear mapping optimization and comparator threshold setting.

[0085] High and stable communication speed: Based on a high-precision timer of a microprocessor, precise time control is achieved, supporting high data transmission rates. 3-bit packets achieve a good balance between communication speed, anti-interference capability, and implementation complexity.

[0086] High efficiency is achieved through bidirectional communication: the master station uses voltage-hopping transmission, while the slave station uses current-hopping transmission, resulting in clear logic and avoiding bus conflicts. The half-duplex mechanism is implemented through hardware state switching, ensuring high reliability.

[0087] High compatibility: As a transparent physical layer transmission channel, the system is transparent to upper layer application protocols, making it easy to integrate with existing systems.

[0088] Stable and reliable power supply: The bus voltage fluctuates between +12V and +15V, and the average voltage can still stably power the slave units and sensors. The correct power supply polarity is ensured through the rectifier bridge.

[0089] The above are merely preferred embodiments of the present invention. It should be noted that those skilled in the art can make various improvements and modifications without departing from the principles of the present invention, and these improvements and modifications should also be considered within the scope of protection of the present invention.

Claims

1. A two-bus bidirectional time-width modulation communication method, characterized in that, Includes the following steps: S1. Divide the data stream to be sent into groups according to a preset number of bits to form multiple data code groups; S2. According to the preset mapping rules, the value of each data code group is mapped to the corresponding pulse duration, wherein the pulse duration is an integer multiple of the reference time width; S3. When sending data to the slave unit through the two-bus, the control bus voltage switches between the power supply high level and the power supply low level, and the duration of the switch corresponds to the pulse duration of the data code group, thereby modulating the data onto the time width; S4. When the slave unit receives data, it detects the voltage transition signal on the bus, measures the pulse width of the transition signal, and decodes it into the corresponding data code group according to the preset mapping rule, restoring the original data stream; S5. When the slave unit uploads data to the master unit, it generates a current transition of a preset amplitude by controlling the load current, and controls the duration of the current transition to correspond to the pulse duration of the data code group. The master station unit detects the current transition signal on the bus, measures the pulse width of the current transition, and decodes it into the corresponding data code group. The two buses simultaneously achieve DC power supply and bidirectional data communication through only two wires. When communication is static, the bus voltage is maintained at the power supply high level, and the corresponding data state is "1". Communication starts with a "0" state transition of a reference time width as the start mark, and communication ends with multiple consecutive "0" state transitions as the end mark.

2. The method according to claim 1, characterized in that, The preset number of bits is 3 bits, the data code group is a 3-bit code group, and the decimal value m ranges from 0 to 7; the reference time width is T. base The pulse duration T corresponding to data code group m m Satisfy: T m =T base ×(m+1) This allows the 3-bit data code group to be mapped to 8 different pulse durations, thus achieving multi-level time-width encoding.

3. The method according to claim 1, characterized in that, According to the preset mapping rules, the value of each data code group is mapped to the corresponding pulse duration. Specifically, nonlinear mapping coding is adopted: the pulse duration corresponding to the data code group is mapped according to the non-uniform distribution rule, so that the time interval between different code groups is not exactly the same. The time interval between some code groups is greater than the reference time width, thereby providing a larger recognition tolerance between easily confused code groups, reducing the equivalent noise bandwidth, and improving the anti-interference ability.

4. The method according to claim 1, characterized in that, The communication static bus voltage is maintained at +12V, corresponding to a data state of "1". The start flag is a "0" state transition of a reference time width, corresponding to the bus voltage transitioning from +12V to +15V and maintaining the reference time width. The stop flag is N consecutive "0" state transitions, where N≥2, used to distinguish the communication start flag and the code group separator.

5. The method according to claim 1, characterized in that, When the master station unit sends data to the slave station unit, the bus voltage jumps between +12V and +15V, and the average voltage is kept within the range that can power the slave station unit and the sensor. When the slave station unit uploads data to the master station unit, it generates a current jump of about 20mA by controlling the load switching. The duration of the current jump corresponds to the pulse duration of the data code group. The main station unit detects current jump signals by: acquiring bus current signals through a Hall current sensor, shaping them into level signals through a comparator, and setting the threshold of the comparator to only respond to steep jumps exceeding a preset current change amplitude, thereby filtering out load variation interference and noise below the threshold. The microprocessor measures the duration of the shaped level signal using the input capture function of a timer.

6. The method according to claim 1, characterized in that, It also includes a half-duplex communication control step: after the master station unit finishes sending, it sets the transmitting circuit to a high-impedance state and starts the receiving circuit; after the slave station unit detects the communication start flag and the address matches, it obtains the sending permission and controls the current jump to upload data, thereby avoiding bus conflicts.

7. A two-bus bidirectional time-width modulation communication system, characterized in that, It includes a master station unit, a slave station unit, and two buses connecting the two; the two buses are used to transmit DC power and modulation data; the master station unit includes a master station microprocessor, a voltage modulation circuit, a current detection circuit, and a first interface circuit; The master station microprocessor is used to execute the sending step of the method according to any one of claims 1 to 6, and to control the voltage modulation circuit to generate a voltage jump signal; it is also used to execute the receiving step of the method according to any one of claims 1 to 6, and to detect and decode the current jump signal on the bus through the current detection circuit; the slave station unit includes a slave station microprocessor, a voltage detection circuit, a current modulation circuit, a rectifier power supply circuit, and a second interface circuit. The slave microprocessor is used to detect and decode voltage transition signals on the bus through a voltage detection circuit, and execute the receiving step of the method according to any one of claims 1 to 6; it is also used to execute the transmitting step of the method according to any one of claims 1 to 6, and control the current modulation circuit to generate current transition signals; the rectifier power supply circuit is used to obtain power from the two buses and supply power to the slave unit.

8. The system according to claim 7, characterized in that, The voltage modulation circuit of the master station unit includes a first switching transistor and a second switching transistor. The master station microprocessor drives the first and second switching transistors to switch on and off through opto-isolation, controlling the bus voltage to jump between +12V and +15V. The current detection circuit includes a Hall current sensor and a comparator. The Hall current sensor is used to collect the bus current signal, and the comparator shapes the current signal into a level signal and outputs it to the master station microprocessor for time measurement. The current modulation circuit of the slave unit includes a third switching transistor and a load resistor. The slave microprocessor controls the third switching transistor to turn on or off to generate a current jump of approximately 20mA. The voltage detection circuit includes a comparator for shaping the voltage jump signal on the bus into a square wave signal and outputting it to the slave microprocessor. Both the first and second interface circuits are RS485 interfaces, used to connect to external devices and perform transparent data transmission.

9. An electronic device, characterized in that, include: Memory, used to store computer programs; A processor for executing the computer program to implement the two-bus bidirectional time-width modulation communication method as described in any one of claims 1 to 6.

10. A computer-readable storage medium, characterized in that, Used to store computer programs; wherein, when the computer programs are executed by a processor, they implement the two-bus bidirectional time-width modulation communication method as described in any one of claims 1 to 6.

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